2 * Copyright (c) 2006 Oleksandr Tymoshenko
3 * Copyright (c) 2002-2004 Juli Mallett <jmallett@FreeBSD.org>
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions, and the following disclaimer,
11 * without modification, immediately at the beginning of the file.
12 * 2. The name of the author may not be used to endorse or promote products
13 * derived from this software without specific prior written permission.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
19 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD$");
32 #include <sys/param.h>
33 #include <sys/systm.h>
35 #include <sys/interrupt.h>
37 #include <machine/clock.h>
38 #include <machine/cpu.h>
39 #include <machine/cpufunc.h>
40 #include <machine/cpuinfo.h>
41 #include <machine/cpuregs.h>
42 #include <machine/frame.h>
43 #include <machine/intr_machdep.h>
44 #include <machine/md_var.h>
45 #include <machine/trap.h>
47 static struct intr_event *hardintr_events[NHARD_IRQS];
48 static struct intr_event *softintr_events[NSOFT_IRQS];
49 static mips_intrcnt_t mips_intr_counters[NSOFT_IRQS + NHARD_IRQS];
51 static int intrcnt_index;
53 static cpu_intr_mask_t hardintr_mask_func;
54 static cpu_intr_unmask_t hardintr_unmask_func;
57 mips_intrcnt_create(const char* name)
59 mips_intrcnt_t counter = &intrcnt[intrcnt_index++];
61 mips_intrcnt_setname(counter, name);
66 mips_intrcnt_setname(mips_intrcnt_t counter, const char *name)
68 int idx = counter - intrcnt;
70 KASSERT(counter != NULL, ("mips_intrcnt_setname: NULL counter"));
72 snprintf(intrnames + (MAXCOMLEN + 1) * idx,
73 MAXCOMLEN + 1, "%-*s", MAXCOMLEN, name);
77 mips_mask_hard_irq(void *source)
79 uintptr_t irq = (uintptr_t)source;
81 mips_wr_status(mips_rd_status() & ~(((1 << irq) << 8) << 2));
85 mips_unmask_hard_irq(void *source)
87 uintptr_t irq = (uintptr_t)source;
89 mips_wr_status(mips_rd_status() | (((1 << irq) << 8) << 2));
93 mips_mask_soft_irq(void *source)
95 uintptr_t irq = (uintptr_t)source;
97 mips_wr_status(mips_rd_status() & ~((1 << irq) << 8));
101 mips_unmask_soft_irq(void *source)
103 uintptr_t irq = (uintptr_t)source;
105 mips_wr_status(mips_rd_status() | ((1 << irq) << 8));
109 * Perform initialization of interrupts prior to setting
113 cpu_init_interrupts()
116 char name[MAXCOMLEN + 1];
119 * Initialize all available vectors so spare IRQ
120 * would show up in systat output
122 for (i = 0; i < NSOFT_IRQS; i++) {
123 snprintf(name, MAXCOMLEN + 1, "sint%d:", i);
124 mips_intr_counters[i] = mips_intrcnt_create(name);
127 for (i = 0; i < NHARD_IRQS; i++) {
128 snprintf(name, MAXCOMLEN + 1, "int%d:", i);
129 mips_intr_counters[NSOFT_IRQS + i] = mips_intrcnt_create(name);
134 cpu_set_hardintr_mask_func(cpu_intr_mask_t func)
137 hardintr_mask_func = func;
141 cpu_set_hardintr_unmask_func(cpu_intr_unmask_t func)
144 hardintr_unmask_func = func;
148 cpu_establish_hardintr(const char *name, driver_filter_t *filt,
149 void (*handler)(void*), void *arg, int irq, int flags, void **cookiep)
151 struct intr_event *event;
155 * We have 6 levels, but thats 0 - 5 (not including 6)
157 if (irq < 0 || irq >= NHARD_IRQS)
158 panic("%s called for unknown hard intr %d", __func__, irq);
160 if (hardintr_mask_func == NULL)
161 hardintr_mask_func = mips_mask_hard_irq;
163 if (hardintr_unmask_func == NULL)
164 hardintr_unmask_func = mips_unmask_hard_irq;
166 event = hardintr_events[irq];
168 error = intr_event_create(&event, (void *)(uintptr_t)irq, 0,
169 irq, hardintr_mask_func, hardintr_unmask_func,
170 NULL, NULL, "int%d", irq);
173 hardintr_events[irq] = event;
174 mips_unmask_hard_irq((void*)(uintptr_t)irq);
177 intr_event_add_handler(event, name, filt, handler, arg,
178 intr_priority(flags), flags, cookiep);
180 mips_intrcnt_setname(mips_intr_counters[NSOFT_IRQS + irq],
185 cpu_establish_softintr(const char *name, driver_filter_t *filt,
186 void (*handler)(void*), void *arg, int irq, int flags,
189 struct intr_event *event;
193 printf("Establish SOFT IRQ %d: filt %p handler %p arg %p\n",
194 irq, filt, handler, arg);
196 if (irq < 0 || irq > NSOFT_IRQS)
197 panic("%s called for unknown hard intr %d", __func__, irq);
199 event = softintr_events[irq];
201 error = intr_event_create(&event, (void *)(uintptr_t)irq, 0,
202 irq, mips_mask_soft_irq, mips_unmask_soft_irq,
203 NULL, NULL, "sint%d:", irq);
206 softintr_events[irq] = event;
207 mips_unmask_soft_irq((void*)(uintptr_t)irq);
210 intr_event_add_handler(event, name, filt, handler, arg,
211 intr_priority(flags), flags, cookiep);
213 mips_intrcnt_setname(mips_intr_counters[irq], event->ie_fullname);
217 cpu_intr(struct trapframe *tf)
219 struct intr_event *event;
220 register_t cause, status;
225 cause = mips_rd_cause();
226 status = mips_rd_status();
227 intr = (cause & MIPS_INT_MASK) >> 8;
229 * Do not handle masked interrupts. They were masked by
230 * pre_ithread function (mips_mask_XXX_intr) and will be
231 * unmasked once ithread is through with handler
233 intr &= (status & MIPS_INT_MASK) >> 8;
234 while ((i = fls(intr)) != 0) {
235 intr &= ~(1 << (i - 1));
238 /* Software interrupt. */
239 i--; /* Get a 0-offset interrupt. */
241 event = softintr_events[i];
242 mips_intrcnt_inc(mips_intr_counters[i]);
245 /* Hardware interrupt. */
246 i -= 2; /* Trim software interrupt bits. */
247 i--; /* Get a 0-offset interrupt. */
249 event = hardintr_events[i];
250 mips_intrcnt_inc(mips_intr_counters[NSOFT_IRQS + i]);
254 if (!event || TAILQ_EMPTY(&event->ie_handlers)) {
255 printf("stray %s interrupt %d\n",
256 hard ? "hard" : "soft", i);
260 if (intr_event_handle(event, tf) != 0) {
261 printf("stray %s interrupt %d\n",
262 hard ? "hard" : "soft", i);
266 KASSERT(i == 0, ("all interrupts handled"));