2 * Copyright (c) 2003-2012 Broadcom Corporation
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
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10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
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13 * the documentation and/or other materials provided with the
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17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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19 * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE
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29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD$");
31 #include <sys/param.h>
32 #include <sys/systm.h>
33 #include <sys/endian.h>
35 #include <mips/nlm/hal/mips-extns.h>
36 #include <mips/nlm/hal/haldefs.h>
37 #include <mips/nlm/hal/iomap.h>
38 #include <mips/nlm/hal/gbu.h>
40 #include <mips/nlm/board.h>
42 #define CPLD_REVISION 0x0
43 #define CPLD_RESET 0x1
46 #define CPLD_PWR_CTRL 0x4
48 #define CPLD_CTRL_STATUS 0x6
49 #define CPLD_PWR_INTR_STATUS 0x7
53 int nlm_cpld_read(uint64_t base, int reg)
57 val = *(volatile uint16_t *)(long)(base + reg * 2);
62 nlm_cpld_write(uint64_t base, int reg, uint16_t data)
65 *(volatile uint16_t *)(long)(base + reg * 2) = data;
69 nlm_board_cpld_majorversion(uint64_t base)
71 return (nlm_cpld_read(base, CPLD_REVISION) >> 8);
75 nlm_board_cpld_minorversion(uint64_t base)
77 return (nlm_cpld_read(base, CPLD_REVISION) & 0xff);
80 uint64_t nlm_board_cpld_base(int node, int chipselect)
82 uint64_t gbubase, cpld_phys;
84 gbubase = nlm_get_gbu_regbase(node);
85 cpld_phys = nlm_read_gbu_reg(gbubase, GBU_CS_BASEADDR(chipselect));
86 return (MIPS_PHYS_TO_KSEG1(cpld_phys << 8));
90 nlm_board_cpld_reset(uint64_t base)
93 nlm_cpld_write(base, CPLD_RESET, 1 << 15);
95 __asm __volatile("wait");
98 /* get daughter board type */
100 nlm_board_cpld_dboard_type(uint64_t base, int slot)
106 case 0: shift = 0; break;
107 case 1: shift = 4; break;
108 case 2: shift = 2; break;
109 case 3: shift = 6; break;
111 val = nlm_cpld_read(base, CPLD_CTRL_STATUS) >> shift;