2 * Copyright (c) 2010 Isilon Systems, Inc.
3 * Copyright (c) 2010 iX Systems, Inc.
4 * Copyright (c) 2010 Panasas, Inc.
5 * Copyright (c) 2013, 2014 Mellanox Technologies, Ltd.
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice unmodified, this list of conditions, and the following
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 #include <machine/vm.h>
35 static inline uint32_t
36 __raw_readl(const volatile void *addr)
38 return *(const volatile uint32_t *)addr;
42 __raw_writel(uint32_t b, volatile void *addr)
44 *(volatile uint32_t *)addr = b;
47 static inline uint64_t
48 __raw_readq(const volatile void *addr)
50 return *(const volatile uint64_t *)addr;
54 __raw_writeq(uint64_t b, volatile void *addr)
56 *(volatile uint64_t *)addr = b;
60 * XXX This is all x86 specific. It should be bus space access.
66 writel(uint32_t b, void *addr)
68 *(volatile uint32_t *)addr = b;
73 writeq(uint64_t b, void *addr)
75 *(volatile uint64_t *)addr = b;
80 writeb(uint8_t b, void *addr)
82 *(volatile uint8_t *)addr = b;
87 writew(uint16_t b, void *addr)
89 *(volatile uint16_t *)addr = b;
92 void *_ioremap_attr(vm_paddr_t phys_addr, unsigned long size, int attr);
93 #define ioremap_nocache(addr, size) \
94 _ioremap_attr((addr), (size), VM_MEMATTR_UNCACHEABLE)
95 #define ioremap_wc(addr, size) \
96 _ioremap_attr((addr), (size), VM_MEMATTR_WRITE_COMBINING)
97 #define ioremap ioremap_nocache
98 void iounmap(void *addr);
100 #define memset_io(a, b, c) memset((a), (b), (c))
101 #define memcpy_fromio(a, b, c) memcpy((a), (b), (c))
102 #define memcpy_toio(a, b, c) memcpy((a), (b), (c))
105 __iowrite64_copy(void *to, void *from, size_t count)
112 for (i = 0, src = from, dst = to; i < count; i++, src++, dst++)
113 __raw_writeq(*src, dst);
120 for (i = 0, src = from, dst = to; i < count; i++, src++, dst++)
121 __raw_writel(*src, dst);
126 #endif /* _LINUX_IO_H_ */