1 /**************************************************************************
4 ** Device driver for the NCR 53C8XX PCI-SCSI-Controller Family.
6 **-------------------------------------------------------------------------
8 ** Written for 386bsd and FreeBSD by
9 ** Wolfgang Stanglmeier <wolf@cologne.de>
10 ** Stefan Esser <se@mi.Uni-Koeln.de>
12 **-------------------------------------------------------------------------
15 ** Copyright (c) 1994 Wolfgang Stanglmeier. All rights reserved.
17 ** Redistribution and use in source and binary forms, with or without
18 ** modification, are permitted provided that the following conditions
20 ** 1. Redistributions of source code must retain the above copyright
21 ** notice, this list of conditions and the following disclaimer.
22 ** 2. Redistributions in binary form must reproduce the above copyright
23 ** notice, this list of conditions and the following disclaimer in the
24 ** documentation and/or other materials provided with the distribution.
25 ** 3. The name of the author may not be used to endorse or promote products
26 ** derived from this software without specific prior written permission.
28 ** THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
29 ** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
30 ** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
31 ** IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
32 ** INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
33 ** NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
34 ** DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
35 ** THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
36 ** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
37 ** THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 ***************************************************************************
42 #include <sys/cdefs.h>
43 __FBSDID("$FreeBSD$");
46 #define NCR_DATE "pl30 98/1/1"
48 #define NCR_VERSION (2)
49 #define MAX_UNITS (16)
51 #define NCR_GETCC_WITHMSG
53 #if defined (__FreeBSD__) && defined(_KERNEL)
57 /*==========================================================
59 ** Configuration and Debugging
61 ** May be overwritten in <arch/conf/xxxx>
63 **==========================================================
67 ** SCSI address of this device.
68 ** The boot routines should have set it.
72 #ifndef SCSI_NCR_MYADDR
73 #define SCSI_NCR_MYADDR (7)
74 #endif /* SCSI_NCR_MYADDR */
77 ** The default synchronous period factor
79 ** If maximum synchronous frequency is defined, use it instead.
82 #ifndef SCSI_NCR_MAX_SYNC
84 #ifndef SCSI_NCR_DFLT_SYNC
85 #define SCSI_NCR_DFLT_SYNC (12)
86 #endif /* SCSI_NCR_DFLT_SYNC */
90 #if SCSI_NCR_MAX_SYNC == 0
91 #define SCSI_NCR_DFLT_SYNC 0
93 #define SCSI_NCR_DFLT_SYNC (250000 / SCSI_NCR_MAX_SYNC)
99 ** The minimal asynchronous pre-scaler period (ns)
103 #ifndef SCSI_NCR_MIN_ASYNC
104 #define SCSI_NCR_MIN_ASYNC (40)
105 #endif /* SCSI_NCR_MIN_ASYNC */
108 ** The maximal bus with (in log2 byte)
109 ** (0=8 bit, 1=16 bit)
112 #ifndef SCSI_NCR_MAX_WIDE
113 #define SCSI_NCR_MAX_WIDE (1)
114 #endif /* SCSI_NCR_MAX_WIDE */
116 /*==========================================================
118 ** Configuration and Debugging
120 **==========================================================
124 ** Number of targets supported by the driver.
125 ** n permits target numbers 0..n-1.
126 ** Default is 7, meaning targets #0..#6.
130 #define MAX_TARGET (16)
133 ** Number of logic units supported by the driver.
134 ** n enables logic unit numbers 0..n-1.
135 ** The common SCSI devices require only
136 ** one lun, so take 1 as the default.
144 ** The maximum number of jobs scheduled for starting.
145 ** There should be one slot per target, and one slot
146 ** for each tag of each target in use.
149 #define MAX_START (256)
152 ** The maximum number of segments a transfer is split into.
155 #define MAX_SCATTER (33)
158 ** The maximum transfer length (should be >= 64k).
159 ** MUST NOT be greater than (MAX_SCATTER-1) * PAGE_SIZE.
162 #define MAX_SIZE ((MAX_SCATTER-1) * (long) PAGE_SIZE)
168 #define NCR_SNOOP_TIMEOUT (1000000)
170 /*==========================================================
174 **==========================================================
177 #include <sys/param.h>
178 #include <sys/time.h>
181 #include <sys/systm.h>
182 #include <sys/malloc.h>
183 #include <sys/kernel.h>
184 #include <sys/module.h>
185 #include <sys/sysctl.h>
186 #include <sys/lock.h>
187 #include <sys/mutex.h>
189 #include <machine/md_var.h>
190 #include <machine/bus.h>
191 #include <machine/resource.h>
192 #include <sys/rman.h>
195 #include <vm/vm_extern.h>
198 #include <dev/pci/pcivar.h>
199 #include <dev/pci/pcireg.h>
200 #include <pci/ncrreg.h>
203 #include <cam/cam_ccb.h>
204 #include <cam/cam_sim.h>
205 #include <cam/cam_xpt_sim.h>
206 #include <cam/cam_debug.h>
208 #include <cam/scsi/scsi_all.h>
209 #include <cam/scsi/scsi_message.h>
211 /*==========================================================
215 **==========================================================
218 #define DEBUG_ALLOC (0x0001)
219 #define DEBUG_PHASE (0x0002)
220 #define DEBUG_POLL (0x0004)
221 #define DEBUG_QUEUE (0x0008)
222 #define DEBUG_RESULT (0x0010)
223 #define DEBUG_SCATTER (0x0020)
224 #define DEBUG_SCRIPT (0x0040)
225 #define DEBUG_TINY (0x0080)
226 #define DEBUG_TIMING (0x0100)
227 #define DEBUG_NEGO (0x0200)
228 #define DEBUG_TAGS (0x0400)
229 #define DEBUG_FREEZE (0x0800)
230 #define DEBUG_RESTART (0x1000)
233 ** Enable/Disable debug messages.
234 ** Can be changed at runtime too.
236 #ifdef SCSI_NCR_DEBUG
237 #define DEBUG_FLAGS ncr_debug
238 #else /* SCSI_NCR_DEBUG */
239 #define SCSI_NCR_DEBUG 0
240 #define DEBUG_FLAGS 0
241 #endif /* SCSI_NCR_DEBUG */
245 /*==========================================================
249 **==========================================================
251 ** modified copy from 386bsd:/usr/include/sys/assert.h
253 **----------------------------------------------------------
257 #define assert(expression) { \
258 KASSERT(expression, ("%s", #expression)); \
261 #define assert(expression) { \
262 if (!(expression)) { \
263 (void)printf("assertion \"%s\" failed: " \
264 "file \"%s\", line %d\n", \
265 #expression, __FILE__, __LINE__); \
270 /*==========================================================
272 ** Access to the controller chip.
274 **==========================================================
277 #define INB(r) bus_space_read_1(np->bst, np->bsh, offsetof(struct ncr_reg, r))
278 #define INW(r) bus_space_read_2(np->bst, np->bsh, offsetof(struct ncr_reg, r))
279 #define INL(r) bus_space_read_4(np->bst, np->bsh, offsetof(struct ncr_reg, r))
281 #define OUTB(r, val) bus_space_write_1(np->bst, np->bsh, \
282 offsetof(struct ncr_reg, r), val)
283 #define OUTW(r, val) bus_space_write_2(np->bst, np->bsh, \
284 offsetof(struct ncr_reg, r), val)
285 #define OUTL(r, val) bus_space_write_4(np->bst, np->bsh, \
286 offsetof(struct ncr_reg, r), val)
287 #define OUTL_OFF(o, val) bus_space_write_4(np->bst, np->bsh, o, val)
289 #define INB_OFF(o) bus_space_read_1(np->bst, np->bsh, o)
290 #define INW_OFF(o) bus_space_read_2(np->bst, np->bsh, o)
291 #define INL_OFF(o) bus_space_read_4(np->bst, np->bsh, o)
293 #define READSCRIPT_OFF(base, off) \
294 (base ? *((volatile u_int32_t *)((volatile char *)base + (off))) : \
295 bus_space_read_4(np->bst2, np->bsh2, off))
297 #define WRITESCRIPT_OFF(base, off, val) \
300 *((volatile u_int32_t *) \
301 ((volatile char *)base + (off))) = (val); \
303 bus_space_write_4(np->bst2, np->bsh2, off, val); \
306 #define READSCRIPT(r) \
307 READSCRIPT_OFF(np->script, offsetof(struct script, r))
309 #define WRITESCRIPT(r, val) \
310 WRITESCRIPT_OFF(np->script, offsetof(struct script, r), val)
313 ** Set bit field ON, OFF
316 #define OUTONB(r, m) OUTB(r, INB(r) | (m))
317 #define OUTOFFB(r, m) OUTB(r, INB(r) & ~(m))
318 #define OUTONW(r, m) OUTW(r, INW(r) | (m))
319 #define OUTOFFW(r, m) OUTW(r, INW(r) & ~(m))
320 #define OUTONL(r, m) OUTL(r, INL(r) | (m))
321 #define OUTOFFL(r, m) OUTL(r, INL(r) & ~(m))
323 /*==========================================================
325 ** Command control block states.
327 **==========================================================
332 #define HS_NEGOTIATE (2) /* sync/wide data transfer*/
333 #define HS_DISCONNECT (3) /* Disconnected by target */
335 #define HS_COMPLETE (4)
336 #define HS_SEL_TIMEOUT (5) /* Selection timeout */
337 #define HS_RESET (6) /* SCSI reset */
338 #define HS_ABORTED (7) /* Transfer aborted */
339 #define HS_TIMEOUT (8) /* Software timeout */
340 #define HS_FAIL (9) /* SCSI or PCI bus errors */
341 #define HS_UNEXPECTED (10) /* Unexpected disconnect */
342 #define HS_STALL (11) /* QUEUE FULL or BUSY */
344 #define HS_DONEMASK (0xfc)
346 /*==========================================================
348 ** Software Interrupt Codes
350 **==========================================================
353 #define SIR_SENSE_RESTART (1)
354 #define SIR_SENSE_FAILED (2)
355 #define SIR_STALL_RESTART (3)
356 #define SIR_STALL_QUEUE (4)
357 #define SIR_NEGO_SYNC (5)
358 #define SIR_NEGO_WIDE (6)
359 #define SIR_NEGO_FAILED (7)
360 #define SIR_NEGO_PROTO (8)
361 #define SIR_REJECT_RECEIVED (9)
362 #define SIR_REJECT_SENT (10)
363 #define SIR_IGN_RESIDUE (11)
364 #define SIR_MISSING_SAVE (12)
367 /*==========================================================
369 ** Extended error codes.
370 ** xerr_status field of struct nccb.
372 **==========================================================
376 #define XE_EXTRA_DATA (1) /* unexpected data phase */
377 #define XE_BAD_PHASE (2) /* illegal phase (4/5) */
379 /*==========================================================
381 ** Negotiation status.
382 ** nego_status field of struct nccb.
384 **==========================================================
390 /*==========================================================
392 ** XXX These are no longer used. Remove once the
393 ** script is updated.
394 ** "Special features" of targets.
395 ** quirks field of struct tcb.
396 ** actualquirks field of struct nccb.
398 **==========================================================
401 #define QUIRK_AUTOSAVE (0x01)
402 #define QUIRK_NOMSG (0x02)
403 #define QUIRK_NOSYNC (0x10)
404 #define QUIRK_NOWIDE16 (0x20)
405 #define QUIRK_NOTAGS (0x40)
406 #define QUIRK_UPDATE (0x80)
408 /*==========================================================
412 **==========================================================
415 #define CCB_MAGIC (0xf2691ad2)
416 #define MAX_TAGS (32) /* hard limit */
418 /*==========================================================
422 **==========================================================
425 #define PRINT_ADDR(ccb) xpt_print_path((ccb)->ccb_h.path)
427 /*==========================================================
429 ** Declaration of structs.
431 **==========================================================
440 typedef struct ncb * ncb_p;
441 typedef struct tcb * tcb_p;
442 typedef struct lcb * lcb_p;
443 typedef struct nccb * nccb_p;
457 #define UC_SETSYNC 10
458 #define UC_SETTAGS 11
459 #define UC_SETDEBUG 12
460 #define UC_SETORDER 13
461 #define UC_SETWIDE 14
462 #define UC_SETFLAG 15
464 #define UF_TRACE (0x01)
466 /*---------------------------------------
468 ** Timestamps for profiling
470 **---------------------------------------
473 /* Type of the kernel variable `ticks'. XXX should be declared with the var. */
487 ** profiling data (per device)
503 /*==========================================================
505 ** Declaration of structs: target control block
507 **==========================================================
510 #define NCR_TRANS_CUR 0x01 /* Modify current neogtiation status */
511 #define NCR_TRANS_ACTIVE 0x03 /* Assume this is the active target */
512 #define NCR_TRANS_GOAL 0x04 /* Modify negotiation goal */
513 #define NCR_TRANS_USER 0x08 /* Modify user negotiation settings */
515 struct ncr_transinfo {
521 struct ncr_target_tinfo {
522 /* Hardware version of our sync settings */
524 #define NCR_CUR_DISCENB 0x01
525 #define NCR_CUR_TAGENB 0x02
526 #define NCR_USR_DISCENB 0x04
527 #define NCR_USR_TAGENB 0x08
529 struct ncr_transinfo current;
530 struct ncr_transinfo goal;
531 struct ncr_transinfo user;
532 /* Hardware version of our wide settings */
538 ** during reselection the ncr jumps to this point
539 ** with SFBR set to the encoded target number
541 ** if it's not this target, jump to the next.
543 ** JUMP IF (SFBR != #target#)
547 struct link jump_tcb;
550 ** load the actual values for the sxfer and the scntl3
551 ** register (sync/wide mode).
554 ** @(sval field of this tcb)
557 ** @(wval field of this tcb)
558 ** @(scntl3 register)
564 ** if next message is "identify"
565 ** then load the message to SFBR,
566 ** else load 0 to SFBR.
572 struct link call_lun;
575 ** now look for the right lun.
578 ** @(first nccb of this lun)
581 struct link jump_lcb;
584 ** pointer to interrupted getcc nccb
590 ** pointer to nccb used for negotiating.
591 ** Avoid to start a nego for all queued commands
592 ** when tagged command queuing is enabled.
605 ** user settable limits for sync transfer
606 ** and tagged commands.
609 struct ncr_target_tinfo tinfo;
612 ** the lcb's of this tcb
618 /*==========================================================
620 ** Declaration of structs: lun control block
622 **==========================================================
627 ** during reselection the ncr jumps to this point
628 ** with SFBR set to the "Identify" message.
629 ** if it's not this lun, jump to the next.
631 ** JUMP IF (SFBR != #lun#)
632 ** @(next lcb of this target)
635 struct link jump_lcb;
638 ** if next message is "simple tag",
639 ** then load the tag to SFBR,
640 ** else load 0 to SFBR.
646 struct link call_tag;
649 ** now look for the right nccb.
652 ** @(first nccb of this lun)
655 struct link jump_nccb;
658 ** start of the nccb chain
664 ** Control of tagged queueing
674 /*==========================================================
676 ** Declaration of structs: COMMAND control block
678 **==========================================================
680 ** This substructure is copied from the nccb to a
681 ** global address after selection (or reselection)
682 ** and copied back before disconnect.
684 ** These fields are accessible to the script processor.
686 **----------------------------------------------------------
691 ** Execution of a nccb starts at this point.
692 ** It's a jump to the "SELECT" label
695 ** After successful selection the script
696 ** processor overwrites it with a jump to
697 ** the IDLE label of the script.
703 ** Saved data pointer.
704 ** Points to the position in the script
705 ** responsible for the actual transfer
707 ** It's written after reception of a
708 ** "SAVE_DATA_POINTER" message.
709 ** The goalpointer points after
710 ** the last transfer command.
718 ** The virtual address of the nccb
719 ** containing this header.
725 ** space for some timestamps to gather
726 ** profiling data about devices and this driver.
739 ** The status bytes are used by the host and the script processor.
741 ** The first four byte are copied to the scratchb register
742 ** (declared as scr0..scr3 in ncr_reg.h) just after the select/reselect,
743 ** and copied back just after disconnecting.
744 ** Inside the script the XX_REG are used.
746 ** The last four bytes are used inside the script by "COPY" commands.
747 ** Because source and destination must have the same alignment
748 ** in a longword, the fields HAVE to be at the choosen offsets.
749 ** xerr_st (4) 0 (0x34) scratcha
750 ** sync_st (5) 1 (0x05) sxfer
751 ** wide_st (7) 3 (0x03) scntl3
755 ** First four bytes (script)
759 #define HS_PRT nc_scr1
764 ** First four bytes (host)
766 #define actualquirks phys.header.status[0]
767 #define host_status phys.header.status[1]
768 #define s_status phys.header.status[2]
769 #define parity_status phys.header.status[3]
772 ** Last four bytes (script)
774 #define xerr_st header.status[4] /* MUST be ==0 mod 4 */
775 #define sync_st header.status[5] /* MUST be ==1 mod 4 */
776 #define nego_st header.status[6]
777 #define wide_st header.status[7] /* MUST be ==3 mod 4 */
780 ** Last four bytes (host)
782 #define xerr_status phys.xerr_st
783 #define sync_status phys.sync_st
784 #define nego_status phys.nego_st
785 #define wide_status phys.wide_st
787 /*==========================================================
789 ** Declaration of structs: Data structure block
791 **==========================================================
793 ** During execution of a nccb by the script processor,
794 ** the DSA (data structure address) register points
795 ** to this substructure of the nccb.
796 ** This substructure contains the header with
797 ** the script-processor-changable data and
798 ** data blocks for the indirect move commands.
800 **----------------------------------------------------------
807 ** Has to be the first entry,
808 ** because it's jumped to by the
815 ** Table data for Script
818 struct scr_tblsel select;
819 struct scr_tblmove smsg ;
820 struct scr_tblmove smsg2 ;
821 struct scr_tblmove cmd ;
822 struct scr_tblmove scmd ;
823 struct scr_tblmove sense ;
824 struct scr_tblmove data [MAX_SCATTER];
827 /*==========================================================
829 ** Declaration of structs: Command control block.
831 **==========================================================
833 ** During execution of a nccb by the script processor,
834 ** the DSA (data structure address) register points
835 ** to this substructure of the nccb.
836 ** This substructure contains the header with
837 ** the script-processor-changable data and then
838 ** data blocks for the indirect move commands.
840 **----------------------------------------------------------
846 ** This filler ensures that the global header is
847 ** cache line size aligned.
852 ** during reselection the ncr jumps to this point.
853 ** If a "SIMPLE_TAG" message was received,
854 ** then SFBR is set to the tag.
855 ** else SFBR is set to 0
856 ** If looking for another tag, jump to the next nccb.
858 ** JUMP IF (SFBR != #TAG#)
859 ** @(next nccb of this lun)
862 struct link jump_nccb;
865 ** After execution of this call, the return address
866 ** (in the TEMP register) points to the following
867 ** data structure block.
868 ** So copy it to the DSA register, and start
869 ** processing of this data structure.
875 struct link call_tmp;
878 ** This is the data structure which is
879 ** to be executed by the script processor.
885 ** If a data transfer phase is terminated too early
886 ** (after reception of a message (i.e. DISCONNECT)),
887 ** we have to prepare a mini script to transfer
888 ** the rest of the data.
894 ** The general SCSI driver provides a
895 ** pointer to a control block.
901 ** We prepare a message to be sent after selection,
902 ** and a second one to be sent after getcc selection.
903 ** Contents are IDENTIFY and SIMPLE_TAG.
904 ** While negotiating sync or wide transfer,
905 ** a SDTM or WDTM message is appended.
908 u_char scsi_smsg [8];
909 u_char scsi_smsg2[8];
913 ** Flag is used while looking for a free nccb.
919 ** Physical address of this instance of nccb
925 ** Completion time out for this job.
926 ** It's set to time of start + allowed number of seconds.
932 ** All nccbs of one hostadapter are chained.
938 ** All nccbs of one target/lun are chained.
950 ** Tag for this transfer.
951 ** It's patched into jump_nccb.
952 ** If it's not zero, a SIMPLE_TAG
953 ** message is included in smsg.
959 #define CCB_PHYS(cp,lbl) (cp->p_nccb + offsetof(struct nccb, lbl))
961 /*==========================================================
963 ** Declaration of structs: NCR device descriptor
965 **==========================================================
970 ** The global header.
971 ** Accessible to both the host and the
973 ** We assume it is cache line size aligned.
979 /*-----------------------------------------------
981 **-----------------------------------------------
983 ** During reselection the ncr jumps to this point.
984 ** The SFBR register is loaded with the encoded target id.
986 ** Jump to the first target.
991 struct link jump_tcb;
993 /*-----------------------------------------------
995 **-----------------------------------------------
997 ** virtual and physical addresses
998 ** of the 53c810 chip.
1001 struct resource *reg_res;
1002 bus_space_tag_t bst;
1003 bus_space_handle_t bsh;
1006 struct resource *sram_res;
1007 bus_space_tag_t bst2;
1008 bus_space_handle_t bsh2;
1010 struct resource *irq_res;
1014 ** Scripts instance virtual address.
1016 struct script *script;
1017 struct scripth *scripth;
1020 ** Scripts instance physical address.
1026 ** The SCSI address of the host adapter.
1031 ** timing parameters
1033 u_char minsync; /* Minimum sync period factor */
1034 u_char maxsync; /* Maximum sync period factor */
1035 u_char maxoffs; /* Max scsi offset */
1036 u_char clock_divn; /* Number of clock divisors */
1037 u_long clock_khz; /* SCSI clock frequency in KHz */
1038 u_long features; /* Chip features map */
1039 u_char multiplier; /* Clock multiplier (1,2,4) */
1041 u_char maxburst; /* log base 2 of dwords burst */
1044 ** BIOS supplied PCI bus options
1055 /*-----------------------------------------------
1056 ** CAM SIM information for this instance
1057 **-----------------------------------------------
1060 struct cam_sim *sim;
1061 struct cam_path *path;
1063 /*-----------------------------------------------
1065 **-----------------------------------------------
1067 ** Commands from user
1074 struct tcb target[MAX_TARGET];
1079 u_int32_t squeue [MAX_START];
1089 struct callout_handle timeout_ch;
1091 /*-----------------------------------------------
1092 ** Debug and profiling
1093 **-----------------------------------------------
1097 struct ncr_reg regdump;
1103 struct profile profile;
1108 ** Head of list of all nccbs for this controller.
1114 ** Should be longword aligned,
1115 ** because they're written with a
1116 ** COPY script command.
1123 ** Buffer for STATUS_IN phase.
1128 ** controller chip dependent maximal transfer width.
1134 ** address of the ncr control registers in io space
1140 #define NCB_SCRIPT_PHYS(np,lbl) (np->p_script + offsetof (struct script, lbl))
1141 #define NCB_SCRIPTH_PHYS(np,lbl) (np->p_scripth + offsetof (struct scripth,lbl))
1143 /*==========================================================
1146 ** Script for NCR-Processor.
1148 ** Use ncr_script_fill() to create the variable parts.
1149 ** Use ncr_script_copy_and_bind() to make a copy and
1150 ** bind to physical addresses.
1153 **==========================================================
1155 ** We have to know the offsets of all labels before
1156 ** we reach them (for forward jumps).
1157 ** Therefore we declare a struct here.
1158 ** If you make changes inside the script,
1159 ** DONT FORGET TO CHANGE THE LENGTHS HERE!
1161 **----------------------------------------------------------
1165 ** Script fragments which are loaded into the on-board RAM
1166 ** of 825A, 875 and 895 chips.
1172 ncrcmd startpos [ 1];
1177 ncrcmd select [ 18];
1178 ncrcmd prepare [ 4];
1179 ncrcmd loadpos [ 14];
1180 ncrcmd prepare2 [ 24];
1183 ncrcmd dispatch [ 33];
1184 ncrcmd no_data [ 17];
1185 ncrcmd checkatn [ 10];
1186 ncrcmd command [ 15];
1187 ncrcmd status [ 27];
1188 ncrcmd msg_in [ 26];
1189 ncrcmd msg_bad [ 6];
1190 ncrcmd complete [ 13];
1191 ncrcmd cleanup [ 12];
1192 ncrcmd cleanup0 [ 9];
1193 ncrcmd signal [ 12];
1194 ncrcmd save_dp [ 5];
1195 ncrcmd restore_dp [ 5];
1196 ncrcmd disconnect [ 12];
1197 ncrcmd disconnect0 [ 5];
1198 ncrcmd disconnect1 [ 23];
1199 ncrcmd msg_out [ 9];
1200 ncrcmd msg_out_done [ 7];
1201 ncrcmd badgetcc [ 6];
1202 ncrcmd reselect [ 8];
1203 ncrcmd reselect1 [ 8];
1204 ncrcmd reselect2 [ 8];
1205 ncrcmd resel_tmp [ 5];
1206 ncrcmd resel_lun [ 18];
1207 ncrcmd resel_tag [ 24];
1208 ncrcmd data_in [MAX_SCATTER * 4 + 7];
1209 ncrcmd data_out [MAX_SCATTER * 4 + 7];
1213 ** Script fragments which stay in main memory for all chips.
1216 ncrcmd tryloop [MAX_START*5+2];
1217 ncrcmd msg_parity [ 6];
1218 ncrcmd msg_reject [ 8];
1219 ncrcmd msg_ign_residue [ 32];
1220 ncrcmd msg_extended [ 18];
1221 ncrcmd msg_ext_2 [ 18];
1222 ncrcmd msg_wdtr [ 27];
1223 ncrcmd msg_ext_3 [ 18];
1224 ncrcmd msg_sdtr [ 27];
1225 ncrcmd msg_out_abort [ 10];
1228 #ifdef NCR_GETCC_WITHMSG
1229 ncrcmd getcc2 [ 29];
1231 ncrcmd getcc2 [ 14];
1234 ncrcmd aborttag [ 4];
1236 ncrcmd snooptest [ 9];
1237 ncrcmd snoopend [ 2];
1240 /*==========================================================
1243 ** Function headers.
1246 **==========================================================
1250 static nccb_p ncr_alloc_nccb(ncb_p np, u_long target, u_long lun);
1251 static void ncr_complete(ncb_p np, nccb_p cp);
1252 static int ncr_delta(int * from, int * to);
1253 static void ncr_exception(ncb_p np);
1254 static void ncr_free_nccb(ncb_p np, nccb_p cp);
1255 static void ncr_freeze_devq(ncb_p np, struct cam_path *path);
1256 static void ncr_selectclock(ncb_p np, u_char scntl3);
1257 static void ncr_getclock(ncb_p np, u_char multiplier);
1258 static nccb_p ncr_get_nccb(ncb_p np, u_long t,u_long l);
1260 static u_int32_t ncr_info(int unit);
1262 static void ncr_init(ncb_p np, char * msg, u_long code);
1263 static void ncr_intr(void *vnp);
1264 static void ncr_int_ma(ncb_p np, u_char dstat);
1265 static void ncr_int_sir(ncb_p np);
1266 static void ncr_int_sto(ncb_p np);
1268 static void ncr_min_phys(struct buf *bp);
1270 static void ncr_poll(struct cam_sim *sim);
1271 static void ncb_profile(ncb_p np, nccb_p cp);
1272 static void ncr_script_copy_and_bind(ncb_p np, ncrcmd *src, ncrcmd *dst,
1274 static void ncr_script_fill(struct script * scr, struct scripth *scrh);
1275 static int ncr_scatter(struct dsb* phys, vm_offset_t vaddr,
1277 static void ncr_getsync(ncb_p np, u_char sfac, u_char *fakp,
1279 static void ncr_setsync(ncb_p np, nccb_p cp,u_char scntl3,u_char sxfer,
1281 static void ncr_setwide(ncb_p np, nccb_p cp, u_char wide, u_char ack);
1282 static int ncr_show_msg(u_char * msg);
1283 static int ncr_snooptest(ncb_p np);
1284 static void ncr_action(struct cam_sim *sim, union ccb *ccb);
1285 static void ncr_timeout(void *arg);
1286 static void ncr_wakeup(ncb_p np, u_long code);
1288 static int ncr_probe(device_t dev);
1289 static int ncr_attach(device_t dev);
1291 #endif /* _KERNEL */
1293 /*==========================================================
1296 ** Global static data.
1299 **==========================================================
1302 static const u_long ncr_version = NCR_VERSION * 11
1303 + (u_long) sizeof (struct ncb) * 7
1304 + (u_long) sizeof (struct nccb) * 5
1305 + (u_long) sizeof (struct lcb) * 3
1306 + (u_long) sizeof (struct tcb) * 2;
1310 static int ncr_debug = SCSI_NCR_DEBUG;
1311 SYSCTL_INT(_debug, OID_AUTO, ncr_debug, CTLFLAG_RW, &ncr_debug, 0, "");
1313 static int ncr_cache; /* to be aligned _NOT_ static */
1315 /*==========================================================
1318 ** Global static data: auto configure
1321 **==========================================================
1324 #define NCR_810_ID (0x00011000ul)
1325 #define NCR_815_ID (0x00041000ul)
1326 #define NCR_820_ID (0x00021000ul)
1327 #define NCR_825_ID (0x00031000ul)
1328 #define NCR_860_ID (0x00061000ul)
1329 #define NCR_875_ID (0x000f1000ul)
1330 #define NCR_875_ID2 (0x008f1000ul)
1331 #define NCR_885_ID (0x000d1000ul)
1332 #define NCR_895_ID (0x000c1000ul)
1333 #define NCR_896_ID (0x000b1000ul)
1334 #define NCR_895A_ID (0x00121000ul)
1335 #define NCR_1510D_ID (0x000a1000ul)
1338 static char *ncr_name (ncb_p np)
1340 static char name[10];
1341 snprintf(name, sizeof(name), "ncr%d", np->unit);
1345 /*==========================================================
1348 ** Scripts for NCR-Processor.
1350 ** Use ncr_script_bind for binding to physical addresses.
1353 **==========================================================
1355 ** NADDR generates a reference to a field of the controller data.
1356 ** PADDR generates a reference to another part of the script.
1357 ** RADDR generates a reference to a script processor register.
1358 ** FADDR generates a reference to a script processor register
1361 **----------------------------------------------------------
1364 #define RELOC_SOFTC 0x40000000
1365 #define RELOC_LABEL 0x50000000
1366 #define RELOC_REGISTER 0x60000000
1367 #define RELOC_KVAR 0x70000000
1368 #define RELOC_LABELH 0x80000000
1369 #define RELOC_MASK 0xf0000000
1371 #define NADDR(label) (RELOC_SOFTC | offsetof(struct ncb, label))
1372 #define PADDR(label) (RELOC_LABEL | offsetof(struct script, label))
1373 #define PADDRH(label) (RELOC_LABELH | offsetof(struct scripth, label))
1374 #define RADDR(label) (RELOC_REGISTER | REG(label))
1375 #define FADDR(label,ofs)(RELOC_REGISTER | ((REG(label))+(ofs)))
1376 #define KVAR(which) (RELOC_KVAR | (which))
1378 #define KVAR_SECOND (0)
1379 #define KVAR_TICKS (1)
1380 #define KVAR_NCR_CACHE (2)
1382 #define SCRIPT_KVAR_FIRST (0)
1383 #define SCRIPT_KVAR_LAST (3)
1386 * Kernel variables referenced in the scripts.
1387 * THESE MUST ALL BE ALIGNED TO A 4-BYTE BOUNDARY.
1389 static volatile void *script_kvars[] =
1390 { &time_second, &ticks, &ncr_cache };
1392 static struct script script0 = {
1393 /*--------------------------< START >-----------------------*/ {
1395 ** Claim to be still alive ...
1397 SCR_COPY (sizeof (((struct ncb *)0)->heartbeat)),
1401 ** Make data structure address invalid.
1404 SCR_LOAD_REG (dsa, 0xff),
1406 SCR_FROM_REG (ctest2),
1408 }/*-------------------------< START0 >----------------------*/,{
1410 ** Hook for interrupted GetConditionCode.
1411 ** Will be patched to ... IFTRUE by
1412 ** the interrupt handler.
1414 SCR_INT ^ IFFALSE (0),
1417 }/*-------------------------< START1 >----------------------*/,{
1419 ** Hook for stalled start queue.
1420 ** Will be patched to IFTRUE by the interrupt handler.
1422 SCR_INT ^ IFFALSE (0),
1425 ** Then jump to a certain point in tryloop.
1426 ** Due to the lack of indirect addressing the code
1427 ** is self modifying here.
1430 }/*-------------------------< STARTPOS >--------------------*/,{
1433 }/*-------------------------< TRYSEL >----------------------*/,{
1436 ** DSA: Address of a Data Structure
1437 ** or Address of the IDLE-Label.
1439 ** TEMP: Address of a script, which tries to
1440 ** start the NEXT entry.
1442 ** Save the TEMP register into the SCRATCHA register.
1443 ** Then copy the DSA to TEMP and RETURN.
1444 ** This is kind of an indirect jump.
1445 ** (The script processor has NO stack, so the
1446 ** CALL is actually a jump and link, and the
1447 ** RETURN is an indirect jump.)
1449 ** If the slot was empty, DSA contains the address
1450 ** of the IDLE part of this script. The processor
1451 ** jumps to IDLE and waits for a reselect.
1452 ** It will wake up and try the same slot again
1453 ** after the SIGP bit becomes set by the host.
1455 ** If the slot was not empty, DSA contains
1456 ** the address of the phys-part of a nccb.
1457 ** The processor jumps to this address.
1458 ** phys starts with head,
1459 ** head starts with launch,
1460 ** so actually the processor jumps to
1462 ** If the entry is scheduled for execution,
1463 ** then launch contains a jump to SELECT.
1464 ** If it's not scheduled, it contains a jump to IDLE.
1475 }/*-------------------------< SKIP >------------------------*/,{
1477 ** This entry has been canceled.
1478 ** Next time use the next slot.
1484 ** patch the launch field.
1485 ** should look like an idle process.
1492 }/*-------------------------< SKIP2 >-----------------------*/,{
1496 }/*-------------------------< IDLE >------------------------*/,{
1499 ** Wait for reselect.
1504 }/*-------------------------< SELECT >----------------------*/,{
1506 ** DSA contains the address of a scheduled
1509 ** SCRATCHA contains the address of the script,
1510 ** which starts the next entry.
1512 ** Set Initiator mode.
1514 ** (Target mode is left as an exercise for the reader)
1519 SCR_LOAD_REG (HS_REG, 0xff),
1523 ** And try to select this target.
1525 SCR_SEL_TBL_ATN ^ offsetof (struct dsb, select),
1529 ** Now there are 4 possibilities:
1531 ** (1) The ncr loses arbitration.
1532 ** This is ok, because it will try again,
1533 ** when the bus becomes idle.
1534 ** (But beware of the timeout function!)
1536 ** (2) The ncr is reselected.
1537 ** Then the script processor takes the jump
1538 ** to the RESELECT label.
1540 ** (3) The ncr completes the selection.
1541 ** Then it will execute the next statement.
1543 ** (4) There is a selection timeout.
1544 ** Then the ncr should interrupt the host and stop.
1545 ** Unfortunately, it seems to continue execution
1546 ** of the script. But it will fail with an
1547 ** IID-interrupt on the next WHEN.
1550 SCR_JUMPR ^ IFTRUE (WHEN (SCR_MSG_IN)),
1554 ** Send the IDENTIFY and SIMPLE_TAG messages
1555 ** (and the MSG_EXT_SDTR message)
1557 SCR_MOVE_TBL ^ SCR_MSG_OUT,
1558 offsetof (struct dsb, smsg),
1559 #ifdef undef /* XXX better fail than try to deal with this ... */
1560 SCR_JUMPR ^ IFTRUE (WHEN (SCR_MSG_OUT)),
1569 ** Selection complete.
1570 ** Next time use the next slot.
1575 }/*-------------------------< PREPARE >----------------------*/,{
1577 ** The ncr doesn't have an indirect load
1578 ** or store command. So we have to
1579 ** copy part of the control block to a
1580 ** fixed place, where we can access it.
1582 ** We patch the address part of a
1583 ** COPY command with the DSA-register.
1589 ** then we do the actual copy.
1591 SCR_COPY (sizeof (struct head)),
1593 ** continued after the next label ...
1596 }/*-------------------------< LOADPOS >---------------------*/,{
1600 ** Mark this nccb as not scheduled.
1604 NADDR (header.launch),
1606 ** Set a time stamp for this selection
1608 SCR_COPY (sizeof (ticks)),
1610 NADDR (header.stamp.select),
1612 ** load the savep (saved pointer) into
1613 ** the TEMP register (actual pointer)
1616 NADDR (header.savep),
1619 ** Initialize the status registers
1622 NADDR (header.status),
1625 }/*-------------------------< PREPARE2 >---------------------*/,{
1627 ** Load the synchronous mode register
1633 ** Load the wide mode and timing register
1639 ** Initialize the msgout buffer with a NOOP message.
1641 SCR_LOAD_REG (scratcha, MSG_NOOP),
1650 ** Message in phase ?
1652 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
1655 ** Extended or reject message ?
1657 SCR_FROM_REG (sbdl),
1659 SCR_JUMP ^ IFTRUE (DATA (MSG_EXTENDED)),
1661 SCR_JUMP ^ IFTRUE (DATA (MSG_MESSAGE_REJECT)),
1662 PADDRH (msg_reject),
1664 ** normal processing
1668 }/*-------------------------< SETMSG >----------------------*/,{
1674 }/*-------------------------< CLRACK >----------------------*/,{
1676 ** Terminate possible pending message phase.
1681 }/*-----------------------< DISPATCH >----------------------*/,{
1682 SCR_FROM_REG (HS_REG),
1684 SCR_INT ^ IFTRUE (DATA (HS_NEGOTIATE)),
1687 ** remove bogus output signals
1689 SCR_REG_REG (socl, SCR_AND, CACK|CATN),
1691 SCR_RETURN ^ IFTRUE (WHEN (SCR_DATA_OUT)),
1693 SCR_RETURN ^ IFTRUE (IF (SCR_DATA_IN)),
1695 SCR_JUMP ^ IFTRUE (IF (SCR_MSG_OUT)),
1697 SCR_JUMP ^ IFTRUE (IF (SCR_MSG_IN)),
1699 SCR_JUMP ^ IFTRUE (IF (SCR_COMMAND)),
1701 SCR_JUMP ^ IFTRUE (IF (SCR_STATUS)),
1704 ** Discard one illegal phase byte, if required.
1706 SCR_LOAD_REG (scratcha, XE_BAD_PHASE),
1711 SCR_JUMPR ^ IFFALSE (IF (SCR_ILG_OUT)),
1713 SCR_MOVE_ABS (1) ^ SCR_ILG_OUT,
1715 SCR_JUMPR ^ IFFALSE (IF (SCR_ILG_IN)),
1717 SCR_MOVE_ABS (1) ^ SCR_ILG_IN,
1722 }/*-------------------------< NO_DATA >--------------------*/,{
1724 ** The target wants to tranfer too much data
1725 ** or in the wrong direction.
1726 ** Remember that in extended error.
1728 SCR_LOAD_REG (scratcha, XE_EXTRA_DATA),
1734 ** Discard one data byte, if required.
1736 SCR_JUMPR ^ IFFALSE (WHEN (SCR_DATA_OUT)),
1738 SCR_MOVE_ABS (1) ^ SCR_DATA_OUT,
1740 SCR_JUMPR ^ IFFALSE (IF (SCR_DATA_IN)),
1742 SCR_MOVE_ABS (1) ^ SCR_DATA_IN,
1745 ** .. and repeat as required.
1751 }/*-------------------------< CHECKATN >--------------------*/,{
1753 ** If AAP (bit 1 of scntl0 register) is set
1754 ** and a parity error is detected,
1755 ** the script processor asserts ATN.
1757 ** The target should switch to a MSG_OUT phase
1758 ** to get the message.
1760 SCR_FROM_REG (socl),
1762 SCR_JUMP ^ IFFALSE (MASK (CATN, CATN)),
1767 SCR_REG_REG (PS_REG, SCR_ADD, 1),
1770 ** Prepare a MSG_INITIATOR_DET_ERR message
1771 ** (initiator detected error).
1772 ** The target should retry the transfer.
1774 SCR_LOAD_REG (scratcha, MSG_INITIATOR_DET_ERR),
1779 }/*-------------------------< COMMAND >--------------------*/,{
1781 ** If this is not a GETCC transfer ...
1783 SCR_FROM_REG (SS_REG),
1785 /*<<<*/ SCR_JUMPR ^ IFTRUE (DATA (SCSI_STATUS_CHECK_COND)),
1788 ** ... set a timestamp ...
1790 SCR_COPY (sizeof (ticks)),
1792 NADDR (header.stamp.command),
1794 ** ... and send the command
1796 SCR_MOVE_TBL ^ SCR_COMMAND,
1797 offsetof (struct dsb, cmd),
1801 ** Send the GETCC command
1803 /*>>>*/ SCR_MOVE_TBL ^ SCR_COMMAND,
1804 offsetof (struct dsb, scmd),
1808 }/*-------------------------< STATUS >--------------------*/,{
1810 ** set the timestamp.
1812 SCR_COPY (sizeof (ticks)),
1814 NADDR (header.stamp.status),
1816 ** If this is a GETCC transfer,
1818 SCR_FROM_REG (SS_REG),
1820 /*<<<*/ SCR_JUMPR ^ IFFALSE (DATA (SCSI_STATUS_CHECK_COND)),
1825 SCR_MOVE_ABS (1) ^ SCR_STATUS,
1828 ** Save status to scsi_status.
1829 ** Mark as complete.
1830 ** And wait for disconnect.
1832 SCR_TO_REG (SS_REG),
1834 SCR_REG_REG (SS_REG, SCR_OR, SCSI_STATUS_SENSE),
1836 SCR_LOAD_REG (HS_REG, HS_COMPLETE),
1841 ** If it was no GETCC transfer,
1842 ** save the status to scsi_status.
1844 /*>>>*/ SCR_MOVE_ABS (1) ^ SCR_STATUS,
1846 SCR_TO_REG (SS_REG),
1849 ** if it was no check condition ...
1851 SCR_JUMP ^ IFTRUE (DATA (SCSI_STATUS_CHECK_COND)),
1854 ** ... mark as complete.
1856 SCR_LOAD_REG (HS_REG, HS_COMPLETE),
1861 }/*-------------------------< MSG_IN >--------------------*/,{
1863 ** Get the first byte of the message
1864 ** and save it to SCRATCHA.
1866 ** The script processor doesn't negate the
1867 ** ACK signal after this transfer.
1869 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
1872 ** Check for message parity error.
1874 SCR_TO_REG (scratcha),
1876 SCR_FROM_REG (socl),
1878 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)),
1879 PADDRH (msg_parity),
1880 SCR_FROM_REG (scratcha),
1883 ** Parity was ok, handle this message.
1885 SCR_JUMP ^ IFTRUE (DATA (MSG_CMDCOMPLETE)),
1887 SCR_JUMP ^ IFTRUE (DATA (MSG_SAVEDATAPOINTER)),
1889 SCR_JUMP ^ IFTRUE (DATA (MSG_RESTOREPOINTERS)),
1891 SCR_JUMP ^ IFTRUE (DATA (MSG_DISCONNECT)),
1893 SCR_JUMP ^ IFTRUE (DATA (MSG_EXTENDED)),
1894 PADDRH (msg_extended),
1895 SCR_JUMP ^ IFTRUE (DATA (MSG_NOOP)),
1897 SCR_JUMP ^ IFTRUE (DATA (MSG_MESSAGE_REJECT)),
1898 PADDRH (msg_reject),
1899 SCR_JUMP ^ IFTRUE (DATA (MSG_IGN_WIDE_RESIDUE)),
1900 PADDRH (msg_ign_residue),
1902 ** Rest of the messages left as
1905 ** Unimplemented messages:
1906 ** fall through to MSG_BAD.
1908 }/*-------------------------< MSG_BAD >------------------*/,{
1910 ** unimplemented message - reject it.
1914 SCR_LOAD_REG (scratcha, MSG_MESSAGE_REJECT),
1919 }/*-------------------------< COMPLETE >-----------------*/,{
1921 ** Complete message.
1923 ** If it's not the get condition code,
1924 ** copy TEMP register to LASTP in header.
1926 SCR_FROM_REG (SS_REG),
1928 /*<<<*/ SCR_JUMPR ^ IFTRUE (MASK (SCSI_STATUS_SENSE, SCSI_STATUS_SENSE)),
1932 NADDR (header.lastp),
1934 ** When we terminate the cycle by clearing ACK,
1935 ** the target may disconnect immediately.
1937 ** We don't want to be told of an
1938 ** "unexpected disconnect",
1939 ** so we disable this feature.
1941 SCR_REG_REG (scntl2, SCR_AND, 0x7f),
1944 ** Terminate cycle ...
1946 SCR_CLR (SCR_ACK|SCR_ATN),
1949 ** ... and wait for the disconnect.
1953 }/*-------------------------< CLEANUP >-------------------*/,{
1955 ** dsa: Pointer to nccb
1956 ** or xxxxxxFF (no nccb)
1958 ** HS_REG: Host-Status (<>0!)
1962 SCR_JUMP ^ IFTRUE (DATA (0xff)),
1966 ** save the status registers
1970 NADDR (header.status),
1972 ** and copy back the header to the nccb.
1977 SCR_COPY (sizeof (struct head)),
1979 }/*-------------------------< CLEANUP0 >--------------------*/,{
1983 ** If command resulted in "check condition"
1984 ** status and is not yet completed,
1985 ** try to get the condition code.
1987 SCR_FROM_REG (HS_REG),
1989 /*<<<*/ SCR_JUMPR ^ IFFALSE (MASK (0, HS_DONEMASK)),
1991 SCR_FROM_REG (SS_REG),
1993 SCR_JUMP ^ IFTRUE (DATA (SCSI_STATUS_CHECK_COND)),
1995 }/*-------------------------< SIGNAL >----------------------*/,{
1997 ** if status = queue full,
1998 ** reinsert in startqueue and stall queue.
2000 /*>>>*/ SCR_FROM_REG (SS_REG),
2002 SCR_INT ^ IFTRUE (DATA (SCSI_STATUS_QUEUE_FULL)),
2005 ** And make the DSA register invalid.
2007 SCR_LOAD_REG (dsa, 0xff), /* invalid */
2010 ** if job completed ...
2012 SCR_FROM_REG (HS_REG),
2015 ** ... signal completion to the host
2017 SCR_INT_FLY ^ IFFALSE (MASK (0, HS_DONEMASK)),
2020 ** Auf zu neuen Schandtaten!
2025 }/*-------------------------< SAVE_DP >------------------*/,{
2028 ** Copy TEMP register to SAVEP in header.
2032 NADDR (header.savep),
2035 }/*-------------------------< RESTORE_DP >---------------*/,{
2037 ** RESTORE_DP message:
2038 ** Copy SAVEP in header to TEMP register.
2041 NADDR (header.savep),
2046 }/*-------------------------< DISCONNECT >---------------*/,{
2048 ** If QUIRK_AUTOSAVE is set,
2049 ** do a "save pointer" operation.
2051 SCR_FROM_REG (QU_REG),
2053 /*<<<*/ SCR_JUMPR ^ IFFALSE (MASK (QUIRK_AUTOSAVE, QUIRK_AUTOSAVE)),
2056 ** like SAVE_DP message:
2057 ** Copy TEMP register to SAVEP in header.
2061 NADDR (header.savep),
2063 ** Check if temp==savep or temp==goalp:
2064 ** if not, log a missing save pointer message.
2065 ** In fact, it's a comparison mod 256.
2067 ** Hmmm, I hadn't thought that I would be urged to
2068 ** write this kind of ugly self modifying code.
2070 ** It's unbelievable, but the ncr53c8xx isn't able
2071 ** to subtract one register from another.
2073 SCR_FROM_REG (temp),
2076 ** You are not expected to understand this ..
2078 ** CAUTION: only little endian architectures supported! XXX
2081 NADDR (header.savep),
2082 PADDR (disconnect0),
2083 }/*-------------------------< DISCONNECT0 >--------------*/,{
2084 /*<<<*/ SCR_JUMPR ^ IFTRUE (DATA (1)),
2090 NADDR (header.goalp),
2091 PADDR (disconnect1),
2092 }/*-------------------------< DISCONNECT1 >--------------*/,{
2093 SCR_INT ^ IFFALSE (DATA (1)),
2098 ** DISCONNECTing ...
2100 ** disable the "unexpected disconnect" feature,
2101 ** and remove the ACK signal.
2103 SCR_REG_REG (scntl2, SCR_AND, 0x7f),
2105 SCR_CLR (SCR_ACK|SCR_ATN),
2108 ** Wait for the disconnect.
2114 ** Set a time stamp,
2115 ** and count the disconnects.
2117 SCR_COPY (sizeof (ticks)),
2119 NADDR (header.stamp.disconnect),
2123 SCR_REG_REG (temp, SCR_ADD, 0x01),
2129 ** Status is: DISCONNECTED.
2131 SCR_LOAD_REG (HS_REG, HS_DISCONNECT),
2136 }/*-------------------------< MSG_OUT >-------------------*/,{
2138 ** The target requests a message.
2140 SCR_MOVE_ABS (1) ^ SCR_MSG_OUT,
2146 ** If it was no ABORT message ...
2148 SCR_JUMP ^ IFTRUE (DATA (MSG_ABORT)),
2149 PADDRH (msg_out_abort),
2151 ** ... wait for the next phase
2152 ** if it's a message out, send it again, ...
2154 SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_OUT)),
2156 }/*-------------------------< MSG_OUT_DONE >--------------*/,{
2158 ** ... else clear the message ...
2160 SCR_LOAD_REG (scratcha, MSG_NOOP),
2166 ** ... and process the next phase
2171 }/*------------------------< BADGETCC >---------------------*/,{
2173 ** If SIGP was set, clear it and try again.
2175 SCR_FROM_REG (ctest2),
2177 SCR_JUMP ^ IFTRUE (MASK (CSIGP,CSIGP)),
2181 }/*-------------------------< RESELECT >--------------------*/,{
2183 ** This NOP will be patched with LED OFF
2184 ** SCR_REG_REG (gpreg, SCR_OR, 0x01)
2190 ** make the DSA invalid.
2192 SCR_LOAD_REG (dsa, 0xff),
2197 ** Sleep waiting for a reselection.
2198 ** If SIGP is set, special treatment.
2200 ** Zu allem bereit ..
2204 }/*-------------------------< RESELECT1 >--------------------*/,{
2206 ** This NOP will be patched with LED ON
2207 ** SCR_REG_REG (gpreg, SCR_AND, 0xfe)
2212 ** ... zu nichts zu gebrauchen ?
2214 ** load the target id into the SFBR
2215 ** and jump to the control block.
2217 ** Look at the declarations of
2222 ** to understand what's going on.
2224 SCR_REG_SFBR (ssid, SCR_AND, 0x8F),
2230 }/*-------------------------< RESELECT2 >-------------------*/,{
2232 ** This NOP will be patched with LED ON
2233 ** SCR_REG_REG (gpreg, SCR_AND, 0xfe)
2238 ** If it's not connected :(
2239 ** -> interrupted by SIGP bit.
2242 SCR_FROM_REG (ctest2),
2244 SCR_JUMP ^ IFTRUE (MASK (CSIGP,CSIGP)),
2249 }/*-------------------------< RESEL_TMP >-------------------*/,{
2251 ** The return address in TEMP
2252 ** is in fact the data structure address,
2253 ** so copy it to the DSA register.
2261 }/*-------------------------< RESEL_LUN >-------------------*/,{
2263 ** come back to this point
2264 ** to get an IDENTIFY message
2265 ** Wait for a msg_in phase.
2267 /*<<<*/ SCR_JUMPR ^ IFFALSE (WHEN (SCR_MSG_IN)),
2271 ** It's not a sony, it's a trick:
2272 ** read the data without acknowledging it.
2274 SCR_FROM_REG (sbdl),
2276 /*<<<*/ SCR_JUMPR ^ IFFALSE (MASK (MSG_IDENTIFYFLAG, 0x98)),
2279 ** It WAS an Identify message.
2280 ** get it and ack it!
2282 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2287 ** Mask out the lun.
2289 SCR_REG_REG (sfbr, SCR_AND, 0x07),
2294 ** No message phase or no IDENTIFY message:
2297 /*>>>*/ SCR_LOAD_SFBR (0),
2302 }/*-------------------------< RESEL_TAG >-------------------*/,{
2304 ** come back to this point
2305 ** to get a SIMPLE_TAG message
2306 ** Wait for a MSG_IN phase.
2308 /*<<<*/ SCR_JUMPR ^ IFFALSE (WHEN (SCR_MSG_IN)),
2312 ** It's a trick - read the data
2313 ** without acknowledging it.
2315 SCR_FROM_REG (sbdl),
2317 /*<<<*/ SCR_JUMPR ^ IFFALSE (DATA (MSG_SIMPLE_Q_TAG)),
2320 ** It WAS a SIMPLE_TAG message.
2321 ** get it and ack it!
2323 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2328 ** Wait for the second byte (the tag)
2330 /*<<<*/ SCR_JUMPR ^ IFFALSE (WHEN (SCR_MSG_IN)),
2333 ** Get it and ack it!
2335 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2337 SCR_CLR (SCR_ACK|SCR_CARRY),
2342 ** No message phase or no SIMPLE_TAG message
2343 ** or no second byte: return 0.
2345 /*>>>*/ SCR_LOAD_SFBR (0),
2347 SCR_SET (SCR_CARRY),
2352 }/*-------------------------< DATA_IN >--------------------*/,{
2354 ** Because the size depends on the
2355 ** #define MAX_SCATTER parameter,
2356 ** it is filled in at runtime.
2358 ** SCR_JUMP ^ IFFALSE (WHEN (SCR_DATA_IN)),
2360 ** SCR_COPY (sizeof (ticks)),
2361 ** KVAR (KVAR_TICKS),
2362 ** NADDR (header.stamp.data),
2363 ** SCR_MOVE_TBL ^ SCR_DATA_IN,
2364 ** offsetof (struct dsb, data[ 0]),
2366 ** ##===========< i=1; i<MAX_SCATTER >=========
2367 ** || SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN)),
2368 ** || PADDR (checkatn),
2369 ** || SCR_MOVE_TBL ^ SCR_DATA_IN,
2370 ** || offsetof (struct dsb, data[ i]),
2371 ** ##==========================================
2374 ** PADDR (checkatn),
2379 }/*-------------------------< DATA_OUT >-------------------*/,{
2381 ** Because the size depends on the
2382 ** #define MAX_SCATTER parameter,
2383 ** it is filled in at runtime.
2385 ** SCR_JUMP ^ IFFALSE (WHEN (SCR_DATA_OUT)),
2387 ** SCR_COPY (sizeof (ticks)),
2388 ** KVAR (KVAR_TICKS),
2389 ** NADDR (header.stamp.data),
2390 ** SCR_MOVE_TBL ^ SCR_DATA_OUT,
2391 ** offsetof (struct dsb, data[ 0]),
2393 ** ##===========< i=1; i<MAX_SCATTER >=========
2394 ** || SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_OUT)),
2395 ** || PADDR (dispatch),
2396 ** || SCR_MOVE_TBL ^ SCR_DATA_OUT,
2397 ** || offsetof (struct dsb, data[ i]),
2398 ** ##==========================================
2401 ** PADDR (dispatch),
2405 **---------------------------------------------------------
2409 }/*--------------------------------------------------------*/
2413 static struct scripth scripth0 = {
2414 /*-------------------------< TRYLOOP >---------------------*/{
2416 ** Load an entry of the start queue into dsa
2417 ** and try to start it by jumping to TRYSEL.
2419 ** Because the size depends on the
2420 ** #define MAX_START parameter, it is filled
2423 **-----------------------------------------------------------
2425 ** ##===========< I=0; i<MAX_START >===========
2427 ** || NADDR (squeue[i]),
2430 ** || PADDR (trysel),
2431 ** ##==========================================
2436 **-----------------------------------------------------------
2439 }/*-------------------------< MSG_PARITY >---------------*/,{
2443 SCR_REG_REG (PS_REG, SCR_ADD, 0x01),
2446 ** send a "message parity error" message.
2448 SCR_LOAD_REG (scratcha, MSG_PARITY_ERROR),
2452 }/*-------------------------< MSG_MESSAGE_REJECT >---------------*/,{
2454 ** If a negotiation was in progress,
2455 ** negotiation failed.
2457 SCR_FROM_REG (HS_REG),
2459 SCR_INT ^ IFTRUE (DATA (HS_NEGOTIATE)),
2462 ** else make host log this message
2464 SCR_INT ^ IFFALSE (DATA (HS_NEGOTIATE)),
2465 SIR_REJECT_RECEIVED,
2469 }/*-------------------------< MSG_IGN_RESIDUE >----------*/,{
2475 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
2478 ** get residue size.
2480 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2483 ** Check for message parity error.
2485 SCR_TO_REG (scratcha),
2487 SCR_FROM_REG (socl),
2489 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)),
2490 PADDRH (msg_parity),
2491 SCR_FROM_REG (scratcha),
2494 ** Size is 0 .. ignore message.
2496 SCR_JUMP ^ IFTRUE (DATA (0)),
2499 ** Size is not 1 .. have to interrupt.
2501 /*<<<*/ SCR_JUMPR ^ IFFALSE (DATA (1)),
2504 ** Check for residue byte in swide register
2506 SCR_FROM_REG (scntl2),
2508 /*<<<*/ SCR_JUMPR ^ IFFALSE (MASK (WSR, WSR)),
2511 ** There IS data in the swide register.
2514 SCR_REG_REG (scntl2, SCR_OR, WSR),
2519 ** Load again the size to the sfbr register.
2521 /*>>>*/ SCR_FROM_REG (scratcha),
2528 }/*-------------------------< MSG_EXTENDED >-------------*/,{
2534 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
2539 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2542 ** Check for message parity error.
2544 SCR_TO_REG (scratcha),
2546 SCR_FROM_REG (socl),
2548 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)),
2549 PADDRH (msg_parity),
2550 SCR_FROM_REG (scratcha),
2554 SCR_JUMP ^ IFTRUE (DATA (3)),
2556 SCR_JUMP ^ IFFALSE (DATA (2)),
2558 }/*-------------------------< MSG_EXT_2 >----------------*/,{
2561 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
2564 ** get extended message code.
2566 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2569 ** Check for message parity error.
2571 SCR_TO_REG (scratcha),
2573 SCR_FROM_REG (socl),
2575 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)),
2576 PADDRH (msg_parity),
2577 SCR_FROM_REG (scratcha),
2579 SCR_JUMP ^ IFTRUE (DATA (MSG_EXT_WDTR)),
2582 ** unknown extended message
2586 }/*-------------------------< MSG_WDTR >-----------------*/,{
2589 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
2592 ** get data bus width
2594 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2596 SCR_FROM_REG (socl),
2598 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)),
2599 PADDRH (msg_parity),
2601 ** let the host do the real work.
2606 ** let the target fetch our answer.
2613 SCR_INT ^ IFFALSE (WHEN (SCR_MSG_OUT)),
2616 ** Send the MSG_EXT_WDTR
2618 SCR_MOVE_ABS (4) ^ SCR_MSG_OUT,
2626 PADDR (msg_out_done),
2628 }/*-------------------------< MSG_EXT_3 >----------------*/,{
2631 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
2634 ** get extended message code.
2636 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2639 ** Check for message parity error.
2641 SCR_TO_REG (scratcha),
2643 SCR_FROM_REG (socl),
2645 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)),
2646 PADDRH (msg_parity),
2647 SCR_FROM_REG (scratcha),
2649 SCR_JUMP ^ IFTRUE (DATA (MSG_EXT_SDTR)),
2652 ** unknown extended message
2657 }/*-------------------------< MSG_SDTR >-----------------*/,{
2660 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
2663 ** get period and offset
2665 SCR_MOVE_ABS (2) ^ SCR_MSG_IN,
2667 SCR_FROM_REG (socl),
2669 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)),
2670 PADDRH (msg_parity),
2672 ** let the host do the real work.
2677 ** let the target fetch our answer.
2684 SCR_INT ^ IFFALSE (WHEN (SCR_MSG_OUT)),
2687 ** Send the MSG_EXT_SDTR
2689 SCR_MOVE_ABS (5) ^ SCR_MSG_OUT,
2697 PADDR (msg_out_done),
2699 }/*-------------------------< MSG_OUT_ABORT >-------------*/,{
2701 ** After ABORT message,
2703 ** expect an immediate disconnect, ...
2705 SCR_REG_REG (scntl2, SCR_AND, 0x7f),
2707 SCR_CLR (SCR_ACK|SCR_ATN),
2712 ** ... and set the status to "ABORTED"
2714 SCR_LOAD_REG (HS_REG, HS_ABORTED),
2719 }/*-------------------------< GETCC >-----------------------*/,{
2721 ** The ncr doesn't have an indirect load
2722 ** or store command. So we have to
2723 ** copy part of the control block to a
2724 ** fixed place, where we can modify it.
2726 ** We patch the address part of a COPY command
2727 ** with the address of the dsa register ...
2733 ** ... then we do the actual copy.
2735 SCR_COPY (sizeof (struct head)),
2736 }/*-------------------------< GETCC1 >----------------------*/,{
2740 ** Initialize the status registers
2743 NADDR (header.status),
2745 }/*-------------------------< GETCC2 >----------------------*/,{
2747 ** Get the condition code from a target.
2749 ** DSA points to a data structure.
2750 ** Set TEMP to the script location
2751 ** that receives the condition code.
2753 ** Because there is no script command
2754 ** to load a longword into a register,
2755 ** we use a CALL command.
2760 ** Get the condition code.
2762 SCR_MOVE_TBL ^ SCR_DATA_IN,
2763 offsetof (struct dsb, sense),
2765 ** No data phase may follow!
2774 ** The CALL jumps to this point.
2775 ** Prepare for a RESTORE_POINTER message.
2776 ** Save the TEMP register into the saved pointer.
2780 NADDR (header.savep),
2782 ** Load scratcha, because in case of a selection timeout,
2783 ** the host will expect a new value for startpos in
2784 ** the scratcha register.
2789 #ifdef NCR_GETCC_WITHMSG
2791 ** If QUIRK_NOMSG is set, select without ATN.
2792 ** and don't send a message.
2794 SCR_FROM_REG (QU_REG),
2796 SCR_JUMP ^ IFTRUE (MASK (QUIRK_NOMSG, QUIRK_NOMSG)),
2799 ** Then try to connect to the target.
2800 ** If we are reselected, special treatment
2801 ** of the current job is required before
2802 ** accepting the reselection.
2804 SCR_SEL_TBL_ATN ^ offsetof (struct dsb, select),
2807 ** Send the IDENTIFY message.
2808 ** In case of short transfer, remove ATN.
2810 SCR_MOVE_TBL ^ SCR_MSG_OUT,
2811 offsetof (struct dsb, smsg2),
2815 ** save the first byte of the message.
2824 }/*-------------------------< GETCC3 >----------------------*/,{
2826 ** Try to connect to the target.
2827 ** If we are reselected, special treatment
2828 ** of the current job is required before
2829 ** accepting the reselection.
2831 ** Silly target won't accept a message.
2832 ** Select without ATN.
2834 SCR_SEL_TBL ^ offsetof (struct dsb, select),
2837 ** Force error if selection timeout
2839 SCR_JUMPR ^ IFTRUE (WHEN (SCR_MSG_IN)),
2846 }/*-------------------------< ABORTTAG >-------------------*/,{
2848 ** Abort a bad reselection.
2849 ** Set the message to ABORT vs. ABORT_TAG
2851 SCR_LOAD_REG (scratcha, MSG_ABORT_TAG),
2853 SCR_JUMPR ^ IFFALSE (CARRYSET),
2855 }/*-------------------------< ABORT >----------------------*/,{
2856 SCR_LOAD_REG (scratcha, MSG_ABORT),
2867 ** we expect an immediate disconnect
2869 SCR_REG_REG (scntl2, SCR_AND, 0x7f),
2871 SCR_MOVE_ABS (1) ^ SCR_MSG_OUT,
2876 SCR_CLR (SCR_ACK|SCR_ATN),
2882 }/*-------------------------< SNOOPTEST >-------------------*/,{
2884 ** Read the variable.
2887 KVAR (KVAR_NCR_CACHE),
2890 ** Write the variable.
2894 KVAR (KVAR_NCR_CACHE),
2896 ** Read back the variable.
2899 KVAR (KVAR_NCR_CACHE),
2901 }/*-------------------------< SNOOPEND >-------------------*/,{
2907 }/*--------------------------------------------------------*/
2911 /*==========================================================
2914 ** Fill in #define dependent parts of the script
2917 **==========================================================
2920 static void ncr_script_fill (struct script * scr, struct scripth * scrh)
2926 for (i=0; i<MAX_START; i++) {
2928 *p++ =NADDR (squeue[i]);
2931 *p++ =PADDR (trysel);
2934 *p++ =PADDRH(tryloop);
2936 assert ((char *)p == (char *)&scrh->tryloop + sizeof (scrh->tryloop));
2940 *p++ =SCR_JUMP ^ IFFALSE (WHEN (SCR_DATA_IN));
2941 *p++ =PADDR (no_data);
2942 *p++ =SCR_COPY (sizeof (ticks));
2943 *p++ =(ncrcmd) KVAR (KVAR_TICKS);
2944 *p++ =NADDR (header.stamp.data);
2945 *p++ =SCR_MOVE_TBL ^ SCR_DATA_IN;
2946 *p++ =offsetof (struct dsb, data[ 0]);
2948 for (i=1; i<MAX_SCATTER; i++) {
2949 *p++ =SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN));
2950 *p++ =PADDR (checkatn);
2951 *p++ =SCR_MOVE_TBL ^ SCR_DATA_IN;
2952 *p++ =offsetof (struct dsb, data[i]);
2956 *p++ =PADDR (checkatn);
2958 *p++ =PADDR (no_data);
2960 assert ((char *)p == (char *)&scr->data_in + sizeof (scr->data_in));
2964 *p++ =SCR_JUMP ^ IFFALSE (WHEN (SCR_DATA_OUT));
2965 *p++ =PADDR (no_data);
2966 *p++ =SCR_COPY (sizeof (ticks));
2967 *p++ =(ncrcmd) KVAR (KVAR_TICKS);
2968 *p++ =NADDR (header.stamp.data);
2969 *p++ =SCR_MOVE_TBL ^ SCR_DATA_OUT;
2970 *p++ =offsetof (struct dsb, data[ 0]);
2972 for (i=1; i<MAX_SCATTER; i++) {
2973 *p++ =SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_OUT));
2974 *p++ =PADDR (dispatch);
2975 *p++ =SCR_MOVE_TBL ^ SCR_DATA_OUT;
2976 *p++ =offsetof (struct dsb, data[i]);
2980 *p++ =PADDR (dispatch);
2982 *p++ =PADDR (no_data);
2984 assert ((char *)p == (char *)&scr->data_out + sizeof (scr->data_out));
2987 /*==========================================================
2990 ** Copy and rebind a script.
2993 **==========================================================
2996 static void ncr_script_copy_and_bind (ncb_p np, ncrcmd *src, ncrcmd *dst, int len)
2998 ncrcmd opcode, new, old, tmp1, tmp2;
2999 ncrcmd *start, *end;
3009 WRITESCRIPT_OFF(dst, offset, opcode);
3013 ** If we forget to change the length
3014 ** in struct script, a field will be
3015 ** padded with 0. This is an illegal
3020 printf ("%s: ERROR0 IN SCRIPT at %d.\n",
3021 ncr_name(np), (int) (src-start-1));
3025 if (DEBUG_FLAGS & DEBUG_SCRIPT)
3026 printf ("%p: <%x>\n",
3027 (src-1), (unsigned)opcode);
3030 ** We don't have to decode ALL commands
3032 switch (opcode >> 28) {
3036 ** COPY has TWO arguments.
3040 if ((tmp1 & RELOC_MASK) == RELOC_KVAR)
3043 if ((tmp2 & RELOC_MASK) == RELOC_KVAR)
3045 if ((tmp1 ^ tmp2) & 3) {
3046 printf ("%s: ERROR1 IN SCRIPT at %d.\n",
3047 ncr_name(np), (int) (src-start-1));
3051 ** If PREFETCH feature not enabled, remove
3052 ** the NO FLUSH bit if present.
3054 if ((opcode & SCR_NO_FLUSH) && !(np->features&FE_PFEN))
3055 WRITESCRIPT_OFF(dst, offset - 4,
3056 (opcode & ~SCR_NO_FLUSH));
3061 ** MOVE (absolute address)
3069 ** dont't relocate if relative :-)
3071 if (opcode & 0x00800000)
3093 switch (old & RELOC_MASK) {
3094 case RELOC_REGISTER:
3095 new = (old & ~RELOC_MASK) + rman_get_start(np->reg_res);
3098 new = (old & ~RELOC_MASK) + np->p_script;
3101 new = (old & ~RELOC_MASK) + np->p_scripth;
3104 new = (old & ~RELOC_MASK) + vtophys(np);
3107 if (((old & ~RELOC_MASK) <
3108 SCRIPT_KVAR_FIRST) ||
3109 ((old & ~RELOC_MASK) >
3111 panic("ncr KVAR out of range");
3112 new = vtophys(script_kvars[old &
3116 /* Don't relocate a 0 address. */
3123 panic("ncr_script_copy_and_bind: weird relocation %x @ %d\n", old, (int)(src - start));
3127 WRITESCRIPT_OFF(dst, offset, new);
3131 WRITESCRIPT_OFF(dst, offset, *src++);
3138 /*==========================================================
3141 ** Auto configuration.
3144 **==========================================================
3148 /*----------------------------------------------------------
3150 ** Reduce the transfer length to the max value
3151 ** we can transfer safely.
3153 ** Reading a block greater then MAX_SIZE from the
3154 ** raw (character) device exercises a memory leak
3155 ** in the vm subsystem. This is common to ALL devices.
3156 ** We have submitted a description of this bug to
3157 ** <FreeBSD-bugs@freefall.cdrom.com>.
3158 ** It should be fixed in the current release.
3160 **----------------------------------------------------------
3163 void ncr_min_phys (struct buf *bp)
3165 if ((unsigned long)bp->b_bcount > MAX_SIZE) bp->b_bcount = MAX_SIZE;
3171 /*----------------------------------------------------------
3173 ** Maximal number of outstanding requests per target.
3175 **----------------------------------------------------------
3178 u_int32_t ncr_info (int unit)
3180 return (1); /* may be changed later */
3185 /*----------------------------------------------------------
3187 ** NCR chip devices table and chip look up function.
3188 ** Features bit are defined in ncrreg.h. Is it the
3191 **----------------------------------------------------------
3194 unsigned long device_id;
3195 unsigned short minrevid;
3197 unsigned char maxburst;
3198 unsigned char maxoffs;
3199 unsigned char clock_divn;
3200 unsigned int features;
3203 static ncr_chip ncr_chip_table[] = {
3204 {NCR_810_ID, 0x00, "ncr 53c810 fast10 scsi", 4, 8, 4,
3207 {NCR_810_ID, 0x10, "ncr 53c810a fast10 scsi", 4, 8, 4,
3208 FE_ERL|FE_LDSTR|FE_PFEN|FE_BOF}
3210 {NCR_815_ID, 0x00, "ncr 53c815 fast10 scsi", 4, 8, 4,
3213 {NCR_820_ID, 0x00, "ncr 53c820 fast10 wide scsi", 4, 8, 4,
3216 {NCR_825_ID, 0x00, "ncr 53c825 fast10 wide scsi", 4, 8, 4,
3217 FE_WIDE|FE_ERL|FE_BOF}
3219 {NCR_825_ID, 0x10, "ncr 53c825a fast10 wide scsi", 7, 8, 4,
3220 FE_WIDE|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}
3222 {NCR_860_ID, 0x00, "ncr 53c860 fast20 scsi", 4, 8, 5,
3223 FE_ULTRA|FE_CLK80|FE_CACHE_SET|FE_LDSTR|FE_PFEN}
3225 {NCR_875_ID, 0x00, "ncr 53c875 fast20 wide scsi", 7, 16, 5,
3226 FE_WIDE|FE_ULTRA|FE_CLK80|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}
3228 {NCR_875_ID, 0x02, "ncr 53c875 fast20 wide scsi", 7, 16, 5,
3229 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}
3231 {NCR_875_ID2, 0x00, "ncr 53c875j fast20 wide scsi", 7, 16, 5,
3232 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}
3234 {NCR_885_ID, 0x00, "ncr 53c885 fast20 wide scsi", 7, 16, 5,
3235 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}
3237 {NCR_895_ID, 0x00, "ncr 53c895 fast40 wide scsi", 7, 31, 7,
3238 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}
3240 {NCR_896_ID, 0x00, "ncr 53c896 fast40 wide scsi", 7, 31, 7,
3241 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}
3243 {NCR_895A_ID, 0x00, "ncr 53c895a fast40 wide scsi", 7, 31, 7,
3244 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}
3246 {NCR_1510D_ID, 0x00, "ncr 53c1510d fast40 wide scsi", 7, 31, 7,
3247 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}
3250 static int ncr_chip_lookup(u_long device_id, u_char revision_id)
3255 for (i = 0; i < sizeof(ncr_chip_table)/sizeof(ncr_chip_table[0]); i++) {
3256 if (device_id == ncr_chip_table[i].device_id &&
3257 ncr_chip_table[i].minrevid <= revision_id) {
3259 ncr_chip_table[found].minrevid
3260 < ncr_chip_table[i].minrevid) {
3268 /*----------------------------------------------------------
3270 ** Probe the hostadapter.
3272 **----------------------------------------------------------
3277 static int ncr_probe (device_t dev)
3281 i = ncr_chip_lookup(pci_get_devid(dev), pci_get_revid(dev));
3283 device_set_desc(dev, ncr_chip_table[i].name);
3284 return (BUS_PROBE_DEFAULT);
3292 /*==========================================================
3294 ** NCR chip clock divisor table.
3295 ** Divisors are multiplied by 10,000,000 in order to make
3296 ** calculations more simple.
3298 **==========================================================
3302 static u_long div_10M[] =
3303 {2*_5M, 3*_5M, 4*_5M, 6*_5M, 8*_5M, 12*_5M, 16*_5M};
3305 /*===============================================================
3307 ** NCR chips allow burst lengths of 2, 4, 8, 16, 32, 64, 128
3308 ** transfers. 32,64,128 are only supported by 875 and 895 chips.
3309 ** We use log base 2 (burst length) as internal code, with
3310 ** value 0 meaning "burst disabled".
3312 **===============================================================
3316 * Burst length from burst code.
3318 #define burst_length(bc) (!(bc))? 0 : 1 << (bc)
3321 * Burst code from io register bits.
3323 #define burst_code(dmode, ctest4, ctest5) \
3324 (ctest4) & 0x80? 0 : (((dmode) & 0xc0) >> 6) + ((ctest5) & 0x04) + 1
3327 * Set initial io register bits from burst code.
3330 ncr_init_burst(ncb_p np, u_char bc)
3332 np->rv_ctest4 &= ~0x80;
3333 np->rv_dmode &= ~(0x3 << 6);
3334 np->rv_ctest5 &= ~0x4;
3337 np->rv_ctest4 |= 0x80;
3341 np->rv_dmode |= ((bc & 0x3) << 6);
3342 np->rv_ctest5 |= (bc & 0x4);
3346 /*==========================================================
3349 ** Auto configuration: attach and init a host adapter.
3352 **==========================================================
3357 ncr_attach (device_t dev)
3359 ncb_p np = (struct ncb*) device_get_softc(dev);
3365 struct cam_devq *devq;
3368 ** allocate and initialize structures.
3371 np->unit = device_get_unit(dev);
3374 ** Try to map the controller chip to
3375 ** virtual and physical memory.
3379 np->reg_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
3380 &np->reg_rid, RF_ACTIVE);
3382 device_printf(dev, "could not map memory\n");
3387 ** Make the controller's registers available.
3388 ** Now the INB INW INL OUTB OUTW OUTL macros
3389 ** can be used safely.
3392 np->bst = rman_get_bustag(np->reg_res);
3393 np->bsh = rman_get_bushandle(np->reg_res);
3398 ** Try to map the controller chip into iospace.
3401 if (!pci_map_port (config_id, 0x10, &np->port))
3407 ** Save some controller register default values
3410 np->rv_scntl3 = INB(nc_scntl3) & 0x77;
3411 np->rv_dmode = INB(nc_dmode) & 0xce;
3412 np->rv_dcntl = INB(nc_dcntl) & 0xa9;
3413 np->rv_ctest3 = INB(nc_ctest3) & 0x01;
3414 np->rv_ctest4 = INB(nc_ctest4) & 0x88;
3415 np->rv_ctest5 = INB(nc_ctest5) & 0x24;
3416 np->rv_gpcntl = INB(nc_gpcntl);
3417 np->rv_stest2 = INB(nc_stest2) & 0x20;
3419 if (bootverbose >= 2) {
3420 printf ("\tBIOS values: SCNTL3:%02x DMODE:%02x DCNTL:%02x\n",
3421 np->rv_scntl3, np->rv_dmode, np->rv_dcntl);
3422 printf ("\t CTEST3:%02x CTEST4:%02x CTEST5:%02x\n",
3423 np->rv_ctest3, np->rv_ctest4, np->rv_ctest5);
3426 np->rv_dcntl |= NOCOM;
3429 ** Do chip dependent initialization.
3432 rev = pci_get_revid(dev);
3435 ** Get chip features from chips table.
3437 i = ncr_chip_lookup(pci_get_devid(dev), rev);
3440 np->maxburst = ncr_chip_table[i].maxburst;
3441 np->maxoffs = ncr_chip_table[i].maxoffs;
3442 np->clock_divn = ncr_chip_table[i].clock_divn;
3443 np->features = ncr_chip_table[i].features;
3444 } else { /* Should'nt happen if probe() is ok */
3448 np->features = FE_ERL;
3451 np->maxwide = np->features & FE_WIDE ? 1 : 0;
3452 np->clock_khz = np->features & FE_CLK80 ? 80000 : 40000;
3453 if (np->features & FE_QUAD) np->multiplier = 4;
3454 else if (np->features & FE_DBLR) np->multiplier = 2;
3455 else np->multiplier = 1;
3458 ** Get the frequency of the chip's clock.
3459 ** Find the right value for scntl3.
3461 if (np->features & (FE_ULTRA|FE_ULTRA2))
3462 ncr_getclock(np, np->multiplier);
3464 #ifdef NCR_TEKRAM_EEPROM
3466 printf ("%s: Tekram EEPROM read %s\n",
3468 read_tekram_eeprom (np, NULL) ?
3469 "succeeded" : "failed");
3471 #endif /* NCR_TEKRAM_EEPROM */
3474 * If scntl3 != 0, we assume BIOS is present.
3477 np->features |= FE_BIOS;
3480 * Divisor to be used for async (timer pre-scaler).
3482 i = np->clock_divn - 1;
3485 if (10ul * SCSI_NCR_MIN_ASYNC * np->clock_khz > div_10M[i]) {
3490 np->rv_scntl3 = i+1;
3493 * Minimum synchronous period factor supported by the chip.
3494 * Btw, 'period' is in tenths of nanoseconds.
3497 period = (4 * div_10M[0] + np->clock_khz - 1) / np->clock_khz;
3498 if (period <= 250) np->minsync = 10;
3499 else if (period <= 303) np->minsync = 11;
3500 else if (period <= 500) np->minsync = 12;
3501 else np->minsync = (period + 40 - 1) / 40;
3504 * Check against chip SCSI standard support (SCSI-2,ULTRA,ULTRA2).
3507 if (np->minsync < 25 && !(np->features & (FE_ULTRA|FE_ULTRA2)))
3509 else if (np->minsync < 12 && !(np->features & FE_ULTRA2))
3513 * Maximum synchronous period factor supported by the chip.
3516 period = (11 * div_10M[np->clock_divn - 1]) / (4 * np->clock_khz);
3517 np->maxsync = period > 2540 ? 254 : period / 10;
3520 * Now, some features available with Symbios compatible boards.
3521 * LED support through GPIO0 and DIFF support.
3524 #ifdef SCSI_NCR_SYMBIOS_COMPAT
3525 if (!(np->rv_gpcntl & 0x01))
3526 np->features |= FE_LED0;
3527 #if 0 /* Not safe enough without NVRAM support or user settable option */
3528 if (!(INB(nc_gpreg) & 0x08))
3529 np->features |= FE_DIFF;
3531 #endif /* SCSI_NCR_SYMBIOS_COMPAT */
3534 * Prepare initial IO registers settings.
3535 * Trust BIOS only if we believe we have one and if we want to.
3537 #ifdef SCSI_NCR_TRUST_BIOS
3538 if (!(np->features & FE_BIOS)) {
3543 np->rv_dcntl = NOCOM;
3545 np->rv_ctest4 = MPEE;
3549 if (np->features & FE_ERL)
3550 np->rv_dmode |= ERL; /* Enable Read Line */
3551 if (np->features & FE_BOF)
3552 np->rv_dmode |= BOF; /* Burst Opcode Fetch */
3553 if (np->features & FE_ERMP)
3554 np->rv_dmode |= ERMP; /* Enable Read Multiple */
3555 if (np->features & FE_CLSE)
3556 np->rv_dcntl |= CLSE; /* Cache Line Size Enable */
3557 if (np->features & FE_WRIE)
3558 np->rv_ctest3 |= WRIE; /* Write and Invalidate */
3559 if (np->features & FE_PFEN)
3560 np->rv_dcntl |= PFEN; /* Prefetch Enable */
3561 if (np->features & FE_DFS)
3562 np->rv_ctest5 |= DFS; /* Dma Fifo Size */
3563 if (np->features & FE_DIFF)
3564 np->rv_stest2 |= 0x20; /* Differential mode */
3565 ncr_init_burst(np, np->maxburst); /* Max dwords burst length */
3568 burst_code(np->rv_dmode, np->rv_ctest4, np->rv_ctest5);
3572 ** Get on-chip SRAM address, if supported
3574 if ((np->features & FE_RAM) && sizeof(struct script) <= 4096) {
3575 np->sram_rid = 0x18;
3576 np->sram_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
3582 ** Allocate structure for script relocation.
3584 if (np->sram_res != NULL) {
3586 np->p_script = rman_get_start(np->sram_res);
3587 np->bst2 = rman_get_bustag(np->sram_res);
3588 np->bsh2 = rman_get_bushandle(np->sram_res);
3589 } else if (sizeof (struct script) > PAGE_SIZE) {
3590 np->script = (struct script*) contigmalloc
3591 (round_page(sizeof (struct script)), M_DEVBUF, M_WAITOK,
3592 0, 0xffffffff, PAGE_SIZE, 0);
3594 np->script = (struct script *)
3595 malloc (sizeof (struct script), M_DEVBUF, M_WAITOK);
3598 if (sizeof (struct scripth) > PAGE_SIZE) {
3599 np->scripth = (struct scripth*) contigmalloc
3600 (round_page(sizeof (struct scripth)), M_DEVBUF, M_WAITOK,
3601 0, 0xffffffff, PAGE_SIZE, 0);
3604 np->scripth = (struct scripth *)
3605 malloc (sizeof (struct scripth), M_DEVBUF, M_WAITOK);
3608 #ifdef SCSI_NCR_PCI_CONFIG_FIXUP
3610 ** If cache line size is enabled, check PCI config space and
3611 ** try to fix it up if necessary.
3613 #ifdef PCIR_CACHELNSZ /* To be sure that new PCI stuff is present */
3615 u_char cachelnsz = pci_read_config(dev, PCIR_CACHELNSZ, 1);
3616 u_short command = pci_read_config(dev, PCIR_COMMAND, 2);
3620 printf("%s: setting PCI cache line size register to %d.\n",
3621 ncr_name(np), (int)cachelnsz);
3622 pci_write_config(dev, PCIR_CACHELNSZ, cachelnsz, 1);
3625 if (!(command & PCIM_CMD_MWRICEN)) {
3626 command |= PCIM_CMD_MWRICEN;
3627 printf("%s: setting PCI command write and invalidate.\n",
3629 pci_write_config(dev, PCIR_COMMAND, command, 2);
3632 #endif /* PCIR_CACHELNSZ */
3634 #endif /* SCSI_NCR_PCI_CONFIG_FIXUP */
3636 /* Initialize per-target user settings */
3638 if (SCSI_NCR_DFLT_SYNC) {
3639 usrsync = SCSI_NCR_DFLT_SYNC;
3640 if (usrsync > np->maxsync)
3641 usrsync = np->maxsync;
3642 if (usrsync < np->minsync)
3643 usrsync = np->minsync;
3646 usrwide = (SCSI_NCR_MAX_WIDE);
3647 if (usrwide > np->maxwide) usrwide=np->maxwide;
3649 for (i=0;i<MAX_TARGET;i++) {
3650 tcb_p tp = &np->target[i];
3652 tp->tinfo.user.period = usrsync;
3653 tp->tinfo.user.offset = usrsync != 0 ? np->maxoffs : 0;
3654 tp->tinfo.user.width = usrwide;
3655 tp->tinfo.disc_tag = NCR_CUR_DISCENB
3662 ** Bells and whistles ;-)
3665 printf("%s: minsync=%d, maxsync=%d, maxoffs=%d, %d dwords burst, %s dma fifo\n",
3666 ncr_name(np), np->minsync, np->maxsync, np->maxoffs,
3667 burst_length(np->maxburst),
3668 (np->rv_ctest5 & DFS) ? "large" : "normal");
3671 ** Print some complementary information that can be helpfull.
3674 printf("%s: %s, %s IRQ driver%s\n",
3676 np->rv_stest2 & 0x20 ? "differential" : "single-ended",
3677 np->rv_dcntl & IRQM ? "totem pole" : "open drain",
3678 np->sram_res ? ", using on-chip SRAM" : "");
3681 ** Patch scripts to physical addresses
3683 ncr_script_fill (&script0, &scripth0);
3686 np->p_script = vtophys(np->script);
3687 np->p_scripth = vtophys(np->scripth);
3689 ncr_script_copy_and_bind (np, (ncrcmd *) &script0,
3690 (ncrcmd *) np->script, sizeof(struct script));
3692 ncr_script_copy_and_bind (np, (ncrcmd *) &scripth0,
3693 (ncrcmd *) np->scripth, sizeof(struct scripth));
3696 ** Patch the script for LED support.
3699 if (np->features & FE_LED0) {
3700 WRITESCRIPT(reselect[0], SCR_REG_REG(gpreg, SCR_OR, 0x01));
3701 WRITESCRIPT(reselect1[0], SCR_REG_REG(gpreg, SCR_AND, 0xfe));
3702 WRITESCRIPT(reselect2[0], SCR_REG_REG(gpreg, SCR_AND, 0xfe));
3706 ** init data structure
3709 np->jump_tcb.l_cmd = SCR_JUMP;
3710 np->jump_tcb.l_paddr = NCB_SCRIPTH_PHYS (np, abort);
3713 ** Get SCSI addr of host adapter (set by bios?).
3716 np->myaddr = INB(nc_scid) & 0x07;
3717 if (!np->myaddr) np->myaddr = SCSI_NCR_MYADDR;
3721 ** Log the initial register contents
3725 for (reg=0; reg<256; reg+=4) {
3726 if (reg%16==0) printf ("reg[%2x]", reg);
3727 printf (" %08x", (int)pci_conf_read (config_id, reg));
3728 if (reg%16==12) printf ("\n");
3731 #endif /* NCR_DUMP_REG */
3737 OUTB (nc_istat, SRST);
3739 OUTB (nc_istat, 0 );
3743 ** Now check the cache handling of the pci chipset.
3746 if (ncr_snooptest (np)) {
3747 printf ("CACHE INCORRECTLY CONFIGURED.\n");
3752 ** Install the interrupt handler.
3756 np->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
3757 RF_SHAREABLE | RF_ACTIVE);
3758 if (np->irq_res == NULL) {
3760 "interruptless mode: reduced performance.\n");
3762 bus_setup_intr(dev, np->irq_res, INTR_TYPE_CAM | INTR_ENTROPY,
3763 NULL, ncr_intr, np, &np->irq_handle);
3767 ** Create the device queue. We only allow MAX_START-1 concurrent
3768 ** transactions so we can be sure to have one element free in our
3769 ** start queue to reset to the idle loop.
3771 devq = cam_simq_alloc(MAX_START - 1);
3776 ** Now tell the generic SCSI layer
3779 np->sim = cam_sim_alloc(ncr_action, ncr_poll, "ncr", np, np->unit,
3780 &Giant, 1, MAX_TAGS, devq);
3781 if (np->sim == NULL) {
3782 cam_simq_free(devq);
3787 if (xpt_bus_register(np->sim, dev, 0) != CAM_SUCCESS) {
3788 cam_sim_free(np->sim, /*free_devq*/ TRUE);
3792 if (xpt_create_path(&np->path, /*periph*/NULL,
3793 cam_sim_path(np->sim), CAM_TARGET_WILDCARD,
3794 CAM_LUN_WILDCARD) != CAM_REQ_CMP) {
3795 xpt_bus_deregister(cam_sim_path(np->sim));
3796 cam_sim_free(np->sim, /*free_devq*/TRUE);
3801 ** start the timeout daemon
3809 /*==========================================================
3812 ** Process pending device interrupts.
3815 **==========================================================
3823 int oldspl = splcam();
3825 if (DEBUG_FLAGS & DEBUG_TINY) printf ("[");
3827 if (INB(nc_istat) & (INTF|SIP|DIP)) {
3829 ** Repeat until no outstanding ints
3833 } while (INB(nc_istat) & (INTF|SIP|DIP));
3838 if (DEBUG_FLAGS & DEBUG_TINY) printf ("]\n");
3843 /*==========================================================
3846 ** Start execution of a SCSI command.
3847 ** This is called from the generic SCSI driver.
3850 **==========================================================
3854 ncr_action (struct cam_sim *sim, union ccb *ccb)
3858 np = (ncb_p) cam_sim_softc(sim);
3860 switch (ccb->ccb_h.func_code) {
3861 /* Common cases first */
3862 case XPT_SCSI_IO: /* Execute the requested I/O operation */
3868 struct ccb_scsiio *csio;
3877 tp = &np->target[ccb->ccb_h.target_id];
3883 * Last time we need to check if this CCB needs to
3886 if ((ccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_INPROG) {
3891 ccb->ccb_h.status |= CAM_SIM_QUEUED;
3893 /*---------------------------------------------------
3895 ** Assign an nccb / bind ccb
3897 **----------------------------------------------------
3899 cp = ncr_get_nccb (np, ccb->ccb_h.target_id,
3900 ccb->ccb_h.target_lun);
3902 /* XXX JGibbs - Freeze SIMQ */
3903 ccb->ccb_h.status = CAM_RESRC_UNAVAIL;
3910 /*---------------------------------------------------
3914 **----------------------------------------------------
3917 ** XXX JGibbs - Isn't this expensive
3918 ** enough to be conditionalized??
3921 bzero (&cp->phys.header.stamp, sizeof (struct tstamp));
3922 cp->phys.header.stamp.start = ticks;
3925 if (tp->nego_cp == NULL) {
3927 if (tp->tinfo.current.width
3928 != tp->tinfo.goal.width) {
3931 } else if ((tp->tinfo.current.period
3932 != tp->tinfo.goal.period)
3933 || (tp->tinfo.current.offset
3934 != tp->tinfo.goal.offset)) {
3940 /*---------------------------------------------------
3942 ** choose a new tag ...
3944 **----------------------------------------------------
3946 lp = tp->lp[ccb->ccb_h.target_lun];
3948 if ((ccb->ccb_h.flags & CAM_TAG_ACTION_VALID) != 0
3949 && (ccb->csio.tag_action != CAM_TAG_ACTION_NONE)
3952 ** assign a tag to this nccb
3955 nccb_p cp2 = lp->next_nccb;
3956 lp->lasttag = lp->lasttag % 255 + 1;
3957 while (cp2 && cp2->tag != lp->lasttag)
3958 cp2 = cp2->next_nccb;
3960 cp->tag=lp->lasttag;
3961 if (DEBUG_FLAGS & DEBUG_TAGS) {
3963 printf ("using tag #%d.\n", cp->tag);
3970 /*----------------------------------------------------
3972 ** Build the identify / tag / sdtr message
3974 **----------------------------------------------------
3976 idmsg = MSG_IDENTIFYFLAG | ccb->ccb_h.target_lun;
3977 if (tp->tinfo.disc_tag & NCR_CUR_DISCENB)
3978 idmsg |= MSG_IDENTIFY_DISCFLAG;
3980 msgptr = cp->scsi_smsg;
3982 msgptr[msglen++] = idmsg;
3985 msgptr[msglen++] = ccb->csio.tag_action;
3986 msgptr[msglen++] = cp->tag;
3991 msgptr[msglen++] = MSG_EXTENDED;
3992 msgptr[msglen++] = MSG_EXT_SDTR_LEN;
3993 msgptr[msglen++] = MSG_EXT_SDTR;
3994 msgptr[msglen++] = tp->tinfo.goal.period;
3995 msgptr[msglen++] = tp->tinfo.goal.offset;
3996 if (DEBUG_FLAGS & DEBUG_NEGO) {
3998 printf ("sync msgout: ");
3999 ncr_show_msg (&cp->scsi_smsg [msglen-5]);
4004 msgptr[msglen++] = MSG_EXTENDED;
4005 msgptr[msglen++] = MSG_EXT_WDTR_LEN;
4006 msgptr[msglen++] = MSG_EXT_WDTR;
4007 msgptr[msglen++] = tp->tinfo.goal.width;
4008 if (DEBUG_FLAGS & DEBUG_NEGO) {
4010 printf ("wide msgout: ");
4011 ncr_show_msg (&cp->scsi_smsg [msglen-4]);
4017 /*----------------------------------------------------
4019 ** Build the identify message for getcc.
4021 **----------------------------------------------------
4024 cp->scsi_smsg2 [0] = idmsg;
4027 /*----------------------------------------------------
4029 ** Build the data descriptors
4031 **----------------------------------------------------
4034 /* XXX JGibbs - Handle other types of I/O */
4035 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) {
4036 segments = ncr_scatter(&cp->phys,
4037 (vm_offset_t)csio->data_ptr,
4038 (vm_size_t)csio->dxfer_len);
4041 ccb->ccb_h.status = CAM_REQ_TOO_BIG;
4042 ncr_free_nccb(np, cp);
4047 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) {
4048 cp->phys.header.savep = NCB_SCRIPT_PHYS (np, data_in);
4049 cp->phys.header.goalp = cp->phys.header.savep +20 +segments*16;
4050 } else { /* CAM_DIR_OUT */
4051 cp->phys.header.savep = NCB_SCRIPT_PHYS (np, data_out);
4052 cp->phys.header.goalp = cp->phys.header.savep +20 +segments*16;
4055 cp->phys.header.savep = NCB_SCRIPT_PHYS (np, no_data);
4056 cp->phys.header.goalp = cp->phys.header.savep;
4059 cp->phys.header.lastp = cp->phys.header.savep;
4062 /*----------------------------------------------------
4066 **----------------------------------------------------
4069 ** physical -> virtual backlink
4070 ** Generic SCSI command
4072 cp->phys.header.cp = cp;
4076 cp->phys.header.launch.l_paddr = NCB_SCRIPT_PHYS (np, select);
4077 cp->phys.header.launch.l_cmd = SCR_JUMP;
4081 cp->phys.select.sel_id = ccb->ccb_h.target_id;
4082 cp->phys.select.sel_scntl3 = tp->tinfo.wval;
4083 cp->phys.select.sel_sxfer = tp->tinfo.sval;
4087 cp->phys.smsg.addr = CCB_PHYS (cp, scsi_smsg);
4088 cp->phys.smsg.size = msglen;
4090 cp->phys.smsg2.addr = CCB_PHYS (cp, scsi_smsg2);
4091 cp->phys.smsg2.size = msglen2;
4095 /* XXX JGibbs - Support other command types */
4096 cp->phys.cmd.addr = vtophys (csio->cdb_io.cdb_bytes);
4097 cp->phys.cmd.size = csio->cdb_len;
4101 cp->phys.scmd.addr = CCB_PHYS (cp, sensecmd);
4102 cp->phys.scmd.size = 6;
4104 ** patch requested size into sense command
4106 cp->sensecmd[0] = 0x03;
4107 cp->sensecmd[1] = ccb->ccb_h.target_lun << 5;
4108 cp->sensecmd[4] = sizeof(struct scsi_sense_data);
4109 cp->sensecmd[4] = csio->sense_len;
4113 cp->phys.sense.addr = vtophys (&csio->sense_data);
4114 cp->phys.sense.size = csio->sense_len;
4118 cp->actualquirks = QUIRK_NOMSG;
4119 cp->host_status = nego ? HS_NEGOTIATE : HS_BUSY;
4120 cp->s_status = SCSI_STATUS_ILLEGAL;
4121 cp->parity_status = 0;
4123 cp->xerr_status = XE_OK;
4124 cp->sync_status = tp->tinfo.sval;
4125 cp->nego_status = nego;
4126 cp->wide_status = tp->tinfo.wval;
4128 /*----------------------------------------------------
4130 ** Critical region: start this job.
4132 **----------------------------------------------------
4136 ** reselect pattern and activate this job.
4139 cp->jump_nccb.l_cmd = (SCR_JUMP ^ IFFALSE (DATA (cp->tag)));
4140 cp->tlimit = time_second
4141 + ccb->ccb_h.timeout / 1000 + 2;
4142 cp->magic = CCB_MAGIC;
4145 ** insert into start queue.
4148 qidx = np->squeueput + 1;
4149 if (qidx >= MAX_START)
4151 np->squeue [qidx ] = NCB_SCRIPT_PHYS (np, idle);
4152 np->squeue [np->squeueput] = CCB_PHYS (cp, phys);
4153 np->squeueput = qidx;
4155 if(DEBUG_FLAGS & DEBUG_QUEUE)
4156 printf("%s: queuepos=%d tryoffset=%d.\n",
4157 ncr_name (np), np->squeueput,
4158 (unsigned)(READSCRIPT(startpos[0]) -
4159 (NCB_SCRIPTH_PHYS (np, tryloop))));
4162 ** Script processor may be waiting for reselect.
4165 OUTB (nc_istat, SIGP);
4168 ** and reenable interrupts
4173 case XPT_RESET_DEV: /* Bus Device Reset the specified SCSI device */
4174 case XPT_EN_LUN: /* Enable LUN as a target */
4175 case XPT_TARGET_IO: /* Execute target I/O request */
4176 case XPT_ACCEPT_TARGET_IO: /* Accept Host Target Mode CDB */
4177 case XPT_CONT_TARGET_IO: /* Continue Host Target I/O Connection*/
4178 case XPT_ABORT: /* Abort the specified CCB */
4180 ccb->ccb_h.status = CAM_REQ_INVALID;
4183 case XPT_SET_TRAN_SETTINGS:
4185 struct ccb_trans_settings *cts = &ccb->cts;
4189 struct ccb_trans_settings_scsi *scsi =
4190 &cts->proto_specific.scsi;
4191 struct ccb_trans_settings_spi *spi =
4192 &cts->xport_specific.spi;
4195 if (cts->type == CTS_TYPE_CURRENT_SETTINGS)
4196 update_type |= NCR_TRANS_GOAL;
4197 if (cts->type == CTS_TYPE_USER_SETTINGS)
4198 update_type |= NCR_TRANS_USER;
4201 tp = &np->target[ccb->ccb_h.target_id];
4202 /* Tag and disc enables */
4203 if ((spi->valid & CTS_SPI_VALID_DISC) != 0) {
4204 if (update_type & NCR_TRANS_GOAL) {
4205 if ((spi->flags & CTS_SPI_FLAGS_DISC_ENB) != 0)
4206 tp->tinfo.disc_tag |= NCR_CUR_DISCENB;
4208 tp->tinfo.disc_tag &= ~NCR_CUR_DISCENB;
4211 if (update_type & NCR_TRANS_USER) {
4212 if ((spi->flags & CTS_SPI_FLAGS_DISC_ENB) != 0)
4213 tp->tinfo.disc_tag |= NCR_USR_DISCENB;
4215 tp->tinfo.disc_tag &= ~NCR_USR_DISCENB;
4220 if ((scsi->valid & CTS_SCSI_VALID_TQ) != 0) {
4221 if (update_type & NCR_TRANS_GOAL) {
4222 if ((scsi->flags & CTS_SCSI_FLAGS_TAG_ENB) != 0)
4223 tp->tinfo.disc_tag |= NCR_CUR_TAGENB;
4225 tp->tinfo.disc_tag &= ~NCR_CUR_TAGENB;
4228 if (update_type & NCR_TRANS_USER) {
4229 if ((scsi->flags & CTS_SCSI_FLAGS_TAG_ENB) != 0)
4230 tp->tinfo.disc_tag |= NCR_USR_TAGENB;
4232 tp->tinfo.disc_tag &= ~NCR_USR_TAGENB;
4236 /* Filter bus width and sync negotiation settings */
4237 if ((spi->valid & CTS_SPI_VALID_BUS_WIDTH) != 0) {
4238 if (spi->bus_width > np->maxwide)
4239 spi->bus_width = np->maxwide;
4242 if (((spi->valid & CTS_SPI_VALID_SYNC_RATE) != 0)
4243 || ((spi->valid & CTS_SPI_VALID_SYNC_OFFSET) != 0)) {
4244 if ((spi->valid & CTS_SPI_VALID_SYNC_RATE) != 0) {
4245 if (spi->sync_period != 0
4246 && (spi->sync_period < np->minsync))
4247 spi->sync_period = np->minsync;
4249 if ((spi->valid & CTS_SPI_VALID_SYNC_OFFSET) != 0) {
4250 if (spi->sync_offset == 0)
4251 spi->sync_period = 0;
4252 if (spi->sync_offset > np->maxoffs)
4253 spi->sync_offset = np->maxoffs;
4256 if ((update_type & NCR_TRANS_USER) != 0) {
4257 if ((spi->valid & CTS_SPI_VALID_SYNC_RATE) != 0)
4258 tp->tinfo.user.period = spi->sync_period;
4259 if ((spi->valid & CTS_SPI_VALID_SYNC_OFFSET) != 0)
4260 tp->tinfo.user.offset = spi->sync_offset;
4261 if ((spi->valid & CTS_SPI_VALID_BUS_WIDTH) != 0)
4262 tp->tinfo.user.width = spi->bus_width;
4264 if ((update_type & NCR_TRANS_GOAL) != 0) {
4265 if ((spi->valid & CTS_SPI_VALID_SYNC_RATE) != 0)
4266 tp->tinfo.goal.period = spi->sync_period;
4268 if ((spi->valid & CTS_SPI_VALID_SYNC_OFFSET) != 0)
4269 tp->tinfo.goal.offset = spi->sync_offset;
4271 if ((spi->valid & CTS_SPI_VALID_BUS_WIDTH) != 0)
4272 tp->tinfo.goal.width = spi->bus_width;
4275 ccb->ccb_h.status = CAM_REQ_CMP;
4279 case XPT_GET_TRAN_SETTINGS:
4280 /* Get default/user set transfer settings for the target */
4282 struct ccb_trans_settings *cts = &ccb->cts;
4283 struct ncr_transinfo *tinfo;
4284 tcb_p tp = &np->target[ccb->ccb_h.target_id];
4286 struct ccb_trans_settings_scsi *scsi =
4287 &cts->proto_specific.scsi;
4288 struct ccb_trans_settings_spi *spi =
4289 &cts->xport_specific.spi;
4291 cts->protocol = PROTO_SCSI;
4292 cts->protocol_version = SCSI_REV_2;
4293 cts->transport = XPORT_SPI;
4294 cts->transport_version = 2;
4297 if (cts->type == CTS_TYPE_CURRENT_SETTINGS) {
4298 tinfo = &tp->tinfo.current;
4299 if (tp->tinfo.disc_tag & NCR_CUR_DISCENB)
4300 spi->flags |= CTS_SPI_FLAGS_DISC_ENB;
4302 spi->flags &= ~CTS_SPI_FLAGS_DISC_ENB;
4304 if (tp->tinfo.disc_tag & NCR_CUR_TAGENB)
4305 scsi->flags |= CTS_SCSI_FLAGS_TAG_ENB;
4307 scsi->flags &= ~CTS_SCSI_FLAGS_TAG_ENB;
4309 tinfo = &tp->tinfo.user;
4310 if (tp->tinfo.disc_tag & NCR_USR_DISCENB)
4311 spi->flags |= CTS_SPI_FLAGS_DISC_ENB;
4313 spi->flags &= ~CTS_SPI_FLAGS_DISC_ENB;
4315 if (tp->tinfo.disc_tag & NCR_USR_TAGENB)
4316 scsi->flags |= CTS_SCSI_FLAGS_TAG_ENB;
4318 scsi->flags &= ~CTS_SCSI_FLAGS_TAG_ENB;
4321 spi->sync_period = tinfo->period;
4322 spi->sync_offset = tinfo->offset;
4323 spi->bus_width = tinfo->width;
4326 spi->valid = CTS_SPI_VALID_SYNC_RATE
4327 | CTS_SPI_VALID_SYNC_OFFSET
4328 | CTS_SPI_VALID_BUS_WIDTH
4329 | CTS_SPI_VALID_DISC;
4330 scsi->valid = CTS_SCSI_VALID_TQ;
4332 ccb->ccb_h.status = CAM_REQ_CMP;
4336 case XPT_CALC_GEOMETRY:
4338 /* XXX JGibbs - I'm sure the NCR uses a different strategy,
4339 * but it should be able to deal with Adaptec
4342 cam_calc_geometry(&ccb->ccg, /*extended*/1);
4346 case XPT_RESET_BUS: /* Reset the specified SCSI bus */
4348 OUTB (nc_scntl1, CRST);
4349 ccb->ccb_h.status = CAM_REQ_CMP;
4350 DELAY(10000); /* Wait until our interrupt handler sees it */
4354 case XPT_TERM_IO: /* Terminate the I/O process */
4356 ccb->ccb_h.status = CAM_REQ_INVALID;
4359 case XPT_PATH_INQ: /* Path routing inquiry */
4361 struct ccb_pathinq *cpi = &ccb->cpi;
4363 cpi->version_num = 1; /* XXX??? */
4364 cpi->hba_inquiry = PI_SDTR_ABLE|PI_TAG_ABLE;
4365 if ((np->features & FE_WIDE) != 0)
4366 cpi->hba_inquiry |= PI_WIDE_16;
4367 cpi->target_sprt = 0;
4369 cpi->hba_eng_cnt = 0;
4370 cpi->max_target = (np->features & FE_WIDE) ? 15 : 7;
4371 cpi->max_lun = MAX_LUN - 1;
4372 cpi->initiator_id = np->myaddr;
4373 cpi->bus_id = cam_sim_bus(sim);
4374 cpi->base_transfer_speed = 3300;
4375 strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN);
4376 strncpy(cpi->hba_vid, "Symbios", HBA_IDLEN);
4377 strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN);
4378 cpi->unit_number = cam_sim_unit(sim);
4379 cpi->transport = XPORT_SPI;
4380 cpi->transport_version = 2;
4381 cpi->protocol = PROTO_SCSI;
4382 cpi->protocol_version = SCSI_REV_2;
4383 cpi->ccb_h.status = CAM_REQ_CMP;
4388 ccb->ccb_h.status = CAM_REQ_INVALID;
4394 /*==========================================================
4397 ** Complete execution of a SCSI command.
4398 ** Signal completion to the generic SCSI driver.
4401 **==========================================================
4405 ncr_complete (ncb_p np, nccb_p cp)
4414 if (!cp || (cp->magic!=CCB_MAGIC) || !cp->ccb) return;
4419 ** No Reselect anymore.
4421 cp->jump_nccb.l_cmd = (SCR_JUMP);
4426 cp->phys.header.launch.l_paddr= NCB_SCRIPT_PHYS (np, idle);
4431 ncb_profile (np, cp);
4433 if (DEBUG_FLAGS & DEBUG_TINY)
4434 printf ("CCB=%x STAT=%x/%x\n", (int)(intptr_t)cp & 0xfff,
4435 cp->host_status,cp->s_status);
4439 tp = &np->target[ccb->ccb_h.target_id];
4442 ** We do not queue more than 1 nccb per target
4443 ** with negotiation at any time. If this nccb was
4444 ** used for negotiation, clear this info in the tcb.
4447 if (cp == tp->nego_cp)
4451 ** Check for parity errors.
4453 /* XXX JGibbs - What about reporting them??? */
4455 if (cp->parity_status) {
4457 printf ("%d parity error(s), fallback.\n", cp->parity_status);
4459 ** fallback to asynch transfer.
4461 tp->tinfo.goal.period = 0;
4462 tp->tinfo.goal.offset = 0;
4466 ** Check for extended errors.
4469 if (cp->xerr_status != XE_OK) {
4471 switch (cp->xerr_status) {
4473 printf ("extraneous data discarded.\n");
4476 printf ("illegal scsi phase (4/5).\n");
4479 printf ("extended error %d.\n", cp->xerr_status);
4482 if (cp->host_status==HS_COMPLETE)
4483 cp->host_status = HS_FAIL;
4487 ** Check the status.
4489 if (cp->host_status == HS_COMPLETE) {
4491 if (cp->s_status == SCSI_STATUS_OK) {
4496 /* XXX JGibbs - Properly calculate residual */
4498 tp->bytes += ccb->csio.dxfer_len;
4501 ccb->ccb_h.status = CAM_REQ_CMP;
4502 } else if ((cp->s_status & SCSI_STATUS_SENSE) != 0) {
4505 * XXX Could be TERMIO too. Should record
4508 ccb->csio.scsi_status = SCSI_STATUS_CHECK_COND;
4509 cp->s_status &= ~SCSI_STATUS_SENSE;
4510 if (cp->s_status == SCSI_STATUS_OK) {
4512 CAM_AUTOSNS_VALID|CAM_SCSI_STATUS_ERROR;
4514 ccb->ccb_h.status = CAM_AUTOSENSE_FAIL;
4517 ccb->ccb_h.status = CAM_SCSI_STATUS_ERROR;
4518 ccb->csio.scsi_status = cp->s_status;
4522 } else if (cp->host_status == HS_SEL_TIMEOUT) {
4525 ** Device failed selection
4527 ccb->ccb_h.status = CAM_SEL_TIMEOUT;
4529 } else if (cp->host_status == HS_TIMEOUT) {
4534 ccb->ccb_h.status = CAM_CMD_TIMEOUT;
4535 } else if (cp->host_status == HS_STALL) {
4536 ccb->ccb_h.status = CAM_REQUEUE_REQ;
4540 ** Other protocol messes
4543 printf ("COMMAND FAILED (%x %x) @%p.\n",
4544 cp->host_status, cp->s_status, cp);
4546 ccb->ccb_h.status = CAM_CMD_TIMEOUT;
4549 if ((ccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_CMP) {
4550 xpt_freeze_devq(ccb->ccb_h.path, /*count*/1);
4551 ccb->ccb_h.status |= CAM_DEV_QFRZN;
4557 ncr_free_nccb (np, cp);
4560 ** signal completion to generic driver.
4565 /*==========================================================
4568 ** Signal all (or one) control block done.
4571 **==========================================================
4575 ncr_wakeup (ncb_p np, u_long code)
4578 ** Starting at the default nccb and following
4579 ** the links, complete all jobs with a
4580 ** host_status greater than "disconnect".
4582 ** If the "code" parameter is not zero,
4583 ** complete all jobs that are not IDLE.
4586 nccb_p cp = np->link_nccb;
4588 switch (cp->host_status) {
4594 if(DEBUG_FLAGS & DEBUG_TINY) printf ("D");
4600 cp->host_status = code;
4605 ncr_complete (np, cp);
4608 cp = cp -> link_nccb;
4613 ncr_freeze_devq (ncb_p np, struct cam_path *path)
4620 ** Starting at the first nccb and following
4621 ** the links, complete all jobs that match
4622 ** the passed in path and are in the start queue.
4629 switch (cp->host_status) {
4633 if ((cp->phys.header.launch.l_paddr
4634 == NCB_SCRIPT_PHYS (np, select))
4635 && (xpt_path_comp(path, cp->ccb->ccb_h.path) >= 0)) {
4637 /* Mark for removal from the start queue */
4638 for (i = 1; i < MAX_START; i++) {
4641 idx = np->squeueput - i;
4644 idx = MAX_START + idx;
4646 == CCB_PHYS(cp, phys)) {
4648 NCB_SCRIPT_PHYS (np, skip);
4654 cp->host_status=HS_STALL;
4655 ncr_complete (np, cp);
4669 /* Compress the start queue */
4671 bidx = np->squeueput;
4672 i = np->squeueput - firstskip;
4679 bidx = MAX_START + bidx;
4681 if (np->squeue[i] == NCB_SCRIPT_PHYS (np, skip)) {
4683 } else if (j != 0) {
4684 np->squeue[bidx] = np->squeue[i];
4685 if (np->squeue[bidx]
4686 == NCB_SCRIPT_PHYS(np, idle))
4689 i = (i + 1) % MAX_START;
4691 np->squeueput = bidx;
4695 /*==========================================================
4701 **==========================================================
4705 ncr_init(ncb_p np, char * msg, u_long code)
4713 OUTB (nc_istat, SRST);
4721 if (msg) printf ("%s: restart (%s).\n", ncr_name (np), msg);
4724 ** Clear Start Queue
4727 for (i=0;i<MAX_START;i++)
4728 np -> squeue [i] = NCB_SCRIPT_PHYS (np, idle);
4731 ** Start at first entry.
4735 WRITESCRIPT(startpos[0], NCB_SCRIPTH_PHYS (np, tryloop));
4736 WRITESCRIPT(start0 [0], SCR_INT ^ IFFALSE (0));
4739 ** Wakeup all pending jobs.
4742 ncr_wakeup (np, code);
4748 OUTB (nc_istat, 0x00 ); /* Remove Reset, abort ... */
4749 OUTB (nc_scntl0, 0xca ); /* full arb., ena parity, par->ATN */
4750 OUTB (nc_scntl1, 0x00 ); /* odd parity, and remove CRST!! */
4751 ncr_selectclock(np, np->rv_scntl3); /* Select SCSI clock */
4752 OUTB (nc_scid , RRE|np->myaddr);/* host adapter SCSI address */
4753 OUTW (nc_respid, 1ul<<np->myaddr);/* id to respond to */
4754 OUTB (nc_istat , SIGP ); /* Signal Process */
4755 OUTB (nc_dmode , np->rv_dmode); /* XXX modify burstlen ??? */
4756 OUTB (nc_dcntl , np->rv_dcntl);
4757 OUTB (nc_ctest3, np->rv_ctest3);
4758 OUTB (nc_ctest5, np->rv_ctest5);
4759 OUTB (nc_ctest4, np->rv_ctest4);/* enable master parity checking */
4760 OUTB (nc_stest2, np->rv_stest2|EXT); /* Extended Sreq/Sack filtering */
4761 OUTB (nc_stest3, TE ); /* TolerANT enable */
4762 OUTB (nc_stime0, 0x0b ); /* HTH = disabled, STO = 0.1 sec. */
4764 if (bootverbose >= 2) {
4765 printf ("\tACTUAL values:SCNTL3:%02x DMODE:%02x DCNTL:%02x\n",
4766 np->rv_scntl3, np->rv_dmode, np->rv_dcntl);
4767 printf ("\t CTEST3:%02x CTEST4:%02x CTEST5:%02x\n",
4768 np->rv_ctest3, np->rv_ctest4, np->rv_ctest5);
4772 ** Enable GPIO0 pin for writing if LED support.
4775 if (np->features & FE_LED0) {
4776 OUTOFFB (nc_gpcntl, 0x01);
4780 ** Fill in target structure.
4782 for (i=0;i<MAX_TARGET;i++) {
4783 tcb_p tp = &np->target[i];
4786 tp->tinfo.wval = np->rv_scntl3;
4788 tp->tinfo.current.period = 0;
4789 tp->tinfo.current.offset = 0;
4790 tp->tinfo.current.width = MSG_EXT_WDTR_BUS_8_BIT;
4797 OUTW (nc_sien , STO|HTH|MA|SGE|UDC|RST);
4798 OUTB (nc_dien , MDPE|BF|ABRT|SSI|SIR|IID);
4801 ** Start script processor.
4804 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, start));
4807 * Notify the XPT of the event
4809 if (code == HS_RESET)
4810 xpt_async(AC_BUS_RESET, np->path, NULL);
4814 ncr_poll(struct cam_sim *sim)
4816 ncr_intr(cam_sim_softc(sim));
4820 /*==========================================================
4822 ** Get clock factor and sync divisor for a given
4823 ** synchronous factor period.
4824 ** Returns the clock factor (in sxfer) and scntl3
4825 ** synchronous divisor field.
4827 **==========================================================
4830 static void ncr_getsync(ncb_p np, u_char sfac, u_char *fakp, u_char *scntl3p)
4832 u_long clk = np->clock_khz; /* SCSI clock frequency in kHz */
4833 int div = np->clock_divn; /* Number of divisors supported */
4834 u_long fak; /* Sync factor in sxfer */
4835 u_long per; /* Period in tenths of ns */
4836 u_long kpc; /* (per * clk) */
4839 ** Compute the synchronous period in tenths of nano-seconds
4841 if (sfac <= 10) per = 250;
4842 else if (sfac == 11) per = 303;
4843 else if (sfac == 12) per = 500;
4844 else per = 40 * sfac;
4847 ** Look for the greatest clock divisor that allows an
4848 ** input speed faster than the period.
4852 if (kpc >= (div_10M[div] * 4)) break;
4855 ** Calculate the lowest clock factor that allows an output
4856 ** speed not faster than the period.
4858 fak = (kpc - 1) / div_10M[div] + 1;
4860 #if 0 /* You can #if 1 if you think this optimization is useful */
4862 per = (fak * div_10M[div]) / clk;
4865 ** Why not to try the immediate lower divisor and to choose
4866 ** the one that allows the fastest output speed ?
4867 ** We dont want input speed too much greater than output speed.
4869 if (div >= 1 && fak < 6) {
4871 fak2 = (kpc - 1) / div_10M[div-1] + 1;
4872 per2 = (fak2 * div_10M[div-1]) / clk;
4873 if (per2 < per && fak2 <= 6) {
4881 if (fak < 4) fak = 4; /* Should never happen, too bad ... */
4884 ** Compute and return sync parameters for the ncr
4887 *scntl3p = ((div+1) << 4) + (sfac < 25 ? 0x80 : 0);
4890 /*==========================================================
4892 ** Switch sync mode for current job and its target
4894 **==========================================================
4898 ncr_setsync(ncb_p np, nccb_p cp, u_char scntl3, u_char sxfer, u_char period)
4901 struct ccb_trans_settings neg;
4904 u_int target = INB (nc_sdid) & 0x0f;
4913 assert (target == ccb->ccb_h.target_id);
4915 tp = &np->target[target];
4917 if (!scntl3 || !(sxfer & 0x1f))
4918 scntl3 = np->rv_scntl3;
4919 scntl3 = (scntl3 & 0xf0) | (tp->tinfo.wval & EWS)
4920 | (np->rv_scntl3 & 0x07);
4923 ** Deduce the value of controller sync period from scntl3.
4924 ** period is in tenths of nano-seconds.
4927 div = ((scntl3 >> 4) & 0x7);
4928 if ((sxfer & 0x1f) && div)
4930 (((sxfer>>5)+4)*div_10M[div-1])/np->clock_khz;
4934 tp->tinfo.goal.period = period;
4935 tp->tinfo.goal.offset = sxfer & 0x1f;
4936 tp->tinfo.current.period = period;
4937 tp->tinfo.current.offset = sxfer & 0x1f;
4940 ** Stop there if sync parameters are unchanged
4942 if (tp->tinfo.sval == sxfer && tp->tinfo.wval == scntl3) return;
4943 tp->tinfo.sval = sxfer;
4944 tp->tinfo.wval = scntl3;
4948 ** Disable extended Sreq/Sack filtering
4950 if (period_10ns <= 2000) OUTOFFB (nc_stest2, EXT);
4954 ** Tell the SCSI layer about the
4955 ** new transfer parameters.
4957 memset(&neg, 0, sizeof (neg));
4958 neg.protocol = PROTO_SCSI;
4959 neg.protocol_version = SCSI_REV_2;
4960 neg.transport = XPORT_SPI;
4961 neg.transport_version = 2;
4962 neg.xport_specific.spi.sync_period = period;
4963 neg.xport_specific.spi.sync_offset = sxfer & 0x1f;
4964 neg.xport_specific.spi.valid = CTS_SPI_VALID_SYNC_RATE
4965 | CTS_SPI_VALID_SYNC_OFFSET;
4966 xpt_setup_ccb(&neg.ccb_h, ccb->ccb_h.path,
4968 xpt_async(AC_TRANSFER_NEG, ccb->ccb_h.path, &neg);
4971 ** set actual value and sync_status
4973 OUTB (nc_sxfer, sxfer);
4974 np->sync_st = sxfer;
4975 OUTB (nc_scntl3, scntl3);
4976 np->wide_st = scntl3;
4979 ** patch ALL nccbs of this target.
4981 for (cp = np->link_nccb; cp; cp = cp->link_nccb) {
4982 if (!cp->ccb) continue;
4983 if (cp->ccb->ccb_h.target_id != target) continue;
4984 cp->sync_status = sxfer;
4985 cp->wide_status = scntl3;
4989 /*==========================================================
4991 ** Switch wide mode for current job and its target
4992 ** SCSI specs say: a SCSI device that accepts a WDTR
4993 ** message shall reset the synchronous agreement to
4994 ** asynchronous mode.
4996 **==========================================================
4999 static void ncr_setwide (ncb_p np, nccb_p cp, u_char wide, u_char ack)
5002 struct ccb_trans_settings neg;
5003 u_int target = INB (nc_sdid) & 0x0f;
5014 assert (target == ccb->ccb_h.target_id);
5016 tp = &np->target[target];
5017 tp->tinfo.current.width = wide;
5018 tp->tinfo.goal.width = wide;
5019 tp->tinfo.current.period = 0;
5020 tp->tinfo.current.offset = 0;
5022 scntl3 = (tp->tinfo.wval & (~EWS)) | (wide ? EWS : 0);
5024 sxfer = ack ? 0 : tp->tinfo.sval;
5027 ** Stop there if sync/wide parameters are unchanged
5029 if (tp->tinfo.sval == sxfer && tp->tinfo.wval == scntl3) return;
5030 tp->tinfo.sval = sxfer;
5031 tp->tinfo.wval = scntl3;
5033 /* Tell the SCSI layer about the new transfer params */
5034 memset(&neg, 0, sizeof (neg));
5035 neg.protocol = PROTO_SCSI;
5036 neg.protocol_version = SCSI_REV_2;
5037 neg.transport = XPORT_SPI;
5038 neg.transport_version = 2;
5039 neg.xport_specific.spi.bus_width = (scntl3 & EWS) ?
5040 MSG_EXT_WDTR_BUS_16_BIT : MSG_EXT_WDTR_BUS_8_BIT;
5041 neg.xport_specific.spi.sync_period = 0;
5042 neg.xport_specific.spi.sync_offset = 0;
5043 neg.xport_specific.spi.valid = CTS_SPI_VALID_SYNC_RATE
5044 | CTS_SPI_VALID_SYNC_OFFSET
5045 | CTS_SPI_VALID_BUS_WIDTH;
5046 xpt_setup_ccb(&neg.ccb_h, ccb->ccb_h.path, /*priority*/1);
5047 xpt_async(AC_TRANSFER_NEG, ccb->ccb_h.path, &neg);
5050 ** set actual value and sync_status
5052 OUTB (nc_sxfer, sxfer);
5053 np->sync_st = sxfer;
5054 OUTB (nc_scntl3, scntl3);
5055 np->wide_st = scntl3;
5058 ** patch ALL nccbs of this target.
5060 for (cp = np->link_nccb; cp; cp = cp->link_nccb) {
5061 if (!cp->ccb) continue;
5062 if (cp->ccb->ccb_h.target_id != target) continue;
5063 cp->sync_status = sxfer;
5064 cp->wide_status = scntl3;
5068 /*==========================================================
5071 ** ncr timeout handler.
5074 **==========================================================
5076 ** Misused to keep the driver running when
5077 ** interrupts are not configured correctly.
5079 **----------------------------------------------------------
5083 ncr_timeout (void *arg)
5086 time_t thistime = time_second;
5087 ticks_t step = np->ticks;
5092 if (np->lasttime != thistime) {
5094 ** block ncr interrupts
5096 int oldspl = splcam();
5097 np->lasttime = thistime;
5099 /*----------------------------------------------------
5101 ** handle ncr chip timeouts
5104 ** We have a chance to arbitrate for the
5105 ** SCSI bus at least every 10 seconds.
5107 **----------------------------------------------------
5110 t = thistime - np->heartbeat;
5112 if (t<2) np->latetime=0; else np->latetime++;
5114 if (np->latetime>2) {
5116 ** If there are no requests, the script
5117 ** processor will sleep on SEL_WAIT_RESEL.
5118 ** But we have to check whether it died.
5119 ** Let's try to wake it up.
5121 OUTB (nc_istat, SIGP);
5124 /*----------------------------------------------------
5126 ** handle nccb timeouts
5128 **----------------------------------------------------
5131 for (cp=np->link_nccb; cp; cp=cp->link_nccb) {
5133 ** look for timed out nccbs.
5135 if (!cp->host_status) continue;
5137 if (cp->tlimit > thistime) continue;
5140 ** Disable reselect.
5141 ** Remove it from startqueue.
5143 cp->jump_nccb.l_cmd = (SCR_JUMP);
5144 if (cp->phys.header.launch.l_paddr ==
5145 NCB_SCRIPT_PHYS (np, select)) {
5146 printf ("%s: timeout nccb=%p (skip)\n",
5148 cp->phys.header.launch.l_paddr
5149 = NCB_SCRIPT_PHYS (np, skip);
5152 switch (cp->host_status) {
5158 cp->host_status=HS_TIMEOUT;
5163 ** wakeup this nccb.
5165 ncr_complete (np, cp);
5171 timeout (ncr_timeout, (caddr_t) np, step ? step : 1);
5173 if (INB(nc_istat) & (INTF|SIP|DIP)) {
5176 ** Process pending interrupts.
5179 int oldspl = splcam();
5180 if (DEBUG_FLAGS & DEBUG_TINY) printf ("{");
5182 if (DEBUG_FLAGS & DEBUG_TINY) printf ("}");
5187 /*==========================================================
5189 ** log message for real hard errors
5191 ** "ncr0 targ 0?: ERROR (ds:si) (so-si-sd) (sxfer/scntl3) @ name (dsp:dbc)."
5192 ** " reg: r0 r1 r2 r3 r4 r5 r6 ..... rf."
5194 ** exception register:
5199 ** so: control lines as driver by NCR.
5200 ** si: control lines as seen by NCR.
5201 ** sd: scsi data lines as seen by NCR.
5204 ** sxfer: (see the manual)
5205 ** scntl3: (see the manual)
5207 ** current script command:
5208 ** dsp: script address (relative to start of script).
5209 ** dbc: first word of script command.
5211 ** First 16 register of the chip:
5214 **==========================================================
5217 static void ncr_log_hard_error(ncb_p np, u_short sist, u_char dstat)
5223 u_char *script_base;
5228 if (np->p_script < dsp &&
5229 dsp <= np->p_script + sizeof(struct script)) {
5230 script_ofs = dsp - np->p_script;
5231 script_size = sizeof(struct script);
5232 script_base = (u_char *) np->script;
5233 script_name = "script";
5235 else if (np->p_scripth < dsp &&
5236 dsp <= np->p_scripth + sizeof(struct scripth)) {
5237 script_ofs = dsp - np->p_scripth;
5238 script_size = sizeof(struct scripth);
5239 script_base = (u_char *) np->scripth;
5240 script_name = "scripth";
5245 script_name = "mem";
5248 printf ("%s:%d: ERROR (%x:%x) (%x-%x-%x) (%x/%x) @ (%s %x:%08x).\n",
5249 ncr_name (np), (unsigned)INB (nc_sdid)&0x0f, dstat, sist,
5250 (unsigned)INB (nc_socl), (unsigned)INB (nc_sbcl), (unsigned)INB (nc_sbdl),
5251 (unsigned)INB (nc_sxfer),(unsigned)INB (nc_scntl3), script_name, script_ofs,
5252 (unsigned)INL (nc_dbc));
5254 if (((script_ofs & 3) == 0) &&
5255 (unsigned)script_ofs < script_size) {
5256 printf ("%s: script cmd = %08x\n", ncr_name(np),
5257 (int)READSCRIPT_OFF(script_base, script_ofs));
5260 printf ("%s: regdump:", ncr_name(np));
5262 printf (" %02x", (unsigned)INB_OFF(i));
5266 /*==========================================================
5269 ** ncr chip exception handler.
5272 **==========================================================
5275 static void ncr_exception (ncb_p np)
5277 u_char istat, dstat;
5281 ** interrupt on the fly ?
5283 while ((istat = INB (nc_istat)) & INTF) {
5284 if (DEBUG_FLAGS & DEBUG_TINY) printf ("F ");
5285 OUTB (nc_istat, INTF);
5286 np->profile.num_fly++;
5289 if (!(istat & (SIP|DIP))) {
5294 ** Steinbach's Guideline for Systems Programming:
5295 ** Never test for an error condition you don't know how to handle.
5298 sist = (istat & SIP) ? INW (nc_sist) : 0;
5299 dstat = (istat & DIP) ? INB (nc_dstat) : 0;
5300 np->profile.num_int++;
5302 if (DEBUG_FLAGS & DEBUG_TINY)
5303 printf ("<%d|%x:%x|%x:%x>",
5306 (unsigned)INL(nc_dsp),
5307 (unsigned)INL(nc_dbc));
5308 if ((dstat==DFE) && (sist==PAR)) return;
5310 /*==========================================================
5312 ** First the normal cases.
5314 **==========================================================
5316 /*-------------------------------------------
5318 **-------------------------------------------
5322 ncr_init (np, bootverbose ? "scsi reset" : NULL, HS_RESET);
5326 /*-------------------------------------------
5327 ** selection timeout
5329 ** IID excluded from dstat mask!
5331 **-------------------------------------------
5335 !(sist & (GEN|HTH|MA|SGE|UDC|RST|PAR)) &&
5336 !(dstat & (MDPE|BF|ABRT|SIR))) {
5341 /*-------------------------------------------
5343 **-------------------------------------------
5347 !(sist & (STO|GEN|HTH|SGE|UDC|RST|PAR)) &&
5348 !(dstat & (MDPE|BF|ABRT|SIR|IID))) {
5349 ncr_int_ma (np, dstat);
5353 /*----------------------------------------
5354 ** move command with length 0
5355 **----------------------------------------
5358 if ((dstat & IID) &&
5359 !(sist & (STO|GEN|HTH|MA|SGE|UDC|RST|PAR)) &&
5360 !(dstat & (MDPE|BF|ABRT|SIR)) &&
5361 ((INL(nc_dbc) & 0xf8000000) == SCR_MOVE_TBL)) {
5363 ** Target wants more data than available.
5364 ** The "no_data" script will do it.
5366 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, no_data));
5370 /*-------------------------------------------
5371 ** Programmed interrupt
5372 **-------------------------------------------
5375 if ((dstat & SIR) &&
5376 !(sist & (STO|GEN|HTH|MA|SGE|UDC|RST|PAR)) &&
5377 !(dstat & (MDPE|BF|ABRT|IID)) &&
5378 (INB(nc_dsps) <= SIR_MAX)) {
5383 /*========================================
5384 ** log message for real hard errors
5385 **========================================
5388 ncr_log_hard_error(np, sist, dstat);
5390 /*========================================
5391 ** do the register dump
5392 **========================================
5395 if (time_second - np->regtime > 10) {
5397 np->regtime = time_second;
5398 for (i=0; i<sizeof(np->regdump); i++)
5399 ((volatile char*)&np->regdump)[i] = INB_OFF(i);
5400 np->regdump.nc_dstat = dstat;
5401 np->regdump.nc_sist = sist;
5405 /*----------------------------------------
5406 ** clean up the dma fifo
5407 **----------------------------------------
5410 if ( (INB(nc_sstat0) & (ILF|ORF|OLF) ) ||
5411 (INB(nc_sstat1) & (FF3210) ) ||
5412 (INB(nc_sstat2) & (ILF1|ORF1|OLF1)) || /* wide .. */
5414 printf ("%s: have to clear fifos.\n", ncr_name (np));
5415 OUTB (nc_stest3, TE|CSF); /* clear scsi fifo */
5416 OUTB (nc_ctest3, np->rv_ctest3 | CLF);
5417 /* clear dma fifo */
5420 /*----------------------------------------
5421 ** handshake timeout
5422 **----------------------------------------
5426 printf ("%s: handshake timeout\n", ncr_name(np));
5427 OUTB (nc_scntl1, CRST);
5429 OUTB (nc_scntl1, 0x00);
5430 OUTB (nc_scr0, HS_FAIL);
5431 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, cleanup));
5435 /*----------------------------------------
5436 ** unexpected disconnect
5437 **----------------------------------------
5441 !(sist & (STO|GEN|HTH|MA|SGE|RST|PAR)) &&
5442 !(dstat & (MDPE|BF|ABRT|SIR|IID))) {
5443 OUTB (nc_scr0, HS_UNEXPECTED);
5444 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, cleanup));
5448 /*----------------------------------------
5449 ** cannot disconnect
5450 **----------------------------------------
5453 if ((dstat & IID) &&
5454 !(sist & (STO|GEN|HTH|MA|SGE|UDC|RST|PAR)) &&
5455 !(dstat & (MDPE|BF|ABRT|SIR)) &&
5456 ((INL(nc_dbc) & 0xf8000000) == SCR_WAIT_DISC)) {
5458 ** Unexpected data cycle while waiting for disconnect.
5460 if (INB(nc_sstat2) & LDSC) {
5462 ** It's an early reconnect.
5463 ** Let's continue ...
5465 OUTB (nc_dcntl, np->rv_dcntl | STD);
5469 printf ("%s: INFO: LDSC while IID.\n",
5473 printf ("%s: target %d doesn't release the bus.\n",
5474 ncr_name (np), INB (nc_sdid)&0x0f);
5476 ** return without restarting the NCR.
5477 ** timeout will do the real work.
5482 /*----------------------------------------
5484 **----------------------------------------
5487 if ((dstat & SSI) &&
5488 !(sist & (STO|GEN|HTH|MA|SGE|UDC|RST|PAR)) &&
5489 !(dstat & (MDPE|BF|ABRT|SIR|IID))) {
5490 OUTB (nc_dcntl, np->rv_dcntl | STD);
5495 ** @RECOVER@ HTH, SGE, ABRT.
5497 ** We should try to recover from these interrupts.
5498 ** They may occur if there are problems with synch transfers, or
5499 ** if targets are switched on or off while the driver is running.
5503 /* clear scsi offsets */
5504 OUTB (nc_ctest3, np->rv_ctest3 | CLF);
5508 ** Freeze controller to be able to read the messages.
5511 if (DEBUG_FLAGS & DEBUG_FREEZE) {
5514 for (i=0; i<0x60; i++) {
5518 printf ("%s: reg[%d0]: ",
5527 val = bus_space_read_1(np->bst, np->bsh, i);
5528 printf (" %x%x", val/16, val%16);
5529 if (i%16==15) printf (".\n");
5532 untimeout (ncr_timeout, (caddr_t) np, np->timeout_ch);
5534 printf ("%s: halted!\n", ncr_name(np));
5536 ** don't restart controller ...
5538 OUTB (nc_istat, SRST);
5544 ** Freeze system to be able to read the messages.
5546 printf ("ncr: fatal error: system halted - press reset to reboot ...");
5551 ** sorry, have to kill ALL jobs ...
5554 ncr_init (np, "fatal error", HS_FAIL);
5557 /*==========================================================
5559 ** ncr chip exception handler for selection timeout
5561 **==========================================================
5563 ** There seems to be a bug in the 53c810.
5564 ** Although a STO-Interrupt is pending,
5565 ** it continues executing script commands.
5566 ** But it will fail and interrupt (IID) on
5567 ** the next instruction where it's looking
5568 ** for a valid phase.
5570 **----------------------------------------------------------
5573 static void ncr_int_sto (ncb_p np)
5575 u_long dsa, scratcha, diff;
5577 if (DEBUG_FLAGS & DEBUG_TINY) printf ("T");
5580 ** look for nccb and set the status.
5585 while (cp && (CCB_PHYS (cp, phys) != dsa))
5589 cp-> host_status = HS_SEL_TIMEOUT;
5590 ncr_complete (np, cp);
5594 ** repair start queue
5597 scratcha = INL (nc_scratcha);
5598 diff = scratcha - NCB_SCRIPTH_PHYS (np, tryloop);
5600 /* assert ((diff <= MAX_START * 20) && !(diff % 20));*/
5602 if ((diff <= MAX_START * 20) && !(diff % 20)) {
5603 WRITESCRIPT(startpos[0], scratcha);
5604 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, start));
5607 ncr_init (np, "selection timeout", HS_FAIL);
5610 /*==========================================================
5613 ** ncr chip exception handler for phase errors.
5616 **==========================================================
5618 ** We have to construct a new transfer descriptor,
5619 ** to transfer the rest of the current block.
5621 **----------------------------------------------------------
5624 static void ncr_int_ma (ncb_p np, u_char dstat)
5631 volatile void *vdsp_base;
5633 u_int32_t oadr, olen;
5634 u_int32_t *tblp, *newcmd;
5635 u_char cmd, sbcl, ss0, ss2, ctest5;
5642 ss0 = INB (nc_sstat0);
5643 ss2 = INB (nc_sstat2);
5644 sbcl= INB (nc_sbcl);
5647 rest= dbc & 0xffffff;
5649 ctest5 = (np->rv_ctest5 & DFS) ? INB (nc_ctest5) : 0;
5651 delta=(((ctest5<<8) | (INB (nc_dfifo) & 0xff)) - rest) & 0x3ff;
5653 delta=(INB (nc_dfifo) - rest) & 0x7f;
5657 ** The data in the dma fifo has not been transfered to
5658 ** the target -> add the amount to the rest
5659 ** and clear the data.
5660 ** Check the sstat2 register in case of wide transfer.
5663 if (!(dstat & DFE)) rest += delta;
5664 if (ss0 & OLF) rest++;
5665 if (ss0 & ORF) rest++;
5666 if (INB(nc_scntl3) & EWS) {
5667 if (ss2 & OLF1) rest++;
5668 if (ss2 & ORF1) rest++;
5670 OUTB (nc_ctest3, np->rv_ctest3 | CLF); /* clear dma fifo */
5671 OUTB (nc_stest3, TE|CSF); /* clear scsi fifo */
5674 ** locate matching cp
5677 while (cp && (CCB_PHYS (cp, phys) != dsa))
5681 printf ("%s: SCSI phase error fixup: CCB already dequeued (%p)\n",
5682 ncr_name (np), (void *) np->header.cp);
5685 if (cp != np->header.cp) {
5686 printf ("%s: SCSI phase error fixup: CCB address mismatch "
5687 "(%p != %p) np->nccb = %p\n",
5688 ncr_name (np), (void *)cp, (void *)np->header.cp,
5689 (void *)np->link_nccb);
5694 ** find the interrupted script command,
5695 ** and the address at which to continue.
5698 if (dsp == vtophys (&cp->patch[2])) {
5700 vdsp_off = offsetof(struct nccb, patch[0]);
5701 nxtdsp = READSCRIPT_OFF(vdsp_base, vdsp_off + 3*4);
5702 } else if (dsp == vtophys (&cp->patch[6])) {
5704 vdsp_off = offsetof(struct nccb, patch[4]);
5705 nxtdsp = READSCRIPT_OFF(vdsp_base, vdsp_off + 3*4);
5706 } else if (dsp > np->p_script &&
5707 dsp <= np->p_script + sizeof(struct script)) {
5708 vdsp_base = np->script;
5709 vdsp_off = dsp - np->p_script - 8;
5712 vdsp_base = np->scripth;
5713 vdsp_off = dsp - np->p_scripth - 8;
5718 ** log the information
5720 if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_PHASE)) {
5721 printf ("P%x%x ",cmd&7, sbcl&7);
5722 printf ("RL=%d D=%d SS0=%x ",
5723 (unsigned) rest, (unsigned) delta, ss0);
5725 if (DEBUG_FLAGS & DEBUG_PHASE) {
5726 printf ("\nCP=%p CP2=%p DSP=%x NXT=%x VDSP=%p CMD=%x ",
5729 nxtdsp, (volatile char*)vdsp_base+vdsp_off, cmd);
5733 ** get old startaddress and old length.
5736 oadr = READSCRIPT_OFF(vdsp_base, vdsp_off + 1*4);
5738 if (cmd & 0x10) { /* Table indirect */
5739 tblp = (u_int32_t *) ((char*) &cp->phys + oadr);
5743 tblp = (u_int32_t *) 0;
5744 olen = READSCRIPT_OFF(vdsp_base, vdsp_off) & 0xffffff;
5747 if (DEBUG_FLAGS & DEBUG_PHASE) {
5748 printf ("OCMD=%x\nTBLP=%p OLEN=%lx OADR=%lx\n",
5749 (unsigned) (READSCRIPT_OFF(vdsp_base, vdsp_off) >> 24),
5756 ** if old phase not dataphase, leave here.
5759 if (cmd != (READSCRIPT_OFF(vdsp_base, vdsp_off) >> 24)) {
5760 PRINT_ADDR(cp->ccb);
5761 printf ("internal error: cmd=%02x != %02x=(vdsp[0] >> 24)\n",
5763 (unsigned)READSCRIPT_OFF(vdsp_base, vdsp_off) >> 24);
5768 PRINT_ADDR(cp->ccb);
5769 printf ("phase change %x-%x %d@%08x resid=%d.\n",
5770 cmd&7, sbcl&7, (unsigned)olen,
5771 (unsigned)oadr, (unsigned)rest);
5773 OUTB (nc_dcntl, np->rv_dcntl | STD);
5778 ** choose the correct patch area.
5779 ** if savep points to one, choose the other.
5783 if (cp->phys.header.savep == vtophys (newcmd)) newcmd+=4;
5786 ** fillin the commands
5789 newcmd[0] = ((cmd & 0x0f) << 24) | rest;
5790 newcmd[1] = oadr + olen - rest;
5791 newcmd[2] = SCR_JUMP;
5794 if (DEBUG_FLAGS & DEBUG_PHASE) {
5795 PRINT_ADDR(cp->ccb);
5796 printf ("newcmd[%d] %x %x %x %x.\n",
5797 (int)(newcmd - cp->patch),
5798 (unsigned)newcmd[0],
5799 (unsigned)newcmd[1],
5800 (unsigned)newcmd[2],
5801 (unsigned)newcmd[3]);
5804 ** fake the return address (to the patch).
5805 ** and restart script processor at dispatcher.
5807 np->profile.num_break++;
5808 OUTL (nc_temp, vtophys (newcmd));
5810 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, dispatch));
5812 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, checkatn));
5815 /*==========================================================
5818 ** ncr chip exception handler for programmed interrupts.
5821 **==========================================================
5824 static int ncr_show_msg (u_char * msg)
5828 if (*msg==MSG_EXTENDED) {
5830 if (i-1>msg[1]) break;
5831 printf ("-%x",msg[i]);
5834 } else if ((*msg & 0xf0) == 0x20) {
5835 printf ("-%x",msg[1]);
5841 static void ncr_int_sir (ncb_p np)
5844 u_char chg, ofs, per, fak, wide;
5845 u_char num = INB (nc_dsps);
5848 u_int target = INB (nc_sdid) & 0x0f;
5849 tcb_p tp = &np->target[target];
5851 if (DEBUG_FLAGS & DEBUG_TINY) printf ("I#%d", num);
5854 case SIR_SENSE_RESTART:
5855 case SIR_STALL_RESTART:
5864 while (cp && (CCB_PHYS (cp, phys) != dsa))
5870 assert (cp == np->header.cp);
5871 if (cp != np->header.cp)
5877 /*--------------------------------------------------------------------
5879 ** Processing of interrupted getcc selects
5881 **--------------------------------------------------------------------
5884 case SIR_SENSE_RESTART:
5885 /*------------------------------------------
5886 ** Script processor is idle.
5887 ** Look for interrupted "check cond"
5888 **------------------------------------------
5891 if (DEBUG_FLAGS & DEBUG_RESTART)
5892 printf ("%s: int#%d",ncr_name (np),num);
5894 for (i=0; i<MAX_TARGET; i++) {
5895 if (DEBUG_FLAGS & DEBUG_RESTART) printf (" t%d", i);
5896 tp = &np->target[i];
5897 if (DEBUG_FLAGS & DEBUG_RESTART) printf ("+");
5900 if (DEBUG_FLAGS & DEBUG_RESTART) printf ("+");
5901 if ((cp->host_status==HS_BUSY) &&
5902 (cp->s_status==SCSI_STATUS_CHECK_COND))
5904 if (DEBUG_FLAGS & DEBUG_RESTART) printf ("- (remove)");
5905 tp->hold_cp = cp = (nccb_p) 0;
5909 if (DEBUG_FLAGS & DEBUG_RESTART)
5910 printf ("+ restart job ..\n");
5911 OUTL (nc_dsa, CCB_PHYS (cp, phys));
5912 OUTL (nc_dsp, NCB_SCRIPTH_PHYS (np, getcc));
5917 ** no job, resume normal processing
5919 if (DEBUG_FLAGS & DEBUG_RESTART) printf (" -- remove trap\n");
5920 WRITESCRIPT(start0[0], SCR_INT ^ IFFALSE (0));
5923 case SIR_SENSE_FAILED:
5924 /*-------------------------------------------
5925 ** While trying to select for
5926 ** getting the condition code,
5927 ** a target reselected us.
5928 **-------------------------------------------
5930 if (DEBUG_FLAGS & DEBUG_RESTART) {
5931 PRINT_ADDR(cp->ccb);
5932 printf ("in getcc reselect by t%d.\n",
5933 INB(nc_ssid) & 0x0f);
5939 cp->host_status = HS_BUSY;
5940 cp->s_status = SCSI_STATUS_CHECK_COND;
5941 np->target[cp->ccb->ccb_h.target_id].hold_cp = cp;
5944 ** And patch code to restart it.
5946 WRITESCRIPT(start0[0], SCR_INT);
5949 /*-----------------------------------------------------------------------------
5951 ** Was Sie schon immer ueber transfermode negotiation wissen wollten ...
5953 ** We try to negotiate sync and wide transfer only after
5954 ** a successfull inquire command. We look at byte 7 of the
5955 ** inquire data to determine the capabilities if the target.
5957 ** When we try to negotiate, we append the negotiation message
5958 ** to the identify and (maybe) simple tag message.
5959 ** The host status field is set to HS_NEGOTIATE to mark this
5962 ** If the target doesn't answer this message immidiately
5963 ** (as required by the standard), the SIR_NEGO_FAIL interrupt
5964 ** will be raised eventually.
5965 ** The handler removes the HS_NEGOTIATE status, and sets the
5966 ** negotiated value to the default (async / nowide).
5968 ** If we receive a matching answer immediately, we check it
5969 ** for validity, and set the values.
5971 ** If we receive a Reject message immediately, we assume the
5972 ** negotiation has failed, and fall back to standard values.
5974 ** If we receive a negotiation message while not in HS_NEGOTIATE
5975 ** state, it's a target initiated negotiation. We prepare a
5976 ** (hopefully) valid answer, set our parameters, and send back
5977 ** this answer to the target.
5979 ** If the target doesn't fetch the answer (no message out phase),
5980 ** we assume the negotiation has failed, and fall back to default
5983 ** When we set the values, we adjust them in all nccbs belonging
5984 ** to this target, in the controller's register, and in the "phys"
5985 ** field of the controller's struct ncb.
5987 ** Possible cases: hs sir msg_in value send goto
5988 ** We try try to negotiate:
5989 ** -> target doesnt't msgin NEG FAIL noop defa. - dispatch
5990 ** -> target rejected our msg NEG FAIL reject defa. - dispatch
5991 ** -> target answered (ok) NEG SYNC sdtr set - clrack
5992 ** -> target answered (!ok) NEG SYNC sdtr defa. REJ--->msg_bad
5993 ** -> target answered (ok) NEG WIDE wdtr set - clrack
5994 ** -> target answered (!ok) NEG WIDE wdtr defa. REJ--->msg_bad
5995 ** -> any other msgin NEG FAIL noop defa. - dispatch
5997 ** Target tries to negotiate:
5998 ** -> incoming message --- SYNC sdtr set SDTR -
5999 ** -> incoming message --- WIDE wdtr set WDTR -
6000 ** We sent our answer:
6001 ** -> target doesn't msgout --- PROTO ? defa. - dispatch
6003 **-----------------------------------------------------------------------------
6006 case SIR_NEGO_FAILED:
6007 /*-------------------------------------------------------
6009 ** Negotiation failed.
6010 ** Target doesn't send an answer message,
6011 ** or target rejected our message.
6013 ** Remove negotiation request.
6015 **-------------------------------------------------------
6017 OUTB (HS_PRT, HS_BUSY);
6021 case SIR_NEGO_PROTO:
6022 /*-------------------------------------------------------
6024 ** Negotiation failed.
6025 ** Target doesn't fetch the answer message.
6027 **-------------------------------------------------------
6030 if (DEBUG_FLAGS & DEBUG_NEGO) {
6031 PRINT_ADDR(cp->ccb);
6032 printf ("negotiation failed sir=%x status=%x.\n",
6033 num, cp->nego_status);
6037 ** any error in negotiation:
6038 ** fall back to default mode.
6040 switch (cp->nego_status) {
6043 ncr_setsync (np, cp, 0, 0xe0, 0);
6047 ncr_setwide (np, cp, 0, 0);
6051 np->msgin [0] = MSG_NOOP;
6052 np->msgout[0] = MSG_NOOP;
6053 cp->nego_status = 0;
6054 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, dispatch));
6059 ** Synchronous request message received.
6062 if (DEBUG_FLAGS & DEBUG_NEGO) {
6063 PRINT_ADDR(cp->ccb);
6064 printf ("sync msgin: ");
6065 (void) ncr_show_msg (np->msgin);
6070 ** get requested values.
6076 if (ofs==0) per=255;
6079 ** check values against driver limits.
6081 if (per < np->minsync)
6082 {chg = 1; per = np->minsync;}
6083 if (per < tp->tinfo.user.period)
6084 {chg = 1; per = tp->tinfo.user.period;}
6085 if (ofs > tp->tinfo.user.offset)
6086 {chg = 1; ofs = tp->tinfo.user.offset;}
6089 ** Check against controller limits.
6095 ncr_getsync(np, per, &fak, &scntl3);
6107 if (DEBUG_FLAGS & DEBUG_NEGO) {
6108 PRINT_ADDR(cp->ccb);
6109 printf ("sync: per=%d scntl3=0x%x ofs=%d fak=%d chg=%d.\n",
6110 per, scntl3, ofs, fak, chg);
6113 if (INB (HS_PRT) == HS_NEGOTIATE) {
6114 OUTB (HS_PRT, HS_BUSY);
6115 switch (cp->nego_status) {
6119 ** This was an answer message
6123 ** Answer wasn't acceptable.
6125 ncr_setsync (np, cp, 0, 0xe0, 0);
6126 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, msg_bad));
6131 ncr_setsync (np,cp,scntl3,(fak<<5)|ofs, per);
6132 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, clrack));
6137 ncr_setwide (np, cp, 0, 0);
6143 ** It was a request. Set value and
6144 ** prepare an answer message
6147 ncr_setsync (np, cp, scntl3, (fak<<5)|ofs, per);
6149 np->msgout[0] = MSG_EXTENDED;
6151 np->msgout[2] = MSG_EXT_SDTR;
6152 np->msgout[3] = per;
6153 np->msgout[4] = ofs;
6155 cp->nego_status = NS_SYNC;
6157 if (DEBUG_FLAGS & DEBUG_NEGO) {
6158 PRINT_ADDR(cp->ccb);
6159 printf ("sync msgout: ");
6160 (void) ncr_show_msg (np->msgout);
6165 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, msg_bad));
6168 np->msgin [0] = MSG_NOOP;
6174 ** Wide request message received.
6176 if (DEBUG_FLAGS & DEBUG_NEGO) {
6177 PRINT_ADDR(cp->ccb);
6178 printf ("wide msgin: ");
6179 (void) ncr_show_msg (np->msgin);
6184 ** get requested values.
6188 wide = np->msgin[3];
6191 ** check values against driver limits.
6194 if (wide > tp->tinfo.user.width)
6195 {chg = 1; wide = tp->tinfo.user.width;}
6197 if (DEBUG_FLAGS & DEBUG_NEGO) {
6198 PRINT_ADDR(cp->ccb);
6199 printf ("wide: wide=%d chg=%d.\n", wide, chg);
6202 if (INB (HS_PRT) == HS_NEGOTIATE) {
6203 OUTB (HS_PRT, HS_BUSY);
6204 switch (cp->nego_status) {
6208 ** This was an answer message
6212 ** Answer wasn't acceptable.
6214 ncr_setwide (np, cp, 0, 1);
6215 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, msg_bad));
6220 ncr_setwide (np, cp, wide, 1);
6221 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, clrack));
6226 ncr_setsync (np, cp, 0, 0xe0, 0);
6232 ** It was a request, set value and
6233 ** prepare an answer message
6236 ncr_setwide (np, cp, wide, 1);
6238 np->msgout[0] = MSG_EXTENDED;
6240 np->msgout[2] = MSG_EXT_WDTR;
6241 np->msgout[3] = wide;
6243 np->msgin [0] = MSG_NOOP;
6245 cp->nego_status = NS_WIDE;
6247 if (DEBUG_FLAGS & DEBUG_NEGO) {
6248 PRINT_ADDR(cp->ccb);
6249 printf ("wide msgout: ");
6250 (void) ncr_show_msg (np->msgout);
6255 /*--------------------------------------------------------------------
6257 ** Processing of special messages
6259 **--------------------------------------------------------------------
6262 case SIR_REJECT_RECEIVED:
6263 /*-----------------------------------------------
6265 ** We received a MSG_MESSAGE_REJECT message.
6267 **-----------------------------------------------
6270 PRINT_ADDR(cp->ccb);
6271 printf ("MSG_MESSAGE_REJECT received (%x:%x).\n",
6272 (unsigned)np->lastmsg, np->msgout[0]);
6275 case SIR_REJECT_SENT:
6276 /*-----------------------------------------------
6278 ** We received an unknown message
6280 **-----------------------------------------------
6283 PRINT_ADDR(cp->ccb);
6284 printf ("MSG_MESSAGE_REJECT sent for ");
6285 (void) ncr_show_msg (np->msgin);
6289 /*--------------------------------------------------------------------
6291 ** Processing of special messages
6293 **--------------------------------------------------------------------
6296 case SIR_IGN_RESIDUE:
6297 /*-----------------------------------------------
6299 ** We received an IGNORE RESIDUE message,
6300 ** which couldn't be handled by the script.
6302 **-----------------------------------------------
6305 PRINT_ADDR(cp->ccb);
6306 printf ("MSG_IGN_WIDE_RESIDUE received, but not yet implemented.\n");
6309 case SIR_MISSING_SAVE:
6310 /*-----------------------------------------------
6312 ** We received an DISCONNECT message,
6313 ** but the datapointer wasn't saved before.
6315 **-----------------------------------------------
6318 PRINT_ADDR(cp->ccb);
6319 printf ("MSG_DISCONNECT received, but datapointer not saved:\n"
6320 "\tdata=%x save=%x goal=%x.\n",
6321 (unsigned) INL (nc_temp),
6322 (unsigned) np->header.savep,
6323 (unsigned) np->header.goalp);
6326 /*--------------------------------------------------------------------
6328 ** Processing of a "SCSI_STATUS_QUEUE_FULL" status.
6330 ** XXX JGibbs - We should do the same thing for BUSY status.
6332 ** The current command has been rejected,
6333 ** because there are too many in the command queue.
6334 ** We have started too many commands for that target.
6336 **--------------------------------------------------------------------
6338 case SIR_STALL_QUEUE:
6339 cp->xerr_status = XE_OK;
6340 cp->host_status = HS_COMPLETE;
6341 cp->s_status = SCSI_STATUS_QUEUE_FULL;
6342 ncr_freeze_devq(np, cp->ccb->ccb_h.path);
6343 ncr_complete(np, cp);
6347 case SIR_STALL_RESTART:
6348 /*-----------------------------------------------
6350 ** Enable selecting again,
6351 ** if NO disconnected jobs.
6353 **-----------------------------------------------
6356 ** Look for a disconnected job.
6359 while (cp && cp->host_status != HS_DISCONNECT)
6363 ** if there is one, ...
6367 ** wait for reselection
6369 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, reselect));
6374 ** else remove the interrupt.
6377 printf ("%s: queue empty.\n", ncr_name (np));
6378 WRITESCRIPT(start1[0], SCR_INT ^ IFFALSE (0));
6383 OUTB (nc_dcntl, np->rv_dcntl | STD);
6386 /*==========================================================
6389 ** Aquire a control block
6392 **==========================================================
6395 static nccb_p ncr_get_nccb
6396 (ncb_p np, u_long target, u_long lun)
6402 ** Lun structure available ?
6405 lp = np->target[target].lp[lun];
6410 ** Look for free CCB
6413 while (cp && cp->magic) {
6419 ** if nothing available, create one.
6423 cp = ncr_alloc_nccb(np, target, lun);
6427 printf("%s: Bogus free cp found\n", ncr_name(np));
6435 /*==========================================================
6438 ** Release one control block
6441 **==========================================================
6444 static void ncr_free_nccb (ncb_p np, nccb_p cp)
6450 assert (cp != NULL);
6452 cp -> host_status = HS_IDLE;
6456 /*==========================================================
6459 ** Allocation of resources for Targets/Luns/Tags.
6462 **==========================================================
6466 ncr_alloc_nccb (ncb_p np, u_long target, u_long lun)
6472 assert (np != NULL);
6474 if (target>=MAX_TARGET) return(NULL);
6475 if (lun >=MAX_LUN ) return(NULL);
6477 tp=&np->target[target];
6479 if (!tp->jump_tcb.l_cmd) {
6484 tp->jump_tcb.l_cmd = (SCR_JUMP^IFFALSE (DATA (0x80 + target)));
6485 tp->jump_tcb.l_paddr = np->jump_tcb.l_paddr;
6488 (np->features & FE_PFEN)? SCR_COPY(1) : SCR_COPY_F(1);
6489 tp->getscr[1] = vtophys (&tp->tinfo.sval);
6490 tp->getscr[2] = rman_get_start(np->reg_res) + offsetof (struct ncr_reg, nc_sxfer);
6492 (np->features & FE_PFEN)? SCR_COPY(1) : SCR_COPY_F(1);
6493 tp->getscr[4] = vtophys (&tp->tinfo.wval);
6494 tp->getscr[5] = rman_get_start(np->reg_res) + offsetof (struct ncr_reg, nc_scntl3);
6496 assert (((offsetof(struct ncr_reg, nc_sxfer) ^
6497 (offsetof(struct tcb ,tinfo)
6498 + offsetof(struct ncr_target_tinfo, sval))) & 3) == 0);
6499 assert (((offsetof(struct ncr_reg, nc_scntl3) ^
6500 (offsetof(struct tcb, tinfo)
6501 + offsetof(struct ncr_target_tinfo, wval))) &3) == 0);
6503 tp->call_lun.l_cmd = (SCR_CALL);
6504 tp->call_lun.l_paddr = NCB_SCRIPT_PHYS (np, resel_lun);
6506 tp->jump_lcb.l_cmd = (SCR_JUMP);
6507 tp->jump_lcb.l_paddr = NCB_SCRIPTH_PHYS (np, abort);
6508 np->jump_tcb.l_paddr = vtophys (&tp->jump_tcb);
6512 ** Logic unit control block
6519 lp = (lcb_p) malloc (sizeof (struct lcb), M_DEVBUF,
6521 if (!lp) return(NULL);
6526 lp->jump_lcb.l_cmd = (SCR_JUMP ^ IFFALSE (DATA (lun)));
6527 lp->jump_lcb.l_paddr = tp->jump_lcb.l_paddr;
6529 lp->call_tag.l_cmd = (SCR_CALL);
6530 lp->call_tag.l_paddr = NCB_SCRIPT_PHYS (np, resel_tag);
6532 lp->jump_nccb.l_cmd = (SCR_JUMP);
6533 lp->jump_nccb.l_paddr = NCB_SCRIPTH_PHYS (np, aborttag);
6538 ** Chain into LUN list
6540 tp->jump_lcb.l_paddr = vtophys (&lp->jump_lcb);
6548 cp = (nccb_p) malloc (sizeof (struct nccb), M_DEVBUF, M_NOWAIT|M_ZERO);
6553 if (DEBUG_FLAGS & DEBUG_ALLOC) {
6554 printf ("new nccb @%p.\n", cp);
6558 ** Fill in physical addresses
6561 cp->p_nccb = vtophys (cp);
6564 ** Chain into reselect list
6566 cp->jump_nccb.l_cmd = SCR_JUMP;
6567 cp->jump_nccb.l_paddr = lp->jump_nccb.l_paddr;
6568 lp->jump_nccb.l_paddr = CCB_PHYS (cp, jump_nccb);
6569 cp->call_tmp.l_cmd = SCR_CALL;
6570 cp->call_tmp.l_paddr = NCB_SCRIPT_PHYS (np, resel_tmp);
6573 ** Chain into wakeup list
6575 cp->link_nccb = np->link_nccb;
6579 ** Chain into CCB list
6581 cp->next_nccb = lp->next_nccb;
6587 /*==========================================================
6590 ** Build Scatter Gather Block
6593 **==========================================================
6595 ** The transfer area may be scattered among
6596 ** several non adjacent physical pages.
6598 ** We may use MAX_SCATTER blocks.
6600 **----------------------------------------------------------
6603 static int ncr_scatter
6604 (struct dsb* phys, vm_offset_t vaddr, vm_size_t datalen)
6606 u_long paddr, pnext;
6608 u_short segment = 0;
6609 u_long segsize, segaddr;
6610 u_long size, csize = 0;
6611 u_long chunk = MAX_SIZE;
6614 bzero (&phys->data, sizeof (phys->data));
6615 if (!datalen) return (0);
6617 paddr = vtophys (vaddr);
6620 ** insert extra break points at a distance of chunk.
6621 ** We try to reduce the number of interrupts caused
6622 ** by unexpected phase changes due to disconnects.
6623 ** A typical harddisk may disconnect before ANY block.
6624 ** If we wanted to avoid unexpected phase changes at all
6625 ** we had to use a break point every 512 bytes.
6626 ** Of course the number of scatter/gather blocks is
6630 free = MAX_SCATTER - 1;
6632 if (vaddr & PAGE_MASK) free -= datalen / PAGE_SIZE;
6635 while ((chunk * free >= 2 * datalen) && (chunk>=1024))
6638 if(DEBUG_FLAGS & DEBUG_SCATTER)
6639 printf("ncr?:\tscattering virtual=%p size=%d chunk=%d.\n",
6640 (void *) vaddr, (unsigned) datalen, (unsigned) chunk);
6643 ** Build data descriptors.
6645 while (datalen && (segment < MAX_SCATTER)) {
6648 ** this segment is empty
6654 if (!csize) csize = chunk;
6656 while ((datalen) && (paddr == pnext) && (csize)) {
6659 ** continue this segment
6661 pnext = (paddr & (~PAGE_MASK)) + PAGE_SIZE;
6667 size = pnext - paddr; /* page size */
6668 if (size > datalen) size = datalen; /* data size */
6669 if (size > csize ) size = csize ; /* chunksize */
6675 paddr = vtophys (vaddr);
6678 if(DEBUG_FLAGS & DEBUG_SCATTER)
6679 printf ("\tseg #%d addr=%x size=%d (rest=%d).\n",
6683 (unsigned) datalen);
6685 phys->data[segment].addr = segaddr;
6686 phys->data[segment].size = segsize;
6691 printf("ncr?: scatter/gather failed (residue=%d).\n",
6692 (unsigned) datalen);
6699 /*==========================================================
6702 ** Test the pci bus snoop logic :-(
6704 ** Has to be called with interrupts disabled.
6707 **==========================================================
6710 #ifndef NCR_IOMAPPED
6711 static int ncr_regtest (struct ncb* np)
6713 register volatile u_int32_t data;
6715 ** ncr registers may NOT be cached.
6716 ** write 0xffffffff to a read only register area,
6717 ** and try to read it back.
6720 OUTL_OFF(offsetof(struct ncr_reg, nc_dstat), data);
6721 data = INL_OFF(offsetof(struct ncr_reg, nc_dstat));
6723 if (data == 0xffffffff) {
6725 if ((data & 0xe2f0fffd) != 0x02000080) {
6727 printf ("CACHE TEST FAILED: reg dstat-sstat2 readback %x.\n",
6735 static int ncr_snooptest (struct ncb* np)
6737 u_int32_t ncr_rd, ncr_wr, ncr_bk, host_rd, host_wr, pc;
6739 #ifndef NCR_IOMAPPED
6740 err |= ncr_regtest (np);
6741 if (err) return (err);
6746 pc = NCB_SCRIPTH_PHYS (np, snooptest);
6750 ** Set memory and register.
6752 ncr_cache = host_wr;
6753 OUTL (nc_temp, ncr_wr);
6755 ** Start script (exchange values)
6759 ** Wait 'til done (with timeout)
6761 for (i=0; i<NCR_SNOOP_TIMEOUT; i++)
6762 if (INB(nc_istat) & (INTF|SIP|DIP))
6765 ** Save termination position.
6769 ** Read memory and register.
6771 host_rd = ncr_cache;
6772 ncr_rd = INL (nc_scratcha);
6773 ncr_bk = INL (nc_temp);
6777 OUTB (nc_istat, SRST);
6779 OUTB (nc_istat, 0 );
6781 ** check for timeout
6783 if (i>=NCR_SNOOP_TIMEOUT) {
6784 printf ("CACHE TEST FAILED: timeout.\n");
6788 ** Check termination position.
6790 if (pc != NCB_SCRIPTH_PHYS (np, snoopend)+8) {
6791 printf ("CACHE TEST FAILED: script execution failed.\n");
6792 printf ("start=%08lx, pc=%08lx, end=%08lx\n",
6793 (u_long) NCB_SCRIPTH_PHYS (np, snooptest), (u_long) pc,
6794 (u_long) NCB_SCRIPTH_PHYS (np, snoopend) +8);
6800 if (host_wr != ncr_rd) {
6801 printf ("CACHE TEST FAILED: host wrote %d, ncr read %d.\n",
6802 (int) host_wr, (int) ncr_rd);
6805 if (host_rd != ncr_wr) {
6806 printf ("CACHE TEST FAILED: ncr wrote %d, host read %d.\n",
6807 (int) ncr_wr, (int) host_rd);
6810 if (ncr_bk != ncr_wr) {
6811 printf ("CACHE TEST FAILED: ncr wrote %d, read back %d.\n",
6812 (int) ncr_wr, (int) ncr_bk);
6818 /*==========================================================
6821 ** Profiling the drivers and targets performance.
6824 **==========================================================
6828 ** Compute the difference in milliseconds.
6831 static int ncr_delta (int *from, int *to)
6833 if (!from) return (-1);
6834 if (!to) return (-2);
6835 return ((to - from) * 1000 / hz);
6838 #define PROFILE cp->phys.header.stamp
6839 static void ncb_profile (ncb_p np, nccb_p cp)
6841 int co, da, st, en, di, se, post,work,disc;
6844 PROFILE.end = ticks;
6846 st = ncr_delta (&PROFILE.start,&PROFILE.status);
6847 if (st<0) return; /* status not reached */
6849 da = ncr_delta (&PROFILE.start,&PROFILE.data);
6850 if (da<0) return; /* No data transfer phase */
6852 co = ncr_delta (&PROFILE.start,&PROFILE.command);
6853 if (co<0) return; /* command not executed */
6855 en = ncr_delta (&PROFILE.start,&PROFILE.end),
6856 di = ncr_delta (&PROFILE.start,&PROFILE.disconnect),
6857 se = ncr_delta (&PROFILE.start,&PROFILE.select);
6861 ** @PROFILE@ Disconnect time invalid if multiple disconnects
6864 if (di>=0) disc = se-di; else disc = 0;
6866 work = (st - co) - disc;
6868 diff = (np->disc_phys - np->disc_ref) & 0xff;
6869 np->disc_ref += diff;
6871 np->profile.num_trans += 1;
6873 np->profile.num_bytes += cp->ccb->csio.dxfer_len;
6874 np->profile.num_disc += diff;
6875 np->profile.ms_setup += co;
6876 np->profile.ms_data += work;
6877 np->profile.ms_disc += disc;
6878 np->profile.ms_post += post;
6882 /*==========================================================
6884 ** Determine the ncr's clock frequency.
6885 ** This is essential for the negotiation
6886 ** of the synchronous transfer rate.
6888 **==========================================================
6890 ** Note: we have to return the correct value.
6891 ** THERE IS NO SAVE DEFAULT VALUE.
6893 ** Most NCR/SYMBIOS boards are delivered with a 40 Mhz clock.
6894 ** 53C860 and 53C875 rev. 1 support fast20 transfers but
6895 ** do not have a clock doubler and so are provided with a
6896 ** 80 MHz clock. All other fast20 boards incorporate a doubler
6897 ** and so should be delivered with a 40 MHz clock.
6898 ** The future fast40 chips (895/895) use a 40 Mhz base clock
6899 ** and provide a clock quadrupler (160 Mhz). The code below
6900 ** tries to deal as cleverly as possible with all this stuff.
6902 **----------------------------------------------------------
6906 * Select NCR SCSI clock frequency
6908 static void ncr_selectclock(ncb_p np, u_char scntl3)
6910 if (np->multiplier < 2) {
6911 OUTB(nc_scntl3, scntl3);
6915 if (bootverbose >= 2)
6916 printf ("%s: enabling clock multiplier\n", ncr_name(np));
6918 OUTB(nc_stest1, DBLEN); /* Enable clock multiplier */
6919 if (np->multiplier > 2) { /* Poll bit 5 of stest4 for quadrupler */
6921 while (!(INB(nc_stest4) & LCKFRQ) && --i > 0)
6924 printf("%s: the chip cannot lock the frequency\n", ncr_name(np));
6925 } else /* Wait 20 micro-seconds for doubler */
6927 OUTB(nc_stest3, HSC); /* Halt the scsi clock */
6928 OUTB(nc_scntl3, scntl3);
6929 OUTB(nc_stest1, (DBLEN|DBLSEL));/* Select clock multiplier */
6930 OUTB(nc_stest3, 0x00); /* Restart scsi clock */
6934 * calculate NCR SCSI clock frequency (in KHz)
6937 ncrgetfreq (ncb_p np, int gen)
6941 * Measure GEN timer delay in order
6942 * to calculate SCSI clock frequency
6944 * This code will never execute too
6945 * many loop iterations (if DELAY is
6946 * reasonably correct). It could get
6947 * too low a delay (too high a freq.)
6948 * if the CPU is slow executing the
6949 * loop for some reason (an NMI, for
6950 * example). For this reason we will
6951 * if multiple measurements are to be
6952 * performed trust the higher delay
6953 * (lower frequency returned).
6955 OUTB (nc_stest1, 0); /* make sure clock doubler is OFF */
6956 OUTW (nc_sien , 0); /* mask all scsi interrupts */
6957 (void) INW (nc_sist); /* clear pending scsi interrupt */
6958 OUTB (nc_dien , 0); /* mask all dma interrupts */
6959 (void) INW (nc_sist); /* another one, just to be sure :) */
6960 OUTB (nc_scntl3, 4); /* set pre-scaler to divide by 3 */
6961 OUTB (nc_stime1, 0); /* disable general purpose timer */
6962 OUTB (nc_stime1, gen); /* set to nominal delay of (1<<gen) * 125us */
6963 while (!(INW(nc_sist) & GEN) && ms++ < 1000)
6964 DELAY(1000); /* count ms */
6965 OUTB (nc_stime1, 0); /* disable general purpose timer */
6966 OUTB (nc_scntl3, 0);
6968 * Set prescaler to divide by whatever "0" means.
6969 * "0" ought to choose divide by 2, but appears
6970 * to set divide by 3.5 mode in my 53c810 ...
6972 OUTB (nc_scntl3, 0);
6974 if (bootverbose >= 2)
6975 printf ("\tDelay (GEN=%d): %u msec\n", gen, ms);
6977 * adjust for prescaler, and convert into KHz
6979 return ms ? ((1 << gen) * 4440) / ms : 0;
6982 static void ncr_getclock (ncb_p np, u_char multiplier)
6984 unsigned char scntl3;
6985 unsigned char stest1;
6986 scntl3 = INB(nc_scntl3);
6987 stest1 = INB(nc_stest1);
6991 if (multiplier > 1) {
6992 np->multiplier = multiplier;
6993 np->clock_khz = 40000 * multiplier;
6995 if ((scntl3 & 7) == 0) {
6997 /* throw away first result */
6998 (void) ncrgetfreq (np, 11);
6999 f1 = ncrgetfreq (np, 11);
7000 f2 = ncrgetfreq (np, 11);
7002 if (bootverbose >= 2)
7003 printf ("\tNCR clock is %uKHz, %uKHz\n", f1, f2);
7004 if (f1 > f2) f1 = f2; /* trust lower result */
7006 scntl3 = 5; /* >45Mhz: assume 80MHz */
7008 scntl3 = 3; /* <45Mhz: assume 40MHz */
7011 else if ((scntl3 & 7) == 5)
7012 np->clock_khz = 80000; /* Probably a 875 rev. 1 ? */
7016 /*=========================================================================*/
7018 #ifdef NCR_TEKRAM_EEPROM
7020 struct tekram_eeprom_dev {
7022 #define TKR_PARCHK 0x01
7023 #define TKR_TRYSYNC 0x02
7024 #define TKR_ENDISC 0x04
7025 #define TKR_STARTUNIT 0x08
7026 #define TKR_USETAGS 0x10
7027 #define TKR_TRYWIDE 0x20
7028 u_char syncparam; /* max. sync transfer rate (table ?) */
7034 struct tekram_eeprom {
7035 struct tekram_eeprom_dev
7039 #define TKR_ADPT_GT2DRV 0x01
7040 #define TKR_ADPT_GT1GB 0x02
7041 #define TKR_ADPT_RSTBUS 0x04
7042 #define TKR_ADPT_ACTNEG 0x08
7043 #define TKR_ADPT_NOSEEK 0x10
7044 #define TKR_ADPT_MORLUN 0x20
7045 u_char delay; /* unit ? ( table ??? ) */
7046 u_char tags; /* use 4 times as many ... */
7051 tekram_write_bit (ncb_p np, int bit)
7053 u_char val = 0x10 + ((bit & 1) << 1);
7056 OUTB (nc_gpreg, val);
7058 OUTB (nc_gpreg, val | 0x04);
7060 OUTB (nc_gpreg, val);
7065 tekram_read_bit (ncb_p np)
7067 OUTB (nc_gpreg, 0x10);
7069 OUTB (nc_gpreg, 0x14);
7071 return INB (nc_gpreg) & 1;
7075 read_tekram_eeprom_reg (ncb_p np, int reg)
7079 int cmd = 0x80 | reg;
7081 OUTB (nc_gpreg, 0x10);
7083 tekram_write_bit (np, 1);
7084 for (bit = 7; bit >= 0; bit--)
7086 tekram_write_bit (np, cmd >> bit);
7089 for (bit = 0; bit < 16; bit++)
7092 result |= tekram_read_bit (np);
7095 OUTB (nc_gpreg, 0x00);
7100 read_tekram_eeprom(ncb_p np, struct tekram_eeprom *buffer)
7102 u_short *p = (u_short *) buffer;
7106 if (INB (nc_gpcntl) != 0x09)
7110 for (i = 0; i < 64; i++)
7113 if((i&0x0f) == 0) printf ("%02x:", i*2);
7114 val = read_tekram_eeprom_reg (np, i);
7118 if((i&0x01) == 0x00) printf (" ");
7119 printf ("%02x%02x", val & 0xff, (val >> 8) & 0xff);
7120 if((i&0x0f) == 0x0f) printf ("\n");
7122 printf ("Sum = %04x\n", sum);
7123 return sum == 0x1234;
7125 #endif /* NCR_TEKRAM_EEPROM */
7127 static device_method_t ncr_methods[] = {
7128 /* Device interface */
7129 DEVMETHOD(device_probe, ncr_probe),
7130 DEVMETHOD(device_attach, ncr_attach),
7135 static driver_t ncr_driver = {
7141 static devclass_t ncr_devclass;
7143 DRIVER_MODULE(ncr, pci, ncr_driver, ncr_devclass, 0, 0);
7144 MODULE_DEPEND(ncr, cam, 1, 1, 1);
7145 MODULE_DEPEND(ncr, pci, 1, 1, 1);
7147 /*=========================================================================*/
7148 #endif /* _KERNEL */