1 /* $NetBSD: fpu_mul.c,v 1.4 2005/12/11 12:18:42 christos Exp $ */
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8 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
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40 * @(#)fpu_mul.c 8.1 (Berkeley) 6/11/93
44 * Perform an FPU multiply (return x * y).
47 #include <sys/cdefs.h>
48 __FBSDID("$FreeBSD$");
50 #include <sys/types.h>
51 #include <sys/systm.h>
53 #include <machine/fpu.h>
54 #include <machine/reg.h>
56 #include <powerpc/fpu/fpu_arith.h>
57 #include <powerpc/fpu/fpu_emu.h>
60 * The multiplication algorithm for normal numbers is as follows:
62 * The fraction of the product is built in the usual stepwise fashion.
63 * Each step consists of shifting the accumulator right one bit
64 * (maintaining any guard bits) and, if the next bit in y is set,
65 * adding the multiplicand (x) to the accumulator. Then, in any case,
66 * we advance one bit leftward in y. Algorithmically:
69 * for (bit = 0; bit < FP_NMANT; bit++) {
70 * sticky |= A & 1, A >>= 1;
75 * (X and Y here represent the mantissas of x and y respectively.)
76 * The resultant accumulator (A) is the product's mantissa. It may
77 * be as large as 11.11111... in binary and hence may need to be
78 * shifted right, but at most one bit.
80 * Since we do not have efficient multiword arithmetic, we code the
81 * accumulator as four separate words, just like any other mantissa.
82 * We use local variables in the hope that this is faster than memory.
83 * We keep x->fp_mant in locals for the same reason.
85 * In the algorithm above, the bits in y are inspected one at a time.
86 * We will pick them up 32 at a time and then deal with those 32, one
87 * at a time. Note, however, that we know several things about y:
89 * - the guard and round bits at the bottom are sure to be zero;
91 * - often many low bits are zero (y is often from a single or double
94 * - bit FP_NMANT-1 is set, and FP_1*2 fits in a word.
96 * We can also test for 32-zero-bits swiftly. In this case, the center
97 * part of the loop---setting sticky, shifting A, and not adding---will
98 * run 32 times without adding X to A. We can do a 32-bit shift faster
99 * by simply moving words. Since zeros are common, we optimize this case.
100 * Furthermore, since A is initially zero, we can omit the shift as well
101 * until we reach a nonzero word.
104 fpu_mul(struct fpemu *fe)
106 struct fpn *x = &fe->fe_f1, *y = &fe->fe_f2;
107 u_int a3, a2, a1, a0, x3, x2, x1, x0, bit, m;
112 * Put the `heavier' operand on the right (see fpu_emu.h).
113 * Then we will have one of the following cases, taken in the
116 * - y = NaN. Implied: if only one is a signalling NaN, y is.
118 * - y = Inf. Implied: x != NaN (is 0, number, or Inf: the NaN
119 * case was taken care of earlier).
120 * If x = 0, the result is NaN. Otherwise the result
121 * is y, with its sign reversed if x is negative.
122 * - x = 0. Implied: y is 0 or number.
123 * The result is 0 (with XORed sign as usual).
124 * - other. Implied: both x and y are numbers.
125 * The result is x * y (XOR sign, multiply bits, add exponents).
127 DPRINTF(FPE_REG, ("fpu_mul:\n"));
130 DPRINTF(FPE_REG, ("=>\n"));
134 y->fp_sign ^= x->fp_sign;
135 fe->fe_cx |= FPSCR_VXSNAN;
141 fe->fe_cx |= FPSCR_VXIMZ;
142 return (fpu_newnan(fe));
144 y->fp_sign ^= x->fp_sign;
149 x->fp_sign ^= y->fp_sign;
155 * Setup. In the code below, the mask `m' will hold the current
156 * mantissa byte from y. The variable `bit' denotes the bit
157 * within m. We also define some macros to deal with everything.
163 sticky = a3 = a2 = a1 = a0 = 0;
165 #define ADD /* A += X */ \
166 FPU_ADDS(a3, a3, x3); \
167 FPU_ADDCS(a2, a2, x2); \
168 FPU_ADDCS(a1, a1, x1); \
171 #define SHR1 /* A >>= 1, with sticky */ \
172 sticky |= a3 & 1, a3 = (a3 >> 1) | (a2 << 31), \
173 a2 = (a2 >> 1) | (a1 << 31), a1 = (a1 >> 1) | (a0 << 31), a0 >>= 1
175 #define SHR32 /* A >>= 32, with sticky */ \
176 sticky |= a3, a3 = a2, a2 = a1, a1 = a0, a0 = 0
178 #define STEP /* each 1-bit step of the multiplication */ \
179 SHR1; if (bit & m) { ADD; }; bit <<= 1
182 * We are ready to begin. The multiply loop runs once for each
183 * of the four 32-bit words. Some words, however, are special.
184 * As noted above, the low order bits of Y are often zero. Even
185 * if not, the first loop can certainly skip the guard bits.
186 * The last word of y has its highest 1-bit in position FP_NMANT-1,
187 * so we stop the loop when we move past that bit.
189 if ((m = y->fp_mant[3]) == 0) {
190 /* SHR32; */ /* unneeded since A==0 */
197 if ((m = y->fp_mant[2]) == 0) {
205 if ((m = y->fp_mant[1]) == 0) {
213 m = y->fp_mant[0]; /* definitely != 0 */
220 * Done with mantissa calculation. Get exponent and handle
221 * 11.111...1 case, then put result in place. We reuse x since
222 * it already has the right class (FP_NUM).
224 m = x->fp_exp + y->fp_exp;
229 x->fp_sign ^= y->fp_sign;
231 x->fp_sticky = sticky;