2 * Copyright (C) 2008-2009 Semihalf, Michal Hajduk
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
30 #include <sys/param.h>
31 #include <sys/systm.h>
33 #include <sys/kernel.h>
34 #include <sys/module.h>
35 #include <sys/resource.h>
37 #include <machine/bus.h>
38 #include <machine/resource.h>
42 #include <sys/mutex.h>
44 #include <dev/iicbus/iiconf.h>
45 #include <dev/iicbus/iicbus.h>
46 #include "iicbus_if.h"
48 #include <dev/ofw/ofw_bus.h>
49 #include <dev/ofw/ofw_bus_subr.h>
51 #define I2C_ADDR_REG 0x00 /* I2C slave address register */
52 #define I2C_FDR_REG 0x04 /* I2C frequency divider register */
53 #define I2C_CONTROL_REG 0x08 /* I2C control register */
54 #define I2C_STATUS_REG 0x0C /* I2C status register */
55 #define I2C_DATA_REG 0x10 /* I2C data register */
56 #define I2C_DFSRR_REG 0x14 /* I2C Digital Filter Sampling rate */
57 #define I2C_ENABLE 0x80 /* Module enable - interrupt disable */
58 #define I2CSR_RXAK 0x01 /* Received acknowledge */
59 #define I2CSR_MCF (1<<7) /* Data transfer */
60 #define I2CSR_MASS (1<<6) /* Addressed as a slave */
61 #define I2CSR_MBB (1<<5) /* Bus busy */
62 #define I2CSR_MAL (1<<4) /* Arbitration lost */
63 #define I2CSR_SRW (1<<2) /* Slave read/write */
64 #define I2CSR_MIF (1<<1) /* Module interrupt */
65 #define I2CCR_MEN (1<<7) /* Module enable */
66 #define I2CCR_MSTA (1<<5) /* Master/slave mode */
67 #define I2CCR_MTX (1<<4) /* Transmit/receive mode */
68 #define I2CCR_TXAK (1<<3) /* Transfer acknowledge */
69 #define I2CCR_RSTA (1<<2) /* Repeated START */
71 #define I2C_BAUD_RATE_FAST 0x31
72 #define I2C_BAUD_RATE_DEF 0x3F
73 #define I2C_DFSSR_DIV 0x10
76 #define debugf(fmt, args...) do { printf("%s(): ", __func__); printf(fmt,##args); } while (0)
78 #define debugf(fmt, args...)
87 bus_space_handle_t bsh;
91 static int i2c_probe(device_t);
92 static int i2c_attach(device_t);
94 static int i2c_repeated_start(device_t dev, u_char slave, int timeout);
95 static int i2c_start(device_t dev, u_char slave, int timeout);
96 static int i2c_stop(device_t dev);
97 static int i2c_reset(device_t dev, u_char speed, u_char addr, u_char *oldaddr);
98 static int i2c_read(device_t dev, char *buf, int len, int *read, int last, int delay);
99 static int i2c_write(device_t dev, const char *buf, int len, int *sent, int timeout);
101 static device_method_t i2c_methods[] = {
102 DEVMETHOD(device_probe, i2c_probe),
103 DEVMETHOD(device_attach, i2c_attach),
105 DEVMETHOD(iicbus_callback, iicbus_null_callback),
106 DEVMETHOD(iicbus_repeated_start, i2c_repeated_start),
107 DEVMETHOD(iicbus_start, i2c_start),
108 DEVMETHOD(iicbus_stop, i2c_stop),
109 DEVMETHOD(iicbus_reset, i2c_reset),
110 DEVMETHOD(iicbus_read, i2c_read),
111 DEVMETHOD(iicbus_write, i2c_write),
112 DEVMETHOD(iicbus_transfer, iicbus_transfer_gen),
117 static driver_t i2c_driver = {
120 sizeof(struct i2c_softc),
122 static devclass_t i2c_devclass;
124 DRIVER_MODULE(i2c, simplebus, i2c_driver, i2c_devclass, 0, 0);
125 DRIVER_MODULE(iicbus, i2c, iicbus_driver, iicbus_devclass, 0, 0);
128 i2c_write_reg(struct i2c_softc *sc, bus_size_t off, uint8_t val)
131 bus_space_write_1(sc->bst, sc->bsh, off, val);
134 static __inline uint8_t
135 i2c_read_reg(struct i2c_softc *sc, bus_size_t off)
138 return (bus_space_read_1(sc->bst, sc->bsh, off));
142 i2c_flag_set(struct i2c_softc *sc, bus_size_t off, uint8_t mask)
146 status = i2c_read_reg(sc, off);
148 i2c_write_reg(sc, off, status);
152 i2c_do_wait(device_t dev, struct i2c_softc *sc, int write, int start)
157 status = i2c_read_reg(sc, I2C_STATUS_REG);
158 if (status & I2CSR_MIF) {
159 if (write && start && (status & I2CSR_RXAK)) {
160 debugf("no ack %s", start ?
161 "after sending slave address" : "");
165 if (status & I2CSR_MAL) {
166 debugf("arbitration lost");
170 if (!write && !(status & I2CSR_MCF)) {
171 debugf("transfer unfinished");
180 i2c_write_reg(sc, I2C_STATUS_REG, 0x0);
181 i2c_write_reg(sc, I2C_CONTROL_REG, I2CCR_MEN | I2CCR_TXAK);
186 i2c_probe(device_t dev)
188 struct i2c_softc *sc;
190 if (!ofw_bus_is_compatible(dev, "fsl-i2c"))
193 sc = device_get_softc(dev);
196 sc->res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->rid,
198 if (sc->res == NULL) {
199 device_printf(dev, "could not allocate resources\n");
203 sc->bst = rman_get_bustag(sc->res);
204 sc->bsh = rman_get_bushandle(sc->res);
207 i2c_write_reg(sc, I2C_CONTROL_REG, I2C_ENABLE);
208 bus_release_resource(dev, SYS_RES_MEMORY, sc->rid, sc->res);
209 device_set_desc(dev, "I2C bus controller");
211 return (BUS_PROBE_DEFAULT);
215 i2c_attach(device_t dev)
217 struct i2c_softc *sc;
218 sc = device_get_softc(dev);
223 mtx_init(&sc->mutex, device_get_nameunit(dev), "I2C", MTX_DEF);
225 sc->res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->rid,
227 if (sc->res == NULL) {
228 device_printf(dev, "could not allocate resources");
229 mtx_destroy(&sc->mutex);
233 sc->bst = rman_get_bustag(sc->res);
234 sc->bsh = rman_get_bushandle(sc->res);
236 sc->iicbus = device_add_child(dev, "iicbus", -1);
237 if (sc->iicbus == NULL) {
238 device_printf(dev, "could not add iicbus child");
239 mtx_destroy(&sc->mutex);
243 bus_generic_attach(dev);
247 i2c_repeated_start(device_t dev, u_char slave, int timeout)
249 struct i2c_softc *sc;
252 sc = device_get_softc(dev);
254 mtx_lock(&sc->mutex);
255 /* Set repeated start condition */
256 i2c_flag_set(sc, I2C_CONTROL_REG ,I2CCR_RSTA);
257 /* Write target address - LSB is R/W bit */
258 i2c_write_reg(sc, I2C_DATA_REG, slave);
261 error = i2c_do_wait(dev, sc, 1, 1);
262 mtx_unlock(&sc->mutex);
271 i2c_start(device_t dev, u_char slave, int timeout)
273 struct i2c_softc *sc;
277 sc = device_get_softc(dev);
280 mtx_lock(&sc->mutex);
281 status = i2c_read_reg(sc, I2C_STATUS_REG);
282 /* Check if bus is idle or busy */
283 if (status & I2CSR_MBB) {
285 mtx_unlock(&sc->mutex);
287 return (IIC_EBUSBSY);
290 /* Set start condition */
291 i2c_write_reg(sc, I2C_CONTROL_REG, I2CCR_MEN | I2CCR_MSTA | I2CCR_MTX);
292 /* Write target address - LSB is R/W bit */
293 i2c_write_reg(sc, I2C_DATA_REG, slave);
296 error = i2c_do_wait(dev, sc, 1, 1);
298 mtx_unlock(&sc->mutex);
306 i2c_stop(device_t dev)
308 struct i2c_softc *sc;
310 sc = device_get_softc(dev);
311 mtx_lock(&sc->mutex);
312 i2c_write_reg(sc, I2C_CONTROL_REG, I2CCR_MEN | I2CCR_TXAK);
314 mtx_unlock(&sc->mutex);
320 i2c_reset(device_t dev, u_char speed, u_char addr, u_char *oldadr)
322 struct i2c_softc *sc;
325 sc = device_get_softc(dev);
329 baud_rate = I2C_BAUD_RATE_FAST;
335 baud_rate = I2C_BAUD_RATE_DEF;
339 mtx_lock(&sc->mutex);
340 i2c_write_reg(sc, I2C_CONTROL_REG, 0x0);
341 i2c_write_reg(sc, I2C_STATUS_REG, 0x0);
343 i2c_write_reg(sc, I2C_FDR_REG, baud_rate);
344 i2c_write_reg(sc, I2C_DFSRR_REG, I2C_DFSSR_DIV);
345 i2c_write_reg(sc, I2C_CONTROL_REG, I2C_ENABLE);
347 mtx_unlock(&sc->mutex);
353 i2c_read(device_t dev, char *buf, int len, int *read, int last, int delay)
355 struct i2c_softc *sc;
358 sc = device_get_softc(dev);
361 mtx_lock(&sc->mutex);
364 i2c_write_reg(sc, I2C_CONTROL_REG, I2CCR_MEN |
365 I2CCR_MSTA | I2CCR_TXAK);
368 i2c_write_reg(sc, I2C_CONTROL_REG, I2CCR_MEN |
372 i2c_read_reg(sc, I2C_DATA_REG);
376 while (*read < len) {
378 error = i2c_do_wait(dev, sc, 0, 0);
380 mtx_unlock(&sc->mutex);
383 if ((*read == len - 2) && last) {
384 i2c_write_reg(sc, I2C_CONTROL_REG, I2CCR_MEN |
385 I2CCR_MSTA | I2CCR_TXAK);
388 if ((*read == len - 1) && last) {
389 i2c_write_reg(sc, I2C_CONTROL_REG, I2CCR_MEN |
393 *buf++ = i2c_read_reg(sc, I2C_DATA_REG);
397 mtx_unlock(&sc->mutex);
403 i2c_write(device_t dev, const char *buf, int len, int *sent, int timeout)
405 struct i2c_softc *sc;
408 sc = device_get_softc(dev);
411 mtx_lock(&sc->mutex);
412 while (*sent < len) {
413 i2c_write_reg(sc, I2C_DATA_REG, *buf++);
416 error = i2c_do_wait(dev, sc, 1, 0);
418 mtx_unlock(&sc->mutex);
424 mtx_unlock(&sc->mutex);