2 * Copyright (c) 2006 Semihalf, Rafal Jaworowski <raj@semihalf.com>
3 * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
6 * This code is derived from software contributed to The NetBSD Foundation
7 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
8 * NASA Ames Research Center.
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the NetBSD
21 * Foundation, Inc. and its contributors.
22 * 4. Neither the name of The NetBSD Foundation nor the names of its
23 * contributors may be used to endorse or promote products derived
24 * from this software without specific prior written permission.
26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
39 #include <sys/cdefs.h>
40 __FBSDID("$FreeBSD$");
45 #include <sys/param.h>
46 #include <sys/systm.h>
52 #include <machine/bus.h>
53 #include <machine/pio.h>
54 #include <machine/md_var.h>
56 #define TODO panic("%s: not implemented", __func__)
58 #define MAX_EARLYBOOT_MAPPINGS 6
64 } earlyboot_mappings[MAX_EARLYBOOT_MAPPINGS];
65 static int earlyboot_map_idx = 0;
67 void bs_remap_earlyboot(void);
69 static __inline void *
70 __ppc_ba(bus_space_handle_t bsh, bus_size_t ofs)
72 return ((void *)(bsh + ofs));
76 bs_gen_map(bus_addr_t addr, bus_size_t size, int flags,
77 bus_space_handle_t *bshp)
82 * Record what we did if we haven't enabled the MMU yet. We
83 * will need to remap it as soon as the MMU comes up.
85 if (!pmap_bootstrapped) {
86 KASSERT(earlyboot_map_idx < MAX_EARLYBOOT_MAPPINGS,
87 ("%s: too many early boot mapping requests", __func__));
88 earlyboot_mappings[earlyboot_map_idx].addr = addr;
89 earlyboot_mappings[earlyboot_map_idx].size = size;
90 earlyboot_mappings[earlyboot_map_idx].flags = flags;
94 ma = VM_MEMATTR_DEFAULT;
96 case BUS_SPACE_MAP_CACHEABLE:
97 ma = VM_MEMATTR_CACHEABLE;
99 case BUS_SPACE_MAP_PREFETCHABLE:
100 ma = VM_MEMATTR_PREFETCHABLE;
103 *bshp = (bus_space_handle_t)pmap_mapdev_attr(addr, size, ma);
110 bs_remap_earlyboot(void)
116 for (i = 0; i < earlyboot_map_idx; i++) {
117 spa = earlyboot_mappings[i].addr;
118 if (pmap_dev_direct_mapped(spa, earlyboot_mappings[i].size)
122 ma = VM_MEMATTR_DEFAULT;
123 switch (earlyboot_mappings[i].flags) {
124 case BUS_SPACE_MAP_CACHEABLE:
125 ma = VM_MEMATTR_CACHEABLE;
127 case BUS_SPACE_MAP_PREFETCHABLE:
128 ma = VM_MEMATTR_PREFETCHABLE;
132 pa = trunc_page(spa);
133 while (pa < spa + earlyboot_mappings[i].size) {
134 pmap_kenter_attr(pa, pa, ma);
141 bs_gen_unmap(bus_size_t size __unused)
146 bs_gen_subregion(bus_space_handle_t bsh, bus_size_t ofs,
147 bus_size_t size __unused, bus_space_handle_t *nbshp)
154 bs_gen_alloc(bus_addr_t rstart __unused, bus_addr_t rend __unused,
155 bus_size_t size __unused, bus_size_t alignment __unused,
156 bus_size_t boundary __unused, int flags __unused,
157 bus_addr_t *bpap __unused, bus_space_handle_t *bshp __unused)
163 bs_gen_free(bus_space_handle_t bsh __unused, bus_size_t size __unused)
169 bs_gen_barrier(bus_space_handle_t bsh __unused, bus_size_t ofs __unused,
170 bus_size_t size __unused, int flags __unused)
172 __asm __volatile("eieio; sync" : : : "memory");
176 * Big-endian access functions
179 bs_be_rs_1(bus_space_handle_t bsh, bus_size_t ofs)
181 volatile uint8_t *addr;
184 addr = __ppc_ba(bsh, ofs);
186 CTR4(KTR_BE_IO, "%s(bsh=%#x, ofs=%#x) = %#x", __func__, bsh, ofs, res);
191 bs_be_rs_2(bus_space_handle_t bsh, bus_size_t ofs)
193 volatile uint16_t *addr;
196 addr = __ppc_ba(bsh, ofs);
198 CTR4(KTR_BE_IO, "%s(bsh=%#x, ofs=%#x) = %#x", __func__, bsh, ofs, res);
203 bs_be_rs_4(bus_space_handle_t bsh, bus_size_t ofs)
205 volatile uint32_t *addr;
208 addr = __ppc_ba(bsh, ofs);
210 CTR4(KTR_BE_IO, "%s(bsh=%#x, ofs=%#x) = %#x", __func__, bsh, ofs, res);
215 bs_be_rs_8(bus_space_handle_t bsh, bus_size_t ofs)
217 volatile uint64_t *addr;
220 addr = __ppc_ba(bsh, ofs);
226 bs_be_rm_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t *addr, size_t cnt)
228 ins8(__ppc_ba(bsh, ofs), addr, cnt);
232 bs_be_rm_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t *addr, size_t cnt)
234 ins16(__ppc_ba(bsh, ofs), addr, cnt);
238 bs_be_rm_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t *addr, size_t cnt)
240 ins32(__ppc_ba(bsh, ofs), addr, cnt);
244 bs_be_rm_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t *addr, size_t cnt)
246 ins64(__ppc_ba(bsh, ofs), addr, cnt);
250 bs_be_rr_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t *addr, size_t cnt)
252 volatile uint8_t *s = __ppc_ba(bsh, ofs);
256 __asm __volatile("eieio; sync");
260 bs_be_rr_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t *addr, size_t cnt)
262 volatile uint16_t *s = __ppc_ba(bsh, ofs);
266 __asm __volatile("eieio; sync");
270 bs_be_rr_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t *addr, size_t cnt)
272 volatile uint32_t *s = __ppc_ba(bsh, ofs);
276 __asm __volatile("eieio; sync");
280 bs_be_rr_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t *addr, size_t cnt)
282 volatile uint64_t *s = __ppc_ba(bsh, ofs);
286 __asm __volatile("eieio; sync");
290 bs_be_ws_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t val)
292 volatile uint8_t *addr;
294 addr = __ppc_ba(bsh, ofs);
296 __asm __volatile("eieio; sync");
297 CTR4(KTR_BE_IO, "%s(bsh=%#x, ofs=%#x, val=%#x)", __func__, bsh, ofs, val);
301 bs_be_ws_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t val)
303 volatile uint16_t *addr;
305 addr = __ppc_ba(bsh, ofs);
307 __asm __volatile("eieio; sync");
308 CTR4(KTR_BE_IO, "%s(bsh=%#x, ofs=%#x, val=%#x)", __func__, bsh, ofs, val);
312 bs_be_ws_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t val)
314 volatile uint32_t *addr;
316 addr = __ppc_ba(bsh, ofs);
318 __asm __volatile("eieio; sync");
319 CTR4(KTR_BE_IO, "%s(bsh=%#x, ofs=%#x, val=%#x)", __func__, bsh, ofs, val);
323 bs_be_ws_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t val)
325 volatile uint64_t *addr;
327 addr = __ppc_ba(bsh, ofs);
329 __asm __volatile("eieio; sync");
333 bs_be_wm_1(bus_space_handle_t bsh, bus_size_t ofs, const uint8_t *addr,
336 outsb(__ppc_ba(bsh, ofs), addr, cnt);
340 bs_be_wm_2(bus_space_handle_t bsh, bus_size_t ofs, const uint16_t *addr,
343 outsw(__ppc_ba(bsh, ofs), addr, cnt);
347 bs_be_wm_4(bus_space_handle_t bsh, bus_size_t ofs, const uint32_t *addr,
350 outsl(__ppc_ba(bsh, ofs), addr, cnt);
354 bs_be_wm_8(bus_space_handle_t bsh, bus_size_t ofs, const uint64_t *addr,
357 outsll(__ppc_ba(bsh, ofs), addr, cnt);
361 bs_be_wr_1(bus_space_handle_t bsh, bus_size_t ofs, const uint8_t *addr,
364 volatile uint8_t *d = __ppc_ba(bsh, ofs);
368 __asm __volatile("eieio; sync");
372 bs_be_wr_2(bus_space_handle_t bsh, bus_size_t ofs, const uint16_t *addr,
375 volatile uint16_t *d = __ppc_ba(bsh, ofs);
379 __asm __volatile("eieio; sync");
383 bs_be_wr_4(bus_space_handle_t bsh, bus_size_t ofs, const uint32_t *addr,
386 volatile uint32_t *d = __ppc_ba(bsh, ofs);
390 __asm __volatile("eieio; sync");
394 bs_be_wr_8(bus_space_handle_t bsh, bus_size_t ofs, const uint64_t *addr,
397 volatile uint64_t *d = __ppc_ba(bsh, ofs);
401 __asm __volatile("eieio; sync");
405 bs_be_sm_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t val, size_t cnt)
407 volatile uint8_t *d = __ppc_ba(bsh, ofs);
411 __asm __volatile("eieio; sync");
415 bs_be_sm_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t val, size_t cnt)
417 volatile uint16_t *d = __ppc_ba(bsh, ofs);
421 __asm __volatile("eieio; sync");
425 bs_be_sm_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t val, size_t cnt)
427 volatile uint32_t *d = __ppc_ba(bsh, ofs);
431 __asm __volatile("eieio; sync");
435 bs_be_sm_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t val, size_t cnt)
437 volatile uint64_t *d = __ppc_ba(bsh, ofs);
441 __asm __volatile("eieio; sync");
445 bs_be_sr_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t val, size_t cnt)
447 volatile uint8_t *d = __ppc_ba(bsh, ofs);
451 __asm __volatile("eieio; sync");
455 bs_be_sr_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t val, size_t cnt)
457 volatile uint16_t *d = __ppc_ba(bsh, ofs);
461 __asm __volatile("eieio; sync");
465 bs_be_sr_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t val, size_t cnt)
467 volatile uint32_t *d = __ppc_ba(bsh, ofs);
471 __asm __volatile("eieio; sync");
475 bs_be_sr_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t val, size_t cnt)
477 volatile uint64_t *d = __ppc_ba(bsh, ofs);
481 __asm __volatile("eieio; sync");
485 * Little-endian access functions
488 bs_le_rs_1(bus_space_handle_t bsh, bus_size_t ofs)
490 volatile uint8_t *addr;
493 addr = __ppc_ba(bsh, ofs);
495 __asm __volatile("eieio; sync");
496 CTR4(KTR_LE_IO, "%s(bsh=%#x, ofs=%#x) = %#x", __func__, bsh, ofs, res);
501 bs_le_rs_2(bus_space_handle_t bsh, bus_size_t ofs)
503 volatile uint16_t *addr;
506 addr = __ppc_ba(bsh, ofs);
507 __asm __volatile("lhbrx %0, 0, %1" : "=r"(res) : "r"(addr));
508 __asm __volatile("eieio; sync");
509 CTR4(KTR_LE_IO, "%s(bsh=%#x, ofs=%#x) = %#x", __func__, bsh, ofs, res);
514 bs_le_rs_4(bus_space_handle_t bsh, bus_size_t ofs)
516 volatile uint32_t *addr;
519 addr = __ppc_ba(bsh, ofs);
520 __asm __volatile("lwbrx %0, 0, %1" : "=r"(res) : "r"(addr));
521 __asm __volatile("eieio; sync");
522 CTR4(KTR_LE_IO, "%s(bsh=%#x, ofs=%#x) = %#x", __func__, bsh, ofs, res);
527 bs_le_rs_8(bus_space_handle_t bsh, bus_size_t ofs)
533 bs_le_rm_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t *addr, size_t cnt)
535 ins8(__ppc_ba(bsh, ofs), addr, cnt);
539 bs_le_rm_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t *addr, size_t cnt)
541 ins16rb(__ppc_ba(bsh, ofs), addr, cnt);
545 bs_le_rm_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t *addr, size_t cnt)
547 ins32rb(__ppc_ba(bsh, ofs), addr, cnt);
551 bs_le_rm_8(bus_space_handle_t bshh, bus_size_t ofs, uint64_t *addr, size_t cnt)
557 bs_le_rr_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t *addr, size_t cnt)
559 volatile uint8_t *s = __ppc_ba(bsh, ofs);
563 __asm __volatile("eieio; sync");
567 bs_le_rr_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t *addr, size_t cnt)
569 volatile uint16_t *s = __ppc_ba(bsh, ofs);
572 *addr++ = in16rb(s++);
573 __asm __volatile("eieio; sync");
577 bs_le_rr_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t *addr, size_t cnt)
579 volatile uint32_t *s = __ppc_ba(bsh, ofs);
582 *addr++ = in32rb(s++);
583 __asm __volatile("eieio; sync");
587 bs_le_rr_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t *addr, size_t cnt)
593 bs_le_ws_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t val)
595 volatile uint8_t *addr;
597 addr = __ppc_ba(bsh, ofs);
599 CTR4(KTR_LE_IO, "%s(bsh=%#x, ofs=%#x, val=%#x)", __func__, bsh, ofs, val);
603 bs_le_ws_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t val)
605 volatile uint16_t *addr;
607 addr = __ppc_ba(bsh, ofs);
608 __asm __volatile("sthbrx %0, 0, %1" :: "r"(val), "r"(addr));
609 CTR4(KTR_LE_IO, "%s(bsh=%#x, ofs=%#x, val=%#x)", __func__, bsh, ofs, val);
613 bs_le_ws_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t val)
615 volatile uint32_t *addr;
617 addr = __ppc_ba(bsh, ofs);
618 __asm __volatile("stwbrx %0, 0, %1" :: "r"(val), "r"(addr));
619 CTR4(KTR_LE_IO, "%s(bsh=%#x, ofs=%#x, val=%#x)", __func__, bsh, ofs, val);
623 bs_le_ws_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t val)
629 bs_le_wm_1(bus_space_handle_t bsh, bus_size_t ofs, const uint8_t *addr,
632 outs8(__ppc_ba(bsh, ofs), addr, cnt);
636 bs_le_wm_2(bus_space_handle_t bsh, bus_size_t ofs, const uint16_t *addr,
639 outs16rb(__ppc_ba(bsh, ofs), addr, cnt);
643 bs_le_wm_4(bus_space_handle_t bsh, bus_size_t ofs, const uint32_t *addr,
646 outs32rb(__ppc_ba(bsh, ofs), addr, cnt);
650 bs_le_wm_8(bus_space_handle_t bsh, bus_size_t ofs, const uint64_t *addr,
657 bs_le_wr_1(bus_space_handle_t bsh, bus_size_t ofs, const uint8_t *addr,
660 volatile uint8_t *d = __ppc_ba(bsh, ofs);
664 __asm __volatile("eieio; sync");
668 bs_le_wr_2(bus_space_handle_t bsh, bus_size_t ofs, const uint16_t *addr,
671 volatile uint16_t *d = __ppc_ba(bsh, ofs);
674 out16rb(d++, *addr++);
675 __asm __volatile("eieio; sync");
679 bs_le_wr_4(bus_space_handle_t bsh, bus_size_t ofs, const uint32_t *addr,
682 volatile uint32_t *d = __ppc_ba(bsh, ofs);
685 out32rb(d++, *addr++);
686 __asm __volatile("eieio; sync");
690 bs_le_wr_8(bus_space_handle_t bsh, bus_size_t ofs, const uint64_t *addr,
697 bs_le_sm_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t val, size_t cnt)
699 volatile uint8_t *d = __ppc_ba(bsh, ofs);
703 __asm __volatile("eieio; sync");
707 bs_le_sm_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t val, size_t cnt)
709 volatile uint16_t *d = __ppc_ba(bsh, ofs);
713 __asm __volatile("eieio; sync");
717 bs_le_sm_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t val, size_t cnt)
719 volatile uint32_t *d = __ppc_ba(bsh, ofs);
723 __asm __volatile("eieio; sync");
727 bs_le_sm_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t val, size_t cnt)
733 bs_le_sr_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t val, size_t cnt)
735 volatile uint8_t *d = __ppc_ba(bsh, ofs);
739 __asm __volatile("eieio; sync");
743 bs_le_sr_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t val, size_t cnt)
745 volatile uint16_t *d = __ppc_ba(bsh, ofs);
749 __asm __volatile("eieio; sync");
753 bs_le_sr_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t val, size_t cnt)
755 volatile uint32_t *d = __ppc_ba(bsh, ofs);
759 __asm __volatile("eieio; sync");
763 bs_le_sr_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t val, size_t cnt)
768 struct bus_space bs_be_tag = {
769 /* mapping/unmapping */
774 /* allocation/deallocation */
862 struct bus_space bs_le_tag = {
863 /* mapping/unmapping */
868 /* allocation/deallocation */