2 * Copyright (c) 2008 Marcel Moolenaar
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
30 #include <sys/param.h>
31 #include <sys/systm.h>
32 #include <sys/kernel.h>
35 #include <sys/cpuset.h>
37 #include <sys/mutex.h>
40 #include <sys/sched.h>
44 #include <vm/vm_param.h>
46 #include <vm/vm_map.h>
47 #include <vm/vm_extern.h>
48 #include <vm/vm_kern.h>
50 #include <machine/bus.h>
51 #include <machine/cpu.h>
52 #include <machine/intr_machdep.h>
53 #include <machine/pcb.h>
54 #include <machine/platform.h>
55 #include <machine/md_var.h>
56 #include <machine/smp.h>
60 extern struct pcpu __pcpu[MAXCPU];
62 volatile static int ap_awake;
63 volatile static u_int ap_letgo;
64 volatile static u_quad_t ap_timebase;
65 static u_int ipi_msg_cnt[32];
66 static struct mtx ap_boot_mtx;
67 struct pcb stoppcbs[MAXCPU];
70 machdep_ap_bootstrap(void)
72 /* Set up important bits on the CPU (HID registers, etc.) */
76 PCPU_SET(pir, mfspr(SPR_PIR));
78 __asm __volatile("msync; isync");
83 /* Initialize DEC and TB, sync with the BSP values */
85 /* Writing to the time base register is hypervisor-privileged */
93 /* Serialize console output and AP count increment */
94 mtx_lock_spin(&ap_boot_mtx);
96 printf("SMP: AP CPU #%d launched\n", PCPU_GET(cpuid));
97 mtx_unlock_spin(&ap_boot_mtx);
99 /* Start per-CPU event timers. */
102 /* Announce ourselves awake, and enter the scheduler */
107 cpu_mp_setmaxid(void)
109 struct cpuref cpuref;
113 error = platform_smp_first_cpu(&cpuref);
116 error = platform_smp_next_cpu(&cpuref);
123 * Set the largest cpuid we're going to use. This is necessary
124 * for VM initialization.
126 mp_maxid = min(mp_ncpus, MAXCPU) - 1;
134 * We're not going to enable SMP if there's only 1 processor.
136 return (mp_ncpus > 1);
142 struct cpuref bsp, cpu;
146 error = platform_smp_get_bsp(&bsp);
147 KASSERT(error == 0, ("Don't know BSP"));
148 KASSERT(bsp.cr_cpuid == 0, ("%s: cpuid != 0", __func__));
150 error = platform_smp_first_cpu(&cpu);
152 if (cpu.cr_cpuid >= MAXCPU) {
153 printf("SMP: cpu%d: skipped -- ID out of range\n",
157 if (CPU_ISSET(cpu.cr_cpuid, &all_cpus)) {
158 printf("SMP: cpu%d: skipped - duplicate ID\n",
162 if (cpu.cr_cpuid != bsp.cr_cpuid) {
165 pc = &__pcpu[cpu.cr_cpuid];
166 dpcpu = (void *)kmem_alloc(kernel_map, DPCPU_SIZE);
167 pcpu_init(pc, cpu.cr_cpuid, sizeof(*pc));
168 dpcpu_init(dpcpu, cpu.cr_cpuid);
171 pc->pc_cpuid = bsp.cr_cpuid;
174 pc->pc_hwref = cpu.cr_hwref;
175 CPU_SET(pc->pc_cpuid, &all_cpus);
177 error = platform_smp_next_cpu(&cpu);
182 cpu_mp_announce(void)
187 for (i = 0; i <= mp_maxid; i++) {
191 printf("cpu%d: dev=%x", i, (int)pc->pc_hwref);
199 cpu_mp_unleash(void *dummy)
207 mtx_init(&ap_boot_mtx, "ap boot", NULL, MTX_SPIN);
211 STAILQ_FOREACH(pc, &cpuhead, pc_allcpu) {
215 printf("Waking up CPU %d (dev=%x)\n",
216 pc->pc_cpuid, (int)pc->pc_hwref);
218 platform_smp_start_cpu(pc);
220 timeout = 2000; /* wait 2sec for the AP */
221 while (!pc->pc_awake && --timeout > 0)
225 PCPU_SET(pir, mfspr(SPR_PIR));
230 printf("Adding CPU %d, pir=%x, awake=%x\n",
231 pc->pc_cpuid, pc->pc_pir, pc->pc_awake);
234 CPU_SET(pc->pc_cpuid, &stopped_cpus);
239 /* Provide our current DEC and TB values for APs */
240 ap_timebase = mftb() + 10;
241 __asm __volatile("msync; isync");
243 /* Let APs continue */
244 atomic_store_rel_int(&ap_letgo, 1);
247 /* Writing to the time base register is hypervisor-privileged */
248 if (mfmsr() & PSL_HV)
254 while (ap_awake < smp_cpus)
257 if (smp_cpus != cpus || cpus != mp_ncpus) {
258 printf("SMP: %d CPUs found; %d CPUs usable; %d CPUs woken\n",
259 mp_ncpus, cpus, smp_cpus);
262 /* Let the APs get into the scheduler */
269 SYSINIT(start_aps, SI_SUB_SMP, SI_ORDER_FIRST, cpu_mp_unleash, NULL);
272 powerpc_ipi_handler(void *arg)
278 CTR2(KTR_SMP, "%s: MSR 0x%08x", __func__, mfmsr());
280 ipimask = atomic_readandclear_32(&(pcpup->pc_ipimask));
282 return (FILTER_STRAY);
283 while ((msg = ffs(ipimask) - 1) != -1) {
284 ipimask &= ~(1u << msg);
288 CTR1(KTR_SMP, "%s: IPI_AST", __func__);
291 CTR1(KTR_SMP, "%s: IPI_PREEMPT", __func__);
292 sched_preempt(curthread);
295 CTR1(KTR_SMP, "%s: IPI_RENDEZVOUS", __func__);
296 smp_rendezvous_action();
301 * IPI_STOP_HARD is mapped to IPI_STOP so it is not
302 * necessary to add such case in the switch.
304 CTR1(KTR_SMP, "%s: IPI_STOP or IPI_STOP_HARD (stop)",
306 cpuid = PCPU_GET(cpuid);
307 savectx(&stoppcbs[cpuid]);
308 savectx(PCPU_GET(curpcb));
309 CPU_SET_ATOMIC(cpuid, &stopped_cpus);
310 while (!CPU_ISSET(cpuid, &started_cpus))
312 CPU_CLR_ATOMIC(cpuid, &stopped_cpus);
313 CPU_CLR_ATOMIC(cpuid, &started_cpus);
314 CTR1(KTR_SMP, "%s: IPI_STOP (restart)", __func__);
317 CTR1(KTR_SMP, "%s: IPI_HARDCLOCK", __func__);
323 return (FILTER_HANDLED);
327 ipi_send(struct pcpu *pc, int ipi)
330 CTR4(KTR_SMP, "%s: pc=%p, targetcpu=%d, IPI=%d", __func__,
331 pc, pc->pc_cpuid, ipi);
333 atomic_set_32(&pc->pc_ipimask, (1 << ipi));
334 PIC_IPI(root_pic, pc->pc_cpuid);
336 CTR1(KTR_SMP, "%s: sent", __func__);
339 /* Send an IPI to a set of cpus. */
341 ipi_selected(cpuset_t cpus, int ipi)
345 STAILQ_FOREACH(pc, &cpuhead, pc_allcpu) {
346 if (CPU_ISSET(pc->pc_cpuid, &cpus))
351 /* Send an IPI to a specific CPU. */
353 ipi_cpu(int cpu, u_int ipi)
356 ipi_send(cpuid_to_pcpu[cpu], ipi);
359 /* Send an IPI to all CPUs EXCEPT myself. */
361 ipi_all_but_self(int ipi)
365 STAILQ_FOREACH(pc, &cpuhead, pc_allcpu) {