2 * Copyright (c) 2000 - 2008 Søren Schmidt <sos@FreeBSD.org>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer,
10 * without modification, immediately at the beginning of the file.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 #include <sys/ioccom.h>
34 /* ATA/ATAPI device parameters */
36 /*000*/ u_int16_t config; /* configuration info */
37 #define ATA_PROTO_MASK 0x8003
38 #define ATA_PROTO_ATAPI 0x8000
39 #define ATA_PROTO_ATAPI_12 0x8000
40 #define ATA_PROTO_ATAPI_16 0x8001
41 #define ATA_PROTO_CFA 0x848a
42 #define ATA_ATAPI_TYPE_MASK 0x1f00
43 #define ATA_ATAPI_TYPE_DIRECT 0x0000 /* disk/floppy */
44 #define ATA_ATAPI_TYPE_TAPE 0x0100 /* streaming tape */
45 #define ATA_ATAPI_TYPE_CDROM 0x0500 /* CD-ROM device */
46 #define ATA_ATAPI_TYPE_OPTICAL 0x0700 /* optical disk */
47 #define ATA_DRQ_MASK 0x0060
48 #define ATA_DRQ_SLOW 0x0000 /* cpu 3 ms delay */
49 #define ATA_DRQ_INTR 0x0020 /* interrupt 10 ms delay */
50 #define ATA_DRQ_FAST 0x0040 /* accel 50 us delay */
51 #define ATA_RESP_INCOMPLETE 0x0004
53 /*001*/ u_int16_t cylinders; /* # of cylinders */
54 /*002*/ u_int16_t specconf; /* specific configuration */
55 /*003*/ u_int16_t heads; /* # heads */
58 /*006*/ u_int16_t sectors; /* # sectors/track */
59 /*007*/ u_int16_t vendor7[3];
60 /*010*/ u_int8_t serial[20]; /* serial number */
61 /*020*/ u_int16_t retired20;
64 /*023*/ u_int8_t revision[8]; /* firmware revision */
65 /*027*/ u_int8_t model[40]; /* model name */
66 /*047*/ u_int16_t sectors_intr; /* sectors per interrupt */
67 /*048*/ u_int16_t usedmovsd; /* double word read/write? */
68 /*049*/ u_int16_t capabilities1;
69 #define ATA_SUPPORT_DMA 0x0100
70 #define ATA_SUPPORT_LBA 0x0200
71 #define ATA_SUPPORT_IORDY 0x0400
72 #define ATA_SUPPORT_IORDYDIS 0x0800
73 #define ATA_SUPPORT_OVERLAP 0x4000
75 /*050*/ u_int16_t capabilities2;
76 /*051*/ u_int16_t retired_piomode; /* PIO modes 0-2 */
77 #define ATA_RETIRED_PIO_MASK 0x0300
79 /*052*/ u_int16_t retired_dmamode; /* DMA modes */
80 #define ATA_RETIRED_DMA_MASK 0x0003
82 /*053*/ u_int16_t atavalid; /* fields valid */
83 #define ATA_FLAG_54_58 0x0001 /* words 54-58 valid */
84 #define ATA_FLAG_64_70 0x0002 /* words 64-70 valid */
85 #define ATA_FLAG_88 0x0004 /* word 88 valid */
87 /*054*/ u_int16_t current_cylinders;
88 /*055*/ u_int16_t current_heads;
89 /*056*/ u_int16_t current_sectors;
90 /*057*/ u_int16_t current_size_1;
91 /*058*/ u_int16_t current_size_2;
92 /*059*/ u_int16_t multi;
93 #define ATA_MULTI_VALID 0x0100
95 /*060*/ u_int16_t lba_size_1;
98 /*063*/ u_int16_t mwdmamodes; /* multiword DMA modes */
99 /*064*/ u_int16_t apiomodes; /* advanced PIO modes */
101 /*065*/ u_int16_t mwdmamin; /* min. M/W DMA time/word ns */
102 /*066*/ u_int16_t mwdmarec; /* rec. M/W DMA time ns */
103 /*067*/ u_int16_t pioblind; /* min. PIO cycle w/o flow */
104 /*068*/ u_int16_t pioiordy; /* min. PIO cycle IORDY flow */
105 /*069*/ u_int16_t support3;
106 #define ATA_SUPPORT_RZAT 0x0020
107 #define ATA_SUPPORT_DRAT 0x4000
108 u_int16_t reserved70;
109 /*071*/ u_int16_t rlsovlap; /* rel time (us) for overlap */
110 /*072*/ u_int16_t rlsservice; /* rel time (us) for service */
111 u_int16_t reserved73;
112 u_int16_t reserved74;
113 /*075*/ u_int16_t queue;
114 #define ATA_QUEUE_LEN(x) ((x) & 0x001f)
116 /*76*/ u_int16_t satacapabilities;
117 #define ATA_SATA_GEN1 0x0002
118 #define ATA_SATA_GEN2 0x0004
119 #define ATA_SATA_GEN3 0x0008
120 #define ATA_SUPPORT_NCQ 0x0100
121 #define ATA_SUPPORT_IFPWRMNGTRCV 0x0200
122 #define ATA_SUPPORT_PHYEVENTCNT 0x0400
123 #define ATA_SUPPORT_NCQ_UNLOAD 0x0800
124 #define ATA_SUPPORT_NCQ_PRIO 0x1000
125 #define ATA_SUPPORT_HAPST 0x2000
126 #define ATA_SUPPORT_DAPST 0x4000
127 #define ATA_SUPPORT_READLOGDMAEXT 0x8000
129 /*77*/ u_int16_t satacapabilities2;
130 #define ATA_SATA_CURR_GEN_MASK 0x0006
131 #define ATA_SUPPORT_NCQ_STREAM 0x0010
132 #define ATA_SUPPORT_NCQ_QMANAGEMENT 0x0020
133 /*78*/ u_int16_t satasupport;
134 #define ATA_SUPPORT_NONZERO 0x0002
135 #define ATA_SUPPORT_AUTOACTIVATE 0x0004
136 #define ATA_SUPPORT_IFPWRMNGT 0x0008
137 #define ATA_SUPPORT_INORDERDATA 0x0010
138 #define ATA_SUPPORT_ASYNCNOTIF 0x0020
139 #define ATA_SUPPORT_SOFTSETPRESERVE 0x0040
140 /*79*/ u_int16_t sataenabled;
141 #define ATA_ENABLED_DAPST 0x0080
143 /*080*/ u_int16_t version_major;
144 /*081*/ u_int16_t version_minor;
147 /*082/085*/ u_int16_t command1;
148 #define ATA_SUPPORT_SMART 0x0001
149 #define ATA_SUPPORT_SECURITY 0x0002
150 #define ATA_SUPPORT_REMOVABLE 0x0004
151 #define ATA_SUPPORT_POWERMGT 0x0008
152 #define ATA_SUPPORT_PACKET 0x0010
153 #define ATA_SUPPORT_WRITECACHE 0x0020
154 #define ATA_SUPPORT_LOOKAHEAD 0x0040
155 #define ATA_SUPPORT_RELEASEIRQ 0x0080
156 #define ATA_SUPPORT_SERVICEIRQ 0x0100
157 #define ATA_SUPPORT_RESET 0x0200
158 #define ATA_SUPPORT_PROTECTED 0x0400
159 #define ATA_SUPPORT_WRITEBUFFER 0x1000
160 #define ATA_SUPPORT_READBUFFER 0x2000
161 #define ATA_SUPPORT_NOP 0x4000
163 /*083/086*/ u_int16_t command2;
164 #define ATA_SUPPORT_MICROCODE 0x0001
165 #define ATA_SUPPORT_QUEUED 0x0002
166 #define ATA_SUPPORT_CFA 0x0004
167 #define ATA_SUPPORT_APM 0x0008
168 #define ATA_SUPPORT_NOTIFY 0x0010
169 #define ATA_SUPPORT_STANDBY 0x0020
170 #define ATA_SUPPORT_SPINUP 0x0040
171 #define ATA_SUPPORT_MAXSECURITY 0x0100
172 #define ATA_SUPPORT_AUTOACOUSTIC 0x0200
173 #define ATA_SUPPORT_ADDRESS48 0x0400
174 #define ATA_SUPPORT_OVERLAY 0x0800
175 #define ATA_SUPPORT_FLUSHCACHE 0x1000
176 #define ATA_SUPPORT_FLUSHCACHE48 0x2000
178 /*084/087*/ u_int16_t extension;
179 #define ATA_SUPPORT_SMARTLOG 0x0001
180 #define ATA_SUPPORT_SMARTTEST 0x0002
181 #define ATA_SUPPORT_MEDIASN 0x0004
182 #define ATA_SUPPORT_MEDIAPASS 0x0008
183 #define ATA_SUPPORT_STREAMING 0x0010
184 #define ATA_SUPPORT_GENLOG 0x0020
185 #define ATA_SUPPORT_WRITEDMAFUAEXT 0x0040
186 #define ATA_SUPPORT_WRITEDMAQFUAEXT 0x0080
187 #define ATA_SUPPORT_64BITWWN 0x0100
188 #define ATA_SUPPORT_UNLOAD 0x2000
189 } __packed support, enabled;
191 /*088*/ u_int16_t udmamodes; /* UltraDMA modes */
192 /*089*/ u_int16_t erase_time;
193 /*090*/ u_int16_t enhanced_erase_time;
194 /*091*/ u_int16_t apm_value;
195 /*092*/ u_int16_t master_passwd_revision;
196 /*093*/ u_int16_t hwres;
197 #define ATA_CABLE_ID 0x2000
199 /*094*/ u_int16_t acoustic;
200 #define ATA_ACOUSTIC_CURRENT(x) ((x) & 0x00ff)
201 #define ATA_ACOUSTIC_VENDOR(x) (((x) & 0xff00) >> 8)
203 /*095*/ u_int16_t stream_min_req_size;
204 /*096*/ u_int16_t stream_transfer_time;
205 /*097*/ u_int16_t stream_access_latency;
206 /*098*/ u_int32_t stream_granularity;
207 /*100*/ u_int16_t lba_size48_1;
208 u_int16_t lba_size48_2;
209 u_int16_t lba_size48_3;
210 u_int16_t lba_size48_4;
211 u_int16_t reserved104;
212 /*105*/ u_int16_t max_dsm_blocks;
213 /*106*/ u_int16_t pss;
214 #define ATA_PSS_LSPPS 0x000F
215 #define ATA_PSS_LSSABOVE512 0x1000
216 #define ATA_PSS_MULTLS 0x2000
217 /*107*/ u_int16_t isd;
218 /*108*/ u_int16_t wwn[4];
219 u_int16_t reserved112[5];
220 /*117*/ u_int16_t lss_1;
221 /*118*/ u_int16_t lss_2;
222 /*119*/ u_int16_t support2;
223 #define ATA_SUPPORT_WRITEREADVERIFY 0x0002
224 #define ATA_SUPPORT_WRITEUNCORREXT 0x0004
225 #define ATA_SUPPORT_RWLOGDMAEXT 0x0008
226 #define ATA_SUPPORT_MICROCODE3 0x0010
227 #define ATA_SUPPORT_FREEFALL 0x0020
228 /*120*/ u_int16_t enabled2;
229 u_int16_t reserved121[6];
230 /*127*/ u_int16_t removable_status;
231 /*128*/ u_int16_t security_status;
232 u_int16_t reserved129[31];
233 /*160*/ u_int16_t cfa_powermode1;
234 u_int16_t reserved161;
235 /*162*/ u_int16_t cfa_kms_support;
236 /*163*/ u_int16_t cfa_trueide_modes;
237 /*164*/ u_int16_t cfa_memory_modes;
238 u_int16_t reserved165[4];
239 /*169*/ u_int16_t support_dsm;
240 #define ATA_SUPPORT_DSM_TRIM 0x0001
241 u_int16_t reserved170[6];
242 /*176*/ u_int8_t media_serial[60];
243 /*206*/ u_int16_t sct;
244 u_int16_t reserved206[2];
245 /*209*/ u_int16_t lsalign;
246 /*210*/ u_int16_t wrv_sectors_m3_1;
247 u_int16_t wrv_sectors_m3_2;
248 /*212*/ u_int16_t wrv_sectors_m2_1;
249 u_int16_t wrv_sectors_m2_2;
250 /*214*/ u_int16_t nv_cache_caps;
251 /*215*/ u_int16_t nv_cache_size_1;
252 u_int16_t nv_cache_size_2;
253 /*217*/ u_int16_t media_rotation_rate;
254 u_int16_t reserved218;
255 /*219*/ u_int16_t nv_cache_opt;
256 /*220*/ u_int16_t wrv_mode;
257 u_int16_t reserved221;
258 /*222*/ u_int16_t transport_major;
259 /*223*/ u_int16_t transport_minor;
260 u_int16_t reserved224[31];
261 /*255*/ u_int16_t integrity;
265 * ATA Device Register
267 * bit 7 Obsolete (was 1 in early ATA specs)
268 * bit 6 Sets LBA/CHS mode. 1=LBA, 0=CHS
269 * bit 5 Obsolete (was 1 in early ATA specs)
270 * bit 4 1 = Slave Drive, 0 = Master Drive
271 * bit 3-0 In LBA mode, 27-24 of address. In CHS mode, head number
274 #define ATA_DEV_MASTER 0x00
275 #define ATA_DEV_SLAVE 0x10
276 #define ATA_DEV_LBA 0x40
279 /* ATA transfer modes */
280 #define ATA_MODE_MASK 0x0f
281 #define ATA_DMA_MASK 0xf0
283 #define ATA_PIO0 0x08
284 #define ATA_PIO1 0x09
285 #define ATA_PIO2 0x0a
286 #define ATA_PIO3 0x0b
287 #define ATA_PIO4 0x0c
288 #define ATA_PIO_MAX 0x0f
290 #define ATA_WDMA0 0x20
291 #define ATA_WDMA1 0x21
292 #define ATA_WDMA2 0x22
293 #define ATA_UDMA0 0x40
294 #define ATA_UDMA1 0x41
295 #define ATA_UDMA2 0x42
296 #define ATA_UDMA3 0x43
297 #define ATA_UDMA4 0x44
298 #define ATA_UDMA5 0x45
299 #define ATA_UDMA6 0x46
300 #define ATA_SA150 0x47
301 #define ATA_SA300 0x48
302 #define ATA_DMA_MAX 0x4f
306 #define ATA_NOP 0x00 /* NOP */
307 #define ATA_NF_FLUSHQUEUE 0x00 /* flush queued cmd's */
308 #define ATA_NF_AUTOPOLL 0x01 /* start autopoll function */
309 #define ATA_DATA_SET_MANAGEMENT 0x06
310 #define ATA_DSM_TRIM 0x01
311 #define ATA_DEVICE_RESET 0x08 /* reset device */
312 #define ATA_READ 0x20 /* read */
313 #define ATA_READ48 0x24 /* read 48bit LBA */
314 #define ATA_READ_DMA48 0x25 /* read DMA 48bit LBA */
315 #define ATA_READ_DMA_QUEUED48 0x26 /* read DMA QUEUED 48bit LBA */
316 #define ATA_READ_NATIVE_MAX_ADDRESS48 0x27 /* read native max addr 48bit */
317 #define ATA_READ_MUL48 0x29 /* read multi 48bit LBA */
318 #define ATA_READ_STREAM_DMA48 0x2a /* read DMA stream 48bit LBA */
319 #define ATA_READ_STREAM48 0x2b /* read stream 48bit LBA */
320 #define ATA_WRITE 0x30 /* write */
321 #define ATA_WRITE48 0x34 /* write 48bit LBA */
322 #define ATA_WRITE_DMA48 0x35 /* write DMA 48bit LBA */
323 #define ATA_WRITE_DMA_QUEUED48 0x36 /* write DMA QUEUED 48bit LBA*/
324 #define ATA_SET_MAX_ADDRESS48 0x37 /* set max address 48bit */
325 #define ATA_WRITE_MUL48 0x39 /* write multi 48bit LBA */
326 #define ATA_WRITE_STREAM_DMA48 0x3a
327 #define ATA_WRITE_STREAM48 0x3b
328 #define ATA_WRITE_DMA_FUA48 0x3d
329 #define ATA_WRITE_DMA_QUEUED_FUA48 0x3e
330 #define ATA_WRITE_LOG_EXT 0x3f
331 #define ATA_READ_VERIFY 0x40
332 #define ATA_READ_VERIFY48 0x42
333 #define ATA_READ_FPDMA_QUEUED 0x60 /* read DMA NCQ */
334 #define ATA_WRITE_FPDMA_QUEUED 0x61 /* write DMA NCQ */
335 #define ATA_SEEK 0x70 /* seek */
336 #define ATA_PACKET_CMD 0xa0 /* packet command */
337 #define ATA_ATAPI_IDENTIFY 0xa1 /* get ATAPI params*/
338 #define ATA_SERVICE 0xa2 /* service command */
339 #define ATA_SMART_CMD 0xb0 /* SMART command */
340 #define ATA_CFA_ERASE 0xc0 /* CFA erase */
341 #define ATA_READ_MUL 0xc4 /* read multi */
342 #define ATA_WRITE_MUL 0xc5 /* write multi */
343 #define ATA_SET_MULTI 0xc6 /* set multi size */
344 #define ATA_READ_DMA_QUEUED 0xc7 /* read DMA QUEUED */
345 #define ATA_READ_DMA 0xc8 /* read DMA */
346 #define ATA_WRITE_DMA 0xca /* write DMA */
347 #define ATA_WRITE_DMA_QUEUED 0xcc /* write DMA QUEUED */
348 #define ATA_WRITE_MUL_FUA48 0xce
349 #define ATA_STANDBY_IMMEDIATE 0xe0 /* standby immediate */
350 #define ATA_IDLE_IMMEDIATE 0xe1 /* idle immediate */
351 #define ATA_STANDBY_CMD 0xe2 /* standby */
352 #define ATA_IDLE_CMD 0xe3 /* idle */
353 #define ATA_READ_BUFFER 0xe4 /* read buffer */
354 #define ATA_READ_PM 0xe4 /* read portmultiplier */
355 #define ATA_SLEEP 0xe6 /* sleep */
356 #define ATA_FLUSHCACHE 0xe7 /* flush cache to disk */
357 #define ATA_WRITE_PM 0xe8 /* write portmultiplier */
358 #define ATA_FLUSHCACHE48 0xea /* flush cache to disk */
359 #define ATA_ATA_IDENTIFY 0xec /* get ATA params */
360 #define ATA_SETFEATURES 0xef /* features command */
361 #define ATA_SF_SETXFER 0x03 /* set transfer mode */
362 #define ATA_SF_ENAB_WCACHE 0x02 /* enable write cache */
363 #define ATA_SF_DIS_WCACHE 0x82 /* disable write cache */
364 #define ATA_SF_ENAB_PUIS 0x06 /* enable PUIS */
365 #define ATA_SF_DIS_PUIS 0x86 /* disable PUIS */
366 #define ATA_SF_PUIS_SPINUP 0x07 /* PUIS spin-up */
367 #define ATA_SF_ENAB_RCACHE 0xaa /* enable readahead cache */
368 #define ATA_SF_DIS_RCACHE 0x55 /* disable readahead cache */
369 #define ATA_SF_ENAB_RELIRQ 0x5d /* enable release interrupt */
370 #define ATA_SF_DIS_RELIRQ 0xdd /* disable release interrupt */
371 #define ATA_SF_ENAB_SRVIRQ 0x5e /* enable service interrupt */
372 #define ATA_SF_DIS_SRVIRQ 0xde /* disable service interrupt */
373 #define ATA_SECURITY_FREEE_LOCK 0xf5 /* freeze security config */
374 #define ATA_READ_NATIVE_MAX_ADDRESS 0xf8 /* read native max address */
375 #define ATA_SET_MAX_ADDRESS 0xf9 /* set max address */
379 #define ATAPI_TEST_UNIT_READY 0x00 /* check if device is ready */
380 #define ATAPI_REZERO 0x01 /* rewind */
381 #define ATAPI_REQUEST_SENSE 0x03 /* get sense data */
382 #define ATAPI_FORMAT 0x04 /* format unit */
383 #define ATAPI_READ 0x08 /* read data */
384 #define ATAPI_WRITE 0x0a /* write data */
385 #define ATAPI_WEOF 0x10 /* write filemark */
386 #define ATAPI_WF_WRITE 0x01
387 #define ATAPI_SPACE 0x11 /* space command */
388 #define ATAPI_SP_FM 0x01
389 #define ATAPI_SP_EOD 0x03
390 #define ATAPI_INQUIRY 0x12 /* get inquiry data */
391 #define ATAPI_MODE_SELECT 0x15 /* mode select */
392 #define ATAPI_ERASE 0x19 /* erase */
393 #define ATAPI_MODE_SENSE 0x1a /* mode sense */
394 #define ATAPI_START_STOP 0x1b /* start/stop unit */
395 #define ATAPI_SS_LOAD 0x01
396 #define ATAPI_SS_RETENSION 0x02
397 #define ATAPI_SS_EJECT 0x04
398 #define ATAPI_PREVENT_ALLOW 0x1e /* media removal */
399 #define ATAPI_READ_FORMAT_CAPACITIES 0x23 /* get format capacities */
400 #define ATAPI_READ_CAPACITY 0x25 /* get volume capacity */
401 #define ATAPI_READ_BIG 0x28 /* read data */
402 #define ATAPI_WRITE_BIG 0x2a /* write data */
403 #define ATAPI_LOCATE 0x2b /* locate to position */
404 #define ATAPI_READ_POSITION 0x34 /* read position */
405 #define ATAPI_SYNCHRONIZE_CACHE 0x35 /* flush buf, close channel */
406 #define ATAPI_WRITE_BUFFER 0x3b /* write device buffer */
407 #define ATAPI_READ_BUFFER 0x3c /* read device buffer */
408 #define ATAPI_READ_SUBCHANNEL 0x42 /* get subchannel info */
409 #define ATAPI_READ_TOC 0x43 /* get table of contents */
410 #define ATAPI_PLAY_10 0x45 /* play by lba */
411 #define ATAPI_PLAY_MSF 0x47 /* play by MSF address */
412 #define ATAPI_PLAY_TRACK 0x48 /* play by track number */
413 #define ATAPI_PAUSE 0x4b /* pause audio operation */
414 #define ATAPI_READ_DISK_INFO 0x51 /* get disk info structure */
415 #define ATAPI_READ_TRACK_INFO 0x52 /* get track info structure */
416 #define ATAPI_RESERVE_TRACK 0x53 /* reserve track */
417 #define ATAPI_SEND_OPC_INFO 0x54 /* send OPC structurek */
418 #define ATAPI_MODE_SELECT_BIG 0x55 /* set device parameters */
419 #define ATAPI_REPAIR_TRACK 0x58 /* repair track */
420 #define ATAPI_READ_MASTER_CUE 0x59 /* read master CUE info */
421 #define ATAPI_MODE_SENSE_BIG 0x5a /* get device parameters */
422 #define ATAPI_CLOSE_TRACK 0x5b /* close track/session */
423 #define ATAPI_READ_BUFFER_CAPACITY 0x5c /* get buffer capicity */
424 #define ATAPI_SEND_CUE_SHEET 0x5d /* send CUE sheet */
425 #define ATAPI_SERVICE_ACTION_IN 0x96 /* get service data */
426 #define ATAPI_BLANK 0xa1 /* blank the media */
427 #define ATAPI_SEND_KEY 0xa3 /* send DVD key structure */
428 #define ATAPI_REPORT_KEY 0xa4 /* get DVD key structure */
429 #define ATAPI_PLAY_12 0xa5 /* play by lba */
430 #define ATAPI_LOAD_UNLOAD 0xa6 /* changer control command */
431 #define ATAPI_READ_STRUCTURE 0xad /* get DVD structure */
432 #define ATAPI_PLAY_CD 0xb4 /* universal play command */
433 #define ATAPI_SET_SPEED 0xbb /* set drive speed */
434 #define ATAPI_MECH_STATUS 0xbd /* get changer status */
435 #define ATAPI_READ_CD 0xbe /* read data */
436 #define ATAPI_POLL_DSC 0xff /* poll DSC status bit */
439 struct ata_ioc_devices {
442 struct ata_params params[2];
445 /* pr channel ATA ioctl calls */
446 #define IOCATAGMAXCHANNEL _IOR('a', 1, int)
447 #define IOCATAREINIT _IOW('a', 2, int)
448 #define IOCATAATTACH _IOW('a', 3, int)
449 #define IOCATADETACH _IOW('a', 4, int)
450 #define IOCATADEVICES _IOWR('a', 5, struct ata_ioc_devices)
452 /* ATAPI request sense structure */
454 u_int8_t error; /* current or deferred errors */
455 #define ATA_SENSE_VALID 0x80
457 u_int8_t segment; /* segment number */
458 u_int8_t key; /* sense key */
459 #define ATA_SENSE_KEY_MASK 0x0f /* sense key mask */
460 #define ATA_SENSE_NO_SENSE 0x00 /* no specific sense key info */
461 #define ATA_SENSE_RECOVERED_ERROR 0x01 /* command OK, data recovered */
462 #define ATA_SENSE_NOT_READY 0x02 /* no access to drive */
463 #define ATA_SENSE_MEDIUM_ERROR 0x03 /* non-recovered data error */
464 #define ATA_SENSE_HARDWARE_ERROR 0x04 /* non-recoverable HW failure */
465 #define ATA_SENSE_ILLEGAL_REQUEST 0x05 /* invalid command param(s) */
466 #define ATA_SENSE_UNIT_ATTENTION 0x06 /* media changed */
467 #define ATA_SENSE_DATA_PROTECT 0x07 /* write protect */
468 #define ATA_SENSE_BLANK_CHECK 0x08 /* blank check */
469 #define ATA_SENSE_VENDOR_SPECIFIC 0x09 /* vendor specific skey */
470 #define ATA_SENSE_COPY_ABORTED 0x0a /* copy aborted */
471 #define ATA_SENSE_ABORTED_COMMAND 0x0b /* command aborted, try again */
472 #define ATA_SENSE_EQUAL 0x0c /* equal */
473 #define ATA_SENSE_VOLUME_OVERFLOW 0x0d /* volume overflow */
474 #define ATA_SENSE_MISCOMPARE 0x0e /* data dont match the medium */
475 #define ATA_SENSE_RESERVED 0x0f
476 #define ATA_SENSE_ILI 0x20;
477 #define ATA_SENSE_EOM 0x40;
478 #define ATA_SENSE_FILEMARK 0x80;
480 u_int32_t cmd_info; /* cmd information */
481 u_int8_t sense_length; /* additional sense len (n-7) */
482 u_int32_t cmd_specific_info; /* additional cmd spec info */
483 u_int8_t asc; /* additional sense code */
484 u_int8_t ascq; /* additional sense code qual */
485 u_int8_t replaceable_unit_code; /* replaceable unit code */
486 u_int8_t specific; /* sense key specific */
487 #define ATA_SENSE_SPEC_VALID 0x80
488 #define ATA_SENSE_SPEC_MASK 0x7f
490 u_int8_t specific1; /* sense key specific */
491 u_int8_t specific2; /* sense key specific */
494 struct ata_ioc_request {
504 struct atapi_sense sense;
510 #define ATA_CMD_CONTROL 0x01
511 #define ATA_CMD_READ 0x02
512 #define ATA_CMD_WRITE 0x04
513 #define ATA_CMD_ATAPI 0x08
519 /* pr device ATA ioctl calls */
520 #define IOCATAREQUEST _IOWR('a', 100, struct ata_ioc_request)
521 #define IOCATAGPARM _IOR('a', 101, struct ata_params)
522 #define IOCATAGMODE _IOR('a', 102, int)
523 #define IOCATASMODE _IOW('a', 103, int)
525 #define IOCATAGSPINDOWN _IOR('a', 104, int)
526 #define IOCATASSPINDOWN _IOW('a', 105, int)
529 struct ata_ioc_raid_config {
532 #define AR_JBOD 0x0001
533 #define AR_SPAN 0x0002
534 #define AR_RAID0 0x0004
535 #define AR_RAID1 0x0008
536 #define AR_RAID01 0x0010
537 #define AR_RAID3 0x0020
538 #define AR_RAID4 0x0040
539 #define AR_RAID5 0x0080
544 #define AR_DEGRADED 2
545 #define AR_REBUILDING 4
552 struct ata_ioc_raid_status {
561 #define AR_DISK_ONLINE 0x01
562 #define AR_DISK_PRESENT 0x02
563 #define AR_DISK_SPARE 0x04
568 /* ATA RAID ioctl calls */
569 #define IOCATARAIDCREATE _IOWR('a', 200, struct ata_ioc_raid_config)
570 #define IOCATARAIDDELETE _IOW('a', 201, int)
571 #define IOCATARAIDSTATUS _IOWR('a', 202, struct ata_ioc_raid_status)
572 #define IOCATARAIDADDSPARE _IOW('a', 203, struct ata_ioc_raid_config)
573 #define IOCATARAIDREBUILD _IOW('a', 204, int)
575 #endif /* _SYS_ATA_H_ */