2 * Copyright (c) 2003 John Baldwin <jhb@FreeBSD.org>
3 * Copyright (c) 1996, by Steve Passe
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. The name of the developer may NOT be used to endorse or promote products
12 * derived from this software without specific prior written permission.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
30 #include "opt_mptable_force_htt.h"
31 #include <sys/param.h>
32 #include <sys/systm.h>
34 #include <sys/kernel.h>
35 #include <sys/malloc.h>
38 #include <vm/vm_param.h>
41 #include <machine/apicreg.h>
42 #include <machine/frame.h>
43 #include <machine/intr_machdep.h>
44 #include <machine/apicvar.h>
45 #include <machine/md_var.h>
46 #include <machine/mptable.h>
47 #include <machine/specialreg.h>
49 #include <dev/pci/pcivar.h>
51 /* string defined by the Intel MP Spec as identifying the MP table */
52 #define MP_SIG 0x5f504d5f /* _MP_ */
55 #define MAX_LAPIC_ID 63 /* Max local APIC ID for HTT fixup */
56 #define SI_SUB_MPTBL (SI_SUB_TUNABLES - 1)
58 #define MAX_LAPIC_ID 31 /* Max local APIC ID for HTT fixup */
59 #define SI_SUB_MPTBL (SI_SUB_CPU - 1)
63 #define BIOS_BASE (0xe8000)
64 #define BIOS_SIZE (0x18000)
66 #define BIOS_BASE (0xf0000)
67 #define BIOS_SIZE (0x10000)
69 #define BIOS_COUNT (BIOS_SIZE/4)
71 typedef void mptable_entry_handler(u_char *entry, void *arg);
73 static basetable_entry basetable_entry_types[] =
82 typedef struct BUSDATA {
84 enum busTypes bus_type;
87 typedef struct INTDATA {
97 typedef struct BUSTYPENAME {
102 /* From MP spec v1.4, table 4-8. */
103 static bus_type_name bus_type_table[] =
105 {UNKNOWN_BUSTYPE, "CBUS "},
106 {UNKNOWN_BUSTYPE, "CBUSII"},
108 {UNKNOWN_BUSTYPE, "FUTURE"},
109 {UNKNOWN_BUSTYPE, "INTERN"},
111 {UNKNOWN_BUSTYPE, "MBI "},
112 {UNKNOWN_BUSTYPE, "MBII "},
114 {UNKNOWN_BUSTYPE, "MPI "},
115 {UNKNOWN_BUSTYPE, "MPSA "},
116 {UNKNOWN_BUSTYPE, "NUBUS "},
118 {UNKNOWN_BUSTYPE, "PCMCIA"},
119 {UNKNOWN_BUSTYPE, "TC "},
120 {UNKNOWN_BUSTYPE, "VL "},
121 {UNKNOWN_BUSTYPE, "VME "},
122 {UNKNOWN_BUSTYPE, "XPRESS"}
125 /* From MP spec v1.4, table 5-1. */
126 static int default_data[7][5] =
128 /* nbus, id0, type0, id1, type1 */
129 {1, 0, ISA, 255, NOBUS},
130 {1, 0, EISA, 255, NOBUS},
131 {1, 0, EISA, 255, NOBUS},
132 {1, 0, MCA, 255, NOBUS},
134 {2, 0, EISA, 1, PCI},
138 struct pci_probe_table_args {
143 struct pci_route_interrupt_args {
144 u_char bus; /* Source bus. */
145 u_char irq; /* Source slot:pin. */
146 int vector; /* Return value. */
149 static mpfps_t mpfps;
151 static void *ioapics[MAX_APIC_ID + 1];
152 static bus_datum *busses;
153 static int mptable_nioapics, mptable_nbusses, mptable_maxbusid;
154 static int pci0 = -1;
156 static MALLOC_DEFINE(M_MPTABLE, "mptable", "MP Table Items");
158 static enum intr_polarity conforming_polarity(u_char src_bus,
160 static enum intr_trigger conforming_trigger(u_char src_bus, u_char src_bus_irq);
161 static enum intr_polarity intentry_polarity(int_entry_ptr intr);
162 static enum intr_trigger intentry_trigger(int_entry_ptr intr);
163 static int lookup_bus_type(char *name);
164 static void mptable_count_items(void);
165 static void mptable_count_items_handler(u_char *entry, void *arg);
166 #ifdef MPTABLE_FORCE_HTT
167 static void mptable_hyperthread_fixup(u_int id_mask);
169 static void mptable_parse_apics_and_busses(void);
170 static void mptable_parse_apics_and_busses_handler(u_char *entry,
172 static void mptable_parse_default_config_ints(void);
173 static void mptable_parse_ints(void);
174 static void mptable_parse_ints_handler(u_char *entry, void *arg);
175 static void mptable_parse_io_int(int_entry_ptr intr);
176 static void mptable_parse_local_int(int_entry_ptr intr);
177 static void mptable_pci_probe_table_handler(u_char *entry, void *arg);
178 static void mptable_pci_route_interrupt_handler(u_char *entry, void *arg);
179 static void mptable_pci_setup(void);
180 static int mptable_probe(void);
181 static int mptable_probe_cpus(void);
182 static void mptable_probe_cpus_handler(u_char *entry, void *arg __unused);
183 static void mptable_register(void *dummy);
184 static int mptable_setup_local(void);
185 static int mptable_setup_io(void);
186 static void mptable_walk_table(mptable_entry_handler *handler, void *arg);
187 static int search_for_sig(u_int32_t target, int count);
189 static struct apic_enumerator mptable_enumerator = {
198 * look for the MP spec signature
202 search_for_sig(u_int32_t target, int count)
205 u_int32_t *addr = (u_int32_t *) (KERNBASE + target);
207 for (x = 0; x < count; x += 4)
208 if (addr[x] == MP_SIG)
209 /* make array index a byte index */
210 return (target + (x * sizeof(u_int32_t)));
215 lookup_bus_type(char *name)
219 for (x = 0; x < MAX_BUSTYPE; ++x)
220 if (strncmp(bus_type_table[x].name, name, 6) == 0)
221 return (bus_type_table[x].type);
223 return (UNKNOWN_BUSTYPE);
227 * Look for an Intel MP spec table (ie, SMP capable hardware).
236 /* see if EBDA exists */
237 if ((segment = (u_long) * (u_short *) (KERNBASE + 0x40e)) != 0) {
238 /* search first 1K of EBDA */
239 target = (u_int32_t) (segment << 4);
240 if ((x = search_for_sig(target, 1024 / 4)) >= 0)
243 /* last 1K of base memory, effective 'top of base' passed in */
244 target = (u_int32_t) ((basemem * 1024) - 0x400);
245 if ((x = search_for_sig(target, 1024 / 4)) >= 0)
249 /* search the BIOS */
250 target = (u_int32_t) BIOS_BASE;
251 if ((x = search_for_sig(target, BIOS_COUNT)) >= 0)
258 mpfps = (mpfps_t)(KERNBASE + x);
260 /* Map in the configuration table if it exists. */
261 if (mpfps->config_type != 0) {
264 "MP Table version 1.%d found using Default Configuration %d\n",
265 mpfps->spec_rev, mpfps->config_type);
266 if (mpfps->config_type != 5 && mpfps->config_type != 6) {
268 "MP Table Default Configuration %d is unsupported\n",
274 if ((uintptr_t)mpfps->pap >= 1024 * 1024) {
275 printf("%s: Unable to map MP Configuration Table\n",
279 mpct = (mpcth_t)(KERNBASE + (uintptr_t)mpfps->pap);
280 if (mpct->base_table_length + (uintptr_t)mpfps->pap >=
282 printf("%s: Unable to map end of MP Config Table\n",
286 if (mpct->signature[0] != 'P' || mpct->signature[1] != 'C' ||
287 mpct->signature[2] != 'M' || mpct->signature[3] != 'P') {
288 printf("%s: MP Config Table has bad signature: %c%c%c%c\n",
289 __func__, mpct->signature[0], mpct->signature[1],
290 mpct->signature[2], mpct->signature[3]);
295 "MP Configuration Table version 1.%d found at %p\n",
296 mpct->spec_rev, mpct);
303 * Run through the MP table enumerating CPUs.
306 mptable_probe_cpus(void)
310 /* Is this a pre-defined config? */
311 if (mpfps->config_type != 0) {
316 mptable_walk_table(mptable_probe_cpus_handler, &cpu_mask);
317 #ifdef MPTABLE_FORCE_HTT
318 mptable_hyperthread_fixup(cpu_mask);
325 * Initialize the local APIC on the BSP.
328 mptable_setup_local(void)
332 /* Is this a pre-defined config? */
333 printf("MPTable: <");
334 if (mpfps->config_type != 0) {
335 addr = DEFAULT_APIC_BASE;
336 printf("Default Configuration %d", mpfps->config_type);
338 addr = mpct->apic_address;
339 printf("%.*s %.*s", (int)sizeof(mpct->oem_id), mpct->oem_id,
340 (int)sizeof(mpct->product_id), mpct->product_id);
348 * Run through the MP table enumerating I/O APICs.
351 mptable_setup_io(void)
356 /* First, we count individual items and allocate arrays. */
357 mptable_count_items();
358 busses = malloc((mptable_maxbusid + 1) * sizeof(bus_datum), M_MPTABLE,
360 for (i = 0; i <= mptable_maxbusid; i++)
361 busses[i].bus_type = NOBUS;
363 /* Second, we run through adding I/O APIC's and busses. */
364 mptable_parse_apics_and_busses();
366 /* Third, we run through the table tweaking interrupt sources. */
367 mptable_parse_ints();
369 /* Fourth, we register all the I/O APIC's. */
370 for (i = 0; i <= MAX_APIC_ID; i++)
371 if (ioapics[i] != NULL)
372 ioapic_register(ioapics[i]);
374 /* Fifth, we setup data structures to handle PCI interrupt routing. */
377 /* Finally, we throw the switch to enable the I/O APIC's. */
378 if (mpfps->mpfb2 & MPFB2_IMCR_PRESENT) {
379 outb(0x22, 0x70); /* select IMCR */
380 byte = inb(0x23); /* current contents */
381 byte |= 0x01; /* mask external INTR */
382 outb(0x23, byte); /* disconnect 8259s/NMI */
389 mptable_register(void *dummy __unused)
392 apic_register_enumerator(&mptable_enumerator);
394 SYSINIT(mptable_register, SI_SUB_MPTBL, SI_ORDER_FIRST, mptable_register, NULL);
397 * Call the handler routine for each entry in the MP config table.
400 mptable_walk_table(mptable_entry_handler *handler, void *arg)
405 entry = (u_char *)(mpct + 1);
406 for (i = 0; i < mpct->entry_count; i++) {
408 case MPCT_ENTRY_PROCESSOR:
409 case MPCT_ENTRY_IOAPIC:
412 case MPCT_ENTRY_LOCAL_INT:
415 panic("%s: Unknown MP Config Entry %d\n", __func__,
419 entry += basetable_entry_types[*entry].length;
424 mptable_probe_cpus_handler(u_char *entry, void *arg)
430 case MPCT_ENTRY_PROCESSOR:
431 proc = (proc_entry_ptr)entry;
432 if (proc->cpu_flags & PROCENTRY_FLAG_EN) {
433 lapic_create(proc->apic_id, proc->cpu_flags &
435 if (proc->apic_id < MAX_LAPIC_ID) {
436 cpu_mask = (u_int *)arg;
437 *cpu_mask |= (1ul << proc->apic_id);
445 mptable_count_items_handler(u_char *entry, void *arg __unused)
447 io_apic_entry_ptr apic;
452 bus = (bus_entry_ptr)entry;
454 if (bus->bus_id > mptable_maxbusid)
455 mptable_maxbusid = bus->bus_id;
457 case MPCT_ENTRY_IOAPIC:
458 apic = (io_apic_entry_ptr)entry;
459 if (apic->apic_flags & IOAPICENTRY_FLAG_EN)
466 * Count items in the table.
469 mptable_count_items(void)
472 /* Is this a pre-defined config? */
473 if (mpfps->config_type != 0) {
474 mptable_nioapics = 1;
475 switch (mpfps->config_type) {
488 panic("Unknown pre-defined MP Table config type %d",
491 mptable_maxbusid = mptable_nbusses - 1;
493 mptable_walk_table(mptable_count_items_handler, NULL);
497 * Add a bus or I/O APIC from an entry in the table.
500 mptable_parse_apics_and_busses_handler(u_char *entry, void *arg __unused)
502 io_apic_entry_ptr apic;
504 enum busTypes bus_type;
510 bus = (bus_entry_ptr)entry;
511 bus_type = lookup_bus_type(bus->bus_type);
512 if (bus_type == UNKNOWN_BUSTYPE) {
513 printf("MPTable: Unknown bus %d type \"", bus->bus_id);
514 for (i = 0; i < 6; i++)
515 printf("%c", bus->bus_type[i]);
518 busses[bus->bus_id].bus_id = bus->bus_id;
519 busses[bus->bus_id].bus_type = bus_type;
521 case MPCT_ENTRY_IOAPIC:
522 apic = (io_apic_entry_ptr)entry;
523 if (!(apic->apic_flags & IOAPICENTRY_FLAG_EN))
525 if (apic->apic_id > MAX_APIC_ID)
526 panic("%s: I/O APIC ID %d too high", __func__,
528 if (ioapics[apic->apic_id] != NULL)
529 panic("%s: Double APIC ID %d", __func__,
531 ioapics[apic->apic_id] = ioapic_create(apic->apic_address,
540 * Enumerate I/O APIC's and busses.
543 mptable_parse_apics_and_busses(void)
546 /* Is this a pre-defined config? */
547 if (mpfps->config_type != 0) {
548 ioapics[2] = ioapic_create(DEFAULT_IO_APIC_BASE, 2, 0);
549 busses[0].bus_id = 0;
550 busses[0].bus_type = default_data[mpfps->config_type - 1][2];
551 if (mptable_nbusses > 1) {
552 busses[1].bus_id = 1;
554 default_data[mpfps->config_type - 1][4];
557 mptable_walk_table(mptable_parse_apics_and_busses_handler,
562 * Determine conforming polarity for a given bus type.
564 static enum intr_polarity
565 conforming_polarity(u_char src_bus, u_char src_bus_irq)
568 KASSERT(src_bus <= mptable_maxbusid, ("bus id %d too large", src_bus));
569 switch (busses[src_bus].bus_type) {
572 return (INTR_POLARITY_HIGH);
574 return (INTR_POLARITY_LOW);
576 panic("%s: unknown bus type %d", __func__,
577 busses[src_bus].bus_type);
582 * Determine conforming trigger for a given bus type.
584 static enum intr_trigger
585 conforming_trigger(u_char src_bus, u_char src_bus_irq)
588 KASSERT(src_bus <= mptable_maxbusid, ("bus id %d too large", src_bus));
589 switch (busses[src_bus].bus_type) {
593 return (elcr_read_trigger(src_bus_irq));
596 return (INTR_TRIGGER_EDGE);
598 return (INTR_TRIGGER_LEVEL);
601 KASSERT(src_bus_irq < 16, ("Invalid EISA IRQ %d", src_bus_irq));
602 KASSERT(elcr_found, ("Missing ELCR"));
603 return (elcr_read_trigger(src_bus_irq));
606 panic("%s: unknown bus type %d", __func__,
607 busses[src_bus].bus_type);
611 static enum intr_polarity
612 intentry_polarity(int_entry_ptr intr)
615 switch (intr->int_flags & INTENTRY_FLAGS_POLARITY) {
616 case INTENTRY_FLAGS_POLARITY_CONFORM:
617 return (conforming_polarity(intr->src_bus_id,
619 case INTENTRY_FLAGS_POLARITY_ACTIVEHI:
620 return (INTR_POLARITY_HIGH);
621 case INTENTRY_FLAGS_POLARITY_ACTIVELO:
622 return (INTR_POLARITY_LOW);
624 panic("Bogus interrupt flags");
628 static enum intr_trigger
629 intentry_trigger(int_entry_ptr intr)
632 switch (intr->int_flags & INTENTRY_FLAGS_TRIGGER) {
633 case INTENTRY_FLAGS_TRIGGER_CONFORM:
634 return (conforming_trigger(intr->src_bus_id,
636 case INTENTRY_FLAGS_TRIGGER_EDGE:
637 return (INTR_TRIGGER_EDGE);
638 case INTENTRY_FLAGS_TRIGGER_LEVEL:
639 return (INTR_TRIGGER_LEVEL);
641 panic("Bogus interrupt flags");
646 * Parse an interrupt entry for an I/O interrupt routed to a pin on an I/O APIC.
649 mptable_parse_io_int(int_entry_ptr intr)
654 apic_id = intr->dst_apic_id;
655 if (intr->dst_apic_id == 0xff) {
657 * An APIC ID of 0xff means that the interrupt is connected
658 * to the specified pin on all I/O APICs in the system. If
659 * there is only one I/O APIC, then use that APIC to route
660 * the interrupts. If there is more than one I/O APIC, then
663 if (mptable_nioapics == 1) {
665 while (ioapics[apic_id] == NULL)
669 "MPTable: Ignoring global interrupt entry for pin %d\n",
674 if (apic_id > MAX_APIC_ID) {
675 printf("MPTable: Ignoring interrupt entry for ioapic%d\n",
679 ioapic = ioapics[apic_id];
680 if (ioapic == NULL) {
682 "MPTable: Ignoring interrupt entry for missing ioapic%d\n",
686 pin = intr->dst_apic_int;
687 switch (intr->int_type) {
688 case INTENTRY_TYPE_INT:
689 switch (busses[intr->src_bus_id].bus_type) {
691 panic("interrupt from missing bus");
694 if (busses[intr->src_bus_id].bus_type == ISA)
695 ioapic_set_bus(ioapic, pin, APIC_BUS_ISA);
697 ioapic_set_bus(ioapic, pin, APIC_BUS_EISA);
698 if (intr->src_bus_irq == pin)
700 ioapic_remap_vector(ioapic, pin, intr->src_bus_irq);
701 if (ioapic_get_vector(ioapic, intr->src_bus_irq) ==
703 ioapic_disable_pin(ioapic, intr->src_bus_irq);
706 ioapic_set_bus(ioapic, pin, APIC_BUS_PCI);
709 ioapic_set_bus(ioapic, pin, APIC_BUS_UNKNOWN);
713 case INTENTRY_TYPE_NMI:
714 ioapic_set_nmi(ioapic, pin);
716 case INTENTRY_TYPE_SMI:
717 ioapic_set_smi(ioapic, pin);
719 case INTENTRY_TYPE_EXTINT:
720 ioapic_set_extint(ioapic, pin);
723 panic("%s: invalid interrupt entry type %d\n", __func__,
726 if (intr->int_type == INTENTRY_TYPE_INT ||
727 (intr->int_flags & INTENTRY_FLAGS_TRIGGER) !=
728 INTENTRY_FLAGS_TRIGGER_CONFORM)
729 ioapic_set_triggermode(ioapic, pin, intentry_trigger(intr));
730 if (intr->int_type == INTENTRY_TYPE_INT ||
731 (intr->int_flags & INTENTRY_FLAGS_POLARITY) !=
732 INTENTRY_FLAGS_POLARITY_CONFORM)
733 ioapic_set_polarity(ioapic, pin, intentry_polarity(intr));
737 * Parse an interrupt entry for a local APIC LVT pin.
740 mptable_parse_local_int(int_entry_ptr intr)
744 if (intr->dst_apic_id == 0xff)
745 apic_id = APIC_ID_ALL;
747 apic_id = intr->dst_apic_id;
748 if (intr->dst_apic_int == 0)
752 switch (intr->int_type) {
753 case INTENTRY_TYPE_INT:
756 "MPTable: Ignoring vectored local interrupt for LINTIN%d vector %d\n",
757 intr->dst_apic_int, intr->src_bus_irq);
760 lapic_set_lvt_mode(apic_id, pin, APIC_LVT_DM_FIXED);
763 case INTENTRY_TYPE_NMI:
764 lapic_set_lvt_mode(apic_id, pin, APIC_LVT_DM_NMI);
766 case INTENTRY_TYPE_SMI:
767 lapic_set_lvt_mode(apic_id, pin, APIC_LVT_DM_SMI);
769 case INTENTRY_TYPE_EXTINT:
770 lapic_set_lvt_mode(apic_id, pin, APIC_LVT_DM_EXTINT);
773 panic("%s: invalid interrupt entry type %d\n", __func__,
776 if ((intr->int_flags & INTENTRY_FLAGS_TRIGGER) !=
777 INTENTRY_FLAGS_TRIGGER_CONFORM)
778 lapic_set_lvt_triggermode(apic_id, pin,
779 intentry_trigger(intr));
780 if ((intr->int_flags & INTENTRY_FLAGS_POLARITY) !=
781 INTENTRY_FLAGS_POLARITY_CONFORM)
782 lapic_set_lvt_polarity(apic_id, pin, intentry_polarity(intr));
786 * Parse interrupt entries.
789 mptable_parse_ints_handler(u_char *entry, void *arg __unused)
793 intr = (int_entry_ptr)entry;
796 mptable_parse_io_int(intr);
798 case MPCT_ENTRY_LOCAL_INT:
799 mptable_parse_local_int(intr);
805 * Configure interrupt pins for a default configuration. For details see
806 * Table 5-2 in Section 5 of the MP Table specification.
809 mptable_parse_default_config_ints(void)
811 struct INTENTRY entry;
815 * All default configs route IRQs from bus 0 to the first 16 pins
816 * of the first I/O APIC with an APIC ID of 2.
818 entry.type = MPCT_ENTRY_INT;
819 entry.int_flags = INTENTRY_FLAGS_POLARITY_CONFORM |
820 INTENTRY_FLAGS_TRIGGER_CONFORM;
821 entry.src_bus_id = 0;
822 entry.dst_apic_id = 2;
824 /* Run through all 16 pins. */
825 for (pin = 0; pin < 16; pin++) {
826 entry.dst_apic_int = pin;
829 /* Pin 0 is an ExtINT pin. */
830 entry.int_type = INTENTRY_TYPE_EXTINT;
833 /* IRQ 0 is routed to pin 2. */
834 entry.int_type = INTENTRY_TYPE_INT;
835 entry.src_bus_irq = 0;
838 /* All other pins are identity mapped. */
839 entry.int_type = INTENTRY_TYPE_INT;
840 entry.src_bus_irq = pin;
843 mptable_parse_io_int(&entry);
846 /* Certain configs disable certain pins. */
847 if (mpfps->config_type == 7)
848 ioapic_disable_pin(ioapics[2], 0);
849 if (mpfps->config_type == 2) {
850 ioapic_disable_pin(ioapics[2], 2);
851 ioapic_disable_pin(ioapics[2], 13);
856 * Configure the interrupt pins
859 mptable_parse_ints(void)
862 /* Is this a pre-defined config? */
863 if (mpfps->config_type != 0) {
864 /* Configure LINT pins. */
865 lapic_set_lvt_mode(APIC_ID_ALL, LVT_LINT0, APIC_LVT_DM_EXTINT);
866 lapic_set_lvt_mode(APIC_ID_ALL, LVT_LINT1, APIC_LVT_DM_NMI);
868 /* Configure I/O APIC pins. */
869 mptable_parse_default_config_ints();
871 mptable_walk_table(mptable_parse_ints_handler, NULL);
874 #ifdef MPTABLE_FORCE_HTT
876 * Perform a hyperthreading "fix-up" to enumerate any logical CPU's
877 * that aren't already listed in the table.
879 * XXX: We assume that all of the physical CPUs in the
880 * system have the same number of logical CPUs.
882 * XXX: We assume that APIC ID's are allocated such that
883 * the APIC ID's for a physical processor are aligned
884 * with the number of logical CPU's in the processor.
887 mptable_hyperthread_fixup(u_int id_mask)
889 u_int i, id, logical_cpus;
891 /* Nothing to do if there is no HTT support. */
892 if ((cpu_feature & CPUID_HTT) == 0)
894 logical_cpus = (cpu_procinfo & CPUID_HTT_CORES) >> 16;
895 if (logical_cpus <= 1)
899 * For each APIC ID of a CPU that is set in the mask,
900 * scan the other candidate APIC ID's for this
901 * physical processor. If any of those ID's are
902 * already in the table, then kill the fixup.
904 for (id = 0; id <= MAX_LAPIC_ID; id++) {
905 if ((id_mask & 1 << id) == 0)
907 /* First, make sure we are on a logical_cpus boundary. */
908 if (id % logical_cpus != 0)
910 for (i = id + 1; i < id + logical_cpus; i++)
911 if ((id_mask & 1 << i) != 0)
916 * Ok, the ID's checked out, so perform the fixup by
917 * adding the logical CPUs.
919 while ((id = ffs(id_mask)) != 0) {
921 for (i = id + 1; i < id + logical_cpus; i++) {
924 "MPTable: Adding logical CPU %d from main CPU %d\n",
928 id_mask &= ~(1 << id);
931 #endif /* MPTABLE_FORCE_HTT */
934 * Support code for routing PCI interrupts using the MP Table.
937 mptable_pci_setup(void)
942 * Find the first pci bus and call it 0. Panic if pci0 is not
943 * bus zero and there are multiple PCI busses.
945 for (i = 0; i <= mptable_maxbusid; i++)
946 if (busses[i].bus_type == PCI) {
951 "MPTable contains multiple PCI busses but no PCI bus 0");
956 mptable_pci_probe_table_handler(u_char *entry, void *arg)
958 struct pci_probe_table_args *args;
961 if (*entry != MPCT_ENTRY_INT)
963 intr = (int_entry_ptr)entry;
964 args = (struct pci_probe_table_args *)arg;
965 KASSERT(args->bus <= mptable_maxbusid,
966 ("bus %d is too big", args->bus));
967 KASSERT(busses[args->bus].bus_type == PCI, ("probing for non-PCI bus"));
968 if (intr->src_bus_id == args->bus)
973 mptable_pci_probe_table(int bus)
975 struct pci_probe_table_args args;
979 if (mpct == NULL || pci0 == -1 || pci0 + bus > mptable_maxbusid)
981 if (busses[pci0 + bus].bus_type != PCI)
983 args.bus = pci0 + bus;
985 mptable_walk_table(mptable_pci_probe_table_handler, &args);
992 mptable_pci_route_interrupt_handler(u_char *entry, void *arg)
994 struct pci_route_interrupt_args *args;
998 if (*entry != MPCT_ENTRY_INT)
1000 intr = (int_entry_ptr)entry;
1001 args = (struct pci_route_interrupt_args *)arg;
1002 if (intr->src_bus_id != args->bus || intr->src_bus_irq != args->irq)
1005 /* Make sure the APIC maps to a known APIC. */
1006 KASSERT(ioapics[intr->dst_apic_id] != NULL,
1007 ("No I/O APIC %d to route interrupt to", intr->dst_apic_id));
1010 * Look up the vector for this APIC / pin combination. If we
1011 * have previously matched an entry for this PCI IRQ but it
1012 * has the same vector as this entry, just return. Otherwise,
1013 * we use the vector for this APIC / pin combination.
1015 vector = ioapic_get_vector(ioapics[intr->dst_apic_id],
1016 intr->dst_apic_int);
1017 if (args->vector == vector)
1019 KASSERT(args->vector == -1,
1020 ("Multiple IRQs for PCI interrupt %d.%d.INT%c: %d and %d\n",
1021 args->bus, args->irq >> 2, 'A' + (args->irq & 0x3), args->vector,
1023 args->vector = vector;
1027 mptable_pci_route_interrupt(device_t pcib, device_t dev, int pin)
1029 struct pci_route_interrupt_args args;
1032 /* Like ACPI, pin numbers are 0-3, not 1-4. */
1034 KASSERT(pci0 != -1, ("do not know how to route PCI interrupts"));
1035 args.bus = pci_get_bus(dev) + pci0;
1036 slot = pci_get_slot(dev);
1039 * PCI interrupt entries in the MP Table encode both the slot and
1040 * pin into the IRQ with the pin being the two least significant
1041 * bits, the slot being the next five bits, and the most significant
1042 * bit being reserved.
1044 args.irq = slot << 2 | pin;
1046 mptable_walk_table(mptable_pci_route_interrupt_handler, &args);
1047 if (args.vector < 0) {
1048 device_printf(pcib, "unable to route slot %d INT%c\n", slot,
1050 return (PCI_INVALID_IRQ);
1053 device_printf(pcib, "slot %d INT%c routed to irq %d\n", slot,
1054 'A' + pin, args.vector);
1055 return (args.vector);