2 * Copyright (c) 2010 by Peter Jeremy <peterjeremy@acm.org>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
15 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
16 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
17 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
18 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
19 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
20 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
21 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
22 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
23 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 #include <machine/asm.h>
27 __FBSDID("$FreeBSD$");
29 .section "rodata1",#alloc
32 .global insn_int32_to_float32
33 insn_int32_to_float32:
36 .global insn_int32_to_float64
37 insn_int32_to_float64:
40 .global insn_int32_to_float128
41 insn_int32_to_float128:
44 .global insn_int64_to_float32
45 insn_int64_to_float32:
48 .global insn_int64_to_float64
49 insn_int64_to_float64:
52 .global insn_int64_to_float128
53 insn_int64_to_float128:
56 .global insn_float32_to_int32_round_to_zero
57 insn_float32_to_int32_round_to_zero:
60 .global insn_float32_to_int64_round_to_zero
61 insn_float32_to_int64_round_to_zero:
64 .global insn_float32_to_float64
65 insn_float32_to_float64:
68 .global insn_float32_to_float128
69 insn_float32_to_float128:
72 .global insn_float32_add
76 .global insn_float32_sub
80 .global insn_float32_mul
84 .global insn_float32_div
88 .global insn_float32_sqrt
92 .global insn_float32_cmp
96 .global insn_float32_cmpe
100 .global insn_float64_to_int32_round_to_zero
101 insn_float64_to_int32_round_to_zero:
104 .global insn_float64_to_int64_round_to_zero
105 insn_float64_to_int64_round_to_zero:
108 .global insn_float64_to_float32
109 insn_float64_to_float32:
112 .global insn_float64_to_float128
113 insn_float64_to_float128:
116 .global insn_float64_add
120 .global insn_float64_sub
124 .global insn_float64_mul
128 .global insn_float64_div
132 .global insn_float64_sqrt
136 .global insn_float64_cmp
140 .global insn_float64_cmpe
144 .global insn_float128_to_int32_round_to_zero
145 insn_float128_to_int32_round_to_zero:
148 .global insn_float128_to_int64_round_to_zero
149 insn_float128_to_int64_round_to_zero:
152 .global insn_float128_to_float32
153 insn_float128_to_float32:
156 .global insn_float128_to_float64
157 insn_float128_to_float64:
160 .global insn_float128_add
164 .global insn_float128_sub
168 .global insn_float128_mul
172 .global insn_float128_div
176 .global insn_float128_sqrt
180 .global insn_float128_cmp
184 .global insn_float128_cmpe