2 * Copyright (c) 2011 Chelsio Communications, Inc.
4 * Written by: Navdeep Parhar <np@FreeBSD.org>
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
40 #include <sys/ioctl.h>
43 #include <sys/types.h>
44 #include <sys/socket.h>
46 #include <net/ethernet.h>
47 #include <netinet/in.h>
48 #include <arpa/inet.h>
49 #include <net/sff8472.h>
53 #define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0]))
54 #define in_range(val, lo, hi) ( val < 0 || (val <= hi && val >= lo))
55 #define max(x, y) ((x) > (y) ? (x) : (y))
57 static const char *progname, *nexus;
58 static int chip_id; /* 4 for T4, 5 for T5 */
68 const struct reg_info *ri;
72 const char *name; /* Field name */
73 unsigned short start; /* Start bit position */
74 unsigned short end; /* End bit position */
75 unsigned char shift; /* # of low order bits omitted and implicitly 0 */
76 unsigned char hex; /* Print field in hex instead of decimal */
77 unsigned char islog2; /* Field contains the base-2 log of the value */
80 #include "reg_defs_t4.c"
81 #include "reg_defs_t4vf.c"
82 #include "reg_defs_t5.c"
87 fprintf(fp, "Usage: %s <nexus> [operation]\n", progname);
89 "\tclearstats <port> clear port statistics\n"
90 "\tcontext <type> <id> show an SGE context\n"
91 "\tfilter <idx> [<param> <val>] ... set a filter\n"
92 "\tfilter <idx> delete|clear delete a filter\n"
93 "\tfilter list list all filters\n"
94 "\tfilter mode [<match>] ... get/set global filter mode\n"
95 "\ti2c <port> <devaddr> <addr> [<len>] read from i2c device\n"
96 "\tloadfw <fw-image.bin> install firmware\n"
97 "\tmemdump <addr> <len> dump a memory range\n"
98 "\tmodinfo <port> optics/cable information\n"
99 "\treg <address>[=<val>] read/write register\n"
100 "\treg64 <address>[=<val>] read/write 64 bit register\n"
101 "\tregdump [<module>] ... dump registers\n"
102 "\tsched-class params <param> <val> .. configure TX scheduler class\n"
103 "\tsched-queue <port> <queue> <class> bind NIC queues to TX Scheduling class\n"
104 "\tstdio interactive mode\n"
105 "\ttcb <tid> read TCB\n"
109 static inline unsigned int
110 get_card_vers(unsigned int version)
112 return (version & 0x3ff);
116 real_doit(unsigned long cmd, void *data, const char *cmdstr)
124 snprintf(buf, sizeof(buf), "/dev/%s", nexus);
125 if ((fd = open(buf, O_RDWR)) < 0) {
126 warn("open(%s)", nexus);
130 chip_id = nexus[1] - '0';
133 rc = ioctl(fd, cmd, data);
141 #define doit(x, y) real_doit(x, y, #x)
144 str_to_number(const char *s, long *val, long long *vall)
149 *vall = strtoll(s, &p, 0);
151 *val = strtol(s, &p, 0);
159 read_reg(long addr, int size, long long *val)
164 reg.addr = (uint32_t) addr;
165 reg.size = (uint32_t) size;
168 rc = doit(CHELSIO_T4_GETREG, ®);
176 write_reg(long addr, int size, long long val)
180 reg.addr = (uint32_t) addr;
181 reg.size = (uint32_t) size;
182 reg.val = (uint64_t) val;
184 return doit(CHELSIO_T4_SETREG, ®);
188 register_io(int argc, const char *argv[], int size)
196 /* <reg> OR <reg>=<value> */
198 p = str_to_number(argv[0], &addr, NULL);
201 warnx("invalid register \"%s\"", argv[0]);
207 p = str_to_number(v, NULL, &val);
210 warnx("invalid value \"%s\"", v);
215 } else if (argc == 2) {
220 p = str_to_number(argv[0], &addr, NULL);
222 warnx("invalid register \"%s\"", argv[0]);
226 p = str_to_number(argv[1], NULL, &val);
228 warnx("invalid value \"%s\"", argv[1]);
232 warnx("reg: invalid number of arguments (%d)", argc);
237 rc = write_reg(addr, size, val);
239 rc = read_reg(addr, size, &val);
241 printf("0x%llx [%llu]\n", val, val);
247 static inline uint32_t
248 xtract(uint32_t val, int shift, int len)
250 return (val >> shift) & ((1 << len) - 1);
254 dump_block_regs(const struct reg_info *reg_array, const uint32_t *regs)
256 uint32_t reg_val = 0;
258 for ( ; reg_array->name; ++reg_array)
259 if (!reg_array->len) {
260 reg_val = regs[reg_array->addr / 4];
261 printf("[%#7x] %-47s %#-10x %u\n", reg_array->addr,
262 reg_array->name, reg_val, reg_val);
264 uint32_t v = xtract(reg_val, reg_array->addr,
267 printf(" %*u:%u %-47s %#-10x %u\n",
268 reg_array->addr < 10 ? 3 : 2,
269 reg_array->addr + reg_array->len - 1,
270 reg_array->addr, reg_array->name, v, v);
277 dump_regs_table(int argc, const char *argv[], const uint32_t *regs,
278 const struct mod_regs *modtab, int nmodules)
282 for (i = 0; i < argc; i++) {
283 for (j = 0; j < nmodules; j++) {
284 if (!strcmp(argv[i], modtab[j].name))
289 warnx("invalid register block \"%s\"", argv[i]);
290 fprintf(stderr, "\nAvailable blocks:");
291 for ( ; nmodules; nmodules--, modtab++)
292 fprintf(stderr, " %s", modtab->name);
293 fprintf(stderr, "\n");
298 for ( ; nmodules; nmodules--, modtab++) {
300 match = argc == 0 ? 1 : 0;
301 for (i = 0; !match && i < argc; i++) {
302 if (!strcmp(argv[i], modtab->name))
307 dump_block_regs(modtab->ri, regs);
313 #define T4_MODREGS(name) { #name, t4_##name##_regs }
315 dump_regs_t4(int argc, const char *argv[], const uint32_t *regs)
317 static struct mod_regs t4_mod[] = {
319 { "pci", t4_pcie_regs },
323 { "edc0", t4_edc_0_regs },
324 { "edc1", t4_edc_1_regs },
329 { "pmrx", t4_pm_rx_regs },
330 { "pmtx", t4_pm_tx_regs },
332 { "cplsw", t4_cpl_switch_regs },
334 { "i2c", t4_i2cm_regs },
345 return dump_regs_table(argc, argv, regs, t4_mod, ARRAY_SIZE(t4_mod));
350 dump_regs_t4vf(int argc, const char *argv[], const uint32_t *regs)
352 static struct mod_regs t4vf_mod[] = {
353 { "sge", t4vf_sge_regs },
354 { "mps", t4vf_mps_regs },
355 { "pl", t4vf_pl_regs },
356 { "mbdata", t4vf_mbdata_regs },
357 { "cim", t4vf_cim_regs },
360 return dump_regs_table(argc, argv, regs, t4vf_mod,
361 ARRAY_SIZE(t4vf_mod));
364 #define T5_MODREGS(name) { #name, t5_##name##_regs }
366 dump_regs_t5(int argc, const char *argv[], const uint32_t *regs)
368 static struct mod_regs t5_mod[] = {
370 { "pci", t5_pcie_regs },
372 { "mc0", t5_mc_0_regs },
373 { "mc1", t5_mc_1_regs },
375 { "edc0", t5_edc_t50_regs },
376 { "edc1", t5_edc_t51_regs },
379 { "ulprx", t5_ulp_rx_regs },
380 { "ulptx", t5_ulp_tx_regs },
381 { "pmrx", t5_pm_rx_regs },
382 { "pmtx", t5_pm_tx_regs },
384 { "cplsw", t5_cpl_switch_regs },
386 { "i2c", t5_i2cm_regs },
395 { "hma", t5_hma_t5_regs }
398 return dump_regs_table(argc, argv, regs, t5_mod, ARRAY_SIZE(t5_mod));
403 dump_regs(int argc, const char *argv[])
405 int vers, revision, rc;
406 struct t4_regdump regs;
409 len = max(T4_REGDUMP_SIZE, T5_REGDUMP_SIZE);
410 regs.data = calloc(1, len);
411 if (regs.data == NULL) {
412 warnc(ENOMEM, "regdump");
417 rc = doit(CHELSIO_T4_REGDUMP, ®s);
421 vers = get_card_vers(regs.version);
422 revision = (regs.version >> 10) & 0x3f;
425 if (revision == 0x3f)
426 rc = dump_regs_t4vf(argc, argv, regs.data);
428 rc = dump_regs_t4(argc, argv, regs.data);
429 } else if (vers == 5)
430 rc = dump_regs_t5(argc, argv, regs.data);
432 warnx("%s (type %d, rev %d) is not a known card.",
433 nexus, vers, revision);
442 do_show_info_header(uint32_t mode)
446 printf ("%4s %8s", "Idx", "Hits");
447 for (i = T4_FILTER_FCoE; i <= T4_FILTER_IP_FRAGMENT; i <<= 1) {
458 printf (" vld:VNIC");
462 printf (" vld:VLAN");
465 case T4_FILTER_IP_TOS:
469 case T4_FILTER_IP_PROTO:
473 case T4_FILTER_ETH_TYPE:
477 case T4_FILTER_MAC_IDX:
481 case T4_FILTER_MPS_HIT_TYPE:
485 case T4_FILTER_IP_FRAGMENT:
490 /* compressed filter field not enabled */
494 printf(" %20s %20s %9s %9s %s\n",
495 "DIP", "SIP", "DPORT", "SPORT", "Action");
499 * Parse an argument sub-vector as a { <parameter name> <value>[:<mask>] }
500 * ordered tuple. If the parameter name in the argument sub-vector does not
501 * match the passed in parameter name, then a zero is returned for the
502 * function and no parsing is performed. If there is a match, then the value
503 * and optional mask are parsed and returned in the provided return value
504 * pointers. If no optional mask is specified, then a default mask of all 1s
507 * An error in parsing the value[:mask] will result in an error message and
508 * program termination.
511 parse_val_mask(const char *param, const char *args[], uint32_t *val,
516 if (strcmp(param, args[0]) != 0)
519 *val = strtoul(args[1], &p, 0);
526 if (p[0] == ':' && p[1] != 0) {
527 *mask = strtoul(p+1, &p, 0);
533 warnx("parameter \"%s\" has bad \"value[:mask]\" %s",
540 * Parse an argument sub-vector as a { <parameter name> <addr>[/<mask>] }
541 * ordered tuple. If the parameter name in the argument sub-vector does not
542 * match the passed in parameter name, then a zero is returned for the
543 * function and no parsing is performed. If there is a match, then the value
544 * and optional mask are parsed and returned in the provided return value
545 * pointers. If no optional mask is specified, then a default mask of all 1s
548 * The value return parameter "afp" is used to specify the expected address
549 * family -- IPv4 or IPv6 -- of the address[/mask] and return its actual
550 * format. A passed in value of AF_UNSPEC indicates that either IPv4 or IPv6
551 * is acceptable; AF_INET means that only IPv4 addresses are acceptable; and
552 * AF_INET6 means that only IPv6 are acceptable. AF_INET is returned for IPv4
553 * and AF_INET6 for IPv6 addresses, respectively. IPv4 address/mask pairs are
554 * returned in the first four bytes of the address and mask return values with
555 * the address A.B.C.D returned with { A, B, C, D } returned in addresses { 0,
556 * 1, 2, 3}, respectively.
558 * An error in parsing the value[:mask] will result in an error message and
559 * program termination.
562 parse_ipaddr(const char *param, const char *args[], int *afp, uint8_t addr[],
565 const char *colon, *afn;
569 unsigned int masksize;
572 * Is this our parameter?
574 if (strcmp(param, args[0]) != 0)
578 * Fundamental IPv4 versus IPv6 selection.
580 colon = strchr(args[1], ':');
590 if (*afp == AF_UNSPEC)
592 else if (*afp != af) {
593 warnx("address %s is not of expected family %s",
594 args[1], *afp == AF_INET ? "IP" : "IPv6");
599 * Parse address (temporarily stripping off any "/mask"
602 slash = strchr(args[1], '/');
605 ret = inet_pton(af, args[1], addr);
609 warnx("Cannot parse %s %s address %s", param, afn, args[1]);
614 * Parse optional mask specification.
618 unsigned int prefix = strtoul(slash + 1, &p, 10);
620 if (p == slash + 1) {
621 warnx("missing address prefix for %s", param);
625 warnx("%s is not a valid address prefix", slash + 1);
628 if (prefix > masksize) {
629 warnx("prefix %u is too long for an %s address",
633 memset(mask, 0, masksize / 8);
640 for (m = mask; masksize >= 8; m++, masksize -= 8)
643 *m = ~0 << (8 - masksize);
649 * Parse an argument sub-vector as a { <parameter name> <value> } ordered
650 * tuple. If the parameter name in the argument sub-vector does not match the
651 * passed in parameter name, then a zero is returned for the function and no
652 * parsing is performed. If there is a match, then the value is parsed and
653 * returned in the provided return value pointer.
656 parse_val(const char *param, const char *args[], uint32_t *val)
660 if (strcmp(param, args[0]) != 0)
663 *val = strtoul(args[1], &p, 0);
664 if (p > args[1] && p[0] == 0)
667 warnx("parameter \"%s\" has bad \"value\" %s", args[0], args[1]);
672 filters_show_ipaddr(int type, uint8_t *addr, uint8_t *addrm)
683 for (octet = 0; octet < noctets; octet++)
684 printf("%02x", addr[octet]);
686 for (octet = 0; octet < noctets; octet++)
687 printf("%02x", addrm[octet]);
691 do_show_one_filter_info(struct t4_filter *t, uint32_t mode)
695 printf("%4d", t->idx);
696 if (t->hits == UINT64_MAX)
699 printf(" %8ju", t->hits);
702 * Compressed header portion of filter.
704 for (i = T4_FILTER_FCoE; i <= T4_FILTER_IP_FRAGMENT; i <<= 1) {
707 printf(" %1d/%1d", t->fs.val.fcoe, t->fs.mask.fcoe);
711 printf(" %1d/%1d", t->fs.val.iport, t->fs.mask.iport);
715 printf(" %1d:%1x:%02x/%1d:%1x:%02x",
716 t->fs.val.vnic_vld, (t->fs.val.vnic >> 7) & 0x7,
717 t->fs.val.vnic & 0x7f, t->fs.mask.vnic_vld,
718 (t->fs.mask.vnic >> 7) & 0x7,
719 t->fs.mask.vnic & 0x7f);
723 printf(" %1d:%04x/%1d:%04x",
724 t->fs.val.vlan_vld, t->fs.val.vlan,
725 t->fs.mask.vlan_vld, t->fs.mask.vlan);
728 case T4_FILTER_IP_TOS:
729 printf(" %02x/%02x", t->fs.val.tos, t->fs.mask.tos);
732 case T4_FILTER_IP_PROTO:
733 printf(" %02x/%02x", t->fs.val.proto, t->fs.mask.proto);
736 case T4_FILTER_ETH_TYPE:
737 printf(" %04x/%04x", t->fs.val.ethtype,
741 case T4_FILTER_MAC_IDX:
742 printf(" %03x/%03x", t->fs.val.macidx,
746 case T4_FILTER_MPS_HIT_TYPE:
747 printf(" %1x/%1x", t->fs.val.matchtype,
748 t->fs.mask.matchtype);
751 case T4_FILTER_IP_FRAGMENT:
752 printf(" %1d/%1d", t->fs.val.frag, t->fs.mask.frag);
756 /* compressed filter field not enabled */
762 * Fixed portion of filter.
764 filters_show_ipaddr(t->fs.type, t->fs.val.dip, t->fs.mask.dip);
765 filters_show_ipaddr(t->fs.type, t->fs.val.sip, t->fs.mask.sip);
766 printf(" %04x/%04x %04x/%04x",
767 t->fs.val.dport, t->fs.mask.dport,
768 t->fs.val.sport, t->fs.mask.sport);
771 * Variable length filter action.
773 if (t->fs.action == FILTER_DROP)
775 else if (t->fs.action == FILTER_SWITCH) {
776 printf(" Switch: port=%d", t->fs.eport);
779 ", dmac=%02x:%02x:%02x:%02x:%02x:%02x "
781 t->fs.dmac[0], t->fs.dmac[1],
782 t->fs.dmac[2], t->fs.dmac[3],
783 t->fs.dmac[4], t->fs.dmac[5],
787 ", smac=%02x:%02x:%02x:%02x:%02x:%02x "
789 t->fs.smac[0], t->fs.smac[1],
790 t->fs.smac[2], t->fs.smac[3],
791 t->fs.smac[4], t->fs.smac[5],
793 if (t->fs.newvlan == VLAN_REMOVE)
794 printf(", vlan=none");
795 else if (t->fs.newvlan == VLAN_INSERT)
796 printf(", vlan=insert(%x)", t->fs.vlan);
797 else if (t->fs.newvlan == VLAN_REWRITE)
798 printf(", vlan=rewrite(%x)", t->fs.vlan);
801 if (t->fs.dirsteer == 0) {
804 printf("(TCB=hash)");
806 printf("%d", t->fs.iq);
807 if (t->fs.dirsteerhash == 0)
823 uint32_t mode = 0, header = 0;
827 /* Get the global filter mode first */
828 rc = doit(CHELSIO_T4_GET_FILTER_MODE, &mode);
833 for (t.idx = 0; ; t.idx++) {
834 rc = doit(CHELSIO_T4_GET_FILTER, &t);
835 if (rc != 0 || t.idx == 0xffffffff)
839 do_show_info_header(mode);
842 do_show_one_filter_info(&t, mode);
849 get_filter_mode(void)
854 rc = doit(CHELSIO_T4_GET_FILTER_MODE, &mode);
858 if (mode & T4_FILTER_IPv4)
861 if (mode & T4_FILTER_IPv6)
864 if (mode & T4_FILTER_IP_SADDR)
867 if (mode & T4_FILTER_IP_DADDR)
870 if (mode & T4_FILTER_IP_SPORT)
873 if (mode & T4_FILTER_IP_DPORT)
876 if (mode & T4_FILTER_IP_FRAGMENT)
879 if (mode & T4_FILTER_MPS_HIT_TYPE)
880 printf("matchtype ");
882 if (mode & T4_FILTER_MAC_IDX)
885 if (mode & T4_FILTER_ETH_TYPE)
888 if (mode & T4_FILTER_IP_PROTO)
891 if (mode & T4_FILTER_IP_TOS)
894 if (mode & T4_FILTER_VLAN)
897 if (mode & T4_FILTER_VNIC)
898 printf("vnic/ovlan ");
900 if (mode & T4_FILTER_PORT)
903 if (mode & T4_FILTER_FCoE)
912 set_filter_mode(int argc, const char *argv[])
916 for (; argc; argc--, argv++) {
917 if (!strcmp(argv[0], "frag"))
918 mode |= T4_FILTER_IP_FRAGMENT;
920 if (!strcmp(argv[0], "matchtype"))
921 mode |= T4_FILTER_MPS_HIT_TYPE;
923 if (!strcmp(argv[0], "macidx"))
924 mode |= T4_FILTER_MAC_IDX;
926 if (!strcmp(argv[0], "ethtype"))
927 mode |= T4_FILTER_ETH_TYPE;
929 if (!strcmp(argv[0], "proto"))
930 mode |= T4_FILTER_IP_PROTO;
932 if (!strcmp(argv[0], "tos"))
933 mode |= T4_FILTER_IP_TOS;
935 if (!strcmp(argv[0], "vlan"))
936 mode |= T4_FILTER_VLAN;
938 if (!strcmp(argv[0], "ovlan") ||
939 !strcmp(argv[0], "vnic"))
940 mode |= T4_FILTER_VNIC;
942 if (!strcmp(argv[0], "iport"))
943 mode |= T4_FILTER_PORT;
945 if (!strcmp(argv[0], "fcoe"))
946 mode |= T4_FILTER_FCoE;
949 return doit(CHELSIO_T4_SET_FILTER_MODE, &mode);
953 del_filter(uint32_t idx)
959 return doit(CHELSIO_T4_DEL_FILTER, &t);
963 set_filter(uint32_t idx, int argc, const char *argv[])
965 int af = AF_UNSPEC, start_arg = 0;
969 warnc(EINVAL, "%s", __func__);
972 bzero(&t, sizeof (t));
976 for (start_arg = 0; start_arg + 2 <= argc; start_arg += 2) {
977 const char **args = &argv[start_arg];
980 if (!strcmp(argv[start_arg], "type")) {
982 if (!strcasecmp(argv[start_arg + 1], "ipv4"))
984 else if (!strcasecmp(argv[start_arg + 1], "ipv6"))
987 warnx("invalid type \"%s\"; "
988 "must be one of \"ipv4\" or \"ipv6\"",
989 argv[start_arg + 1]);
993 if (af != AF_UNSPEC && af != newaf) {
994 warnx("conflicting IPv4/IPv6 specifications.");
998 } else if (!parse_val_mask("fcoe", args, &val, &mask)) {
1000 t.fs.mask.fcoe = mask;
1001 } else if (!parse_val_mask("iport", args, &val, &mask)) {
1002 t.fs.val.iport = val;
1003 t.fs.mask.iport = mask;
1004 } else if (!parse_val_mask("ovlan", args, &val, &mask)) {
1005 t.fs.val.vnic = val;
1006 t.fs.mask.vnic = mask;
1007 t.fs.val.vnic_vld = 1;
1008 t.fs.mask.vnic_vld = 1;
1009 } else if (!parse_val_mask("vnic", args, &val, &mask)) {
1010 t.fs.val.vnic = val;
1011 t.fs.mask.vnic = mask;
1012 t.fs.val.vnic_vld = 1;
1013 t.fs.mask.vnic_vld = 1;
1014 } else if (!parse_val_mask("ivlan", args, &val, &mask)) {
1015 t.fs.val.vlan = val;
1016 t.fs.mask.vlan = mask;
1017 t.fs.val.vlan_vld = 1;
1018 t.fs.mask.vlan_vld = 1;
1019 } else if (!parse_val_mask("tos", args, &val, &mask)) {
1021 t.fs.mask.tos = mask;
1022 } else if (!parse_val_mask("proto", args, &val, &mask)) {
1023 t.fs.val.proto = val;
1024 t.fs.mask.proto = mask;
1025 } else if (!parse_val_mask("ethtype", args, &val, &mask)) {
1026 t.fs.val.ethtype = val;
1027 t.fs.mask.ethtype = mask;
1028 } else if (!parse_val_mask("macidx", args, &val, &mask)) {
1029 t.fs.val.macidx = val;
1030 t.fs.mask.macidx = mask;
1031 } else if (!parse_val_mask("matchtype", args, &val, &mask)) {
1032 t.fs.val.matchtype = val;
1033 t.fs.mask.matchtype = mask;
1034 } else if (!parse_val_mask("frag", args, &val, &mask)) {
1035 t.fs.val.frag = val;
1036 t.fs.mask.frag = mask;
1037 } else if (!parse_val_mask("dport", args, &val, &mask)) {
1038 t.fs.val.dport = val;
1039 t.fs.mask.dport = mask;
1040 } else if (!parse_val_mask("sport", args, &val, &mask)) {
1041 t.fs.val.sport = val;
1042 t.fs.mask.sport = mask;
1043 } else if (!parse_ipaddr("dip", args, &af, t.fs.val.dip,
1046 } else if (!parse_ipaddr("sip", args, &af, t.fs.val.sip,
1049 } else if (!strcmp(argv[start_arg], "action")) {
1050 if (!strcmp(argv[start_arg + 1], "pass"))
1051 t.fs.action = FILTER_PASS;
1052 else if (!strcmp(argv[start_arg + 1], "drop"))
1053 t.fs.action = FILTER_DROP;
1054 else if (!strcmp(argv[start_arg + 1], "switch"))
1055 t.fs.action = FILTER_SWITCH;
1057 warnx("invalid action \"%s\"; must be one of"
1058 " \"pass\", \"drop\" or \"switch\"",
1059 argv[start_arg + 1]);
1062 } else if (!parse_val("hitcnts", args, &val)) {
1064 } else if (!parse_val("prio", args, &val)) {
1066 } else if (!parse_val("rpttid", args, &val)) {
1068 } else if (!parse_val("queue", args, &val)) {
1071 } else if (!parse_val("tcbhash", args, &val)) {
1073 t.fs.dirsteerhash = 1;
1074 } else if (!parse_val("eport", args, &val)) {
1076 } else if (!strcmp(argv[start_arg], "dmac")) {
1077 struct ether_addr *daddr;
1079 daddr = ether_aton(argv[start_arg + 1]);
1080 if (daddr == NULL) {
1081 warnx("invalid dmac address \"%s\"",
1082 argv[start_arg + 1]);
1085 memcpy(t.fs.dmac, daddr, ETHER_ADDR_LEN);
1087 } else if (!strcmp(argv[start_arg], "smac")) {
1088 struct ether_addr *saddr;
1090 saddr = ether_aton(argv[start_arg + 1]);
1091 if (saddr == NULL) {
1092 warnx("invalid smac address \"%s\"",
1093 argv[start_arg + 1]);
1096 memcpy(t.fs.smac, saddr, ETHER_ADDR_LEN);
1098 } else if (!strcmp(argv[start_arg], "vlan")) {
1100 if (!strcmp(argv[start_arg + 1], "none")) {
1101 t.fs.newvlan = VLAN_REMOVE;
1102 } else if (argv[start_arg + 1][0] == '=') {
1103 t.fs.newvlan = VLAN_REWRITE;
1104 } else if (argv[start_arg + 1][0] == '+') {
1105 t.fs.newvlan = VLAN_INSERT;
1106 } else if (isdigit(argv[start_arg + 1][0]) &&
1107 !parse_val_mask("vlan", args, &val, &mask)) {
1108 t.fs.val.vlan = val;
1109 t.fs.mask.vlan = mask;
1110 t.fs.val.vlan_vld = 1;
1111 t.fs.mask.vlan_vld = 1;
1113 warnx("unknown vlan parameter \"%s\"; must"
1114 " be one of \"none\", \"=<vlan>\", "
1115 " \"+<vlan>\", or \"<vlan>\"",
1116 argv[start_arg + 1]);
1119 if (t.fs.newvlan == VLAN_REWRITE ||
1120 t.fs.newvlan == VLAN_INSERT) {
1121 t.fs.vlan = strtoul(argv[start_arg + 1] + 1,
1123 if (p == argv[start_arg + 1] + 1 || p[0] != 0) {
1124 warnx("invalid vlan \"%s\"",
1125 argv[start_arg + 1]);
1130 warnx("invalid parameter \"%s\"", argv[start_arg]);
1134 if (start_arg != argc) {
1135 warnx("no value for \"%s\"", argv[start_arg]);
1140 * Check basic sanity of option combinations.
1142 if (t.fs.action != FILTER_SWITCH &&
1143 (t.fs.eport || t.fs.newdmac || t.fs.newsmac || t.fs.newvlan)) {
1144 warnx("prio, port dmac, smac and vlan only make sense with"
1145 " \"action switch\"");
1148 if (t.fs.action != FILTER_PASS &&
1149 (t.fs.rpttid || t.fs.dirsteer || t.fs.maskhash)) {
1150 warnx("rpttid, queue and tcbhash don't make sense with"
1151 " action \"drop\" or \"switch\"");
1155 t.fs.type = (af == AF_INET6 ? 1 : 0); /* default IPv4 */
1156 return doit(CHELSIO_T4_SET_FILTER, &t);
1160 filter_cmd(int argc, const char *argv[])
1167 warnx("filter: no arguments.");
1172 if (strcmp(argv[0], "list") == 0) {
1174 warnx("trailing arguments after \"list\" ignored.");
1176 return show_filters();
1180 if (argc == 1 && strcmp(argv[0], "mode") == 0)
1181 return get_filter_mode();
1184 if (strcmp(argv[0], "mode") == 0)
1185 return set_filter_mode(argc - 1, argv + 1);
1188 s = str_to_number(argv[0], NULL, &val);
1189 if (*s || val > 0xffffffffU) {
1190 warnx("\"%s\" is neither an index nor a filter subcommand.",
1194 idx = (uint32_t) val;
1196 /* <idx> delete|clear */
1198 (strcmp(argv[1], "delete") == 0 || strcmp(argv[1], "clear") == 0)) {
1199 return del_filter(idx);
1202 /* <idx> [<param> <val>] ... */
1203 return set_filter(idx, argc - 1, argv + 1);
1207 * Shows the fields of a multi-word structure. The structure is considered to
1208 * consist of @nwords 32-bit words (i.e, it's an (@nwords * 32)-bit structure)
1209 * whose fields are described by @fd. The 32-bit words are given in @words
1210 * starting with the least significant 32-bit word.
1213 show_struct(const uint32_t *words, int nwords, const struct field_desc *fd)
1216 const struct field_desc *p;
1218 for (p = fd; p->name; p++)
1219 w = max(w, strlen(p->name));
1222 unsigned long long data;
1223 int first_word = fd->start / 32;
1224 int shift = fd->start % 32;
1225 int width = fd->end - fd->start + 1;
1226 unsigned long long mask = (1ULL << width) - 1;
1228 data = (words[first_word] >> shift) |
1229 ((uint64_t)words[first_word + 1] << (32 - shift));
1231 data |= ((uint64_t)words[first_word + 2] << (64 - shift));
1235 printf("%-*s ", w, fd->name);
1236 printf(fd->hex ? "%#llx\n" : "%llu\n", data << fd->shift);
1241 #define FIELD(name, start, end) { name, start, end, 0, 0, 0 }
1242 #define FIELD1(name, start) FIELD(name, start, start)
1245 show_sge_context(const struct t4_sge_context *p)
1247 static struct field_desc egress[] = {
1248 FIELD1("StatusPgNS:", 180),
1249 FIELD1("StatusPgRO:", 179),
1250 FIELD1("FetchNS:", 178),
1251 FIELD1("FetchRO:", 177),
1252 FIELD1("Valid:", 176),
1253 FIELD("PCIeDataChannel:", 174, 175),
1254 FIELD1("DCAEgrQEn:", 173),
1255 FIELD("DCACPUID:", 168, 172),
1256 FIELD1("FCThreshOverride:", 167),
1257 FIELD("WRLength:", 162, 166),
1258 FIELD1("WRLengthKnown:", 161),
1259 FIELD1("ReschedulePending:", 160),
1260 FIELD1("OnChipQueue:", 159),
1261 FIELD1("FetchSizeMode", 158),
1262 { "FetchBurstMin:", 156, 157, 4, 0, 1 },
1263 { "FetchBurstMax:", 153, 154, 6, 0, 1 },
1264 FIELD("uPToken:", 133, 152),
1265 FIELD1("uPTokenEn:", 132),
1266 FIELD1("UserModeIO:", 131),
1267 FIELD("uPFLCredits:", 123, 130),
1268 FIELD1("uPFLCreditEn:", 122),
1269 FIELD("FID:", 111, 121),
1270 FIELD("HostFCMode:", 109, 110),
1271 FIELD1("HostFCOwner:", 108),
1272 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 },
1273 FIELD("CIDX:", 89, 104),
1274 FIELD("PIDX:", 73, 88),
1275 { "BaseAddress:", 18, 72, 9, 1 },
1276 FIELD("QueueSize:", 2, 17),
1277 FIELD1("QueueType:", 1),
1278 FIELD1("CachePriority:", 0),
1281 static struct field_desc fl[] = {
1282 FIELD1("StatusPgNS:", 180),
1283 FIELD1("StatusPgRO:", 179),
1284 FIELD1("FetchNS:", 178),
1285 FIELD1("FetchRO:", 177),
1286 FIELD1("Valid:", 176),
1287 FIELD("PCIeDataChannel:", 174, 175),
1288 FIELD1("DCAEgrQEn:", 173),
1289 FIELD("DCACPUID:", 168, 172),
1290 FIELD1("FCThreshOverride:", 167),
1291 FIELD("WRLength:", 162, 166),
1292 FIELD1("WRLengthKnown:", 161),
1293 FIELD1("ReschedulePending:", 160),
1294 FIELD1("OnChipQueue:", 159),
1295 FIELD1("FetchSizeMode", 158),
1296 { "FetchBurstMin:", 156, 157, 4, 0, 1 },
1297 { "FetchBurstMax:", 153, 154, 6, 0, 1 },
1298 FIELD1("FLMcongMode:", 152),
1299 FIELD("MaxuPFLCredits:", 144, 151),
1300 FIELD("FLMcontextID:", 133, 143),
1301 FIELD1("uPTokenEn:", 132),
1302 FIELD1("UserModeIO:", 131),
1303 FIELD("uPFLCredits:", 123, 130),
1304 FIELD1("uPFLCreditEn:", 122),
1305 FIELD("FID:", 111, 121),
1306 FIELD("HostFCMode:", 109, 110),
1307 FIELD1("HostFCOwner:", 108),
1308 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 },
1309 FIELD("CIDX:", 89, 104),
1310 FIELD("PIDX:", 73, 88),
1311 { "BaseAddress:", 18, 72, 9, 1 },
1312 FIELD("QueueSize:", 2, 17),
1313 FIELD1("QueueType:", 1),
1314 FIELD1("CachePriority:", 0),
1317 static struct field_desc ingress[] = {
1318 FIELD1("NoSnoop:", 145),
1319 FIELD1("RelaxedOrdering:", 144),
1320 FIELD1("GTSmode:", 143),
1321 FIELD1("ISCSICoalescing:", 142),
1322 FIELD1("Valid:", 141),
1323 FIELD1("TimerPending:", 140),
1324 FIELD1("DropRSS:", 139),
1325 FIELD("PCIeChannel:", 137, 138),
1326 FIELD1("SEInterruptArmed:", 136),
1327 FIELD1("CongestionMgtEnable:", 135),
1328 FIELD1("DCAIngQEnable:", 134),
1329 FIELD("DCACPUID:", 129, 133),
1330 FIELD1("UpdateScheduling:", 128),
1331 FIELD("UpdateDelivery:", 126, 127),
1332 FIELD1("InterruptSent:", 125),
1333 FIELD("InterruptIDX:", 114, 124),
1334 FIELD1("InterruptDestination:", 113),
1335 FIELD1("InterruptArmed:", 112),
1336 FIELD("RxIntCounter:", 106, 111),
1337 FIELD("RxIntCounterThreshold:", 104, 105),
1338 FIELD1("Generation:", 103),
1339 { "BaseAddress:", 48, 102, 9, 1 },
1340 FIELD("PIDX:", 32, 47),
1341 FIELD("CIDX:", 16, 31),
1342 { "QueueSize:", 4, 15, 4, 0 },
1343 { "QueueEntrySize:", 2, 3, 4, 0, 1 },
1344 FIELD1("QueueEntryOverride:", 1),
1345 FIELD1("CachePriority:", 0),
1348 static struct field_desc flm[] = {
1349 FIELD1("NoSnoop:", 79),
1350 FIELD1("RelaxedOrdering:", 78),
1351 FIELD1("Valid:", 77),
1352 FIELD("DCACPUID:", 72, 76),
1353 FIELD1("DCAFLEn:", 71),
1354 FIELD("EQid:", 54, 70),
1355 FIELD("SplitEn:", 52, 53),
1356 FIELD1("PadEn:", 51),
1357 FIELD1("PackEn:", 50),
1358 FIELD1("DBpriority:", 48),
1359 FIELD("PackOffset:", 16, 47),
1360 FIELD("CIDX:", 8, 15),
1361 FIELD("PIDX:", 0, 7),
1364 static struct field_desc conm[] = {
1365 FIELD1("CngDBPHdr:", 6),
1366 FIELD1("CngDBPData:", 5),
1367 FIELD1("CngIMSG:", 4),
1368 { "CngChMap:", 0, 3, 0, 1, 0},
1371 static struct field_desc t5_conm[] = {
1372 FIELD1("CngMPSEnable:", 21),
1373 FIELD("CngTPMode:", 19, 20),
1374 FIELD1("CngDBPHdr:", 18),
1375 FIELD1("CngDBPData:", 17),
1376 FIELD1("CngIMSG:", 16),
1377 { "CngChMap:", 0, 15, 0, 1, 0},
1381 if (p->mem_id == SGE_CONTEXT_EGRESS)
1382 show_struct(p->data, 6, (p->data[0] & 2) ? fl : egress);
1383 else if (p->mem_id == SGE_CONTEXT_FLM)
1384 show_struct(p->data, 3, flm);
1385 else if (p->mem_id == SGE_CONTEXT_INGRESS)
1386 show_struct(p->data, 5, ingress);
1387 else if (p->mem_id == SGE_CONTEXT_CNM)
1388 show_struct(p->data, 1, chip_id == 5 ? t5_conm : conm);
1395 get_sge_context(int argc, const char *argv[])
1400 struct t4_sge_context cntxt = {0};
1403 warnx("sge_context: incorrect number of arguments.");
1407 if (!strcmp(argv[0], "egress"))
1408 cntxt.mem_id = SGE_CONTEXT_EGRESS;
1409 else if (!strcmp(argv[0], "ingress"))
1410 cntxt.mem_id = SGE_CONTEXT_INGRESS;
1411 else if (!strcmp(argv[0], "fl"))
1412 cntxt.mem_id = SGE_CONTEXT_FLM;
1413 else if (!strcmp(argv[0], "cong"))
1414 cntxt.mem_id = SGE_CONTEXT_CNM;
1416 warnx("unknown context type \"%s\"; known types are egress, "
1417 "ingress, fl, and cong.", argv[0]);
1421 p = str_to_number(argv[1], &cid, NULL);
1423 warnx("invalid context id \"%s\"", argv[1]);
1428 rc = doit(CHELSIO_T4_GET_SGE_CONTEXT, &cntxt);
1432 show_sge_context(&cntxt);
1437 loadfw(int argc, const char *argv[])
1440 struct t4_data data = {0};
1441 const char *fname = argv[0];
1442 struct stat st = {0};
1445 warnx("loadfw: incorrect number of arguments.");
1449 fd = open(fname, O_RDONLY);
1451 warn("open(%s)", fname);
1455 if (fstat(fd, &st) < 0) {
1461 data.len = st.st_size;
1462 data.data = mmap(0, data.len, PROT_READ, 0, fd, 0);
1463 if (data.data == MAP_FAILED) {
1469 rc = doit(CHELSIO_T4_LOAD_FW, &data);
1470 munmap(data.data, data.len);
1476 read_mem(uint32_t addr, uint32_t len, void (*output)(uint32_t *, uint32_t))
1479 struct t4_mem_range mr;
1483 mr.data = malloc(mr.len);
1486 warn("read_mem: malloc");
1490 rc = doit(CHELSIO_T4_GET_MEM, &mr);
1495 (*output)(mr.data, mr.len);
1502 * Display memory as list of 'n' 4-byte values per line.
1505 show_mem(uint32_t *buf, uint32_t len)
1511 for (i = 0; len && i < n; i++, buf++, len -= 4) {
1513 printf("%s%08x", s, htonl(*buf));
1520 memdump(int argc, const char *argv[])
1527 warnx("incorrect number of arguments.");
1531 p = str_to_number(argv[0], &l, NULL);
1533 warnx("invalid address \"%s\"", argv[0]);
1538 p = str_to_number(argv[1], &l, NULL);
1540 warnx("memdump: invalid length \"%s\"", argv[1]);
1545 return (read_mem(addr, len, show_mem));
1549 * Display TCB as list of 'n' 4-byte values per line.
1552 show_tcb(uint32_t *buf, uint32_t len)
1558 for (i = 0; len && i < n; i++, buf++, len -= 4) {
1560 printf("%s%08x", s, htonl(*buf));
1566 #define A_TP_CMM_TCB_BASE 0x7d10
1567 #define TCB_SIZE 128
1569 read_tcb(int argc, const char *argv[])
1579 warnx("incorrect number of arguments.");
1583 p = str_to_number(argv[0], &l, NULL);
1585 warnx("invalid tid \"%s\"", argv[0]);
1590 rc = read_reg(A_TP_CMM_TCB_BASE, 4, &val);
1594 addr = val + tid * TCB_SIZE;
1596 return (read_mem(addr, TCB_SIZE, show_tcb));
1600 read_i2c(int argc, const char *argv[])
1604 struct t4_i2c_data i2cd;
1607 if (argc < 3 || argc > 4) {
1608 warnx("incorrect number of arguments.");
1612 p = str_to_number(argv[0], &l, NULL);
1613 if (*p || l > UCHAR_MAX) {
1614 warnx("invalid port id \"%s\"", argv[0]);
1619 p = str_to_number(argv[1], &l, NULL);
1620 if (*p || l > UCHAR_MAX) {
1621 warnx("invalid i2c device address \"%s\"", argv[1]);
1626 p = str_to_number(argv[2], &l, NULL);
1627 if (*p || l > UCHAR_MAX) {
1628 warnx("invalid byte offset \"%s\"", argv[2]);
1634 p = str_to_number(argv[3], &l, NULL);
1635 if (*p || l > sizeof(i2cd.data)) {
1636 warnx("invalid number of bytes \"%s\"", argv[3]);
1643 rc = doit(CHELSIO_T4_GET_I2C, &i2cd);
1647 for (i = 0; i < i2cd.len; i++)
1648 printf("0x%x [%u]\n", i2cd.data[i], i2cd.data[i]);
1654 clearstats(int argc, const char *argv[])
1661 warnx("incorrect number of arguments.");
1665 p = str_to_number(argv[0], &l, NULL);
1667 warnx("invalid port id \"%s\"", argv[0]);
1672 return doit(CHELSIO_T4_CLEAR_STATS, &port);
1676 modinfo(int argc, const char *argv[])
1679 char string[16], *p;
1680 struct t4_i2c_data i2cd;
1682 uint16_t temp, vcc, tx_bias, tx_power, rx_power;
1685 warnx("must supply a port");
1689 p = str_to_number(argv[0], &port, NULL);
1690 if (*p || port > UCHAR_MAX) {
1691 warnx("invalid port id \"%s\"", argv[0]);
1695 bzero(&i2cd, sizeof(i2cd));
1697 i2cd.port_id = port;
1698 i2cd.dev_addr = SFF_8472_BASE;
1700 i2cd.offset = SFF_8472_ID;
1701 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
1704 if (i2cd.data[0] > SFF_8472_ID_LAST)
1705 printf("Unknown ID\n");
1707 printf("ID: %s\n", sff_8472_id[i2cd.data[0]]);
1709 bzero(&string, sizeof(string));
1710 for (i = SFF_8472_VENDOR_START; i < SFF_8472_VENDOR_END; i++) {
1712 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
1714 string[i - SFF_8472_VENDOR_START] = i2cd.data[0];
1716 printf("Vendor %s\n", string);
1718 bzero(&string, sizeof(string));
1719 for (i = SFF_8472_SN_START; i < SFF_8472_SN_END; i++) {
1721 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
1723 string[i - SFF_8472_SN_START] = i2cd.data[0];
1725 printf("SN %s\n", string);
1727 bzero(&string, sizeof(string));
1728 for (i = SFF_8472_PN_START; i < SFF_8472_PN_END; i++) {
1730 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
1732 string[i - SFF_8472_PN_START] = i2cd.data[0];
1734 printf("PN %s\n", string);
1736 bzero(&string, sizeof(string));
1737 for (i = SFF_8472_REV_START; i < SFF_8472_REV_END; i++) {
1739 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
1741 string[i - SFF_8472_REV_START] = i2cd.data[0];
1743 printf("Rev %s\n", string);
1745 i2cd.offset = SFF_8472_DIAG_TYPE;
1746 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
1749 if ((char )i2cd.data[0] & (SFF_8472_DIAG_IMPL |
1750 SFF_8472_DIAG_INTERNAL)) {
1752 /* Switch to reading from the Diagnostic address. */
1753 i2cd.dev_addr = SFF_8472_DIAG;
1756 i2cd.offset = SFF_8472_TEMP;
1757 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
1759 temp = i2cd.data[0] << 8;
1761 if ((temp & SFF_8472_TEMP_SIGN) == SFF_8472_TEMP_SIGN)
1765 printf("%dC\n", (temp & SFF_8472_TEMP_MSK) >>
1766 SFF_8472_TEMP_SHIFT);
1768 i2cd.offset = SFF_8472_VCC;
1769 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
1771 vcc = i2cd.data[0] << 8;
1772 printf("Vcc %fV\n", vcc / SFF_8472_VCC_FACTOR);
1774 i2cd.offset = SFF_8472_TX_BIAS;
1775 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
1777 tx_bias = i2cd.data[0] << 8;
1778 printf("TX Bias %fuA\n", tx_bias / SFF_8472_BIAS_FACTOR);
1780 i2cd.offset = SFF_8472_TX_POWER;
1781 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
1783 tx_power = i2cd.data[0] << 8;
1784 printf("TX Power %fmW\n", tx_power / SFF_8472_POWER_FACTOR);
1786 i2cd.offset = SFF_8472_RX_POWER;
1787 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
1789 rx_power = i2cd.data[0] << 8;
1790 printf("RX Power %fmW\n", rx_power / SFF_8472_POWER_FACTOR);
1793 printf("Diagnostics not supported.\n");
1799 warnx("No module/cable in port %ld", port);
1804 /* XXX: pass in a low/high and do range checks as well */
1806 get_sched_param(const char *param, const char *args[], long *val)
1810 if (strcmp(param, args[0]) != 0)
1813 p = str_to_number(args[1], val, NULL);
1815 warnx("parameter \"%s\" has bad value \"%s\"", args[0],
1824 sched_class(int argc, const char *argv[])
1826 struct t4_sched_params op;
1829 memset(&op, 0xff, sizeof(op));
1833 warnx("missing scheduling sub-command");
1836 if (!strcmp(argv[0], "config")) {
1837 op.subcmd = SCHED_CLASS_SUBCMD_CONFIG;
1838 op.u.config.minmax = -1;
1839 } else if (!strcmp(argv[0], "params")) {
1840 op.subcmd = SCHED_CLASS_SUBCMD_PARAMS;
1841 op.u.params.level = op.u.params.mode = op.u.params.rateunit =
1842 op.u.params.ratemode = op.u.params.channel =
1843 op.u.params.cl = op.u.params.minrate = op.u.params.maxrate =
1844 op.u.params.weight = op.u.params.pktsize = -1;
1846 warnx("invalid scheduling sub-command \"%s\"", argv[0]);
1850 /* Decode remaining arguments ... */
1852 for (i = 1; i < argc; i += 2) {
1853 const char **args = &argv[i];
1856 if (i + 1 == argc) {
1857 warnx("missing argument for \"%s\"", args[0]);
1862 if (!strcmp(args[0], "type")) {
1863 if (!strcmp(args[1], "packet"))
1864 op.type = SCHED_CLASS_TYPE_PACKET;
1866 warnx("invalid type parameter \"%s\"", args[1]);
1873 if (op.subcmd == SCHED_CLASS_SUBCMD_CONFIG) {
1874 if(!get_sched_param("minmax", args, &l))
1875 op.u.config.minmax = (int8_t)l;
1877 warnx("unknown scheduler config parameter "
1885 /* Rest applies only to SUBCMD_PARAMS */
1886 if (op.subcmd != SCHED_CLASS_SUBCMD_PARAMS)
1889 if (!strcmp(args[0], "level")) {
1890 if (!strcmp(args[1], "cl-rl"))
1891 op.u.params.level = SCHED_CLASS_LEVEL_CL_RL;
1892 else if (!strcmp(args[1], "cl-wrr"))
1893 op.u.params.level = SCHED_CLASS_LEVEL_CL_WRR;
1894 else if (!strcmp(args[1], "ch-rl"))
1895 op.u.params.level = SCHED_CLASS_LEVEL_CH_RL;
1897 warnx("invalid level parameter \"%s\"",
1901 } else if (!strcmp(args[0], "mode")) {
1902 if (!strcmp(args[1], "class"))
1903 op.u.params.mode = SCHED_CLASS_MODE_CLASS;
1904 else if (!strcmp(args[1], "flow"))
1905 op.u.params.mode = SCHED_CLASS_MODE_FLOW;
1907 warnx("invalid mode parameter \"%s\"", args[1]);
1910 } else if (!strcmp(args[0], "rate-unit")) {
1911 if (!strcmp(args[1], "bits"))
1912 op.u.params.rateunit = SCHED_CLASS_RATEUNIT_BITS;
1913 else if (!strcmp(args[1], "pkts"))
1914 op.u.params.rateunit = SCHED_CLASS_RATEUNIT_PKTS;
1916 warnx("invalid rate-unit parameter \"%s\"",
1920 } else if (!strcmp(args[0], "rate-mode")) {
1921 if (!strcmp(args[1], "relative"))
1922 op.u.params.ratemode = SCHED_CLASS_RATEMODE_REL;
1923 else if (!strcmp(args[1], "absolute"))
1924 op.u.params.ratemode = SCHED_CLASS_RATEMODE_ABS;
1926 warnx("invalid rate-mode parameter \"%s\"",
1930 } else if (!get_sched_param("channel", args, &l))
1931 op.u.params.channel = (int8_t)l;
1932 else if (!get_sched_param("class", args, &l))
1933 op.u.params.cl = (int8_t)l;
1934 else if (!get_sched_param("min-rate", args, &l))
1935 op.u.params.minrate = (int32_t)l;
1936 else if (!get_sched_param("max-rate", args, &l))
1937 op.u.params.maxrate = (int32_t)l;
1938 else if (!get_sched_param("weight", args, &l))
1939 op.u.params.weight = (int16_t)l;
1940 else if (!get_sched_param("pkt-size", args, &l))
1941 op.u.params.pktsize = (int16_t)l;
1943 warnx("unknown scheduler parameter \"%s\"", args[0]);
1949 * Catch some logical fallacies in terms of argument combinations here
1950 * so we can offer more than just the EINVAL return from the driver.
1951 * The driver will be able to catch a lot more issues since it knows
1952 * the specifics of the device hardware capabilities like how many
1953 * channels, classes, etc. the device supports.
1956 warnx("sched \"type\" parameter missing");
1959 if (op.subcmd == SCHED_CLASS_SUBCMD_CONFIG) {
1960 if (op.u.config.minmax < 0) {
1961 warnx("sched config \"minmax\" parameter missing");
1965 if (op.subcmd == SCHED_CLASS_SUBCMD_PARAMS) {
1966 if (op.u.params.level < 0) {
1967 warnx("sched params \"level\" parameter missing");
1970 if (op.u.params.mode < 0) {
1971 warnx("sched params \"mode\" parameter missing");
1974 if (op.u.params.rateunit < 0) {
1975 warnx("sched params \"rate-unit\" parameter missing");
1978 if (op.u.params.ratemode < 0) {
1979 warnx("sched params \"rate-mode\" parameter missing");
1982 if (op.u.params.channel < 0) {
1983 warnx("sched params \"channel\" missing");
1986 if (op.u.params.cl < 0) {
1987 warnx("sched params \"class\" missing");
1990 if (op.u.params.maxrate < 0 &&
1991 (op.u.params.level == SCHED_CLASS_LEVEL_CL_RL ||
1992 op.u.params.level == SCHED_CLASS_LEVEL_CH_RL)) {
1993 warnx("sched params \"max-rate\" missing for "
1994 "rate-limit level");
1997 if (op.u.params.weight < 0 &&
1998 op.u.params.level == SCHED_CLASS_LEVEL_CL_WRR) {
1999 warnx("sched params \"weight\" missing for "
2000 "weighted-round-robin level");
2003 if (op.u.params.pktsize < 0 &&
2004 (op.u.params.level == SCHED_CLASS_LEVEL_CL_RL ||
2005 op.u.params.level == SCHED_CLASS_LEVEL_CH_RL)) {
2006 warnx("sched params \"pkt-size\" missing for "
2007 "rate-limit level");
2010 if (op.u.params.mode == SCHED_CLASS_MODE_FLOW &&
2011 op.u.params.ratemode != SCHED_CLASS_RATEMODE_ABS) {
2012 warnx("sched params mode flow needs rate-mode absolute");
2015 if (op.u.params.ratemode == SCHED_CLASS_RATEMODE_REL &&
2016 !in_range(op.u.params.maxrate, 1, 100)) {
2017 warnx("sched params \"max-rate\" takes "
2018 "percentage value(1-100) for rate-mode relative");
2021 if (op.u.params.ratemode == SCHED_CLASS_RATEMODE_ABS &&
2022 !in_range(op.u.params.maxrate, 1, 10000000)) {
2023 warnx("sched params \"max-rate\" takes "
2024 "value(1-10000000) for rate-mode absolute");
2027 if (op.u.params.maxrate > 0 &&
2028 op.u.params.maxrate < op.u.params.minrate) {
2029 warnx("sched params \"max-rate\" is less than "
2036 warnx("%d error%s in sched-class command", errs,
2037 errs == 1 ? "" : "s");
2041 return doit(CHELSIO_T4_SCHED_CLASS, &op);
2045 sched_queue(int argc, const char *argv[])
2047 struct t4_sched_queue op = {0};
2052 /* need "<port> <queue> <class> */
2053 warnx("incorrect number of arguments.");
2057 p = str_to_number(argv[0], &val, NULL);
2058 if (*p || val > UCHAR_MAX) {
2059 warnx("invalid port id \"%s\"", argv[0]);
2062 op.port = (uint8_t)val;
2064 if (!strcmp(argv[1], "all") || !strcmp(argv[1], "*"))
2067 p = str_to_number(argv[1], &val, NULL);
2068 if (*p || val < -1) {
2069 warnx("invalid queue \"%s\"", argv[1]);
2072 op.queue = (int8_t)val;
2075 if (!strcmp(argv[2], "unbind") || !strcmp(argv[2], "clear"))
2078 p = str_to_number(argv[2], &val, NULL);
2079 if (*p || val < -1) {
2080 warnx("invalid class \"%s\"", argv[2]);
2083 op.cl = (int8_t)val;
2086 return doit(CHELSIO_T4_SCHED_QUEUE, &op);
2090 run_cmd(int argc, const char *argv[])
2093 const char *cmd = argv[0];
2099 if (!strcmp(cmd, "reg") || !strcmp(cmd, "reg32"))
2100 rc = register_io(argc, argv, 4);
2101 else if (!strcmp(cmd, "reg64"))
2102 rc = register_io(argc, argv, 8);
2103 else if (!strcmp(cmd, "regdump"))
2104 rc = dump_regs(argc, argv);
2105 else if (!strcmp(cmd, "filter"))
2106 rc = filter_cmd(argc, argv);
2107 else if (!strcmp(cmd, "context"))
2108 rc = get_sge_context(argc, argv);
2109 else if (!strcmp(cmd, "loadfw"))
2110 rc = loadfw(argc, argv);
2111 else if (!strcmp(cmd, "memdump"))
2112 rc = memdump(argc, argv);
2113 else if (!strcmp(cmd, "tcb"))
2114 rc = read_tcb(argc, argv);
2115 else if (!strcmp(cmd, "i2c"))
2116 rc = read_i2c(argc, argv);
2117 else if (!strcmp(cmd, "clearstats"))
2118 rc = clearstats(argc, argv);
2119 else if (!strcmp(cmd, "modinfo"))
2120 rc = modinfo(argc, argv);
2121 else if (!strcmp(cmd, "sched-class"))
2122 rc = sched_class(argc, argv);
2123 else if (!strcmp(cmd, "sched-queue"))
2124 rc = sched_queue(argc, argv);
2127 warnx("invalid command \"%s\"", cmd);
2138 char buffer[128], *buf;
2139 const char *args[MAX_ARGS + 1];
2142 * Simple loop: displays a "> " prompt and processes any input as a
2143 * cxgbetool command. You're supposed to enter only the part after
2144 * "cxgbetool t4nexX". Use "quit" or "exit" to exit.
2147 fprintf(stdout, "> ");
2149 buf = fgets(buffer, sizeof(buffer), stdin);
2151 if (ferror(stdin)) {
2152 warn("stdin error");
2153 rc = errno; /* errno from fgets */
2159 while ((args[i] = strsep(&buf, " \t\n")) != NULL) {
2160 if (args[i][0] != 0 && ++i == MAX_ARGS)
2166 continue; /* skip empty line */
2168 if (!strcmp(args[0], "quit") || !strcmp(args[0], "exit"))
2171 rc = run_cmd(i, args);
2174 /* rc normally comes from the last command (not including quit/exit) */
2179 main(int argc, const char *argv[])
2186 if (!strcmp(argv[1], "-h") || !strcmp(argv[1], "--help")) {
2199 /* progname and nexus */
2203 if (argc == 1 && !strcmp(argv[0], "stdio"))
2204 rc = run_cmd_loop();
2206 rc = run_cmd(argc, argv);