2 * Copyright (c) 2002-2006 Bruce M. Simpson.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. Neither the name of Bruce M. Simpson nor the names of
14 * contributors may be used to endorse or promote products derived
15 * from this software without specific prior written permission.
17 * THIS SOFTWARE IS PROVIDED BY BRUCE M. SIMPSON AND AFFILIATES
18 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
19 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
20 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
21 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
25 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
27 * POSSIBILITY OF SUCH DAMAGE.
30 #include <sys/cdefs.h>
31 __FBSDID("$FreeBSD$");
33 #include <sys/types.h>
34 #include <sys/ioctl.h>
36 #include <sys/memrange.h>
38 #include <machine/endian.h>
50 #define _PATH_DEVMEM "/dev/mem"
54 pir_table_t *find_pir_table(unsigned char *base);
55 void dump_pir_table(pir_table_t *pir, char *map_addr);
56 void pci_print_irqmask(uint16_t irqs);
57 void print_irq_line(int entry, pir_entry_t *p, char line, uint8_t link,
59 char *lookup_southbridge(uint32_t id);
61 char *progname = NULL;
64 main(int argc, char *argv[])
69 pir_table_t *pir = NULL;
70 void *map_addr = MAP_FAILED;
73 progname = basename(argv[0]);
74 while ((ch = getopt(argc, argv, "h")) != -1)
88 * Map the PIR region into our process' linear space.
90 if ((mem_fd = open(_PATH_DEVMEM, O_RDONLY)) == -1) {
94 map_addr = mmap(NULL, PIR_SIZE, PROT_READ, MAP_SHARED, mem_fd,
96 if (map_addr == MAP_FAILED) {
101 * Find and print the PIR table.
103 if ((pir = find_pir_table(map_addr)) == NULL) {
104 fprintf(stderr, "PIR table signature not found.\r\n");
106 dump_pir_table(pir, map_addr);
111 if (map_addr != MAP_FAILED)
112 munmap(map_addr, PIR_SIZE);
116 exit ((err == 0) ? EXIT_SUCCESS : EXIT_FAILURE);
123 fprintf(stderr, "usage: %s [-h]\r\n", progname);
124 fprintf(stderr, "-h\tdisplay this message\r\n", progname);
132 fprintf(stderr, "PIRTOOL (c) 2002-2006 Bruce M. Simpson\r\n");
134 "---------------------------------------------\r\n\r\n");
138 find_pir_table(unsigned char *base)
140 unsigned int csum = 0;
141 unsigned char *p, *pend;
142 pir_table_t *pir = NULL;
145 * From Microsoft's PCI IRQ Routing Table Specification 1.0:
147 * The PCI IRQ Routing Table can be detected by searching the
148 * system memory from F0000h to FFFFFh at every 16-byte boundary
149 * for the PCI IRQ routing signature ("$PIR").
151 pend = base + PIR_SIZE;
152 for (p = base; p < pend; p += 16) {
153 if (strncmp(p, "$PIR", 4) == 0) {
154 pir = (pir_table_t *)p;
160 * Now validate the table:
161 * Version: Must be 1.0.
162 * Table size: Must be larger than 32 and must be a multiple of 16.
163 * Checksum: The entire structure's checksum must be 0.
165 if (pir && (pir->major == 1) && (pir->minor == 0) &&
166 (pir->size > 32) && ((pir->size % 16) == 0)) {
167 p = (unsigned char *)pir;
168 pend = p + pir->size;
173 if ((csum % 256) != 0)
175 "WARNING: PIR table checksum is invalid.\n");
178 return ((pir_table_t *)pir);
182 pci_print_irqmask(uint16_t irqs)
191 for (i = 0; i < 16; i++, irqs >>= 1)
202 dump_pir_table(pir_table_t *pir, char *map_addr)
205 pir_entry_t *p, *pend;
207 num_slots = (pir->size - offsetof(pir_table_t, entry[0])) / 16;
209 printf( "PCI Interrupt Routing Table at 0x%08lX\r\n"
210 "-----------------------------------------\r\n"
211 "0x%02x: Signature: %c%c%c%c\r\n"
212 "0x%02x: Version: %u.%u\r\n"
213 "0x%02x: Size: %u bytes (%u entries)\r\n"
214 "0x%02x: Device: %u:%u:%u\r\n",
215 (uint32_t)(((char *)pir - map_addr) + PIR_BASE),
216 offsetof(pir_table_t, signature),
217 ((char *)&pir->signature)[0],
218 ((char *)&pir->signature)[1],
219 ((char *)&pir->signature)[2],
220 ((char *)&pir->signature)[3],
221 offsetof(pir_table_t, minor),
222 pir->major, pir->minor,
223 offsetof(pir_table_t, size),
226 offsetof(pir_table_t, bus),
228 PIR_DEV(pir->devfunc),
229 PIR_FUNC(pir->devfunc));
231 "0x%02x: PCI Exclusive IRQs: ",
232 offsetof(pir_table_t, excl_irqs));
233 pci_print_irqmask(pir->excl_irqs);
235 "0x%02x: Compatible with: 0x%08X %s\r\n"
236 "0x%02x: Miniport Data: 0x%08X\r\n"
237 "0x%02x: Checksum: 0x%02X\r\n"
239 offsetof(pir_table_t, compatible),
241 lookup_southbridge(pir->compatible),
242 offsetof(pir_table_t, miniport_data),
244 offsetof(pir_table_t, checksum),
247 p = pend = &pir->entry[0];
249 printf("Entry Location Bus Device Pin Link IRQs\n");
250 for (i = 0; p < pend; i++, p++) {
251 print_irq_line(i, p, 'A', p->inta_link, p->inta_irqs);
252 print_irq_line(i, p, 'B', p->intb_link, p->intb_irqs);
253 print_irq_line(i, p, 'C', p->intc_link, p->intc_irqs);
254 print_irq_line(i, p, 'D', p->intd_link, p->intd_irqs);
259 * Print interrupt map for a given PCI interrupt line.
262 print_irq_line(int entry, pir_entry_t *p, char line, uint8_t link,
269 printf("%3d ", entry);
273 printf("slot %-3d ", p->slot);
275 printf(" %3d %3d %c 0x%02x ", p->bus, PIR_DEV(p->devfunc),
277 pci_print_irqmask(irqs);
282 * Lookup textual descriptions for commonly-used south-bridges.
285 lookup_southbridge(uint32_t id)
290 return ("ALi M1573 (Hypertransport)");
292 return ("VIA VT82C686/686A/686B (Apollo)");
294 return ("Intel 82371FB (Triton I/PIIX)");
296 return ("Intel 82801FBM (ICH6M)");
298 return ("Intel 82371SB (Natoma/Triton II/PIIX3)");
300 return ("unknown chipset");