2 .TH "TBLGEN" "1" "2012-08-16" "3.2" "LLVM"
4 tblgen \- Target Description To C++ Code Generator
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36 \fBtblgen\fP [\fIoptions\fP] [\fIfilename\fP]
39 \fBtblgen\fP translates from target description (.td) files into C++ code that can
40 be included in the definition of an LLVM target library. Most users of LLVM will
41 not need to use this program. It is only for assisting with writing an LLVM
44 The input and output of \fBtblgen\fP is beyond the scope of this short
45 introduction. Please see the \fICodeGeneration\fP page in the LLVM documentation.
47 The \fIfilename\fP argument specifies the name of a Target Description (.td) file
54 Print a summary of command line options.
58 \fB\-o\fP \fIfilename\fP
61 Specify the output file name. If \fIfilename\fP is \fB\-\fP, then \fBtblgen\fP
62 sends its output to standard output.
66 \fB\-I\fP \fIdirectory\fP
69 Specify where to find other target description files for inclusion. The
70 \fIdirectory\fP value should be a full or partial path to a directory that contains
71 target description files.
75 \fB\-asmparsernum\fP \fIN\fP
78 Make \-gen\-asm\-parser emit assembly writer number \fIN\fP.
82 \fB\-asmwriternum\fP \fIN\fP
85 Make \-gen\-asm\-writer emit assembly writer number \fIN\fP.
89 \fB\-class\fP \fIclass Name\fP
92 Print the enumeration list for this class.
96 \fB\-print\-records\fP
99 Print all records to standard output (default).
106 Print enumeration values for a class.
113 Print expanded sets for testing DAG exprs.
120 Generate machine code emitter.
124 \fB\-gen\-register\-info\fP
127 Generate registers and register classes info.
131 \fB\-gen\-instr\-info\fP
134 Generate instruction descriptions.
138 \fB\-gen\-asm\-writer\fP
141 Generate the assembly writer.
145 \fB\-gen\-disassembler\fP
148 Generate disassembler.
152 \fB\-gen\-pseudo\-lowering\fP
155 Generate pseudo instruction lowering.
159 \fB\-gen\-dag\-isel\fP
162 Generate a DAG (Directed Acycle Graph) instruction selector.
166 \fB\-gen\-asm\-matcher\fP
169 Generate assembly instruction matcher.
173 \fB\-gen\-dfa\-packetizer\fP
176 Generate DFA Packetizer for VLIW targets.
180 \fB\-gen\-fast\-isel\fP
183 Generate a "fast" instruction selector.
187 \fB\-gen\-subtarget\fP
190 Generate subtarget enumerations.
194 \fB\-gen\-intrinsic\fP
197 Generate intrinsic information.
201 \fB\-gen\-tgt\-intrinsic\fP
204 Generate target intrinsic information.
208 \fB\-gen\-enhanced\-disassembly\-info\fP
211 Generate enhanced disassembly info.
218 Show the version number of this program.
223 If \fBtblgen\fP succeeds, it will exit with 0. Otherwise, if an error
224 occurs, it will exit with a non\-zero value.
226 Maintained by The LLVM Team (http://llvm.org/).
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