2 * Copyright (c) 2013 Neel Natu <neel@freebsd.org>
3 * Copyright (c) 2013 Tycho Nightingale <tycho.nightingale@pluribusnetworks.com>
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 #include <sys/cdefs.h>
31 __FBSDID("$FreeBSD$");
33 #include <sys/types.h>
34 #include <machine/vmm.h>
35 #include <machine/vmm_dev.h>
47 #include "uart_emul.h"
52 SET_DECLARE(lpc_dsdt_set, struct lpc_dsdt);
53 SET_DECLARE(lpc_sysres_set, struct lpc_sysres);
55 #define ELCR_PORT 0x4d0
56 SYSRES_IO(ELCR_PORT, 2);
58 #define IO_TIMER1_PORT 0x40
60 #define NMISC_PORT 0x61
61 SYSRES_IO(NMISC_PORT, 1);
63 static struct pci_devinst *lpc_bridge;
65 #define LPC_UART_NUM 2
66 static struct lpc_uart_softc {
67 struct uart_softc *uart_softc;
72 } lpc_uart_softc[LPC_UART_NUM];
74 static const char *lpc_uart_names[LPC_UART_NUM] = { "COM1", "COM2" };
77 * LPC device configuration is in the following form:
78 * <lpc_device_name>[,<options>]
79 * For e.g. "com1,stdio"
82 lpc_device_parse(const char *opts)
85 char *str, *cpy, *lpcdev;
88 str = cpy = strdup(opts);
89 lpcdev = strsep(&str, ",");
91 for (unit = 0; unit < LPC_UART_NUM; unit++) {
92 if (strcasecmp(lpcdev, lpc_uart_names[unit]) == 0) {
93 lpc_uart_softc[unit].opts = str;
108 lpc_uart_intr_assert(void *arg)
110 struct lpc_uart_softc *sc = arg;
112 assert(sc->irq >= 0);
114 vm_isa_pulse_irq(lpc_bridge->pi_vmctx, sc->irq, sc->irq);
118 lpc_uart_intr_deassert(void *arg)
121 * The COM devices on the LPC bus generate edge triggered interrupts,
122 * so nothing more to do here.
127 lpc_uart_io_handler(struct vmctx *ctx, int vcpu, int in, int port, int bytes,
128 uint32_t *eax, void *arg)
131 struct lpc_uart_softc *sc = arg;
136 offset = port - sc->iobase;
139 *eax = uart_read(sc->uart_softc, offset);
141 uart_write(sc->uart_softc, offset, *eax);
149 struct lpc_uart_softc *sc;
150 struct inout_port iop;
155 for (unit = 0; unit < LPC_UART_NUM; unit++) {
156 sc = &lpc_uart_softc[unit];
157 name = lpc_uart_names[unit];
159 if (uart_legacy_alloc(unit, &sc->iobase, &sc->irq) != 0) {
160 fprintf(stderr, "Unable to allocate resources for "
161 "LPC device %s\n", name);
165 sc->uart_softc = uart_init(lpc_uart_intr_assert,
166 lpc_uart_intr_deassert, sc);
168 if (uart_set_backend(sc->uart_softc, sc->opts) != 0) {
169 fprintf(stderr, "Unable to initialize backend '%s' "
170 "for LPC device %s\n", sc->opts, name);
174 bzero(&iop, sizeof(struct inout_port));
176 iop.port = sc->iobase;
177 iop.size = UART_IO_BAR_SIZE;
178 iop.flags = IOPORT_F_INOUT;
179 iop.handler = lpc_uart_io_handler;
182 error = register_inout(&iop);
191 pci_lpc_write_dsdt(struct pci_devinst *pi)
193 struct lpc_dsdt **ldpp, *ldp;
196 dsdt_line("Device (ISA)");
198 dsdt_line(" Name (_ADR, 0x%04X%04X)", pi->pi_slot, pi->pi_func);
199 dsdt_line(" OperationRegion (P40C, PCI_Config, 0x60, 0x04)");
202 SET_FOREACH(ldpp, lpc_dsdt_set) {
208 dsdt_line("Device (PIC)");
210 dsdt_line(" Name (_HID, EisaId (\"PNP0000\"))");
211 dsdt_line(" Name (_CRS, ResourceTemplate ()");
214 dsdt_fixed_ioport(IO_ICU1, 2);
215 dsdt_fixed_ioport(IO_ICU2, 2);
222 dsdt_line("Device (TIMR)");
224 dsdt_line(" Name (_HID, EisaId (\"PNP0100\"))");
225 dsdt_line(" Name (_CRS, ResourceTemplate ()");
228 dsdt_fixed_ioport(IO_TIMER1_PORT, 4);
239 pci_lpc_sysres_dsdt(void)
241 struct lpc_sysres **lspp, *lsp;
244 dsdt_line("Device (SIO)");
246 dsdt_line(" Name (_HID, EisaId (\"PNP0C02\"))");
247 dsdt_line(" Name (_CRS, ResourceTemplate ()");
251 SET_FOREACH(lspp, lpc_sysres_set) {
255 dsdt_fixed_ioport(lsp->base, lsp->length);
258 dsdt_fixed_mem32(lsp->base, lsp->length);
267 LPC_DSDT(pci_lpc_sysres_dsdt);
270 pci_lpc_uart_dsdt(void)
272 struct lpc_uart_softc *sc;
275 for (unit = 0; unit < LPC_UART_NUM; unit++) {
276 sc = &lpc_uart_softc[unit];
280 dsdt_line("Device (%s)", lpc_uart_names[unit]);
282 dsdt_line(" Name (_HID, EisaId (\"PNP0501\"))");
283 dsdt_line(" Name (_UID, %d)", unit + 1);
284 dsdt_line(" Name (_CRS, ResourceTemplate ()");
287 dsdt_fixed_ioport(sc->iobase, UART_IO_BAR_SIZE);
288 dsdt_fixed_irq(sc->irq);
294 LPC_DSDT(pci_lpc_uart_dsdt);
297 pci_lpc_write(struct vmctx *ctx, int vcpu, struct pci_devinst *pi,
298 int baridx, uint64_t offset, int size, uint64_t value)
303 pci_lpc_read(struct vmctx *ctx, int vcpu, struct pci_devinst *pi,
304 int baridx, uint64_t offset, int size)
309 #define LPC_DEV 0x7000
310 #define LPC_VENDOR 0x8086
313 pci_lpc_init(struct vmctx *ctx, struct pci_devinst *pi, char *opts)
316 * Do not allow more than one LPC bridge to be configured.
318 if (lpc_bridge != NULL) {
319 fprintf(stderr, "Only one LPC bridge is allowed.\n");
324 * Enforce that the LPC can only be configured on bus 0. This
325 * simplifies the ACPI DSDT because it can provide a decode for
326 * all legacy i/o ports behind bus 0.
328 if (pi->pi_bus != 0) {
329 fprintf(stderr, "LPC bridge can be present only on bus 0.\n");
336 /* initialize config space */
337 pci_set_cfgdata16(pi, PCIR_DEVICE, LPC_DEV);
338 pci_set_cfgdata16(pi, PCIR_VENDOR, LPC_VENDOR);
339 pci_set_cfgdata8(pi, PCIR_CLASS, PCIC_BRIDGE);
340 pci_set_cfgdata8(pi, PCIR_SUBCLASS, PCIS_BRIDGE_ISA);
347 struct pci_devemu pci_de_lpc = {
349 .pe_init = pci_lpc_init,
350 .pe_write_dsdt = pci_lpc_write_dsdt,
351 .pe_barwrite = pci_lpc_write,
352 .pe_barread = pci_lpc_read
354 PCI_EMUL_SET(pci_de_lpc);