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(parent: d6aa611) | patch
MFC r202011:
authormav <mav@ccf9f872-aa2e-dd11-9fc8-001c23d0bc1f>
Fri, 15 Jan 2010 23:58:37 +0000 (23:58 +0000)
committermav <mav@ccf9f872-aa2e-dd11-9fc8-001c23d0bc1f>
Fri, 15 Jan 2010 23:58:37 +0000 (23:58 +0000)
commit0061129b4e724e3e8164bf27bd350fc1405efd24
tree7626781ea2fafb0fa184caf1fee07aebc911f780tree | snapshot
parentd6aa6112b64012a8a1503bddeb55e165d516cd08commit | diff
MFC r202011:
While AHCI specification tells that multi-vector MSI doesn't use global IS
register, nVidia chipsets have different oppinion, requiring every interrupt
to be acknowledged there.

While there, add interrupt descriptions in multi-vector MSI mode.

git-svn-id: svn://svn.freebsd.org/base/stable/8@202428 ccf9f872-aa2e-dd11-9fc8-001c23d0bc1f
sys/dev/ahci/ahci.c diff | blob | history
8-STABLE