MFC r228333,228335-228336,228362,228368-228369,228381:

MFC r228333,228335-228336,228362,228368-228369,228381:
r228333:
  Protect SIOCSIFMTU ioctl handler with driver lock.
  Don't blindly re-initialize controller whenever MTU is changed.
  Now, reinitializing is done only when driver is running.

  While here, remove unnecessary assignment of error value since it
  was already initialized to 0.

r228335:
  Consistently use a tab character instead of using either a space or
  tab after #define.
  While I'm here consistently use capital letters when it uses
  hexadecimal notation.

  No functional changes.

r228336:
  Disable all clocks and put PHY into COMA before entering into
  suspend state.  This will save more power.
  On resume, make sure to enable all clocks.  While I'm here, if
  controller is not fast ethernet, enable gigabit PHY.

r228362:
  Do not disable interrupt without knowing whether the raised
  interrupt is ours.  Note, interrupts are automatically ACKed when
  the status register is read.
  Add RX/TX DMA error to interrupt handler and do full controller
  reset if driver happen to encounter these errors.  There is no way
  to recover from these DMA errors without controller reset.
  Rename local variable name intrs with status to enhance
  readability.

  While I'm here, rename ET_INTR_TXEOF and ET_INTR_RXEOF to
  ET_INTR_TXDMA and ET_INTR_RXDMA respectively.  These interrupts
  indicate that a frame is successfully DMAed to controller's
  internal FIFO and they have nothing to do with EOF(end of frame).
  Driver does not need to wait actual end of TX/RX of a frame(e.g.
  no need to wait the end signal of TX which is generated when a
  frame in TX FIFO is emptied by MAC).  Previous names were somewhat
  confusing.

r228368:
  Remove unnecessary definition of ET_PCIR_BAR.  Controller support
  I/O memory only.
  While here, use pci_set_max_read_req(9) rather than directly
  manipulating PCIe device control register.

r228369:
  Announce flow control ability to PHY driver and enable RX flow
  control.  Controller does not automatically generate pause frames
  based on number of available RX buffers so it's very hard to
  know when driver should generate XON frame in time.  The only
  mechanism driver can detect low number of RX buffer condition is
  ET_INTR_RXRING0_LOW or ET_INTR_RXRING1_LOW interrupt.  This
  interrupt is generated whenever controller notices the number of
  available RX buffers are lower than pre-programmed value(
  ET_RX_RING0_MINCNT and ET_RX_RING1_MINCNT register).  This scheme
  does not provide a way to detect when controller sees enough number
  of RX buffers again such that efficient generation of XON/XOFF
  frame is not easy.

  While here, add more flow control related register definition.

r228381:
  FreeBSD driver does not require arpcom structure in softc.

git-svn-id: svn://svn.freebsd.org/base/stable/9@229736 ccf9f872-aa2e-dd11-9fc8-001c23d0bc1f