]> CyberLeo.Net >> Repos - FreeBSD/stable/10.git/commit
MFC r264601,264646,265766,267918,267919,267920:
authorbz <bz@ccf9f872-aa2e-dd11-9fc8-001c23d0bc1f>
Sat, 16 Aug 2014 14:30:46 +0000 (14:30 +0000)
committerbz <bz@ccf9f872-aa2e-dd11-9fc8-001c23d0bc1f>
Sat, 16 Aug 2014 14:30:46 +0000 (14:30 +0000)
commit12979472bf9c8c4698be04164427b4a3c03afdd8
tree2e9e4d8baaaca117b28843cb22304f8d0646dea9
parenta92c73e17cb262e30eff6fb27b44ca5893d7b5e0
MFC r264601,264646,265766,267918,267919,267920:

 Merge if_nf10bmac(4), a driver to support an NetFPGA-10G Embedded
 CPU Ethernet Core.

 The current version operates on a simple PIO based interface connected
 to a NetFPGA-10G port.

 To avoid confusion: this driver operates on a CPU running on the FPGA,
 e.g. BERI/mips, and is not suited for the PCI host interface.

 Adjust the register layout to allow for 64bit registers in the
 future for nf10bmac(4).  Also, add support for and enable RX interrupts.

 Allow switching between 32bit and 64bit bus width data access at compile
 time by setting NF10BMAC_64BIT and using a REGWTYPE #define to set correct
 variable and return value widths.

 Adjust comments to indicate the 32 or 64bit register widths.

Relnotes: yes
Sponsored by: DARPA/AFRL

git-svn-id: svn://svn.freebsd.org/base/stable/10@270061 ccf9f872-aa2e-dd11-9fc8-001c23d0bc1f
share/man/man4/Makefile
share/man/man4/netfpga10g_nf10bmac.4 [new file with mode: 0644]
sys/boot/fdt/dts/mips/beri-netfpga.dts
sys/dev/netfpga10g/nf10bmac/if_nf10bmac.c [new file with mode: 0644]
sys/dev/netfpga10g/nf10bmac/if_nf10bmac_fdt.c [new file with mode: 0644]
sys/dev/netfpga10g/nf10bmac/if_nf10bmacreg.h [new file with mode: 0644]
sys/mips/beri/files.beri
sys/mips/conf/BERI_NETFPGA_MDROOT
sys/modules/Makefile
sys/modules/netfpga10g/Makefile [new file with mode: 0644]
sys/modules/netfpga10g/nf10bmac/Makefile [new file with mode: 0644]