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(parent: 219573b) | patch
MFC 265023, 265024, 265036:
authorian <ian@ccf9f872-aa2e-dd11-9fc8-001c23d0bc1f>
Sat, 17 May 2014 23:03:04 +0000 (23:03 +0000)
committerian <ian@ccf9f872-aa2e-dd11-9fc8-001c23d0bc1f>
Sat, 17 May 2014 23:03:04 +0000 (23:03 +0000)
commit1716acc60fad9e9be327251413c7f1cdd6270268
tree7d368d79d2a8d3c61b53057fd7538ff336cb2bcctree | snapshot
parent219573be0a6b12a878512e533e75449be62c1e55commit | diff
MFC 265023, 265024, 265036:

  There is no difference between IPI_STOP and IPI_STOP_HARD on ARM, so
  map them both to the same interrupt number like other arches do.

  Flush and invalidate caches on each CPU as part of handling IPI_STOP.

  Don't use multiprocessing-extensions instruction on processors that don't
  support SMP.

git-svn-id: svn://svn.freebsd.org/base/stable/10@266374 ccf9f872-aa2e-dd11-9fc8-001c23d0bc1f
sys/arm/arm/cpufunc_asm_armv7.S diff | blob | history
sys/arm/arm/minidump_machdep.c diff | blob | history
sys/arm/arm/mp_machdep.c diff | blob | history
sys/arm/include/smp.h diff | blob | history
10-STABLE