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(parent: 047d455) | patch
MFC 308690: Sync instruction cache's after writing user breakpoints on MIPS.
authorjhb <jhb@ccf9f872-aa2e-dd11-9fc8-001c23d0bc1f>
Fri, 16 Dec 2016 01:06:35 +0000 (01:06 +0000)
committerjhb <jhb@ccf9f872-aa2e-dd11-9fc8-001c23d0bc1f>
Fri, 16 Dec 2016 01:06:35 +0000 (01:06 +0000)
commit8d9ac41301bb938010ceadd1af17712904b0db3c
tree119221faed100d08385536bcf40452a4ab3831b5tree | snapshot
parent047d455d5e17476a29180b986b4490f700a81441commit | diff
MFC 308690: Sync instruction cache's after writing user breakpoints on MIPS.

Add an implementation for pmaps_sync_icache() on MIPS that sync's the
instruction cache on all CPUs via smp_rendezvous() after a debugger
inserts a breakpoint via ptrace(PT_IO).

git-svn-id: svn://svn.freebsd.org/base/stable/10@310133 ccf9f872-aa2e-dd11-9fc8-001c23d0bc1f
sys/mips/mips/pmap.c diff | blob | history
10-STABLE