MFC: r273180, r283754, r297329, r299414, r300707, r310309, r310340 (partial),

MFC: r273180, r283754, r297329, r299414, r300707, r310309, r310340 (partial),
     r310341, r311664, r311793-311794

o Use correct response bits for MMC_RSP_R4-R7 types

o Make sdhci(4) work after suspend/resume for chipsets that require
  the frequency quirk. This makes it work on eg ThinkPad T420.

o Add a convenience macro that masks all the bits related to clock divisors
  in all versions of the sdhci spec (the HI bits are just unused reserved
  bits in earlier versions).

o sdhci/mmc: Minor whitespace cleanups

o Add Braswell PCI IDs for Intel Cherryview

o mmc: Accept even lower voltage for Cherryview

  And HP x2 210, per DragonFlyBSD 240bd9cd58f8259c12c14a8006837e698.

o In mmcsd_task(), bio_resid was not being set to 0 on a successful read
  or write, resulting in random short-read and short-write returns for
  requests. Fixing this fixes nominal block I/O via mmcsd(4).

  Obtained from: DragonFlyBSD (fd4b97583be1a1e57234713c25f6e81bc0411cb0)

o Add support for Intel Apollo Lake and Bay Trail eMMC PCI controllers.

o Flesh out the support for Intel Braswell eMMC controllers further.

o In sdhci_init_slot(), use the right capability field for determining
  the announced bus width based on MMC_CAP_*_BIT_DATA.

git-svn-id: svn://svn.freebsd.org/base/stable/10@312400 ccf9f872-aa2e-dd11-9fc8-001c23d0bc1f