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42 * @(#)fpu_arith.h 8.1 (Berkeley) 6/11/93
43 * $NetBSD: fpu_arith.h,v 1.3 2000/07/24 04:11:03 mycroft Exp $
48 * Extended-precision arithmetic.
50 * We hold the notion of a `carry register', which may or may not be a
51 * machine carry bit or register. On the SPARC, it is just the machine's
54 * In the worst case, you can compute the carry from x+y as
55 * (unsigned)(x + y) < (unsigned)x
57 * ((unsigned)(x + y + c) <= (unsigned)x && (y|c) != 0)
61 /* set up for extended-precision arithemtic */
62 #define FPU_DECL_CARRY
65 * We have three kinds of add:
66 * add with carry: r = x + y + c
67 * add (ignoring current carry) and set carry: c'r = x + y + 0
68 * add with carry and set carry: c'r = x + y + c
69 * The macros use `C' for `use carry' and `S' for `set carry'.
70 * Note that the state of the carry is undefined after ADDC and SUBC,
71 * so if all you have for these is `add with carry and set carry',
74 * The same goes for subtract, except that we compute x - y - c.
76 * Finally, we have a way to get the carry into a `regular' variable,
77 * or set it from a value. SET_CARRY turns 0 into no-carry, nonzero
78 * into carry; GET_CARRY sets its argument to 0 or 1.
80 #define FPU_ADDC(r, x, y) \
81 __asm __volatile("addx %1,%2,%0" : "=r"(r) : "r"(x), "r"(y))
82 #define FPU_ADDS(r, x, y) \
83 __asm __volatile("addcc %1,%2,%0" : "=r"(r) : "r"(x), "r"(y))
84 #define FPU_ADDCS(r, x, y) \
85 __asm __volatile("addxcc %1,%2,%0" : "=r"(r) : "r"(x), "r"(y))
86 #define FPU_SUBC(r, x, y) \
87 __asm __volatile("subx %1,%2,%0" : "=r"(r) : "r"(x), "r"(y))
88 #define FPU_SUBS(r, x, y) \
89 __asm __volatile("subcc %1,%2,%0" : "=r"(r) : "r"(x), "r"(y))
90 #define FPU_SUBCS(r, x, y) \
91 __asm __volatile("subxcc %1,%2,%0" : "=r"(r) : "r"(x), "r"(y))
93 #define FPU_GET_CARRY(r) __asm __volatile("addx %%g0,%%g0,%0" : "=r"(r))
94 #define FPU_SET_CARRY(v) __asm __volatile("addcc %0,-1,%%g0" : : "r"(v))
96 #define FPU_SHL1_BY_ADD /* shift left 1 faster by ADDC than (a<<1)|(b>>31) */