2 * Copyright (c) 1991 The Regents of the University of California.
5 * This code is derived from software contributed to Berkeley by
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 4. Neither the name of the University nor the names of its contributors
17 * may be used to endorse or promote products derived from this software
18 * without specific prior written permission.
20 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
24 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 * from: @(#)isa.c 7.2 (Berkeley) 5/13/91
33 * from: isa_dma.c,v 1.3 1999/05/09 23:56:00 peter Exp $
37 * code to manage AT bus
39 * 92/08/18 Frank P. MacLachlan (fpm@crash.cts.com):
40 * Fixed uninitialized variable problem and added code to deal
41 * with DMA page boundaries in isa_dmarangecheck(). Fixed word
42 * mode DMA count compution and reorganized DMA setup code in
46 #include <sys/cdefs.h>
47 __FBSDID("$FreeBSD$");
49 #include <sys/param.h>
50 #include <sys/systm.h>
51 #include <sys/malloc.h>
53 #include <sys/mutex.h>
56 #include <vm/vm_param.h>
58 #include <isa/isareg.h>
59 #include <isa/isavar.h>
60 #include <isa/isa_dmareg.h>
61 #include <machine/bus.h>
63 static bus_dma_tag_t dma_tag[8];
64 static bus_dmamap_t dma_map[8];
65 static u_int8_t dma_busy = 0; /* Used in isa_dmastart() */
66 static u_int8_t dma_inuse = 0; /* User for acquire/release */
67 static u_int8_t dma_auto_mode = 0;
68 static u_int8_t dma_bounced = 0;
70 #define VALID_DMA_MASK (7)
72 /* high byte of address is stored in this port for i-th dma channel */
73 static int dmapageport[8] = { 0x87, 0x83, 0x81, 0x82, 0x8f, 0x8b, 0x89, 0x8a };
76 * Setup a DMA channel's bounce buffer.
79 isa_dma_init(int chan, u_int bouncebufsize, int flag __unused)
81 static int initted = 0;
82 bus_addr_t boundary = chan >= 4 ? 0x20000 : 0x10000;
86 * Reset the DMA hardware.
96 if (chan & ~VALID_DMA_MASK)
97 panic("isa_dma_init: channel out of range");
99 if (dma_tag[chan] || dma_map[chan])
100 panic("isa_dma_init: impossible request");
103 if (bus_dma_tag_create(/*parent*/NULL,
105 /*boundary*/boundary,
106 /*lowaddr*/BUS_SPACE_MAXADDR_24BIT,
107 /*highaddr*/BUS_SPACE_MAXADDR,
108 /*filter*/NULL, /*filterarg*/NULL,
109 /*maxsize*/bouncebufsize,
110 /*nsegments*/1, /*maxsegz*/0x3ffff,
111 /*flags*/BUS_DMA_ISA,
112 /*lockfunc*/busdma_lock_mutex,
114 &dma_tag[chan]) != 0) {
115 panic("isa_dma_init: unable to create dma tag\n");
118 if (bus_dmamap_create(dma_tag[chan], 0, &dma_map[chan])) {
119 panic("isa_dma_init: unable to create dma map\n");
125 * Register a DMA channel's usage. Usually called from a device driver
126 * in open() or during its initialization.
129 isa_dma_acquire(chan)
133 if (chan & ~VALID_DMA_MASK)
134 panic("isa_dma_acquire: channel out of range");
137 if (dma_inuse & (1 << chan)) {
138 printf("isa_dma_acquire: channel %d already in use\n", chan);
141 dma_inuse |= (1 << chan);
142 dma_auto_mode &= ~(1 << chan);
148 * Unregister a DMA channel's usage. Usually called from a device driver
149 * during close() or during its shutdown.
152 isa_dma_release(chan)
156 if (chan & ~VALID_DMA_MASK)
157 panic("isa_dma_release: channel out of range");
159 if ((dma_inuse & (1 << chan)) == 0)
160 printf("isa_dma_release: channel %d not in use\n", chan);
163 if (dma_busy & (1 << chan)) {
164 dma_busy &= ~(1 << chan);
166 * XXX We should also do "dma_bounced &= (1 << chan);"
167 * because we are acting on behalf of isa_dmadone() which
168 * was not called to end the last DMA operation. This does
169 * not matter now, but it may in the future.
173 dma_inuse &= ~(1 << chan);
174 dma_auto_mode &= ~(1 << chan);
178 * isa_dmacascade(): program 8237 DMA controller channel to accept
179 * external dma control by a board.
186 if (chan & ~VALID_DMA_MASK)
187 panic("isa_dmacascade: channel out of range");
190 /* set dma channel mode, and set dma channel mode */
191 if ((chan & 4) == 0) {
192 outb(DMA1_MODE, DMA37MD_CASCADE | chan);
193 outb(DMA1_SMSK, chan);
195 outb(DMA2_MODE, DMA37MD_CASCADE | (chan & 3));
196 outb(DMA2_SMSK, chan & 3);
201 * isa_dmastart(): program 8237 DMA controller channel.
204 struct isa_dmastart_arg {
210 static void isa_dmastart_cb(void *arg, bus_dma_segment_t *segs, int nseg,
213 caddr_t addr = ((struct isa_dmastart_arg *) arg)->addr;
214 int chan = ((struct isa_dmastart_arg *) arg)->chan;
215 int flags = ((struct isa_dmastart_arg *) arg)->flags;
216 bus_addr_t phys = segs->ds_addr;
217 int nbytes = segs->ds_len;
221 panic("isa_dmastart: transfer mapping not contiguous");
223 if ((chipset.sgmap == NULL) &&
224 (pmap_extract(kernel_pmap, (vm_offset_t)addr)
225 > BUS_SPACE_MAXADDR_24BIT)) {
227 dma_bounced |= (1 << chan);
228 /* copy bounce buffer on write */
229 if (!(flags & ISADMA_READ))
230 bus_dmamap_sync(dma_tag[chan], dma_map[chan],
231 BUS_DMASYNC_PREWRITE);
234 if ((chan & 4) == 0) {
236 * Program one of DMA channels 0..3. These are
237 * byte mode channels.
239 /* set dma channel mode, and reset address ff */
241 /* If ISADMA_RAW flag is set, then use autoinitialise mode */
242 if (flags & ISADMA_RAW) {
243 if (flags & ISADMA_READ)
244 outb(DMA1_MODE, DMA37MD_AUTO|DMA37MD_WRITE|chan);
246 outb(DMA1_MODE, DMA37MD_AUTO|DMA37MD_READ|chan);
249 if (flags & ISADMA_READ)
250 outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|chan);
252 outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_READ|chan);
255 /* send start address */
256 waport = DMA1_CHN(chan);
258 outb(waport, phys>>8);
259 outb(dmapageport[chan], phys>>16);
262 outb(waport + 1, --nbytes);
263 outb(waport + 1, nbytes>>8);
266 outb(DMA1_SMSK, chan);
269 * Program one of DMA channels 4..7. These are
270 * word mode channels.
272 /* set dma channel mode, and reset address ff */
274 /* If ISADMA_RAW flag is set, then use autoinitialise mode */
275 if (flags & ISADMA_RAW) {
276 if (flags & ISADMA_READ)
277 outb(DMA2_MODE, DMA37MD_AUTO|DMA37MD_WRITE|(chan&3));
279 outb(DMA2_MODE, DMA37MD_AUTO|DMA37MD_READ|(chan&3));
282 if (flags & ISADMA_READ)
283 outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|(chan&3));
285 outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_READ|(chan&3));
288 /* send start address */
289 waport = DMA2_CHN(chan - 4);
290 outb(waport, phys>>1);
291 outb(waport, phys>>9);
292 outb(dmapageport[chan], phys>>16);
296 outb(waport + 2, --nbytes);
297 outb(waport + 2, nbytes>>8);
300 outb(DMA2_SMSK, chan & 3);
305 isa_dmastart(int flags, caddr_t addr, u_int nbytes, int chan)
307 struct isa_dmastart_arg args;
310 if (chan & ~VALID_DMA_MASK)
311 panic("isa_dmastart: channel out of range");
313 if ((chan < 4 && nbytes > (1<<16))
314 || (chan >= 4 && (nbytes > (1<<17) || (uintptr_t)addr & 1)))
315 panic("isa_dmastart: impossible request");
317 if ((dma_inuse & (1 << chan)) == 0)
318 printf("isa_dmastart: channel %d not acquired\n", chan);
323 * XXX This should be checked, but drivers like ad1848 only call
324 * isa_dmastart() once because they use Auto DMA mode. If we
325 * leave this in, drivers that do this will print this continuously.
327 if (dma_busy & (1 << chan))
328 printf("isa_dmastart: channel %d busy\n", chan);
331 if (!dma_tag || !dma_map[chan])
332 panic("isa_dmastart: called without isa_dma_init");
334 dma_busy |= (1 << chan);
336 if (flags & ISADMA_RAW) {
337 dma_auto_mode |= (1 << chan);
339 dma_auto_mode &= ~(1 << chan);
343 * Freeze dma while updating registers.
345 outb(chan & 4 ? DMA2_SMSK : DMA1_SMSK, (chan & 3) | 4);
350 bus_dmamap_load(dma_tag[chan], dma_map[chan], addr, nbytes,
351 isa_dmastart_cb, &args, 0);
355 isa_dmadone(int flags, caddr_t addr, int nbytes, int chan)
358 if (chan & ~VALID_DMA_MASK)
359 panic("isa_dmadone: channel out of range");
361 if ((dma_inuse & (1 << chan)) == 0)
362 printf("isa_dmadone: channel %d not acquired\n", chan);
365 if (((dma_busy & (1 << chan)) == 0) &&
366 (dma_auto_mode & (1 << chan)) == 0 )
367 printf("isa_dmadone: channel %d not busy\n", chan);
369 if (dma_bounced & (1 << chan)) {
370 /* copy bounce buffer on read */
371 if (flags & ISADMA_READ) {
372 bus_dmamap_sync(dma_tag[chan], dma_map[chan],
373 BUS_DMASYNC_POSTREAD);
375 dma_bounced &= ~(1 << chan);
378 if ((dma_auto_mode & (1 << chan)) == 0) {
379 outb(chan & 4 ? DMA2_SMSK : DMA1_SMSK, (chan & 3) | 4);
380 bus_dmamap_unload(dma_tag[chan], dma_map[chan]);
383 dma_busy &= ~(1 << chan);
387 * Query the progress of a transfer on a DMA channel.
389 * To avoid having to interrupt a transfer in progress, we sample
390 * each of the high and low databytes twice, and apply the following
391 * logic to determine the correct count.
393 * Reads are performed with interrupts disabled, thus it is to be
394 * expected that the time between reads is very small. At most
395 * one rollover in the low count byte can be expected within the
396 * four reads that are performed.
398 * There are three gaps in which a rollover can occur :
408 * If a rollover occurs in gap1 or gap2, the low2 value will be
409 * greater than the low1 value. In this case, low2 and high2 are a
410 * corresponding pair.
412 * In any other case, low1 and high1 can be considered to be correct.
414 * The function returns the number of bytes remaining in the transfer,
415 * or -1 if the channel requested is not active.
419 isa_dmastatus(int chan)
423 u_long low1, high1, low2, high2;
426 /* channel active? */
427 if ((dma_inuse & (1 << chan)) == 0) {
428 printf("isa_dmastatus: channel %d not active\n", chan);
433 if (((dma_busy & (1 << chan)) == 0) &&
434 (dma_auto_mode & (1 << chan)) == 0 ) {
435 printf("chan %d not busy\n", chan);
438 if (chan < 4) { /* low DMA controller */
440 waport = DMA1_CHN(chan) + 1;
441 } else { /* high DMA controller */
443 waport = DMA2_CHN(chan - 4) + 2;
446 s = splhigh(); /* no interrupts Mr Jones! */
447 outb(ffport, 0); /* clear register LSB flipflop */
450 outb(ffport, 0); /* clear again */
453 splx(s); /* enable interrupts again */
456 * Now decide if a wrap has tried to skew our results.
457 * Note that after TC, the count will read 0xffff, while we want
458 * to return zero, so we add and then mask to compensate.
461 cnt = (low1 + (high1 << 8) + 1) & 0xffff;
463 cnt = (low2 + (high2 << 8) + 1) & 0xffff;
466 if (chan >= 4) /* high channels move words */
472 * Reached terminal count yet ?
479 return(inb(DMA1_STATUS) & (1 << chan));
481 return(inb(DMA2_STATUS) & (1 << (chan & 3)));
485 * Stop a DMA transfer currently in progress.
488 isa_dmastop(int chan)
490 if ((dma_inuse & (1 << chan)) == 0)
491 printf("isa_dmastop: channel %d not acquired\n", chan);
493 if (((dma_busy & (1 << chan)) == 0) &&
494 ((dma_auto_mode & (1 << chan)) == 0)) {
495 printf("chan %d not busy\n", chan);
499 if ((chan & 4) == 0) {
500 outb(DMA1_SMSK, (chan & 3) | 4 /* disable mask */);
502 outb(DMA2_SMSK, (chan & 3) | 4 /* disable mask */);
504 return(isa_dmastatus(chan));