4 * Copyright (c) 1998, 2000 by Matthew Jacob
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31 * 'Register' definitions for the MCBUS main
32 * system bus found on AlphaServer 4100 systems.
36 * Information gathered from:"
38 * "Rawhide System Programmer's Manual, revision 1.4".
42 * There are 7 possible MC bus modules (architecture says 10, but
43 * the address map details say otherwise), 1 though 7.
44 * Their uses are defined as follows:
57 #define MCBUS_MID_MAX 7
60 * For this architecture, bit 39 of a 40 bit address controls whether
61 * you access I/O or Memory space. Further, there *could* be multiple
62 * MC busses (but only one specified for now).
65 #define MCBUS_IOSPACE 0x0000008000000000L
66 #define MCBUS_GID_MASK 0x0000007000000000L
67 #define MCBUS_GID_SHIFT 36
68 #define MCBUS_MID_MASK 0x0000000E00000000L
69 #define MCBUS_MID_SHIFT 33
73 #define MCPCIA_PER_MCBUS 4
74 #define MCPCIA_PCI_MIDMIN 4
76 * This is something of a layering violation, but it makes probing cleaner.
78 /* the MCPCIA bridge CSR addresses, offset zero, is a good thing to probe for */
79 #define MCPCIA_BRIDGE_ADDR(gid, mid) \
80 (MCBUS_IOSPACE | 0x1E0000000LL | \
81 (((unsigned long) gid) << MCBUS_GID_SHIFT) | \
82 (((unsigned long) mid) << MCBUS_MID_SHIFT))