2 * Copyright (c) 2006 M. Warner Losh. All rights reserved.
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
14 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
15 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
16 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
19 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
20 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24 * This software is derived from software provide by Kwikbyte who specifically
25 * disclaimed copyright on the code.
30 //*---------------------------------------------------------------------------
31 //* ATMEL Microcontroller Software Support - ROUSSET -
32 //*---------------------------------------------------------------------------
33 //* The software is delivered "AS IS" without warranty or condition of any
34 //* kind, either express, implied or statutory. This includes without
35 //* limitation any warranty or condition with respect to merchantability or
36 //* fitness for any particular purpose, or against the infringements of
37 //* intellectual property rights of others.
38 //*---------------------------------------------------------------------------
39 //* File Name : AT91C_MCI_Device.h
40 //* Object : Data Flash Atmel Description File
43 //* 1.0 26/11/02 FB : Creation
44 //*---------------------------------------------------------------------------
46 #ifndef __MCI_Device_h
47 #define __MCI_Device_h
50 typedef unsigned int AT91S_MCIDeviceStatus;
52 /////////////////////////////////////////////////////////////////////////////////////////////////////
54 #define AT91C_CARD_REMOVED 0
55 #define AT91C_MMC_CARD_INSERTED 1
56 #define AT91C_SD_CARD_INSERTED 2
58 #define AT91C_NO_ARGUMENT 0x0
60 #define AT91C_FIRST_RCA 0xCAFE
61 #define AT91C_MAX_MCI_CARDS 10
63 #define AT91C_BUS_WIDTH_1BIT 0x00
64 #define AT91C_BUS_WIDTH_4BITS 0x02
67 #define AT91C_MCI_IDLE 0x0
68 #define AT91C_MCI_TIMEOUT_ERROR 0x1
69 #define AT91C_MCI_RX_SINGLE_BLOCK 0x2
70 #define AT91C_MCI_RX_MULTIPLE_BLOCK 0x3
71 #define AT91C_MCI_RX_STREAM 0x4
72 #define AT91C_MCI_TX_SINGLE_BLOCK 0x5
73 #define AT91C_MCI_TX_MULTIPLE_BLOCK 0x6
74 #define AT91C_MCI_TX_STREAM 0x7
77 #define AT91C_TIMEOUT_CMDRDY 30
79 /////////////////////////////////////////////////////////////////////////////////////////////////////
80 // MMC & SDCard Structures
81 /////////////////////////////////////////////////////////////////////////////////////////////////////
83 /*-----------------------------------------------*/
84 /* SDCard Device Descriptor Structure Definition */
85 /*-----------------------------------------------*/
86 typedef struct _AT91S_MciDeviceDesc
88 volatile unsigned char state;
89 unsigned char SDCard_bus_width;
91 } AT91S_MciDeviceDesc, *AT91PS_MciDeviceDesc;
93 /*---------------------------------------------*/
94 /* MMC & SDCard Structure Device Features */
95 /*---------------------------------------------*/
96 typedef struct _AT91S_MciDeviceFeatures
98 unsigned char Card_Inserted; // (0=AT91C_CARD_REMOVED) (1=AT91C_MMC_CARD_INSERTED) (2=AT91C_SD_CARD_INSERTED)
99 unsigned int Relative_Card_Address; // RCA
100 unsigned int READ_BL_LEN;
101 unsigned int WRITE_BL_LEN;
102 unsigned int Max_Read_DataBlock_Length; // 2^(READ_BL_LEN) in CSD
103 unsigned int Max_Write_DataBlock_Length; // 2^(WRITE_BL_LEN) in CSD
104 unsigned char Read_Partial; // READ_BL_PARTIAL
105 unsigned char Write_Partial; // WRITE_BL_PARTIAL
106 unsigned char Erase_Block_Enable; // ERASE_BLK_EN
107 unsigned char Read_Block_Misalignment; // READ_BLK_MISALIGN
108 unsigned char Write_Block_Misalignment; // WRITE_BLK_MISALIGN
109 unsigned char Sector_Size; // SECTOR_SIZE
110 unsigned int Memory_Capacity; // Size in bits of the device
112 } AT91S_MciDeviceFeatures, *AT91PS_MciDeviceFeatures ;
114 /*---------------------------------------------*/
115 /* MCI Device Structure Definition */
116 /*---------------------------------------------*/
117 typedef struct _AT91S_MciDevice
119 AT91PS_MciDeviceDesc pMCI_DeviceDesc; // MCI device descriptor
120 AT91PS_MciDeviceFeatures pMCI_DeviceFeatures;// Pointer on a MCI device features array
121 }AT91S_MciDevice, *AT91PS_MciDevice;
123 /////////////////////////////////////////////////////////////////////////////////////////////////////
124 // MCI_CMD Register Value
125 /////////////////////////////////////////////////////////////////////////////////////////////////////
126 #define AT91C_POWER_ON_INIT (0 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_INIT | AT91C_MCI_OPDCMD)
128 /////////////////////////////////////////////////////////////////
129 // Class 0 & 1 commands: Basic commands and Read Stream commands
130 /////////////////////////////////////////////////////////////////
132 #define AT91C_GO_IDLE_STATE_CMD (0 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE )
133 #define AT91C_MMC_GO_IDLE_STATE_CMD (0 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE | AT91C_MCI_OPDCMD)
134 #define AT91C_MMC_SEND_OP_COND_CMD (1 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_OPDCMD)
135 #define AT91C_ALL_SEND_CID_CMD (2 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_136 )
136 #define AT91C_MMC_ALL_SEND_CID_CMD (2 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_136 | AT91C_MCI_OPDCMD)
137 #define AT91C_SET_RELATIVE_ADDR_CMD (3 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_MAXLAT )
138 #define AT91C_MMC_SET_RELATIVE_ADDR_CMD (3 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_MAXLAT | AT91C_MCI_OPDCMD)
140 #define AT91C_SET_DSR_CMD (4 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_NO | AT91C_MCI_MAXLAT ) // no tested
142 #define AT91C_SEL_DESEL_CARD_CMD (7 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_MAXLAT )
143 #define AT91C_SEND_CSD_CMD (9 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_136 | AT91C_MCI_MAXLAT )
144 #define AT91C_SEND_CID_CMD (10 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_136 | AT91C_MCI_MAXLAT )
145 #define AT91C_MMC_READ_DAT_UNTIL_STOP_CMD (11 | AT91C_MCI_TRTYP_STREAM| AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRDIR | AT91C_MCI_TRCMD_START | AT91C_MCI_MAXLAT )
147 #define AT91C_STOP_TRANSMISSION_CMD (12 | AT91C_MCI_TRCMD_STOP | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_MAXLAT )
148 #define AT91C_STOP_TRANSMISSION_SYNC_CMD (12 | AT91C_MCI_TRCMD_STOP | AT91C_MCI_SPCMD_SYNC | AT91C_MCI_RSPTYP_48 | AT91C_MCI_MAXLAT )
149 #define AT91C_SEND_STATUS_CMD (13 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_MAXLAT )
150 #define AT91C_GO_INACTIVE_STATE_CMD (15 | AT91C_MCI_RSPTYP_NO )
152 //*------------------------------------------------
153 //* Class 2 commands: Block oriented Read commands
154 //*------------------------------------------------
156 #define AT91C_SET_BLOCKLEN_CMD (16 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_MAXLAT )
157 #define AT91C_READ_SINGLE_BLOCK_CMD (17 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_START | AT91C_MCI_TRTYP_BLOCK | AT91C_MCI_TRDIR | AT91C_MCI_MAXLAT)
158 #define AT91C_READ_MULTIPLE_BLOCK_CMD (18 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_START | AT91C_MCI_TRTYP_MULTIPLE | AT91C_MCI_TRDIR | AT91C_MCI_MAXLAT)
160 //*--------------------------------------------
161 //* Class 3 commands: Sequential write commands
162 //*--------------------------------------------
164 #define AT91C_MMC_WRITE_DAT_UNTIL_STOP_CMD (20 | AT91C_MCI_TRTYP_STREAM| AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 & ~(AT91C_MCI_TRDIR) | AT91C_MCI_TRCMD_START | AT91C_MCI_MAXLAT ) // MMC
166 //*------------------------------------------------
167 //* Class 4 commands: Block oriented write commands
168 //*------------------------------------------------
170 #define AT91C_WRITE_BLOCK_CMD (24 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_START | (AT91C_MCI_TRTYP_BLOCK & ~(AT91C_MCI_TRDIR)) | AT91C_MCI_MAXLAT)
171 #define AT91C_WRITE_MULTIPLE_BLOCK_CMD (25 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_START | (AT91C_MCI_TRTYP_MULTIPLE & ~(AT91C_MCI_TRDIR)) | AT91C_MCI_MAXLAT)
172 #define AT91C_PROGRAM_CSD_CMD (27 | AT91C_MCI_RSPTYP_48 )
175 //*----------------------------------------
176 //* Class 6 commands: Group Write protect
177 //*----------------------------------------
179 #define AT91C_SET_WRITE_PROT_CMD (28 | AT91C_MCI_RSPTYP_48 )
180 #define AT91C_CLR_WRITE_PROT_CMD (29 | AT91C_MCI_RSPTYP_48 )
181 #define AT91C_SEND_WRITE_PROT_CMD (30 | AT91C_MCI_RSPTYP_48 )
184 //*----------------------------------------
185 //* Class 5 commands: Erase commands
186 //*----------------------------------------
188 #define AT91C_TAG_SECTOR_START_CMD (32 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT)
189 #define AT91C_TAG_SECTOR_END_CMD (33 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT)
190 #define AT91C_MMC_UNTAG_SECTOR_CMD (34 | AT91C_MCI_RSPTYP_48 )
191 #define AT91C_MMC_TAG_ERASE_GROUP_START_CMD (35 | AT91C_MCI_RSPTYP_48 )
192 #define AT91C_MMC_TAG_ERASE_GROUP_END_CMD (36 | AT91C_MCI_RSPTYP_48 )
193 #define AT91C_MMC_UNTAG_ERASE_GROUP_CMD (37 | AT91C_MCI_RSPTYP_48 )
194 #define AT91C_ERASE_CMD (38 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT )
196 //*----------------------------------------
197 //* Class 7 commands: Lock commands
198 //*----------------------------------------
200 #define AT91C_LOCK_UNLOCK (42 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT) // no tested
202 //*-----------------------------------------------
203 // Class 8 commands: Application specific commands
204 //*-----------------------------------------------
206 #define AT91C_APP_CMD (55 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT)
207 #define AT91C_GEN_CMD (56 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT) // no tested
209 #define AT91C_SDCARD_SET_BUS_WIDTH_CMD (6 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT)
210 #define AT91C_SDCARD_STATUS_CMD (13 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT)
211 #define AT91C_SDCARD_SEND_NUM_WR_BLOCKS_CMD (22 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT)
212 #define AT91C_SDCARD_SET_WR_BLK_ERASE_COUNT_CMD (23 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT)
213 #define AT91C_SDCARD_APP_OP_COND_CMD (41 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO )
214 #define AT91C_SDCARD_SET_CLR_CARD_DETECT_CMD (42 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT)
215 #define AT91C_SDCARD_SEND_SCR_CMD (51 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT)
217 #define AT91C_SDCARD_APP_ALL_CMD (AT91C_SDCARD_SET_BUS_WIDTH_CMD +\
218 AT91C_SDCARD_STATUS_CMD +\
219 AT91C_SDCARD_SEND_NUM_WR_BLOCKS_CMD +\
220 AT91C_SDCARD_SET_WR_BLK_ERASE_COUNT_CMD +\
221 AT91C_SDCARD_APP_OP_COND_CMD +\
222 AT91C_SDCARD_SET_CLR_CARD_DETECT_CMD +\
223 AT91C_SDCARD_SEND_SCR_CMD)
225 //*----------------------------------------
226 //* Class 9 commands: IO Mode commands
227 //*----------------------------------------
229 #define AT91C_MMC_FAST_IO_CMD (39 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_MAXLAT)
230 #define AT91C_MMC_GO_IRQ_STATE_CMD (40 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT)
232 /////////////////////////////////////////////////////////////////////////////////////////////////////
233 // Functions returnals
234 /////////////////////////////////////////////////////////////////////////////////////////////////////
235 #define AT91C_CMD_SEND_OK 0 // Command ok
236 #define AT91C_CMD_SEND_ERROR -1 // Command failed
237 #define AT91C_INIT_OK 2 // Init Successfull
238 #define AT91C_INIT_ERROR 3 // Init Failed
239 #define AT91C_READ_OK 4 // Read Successfull
240 #define AT91C_READ_ERROR 5 // Read Failed
241 #define AT91C_WRITE_OK 6 // Write Successfull
242 #define AT91C_WRITE_ERROR 7 // Write Failed
243 #define AT91C_ERASE_OK 8 // Erase Successfull
244 #define AT91C_ERASE_ERROR 9 // Erase Failed
245 #define AT91C_CARD_SELECTED_OK 10 // Card Selection Successfull
246 #define AT91C_CARD_SELECTED_ERROR 11 // Card Selection Failed
248 /////////////////////////////////////////////////////////////////////////////////////////////////////
250 /////////////////////////////////////////////////////////////////////////////////////////////////////
251 #define AT91C_MCI_SR_ERROR (AT91C_MCI_UNRE |\
261 ////////////////////////////////////////////////////////////////////////////////////////////////////
263 ////////////////////////////////////////////////////////////////////////////////////////////////////
264 #define AT91C_VDD_16_17 (1 << 4)
265 #define AT91C_VDD_17_18 (1 << 5)
266 #define AT91C_VDD_18_19 (1 << 6)
267 #define AT91C_VDD_19_20 (1 << 7)
268 #define AT91C_VDD_20_21 (1 << 8)
269 #define AT91C_VDD_21_22 (1 << 9)
270 #define AT91C_VDD_22_23 (1 << 10)
271 #define AT91C_VDD_23_24 (1 << 11)
272 #define AT91C_VDD_24_25 (1 << 12)
273 #define AT91C_VDD_25_26 (1 << 13)
274 #define AT91C_VDD_26_27 (1 << 14)
275 #define AT91C_VDD_27_28 (1 << 15)
276 #define AT91C_VDD_28_29 (1 << 16)
277 #define AT91C_VDD_29_30 (1 << 17)
278 #define AT91C_VDD_30_31 (1 << 18)
279 #define AT91C_VDD_31_32 (1 << 19)
280 #define AT91C_VDD_32_33 (1 << 20)
281 #define AT91C_VDD_33_34 (1 << 21)
282 #define AT91C_VDD_34_35 (1 << 22)
283 #define AT91C_VDD_35_36 (1 << 23)
284 #define AT91C_CARD_POWER_UP_BUSY (1 << 31)
286 #define AT91C_MMC_HOST_VOLTAGE_RANGE (AT91C_VDD_27_28 +\
293 ////////////////////////////////////////////////////////////////////////////////////////////////////
294 // CURRENT_STATE & READY_FOR_DATA in SDCard Status Register definition (response type R1)
295 ////////////////////////////////////////////////////////////////////////////////////////////////////
296 #define AT91C_SR_READY_FOR_DATA (1 << 8) // corresponds to buffer empty signalling on the bus
297 #define AT91C_SR_IDLE (0 << 9)
298 #define AT91C_SR_READY (1 << 9)
299 #define AT91C_SR_IDENT (2 << 9)
300 #define AT91C_SR_STBY (3 << 9)
301 #define AT91C_SR_TRAN (4 << 9)
302 #define AT91C_SR_DATA (5 << 9)
303 #define AT91C_SR_RCV (6 << 9)
304 #define AT91C_SR_PRG (7 << 9)
305 #define AT91C_SR_DIS (8 << 9)
307 #define AT91C_SR_CARD_SELECTED (AT91C_SR_READY_FOR_DATA + AT91C_SR_TRAN)
309 /////////////////////////////////////////////////////////////////////////////////////////////////////
310 // MMC CSD register header File
311 // AT91C_CSD_xxx_S for shift value
312 // AT91C_CSD_xxx_M for mask value
313 /////////////////////////////////////////////////////////////////////////////////////////////////////
315 // First Response INT <=> CSD[3] : bits 0 to 31
316 #define AT91C_CSD_BIT0_S 0 // [0:0]
317 #define AT91C_CSD_BIT0_M 0x01
318 #define AT91C_CSD_CRC_S 1 // [7:1]
319 #define AT91C_CSD_CRC_M 0x7F
320 #define AT91C_CSD_MMC_ECC_S 8 // [9:8] reserved for MMC compatibility
321 #define AT91C_CSD_MMC_ECC_M 0x03
322 #define AT91C_CSD_FILE_FMT_S 10 // [11:10]
323 #define AT91C_CSD_FILE_FMT_M 0x03
324 #define AT91C_CSD_TMP_WP_S 12 // [12:12]
325 #define AT91C_CSD_TMP_WP_M 0x01
326 #define AT91C_CSD_PERM_WP_S 13 // [13:13]
327 #define AT91C_CSD_PERM_WP_M 0x01
328 #define AT91C_CSD_COPY_S 14 // [14:14]
329 #define AT91C_CSD_COPY_M 0x01
330 #define AT91C_CSD_FILE_FMT_GRP_S 15 // [15:15]
331 #define AT91C_CSD_FILE_FMT_GRP_M 0x01
332 // reserved 16 // [20:16]
334 #define AT91C_CSD_WBLOCK_P_S 21 // [21:21]
335 #define AT91C_CSD_WBLOCK_P_M 0x01
336 #define AT91C_CSD_WBLEN_S 22 // [25:22]
337 #define AT91C_CSD_WBLEN_M 0x0F
338 #define AT91C_CSD_R2W_F_S 26 // [28:26]
339 #define AT91C_CSD_R2W_F_M 0x07
340 #define AT91C_CSD_MMC_DEF_ECC_S 29 // [30:29] reserved for MMC compatibility
341 #define AT91C_CSD_MMC_DEF_ECC_M 0x03
342 #define AT91C_CSD_WP_GRP_EN_S 31 // [31:31]
343 #define AT91C_CSD_WP_GRP_EN_M 0x01
345 // Seconde Response INT <=> CSD[2] : bits 32 to 63
346 #define AT91C_CSD_v21_WP_GRP_SIZE_S 0 // [38:32]
347 #define AT91C_CSD_v21_WP_GRP_SIZE_M 0x7F
348 #define AT91C_CSD_v21_SECT_SIZE_S 7 // [45:39]
349 #define AT91C_CSD_v21_SECT_SIZE_M 0x7F
350 #define AT91C_CSD_v21_ER_BLEN_EN_S 14 // [46:46]
351 #define AT91C_CSD_v21_ER_BLEN_EN_M 0x01
353 #define AT91C_CSD_v22_WP_GRP_SIZE_S 0 // [36:32]
354 #define AT91C_CSD_v22_WP_GRP_SIZE_M 0x1F
355 #define AT91C_CSD_v22_ER_GRP_SIZE_S 5 // [41:37]
356 #define AT91C_CSD_v22_ER_GRP_SIZE_M 0x1F
357 #define AT91C_CSD_v22_SECT_SIZE_S 10 // [46:42]
358 #define AT91C_CSD_v22_SECT_SIZE_M 0x1F
360 #define AT91C_CSD_C_SIZE_M_S 15 // [49:47]
361 #define AT91C_CSD_C_SIZE_M_M 0x07
362 #define AT91C_CSD_VDD_WMAX_S 18 // [52:50]
363 #define AT91C_CSD_VDD_WMAX_M 0x07
364 #define AT91C_CSD_VDD_WMIN_S 21 // [55:53]
365 #define AT91C_CSD_VDD_WMIN_M 0x07
366 #define AT91C_CSD_RCUR_MAX_S 24 // [58:56]
367 #define AT91C_CSD_RCUR_MAX_M 0x07
368 #define AT91C_CSD_RCUR_MIN_S 27 // [61:59]
369 #define AT91C_CSD_RCUR_MIN_M 0x07
370 #define AT91C_CSD_CSIZE_L_S 30 // [63:62] <=> 2 LSB of CSIZE
371 #define AT91C_CSD_CSIZE_L_M 0x03
373 // Third Response INT <=> CSD[1] : bits 64 to 95
374 #define AT91C_CSD_CSIZE_H_S 0 // [73:64] <=> 10 MSB of CSIZE
375 #define AT91C_CSD_CSIZE_H_M 0x03FF
376 // reserved 10 // [75:74]
378 #define AT91C_CSD_DSR_I_S 12 // [76:76]
379 #define AT91C_CSD_DSR_I_M 0x01
380 #define AT91C_CSD_RD_B_MIS_S 13 // [77:77]
381 #define AT91C_CSD_RD_B_MIS_M 0x01
382 #define AT91C_CSD_WR_B_MIS_S 14 // [78:78]
383 #define AT91C_CSD_WR_B_MIS_M 0x01
384 #define AT91C_CSD_RD_B_PAR_S 15 // [79:79]
385 #define AT91C_CSD_RD_B_PAR_M 0x01
386 #define AT91C_CSD_RD_B_LEN_S 16 // [83:80]
387 #define AT91C_CSD_RD_B_LEN_M 0x0F
388 #define AT91C_CSD_CCC_S 20 // [95:84]
389 #define AT91C_CSD_CCC_M 0x0FFF
391 // Fourth Response INT <=> CSD[0] : bits 96 to 127
392 #define AT91C_CSD_TRANS_SPEED_S 0 // [103:96]
393 #define AT91C_CSD_TRANS_SPEED_M 0xFF
394 #define AT91C_CSD_NSAC_S 8 // [111:104]
395 #define AT91C_CSD_NSAC_M 0xFF
396 #define AT91C_CSD_TAAC_S 16 // [119:112]
397 #define AT91C_CSD_TAAC_M 0xFF
398 // reserved 24 // [121:120]
400 #define AT91C_CSD_MMC_SPEC_VERS_S 26 // [125:122] reserved for MMC compatibility
401 #define AT91C_CSD_MMC_SPEC_VERS_M 0x0F
402 #define AT91C_CSD_STRUCT_S 30 // [127:126]
403 #define AT91C_CSD_STRUCT_M 0x03
405 /////////////////////////////////////////////////////////////////////////////////////////////////////
407 void AT91F_MCI_Device_Handler(AT91PS_MciDevice,unsigned int);
408 AT91S_MCIDeviceStatus AT91F_MCI_SDCard_Init (AT91PS_MciDevice);
409 AT91S_MCIDeviceStatus AT91F_MCI_SetBlocklength(unsigned int);
410 AT91S_MCIDeviceStatus AT91F_MCI_ReadBlock(AT91PS_MciDevice,int,unsigned int *,int);
411 AT91S_MCIDeviceStatus AT91F_MCI_WriteBlock(AT91PS_MciDevice,int,unsigned int *,int);
413 AT91S_MCIDeviceStatus AT91F_MCI_MMC_Init (AT91PS_MciDevice pMCI_Device);
414 AT91S_MCIDeviceStatus AT91F_MCI_MMC_SelectCard(AT91PS_MciDevice pMCI_Device, unsigned int relative_card_address);