2 * Copyright (c) 1995, David Greenman
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice unmodified, this list of conditions, and the following
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
32 * Device driver for National Semiconductor DS8390/WD83C690 based ethernet
33 * adapters. By David Greenman, 29-April-1993
35 * Currently supports the Western Digital/SMC 8003 and 8013 series,
36 * the SMC Elite Ultra (8216), the 3Com 3c503, the NE1000 and NE2000,
37 * and a variety of similar clones.
43 #include <sys/param.h>
44 #include <sys/systm.h>
45 #include <sys/sockio.h>
47 #include <sys/kernel.h>
48 #include <sys/socket.h>
49 #include <sys/syslog.h>
53 #include <machine/bus.h>
55 #include <machine/resource.h>
57 #include <net/ethernet.h>
59 #include <net/if_arp.h>
60 #include <net/if_dl.h>
61 #include <net/if_mib.h>
62 #include <net/if_media.h>
63 #include <net/if_types.h>
67 #include <dev/ed/if_edreg.h>
68 #include <dev/ed/if_edvar.h>
71 devclass_t ed_devclass;
73 static void ed_init(void *);
74 static void ed_init_locked(struct ed_softc *);
75 static int ed_ioctl(struct ifnet *, u_long, caddr_t);
76 static void ed_start(struct ifnet *);
77 static void ed_start_locked(struct ifnet *);
78 static void ed_reset(struct ifnet *);
79 static void ed_watchdog(struct ifnet *);
81 static void ed_ds_getmcaf(struct ed_softc *, uint32_t *);
83 static void ed_get_packet(struct ed_softc *, bus_size_t, u_short);
84 static void ed_stop_hw(struct ed_softc *sc);
86 static __inline void ed_rint(struct ed_softc *);
87 static __inline void ed_xmit(struct ed_softc *);
88 static __inline void ed_ring_copy(struct ed_softc *, bus_size_t, char *,
90 static u_short ed_pio_write_mbufs(struct ed_softc *, struct mbuf *,
93 static void ed_setrcr(struct ed_softc *);
96 * Generic probe routine for testing for the existance of a DS8390.
97 * Must be called after the NIC has just been reset. This routine
98 * works by looking at certain register values that are guaranteed
99 * to be initialized a certain way after power-up or reset. Seems
100 * not to currently work on the 83C690.
104 * Register reset bits set bits
105 * Command Register (CR) TXP, STA RD2, STP
106 * Interrupt Status (ISR) RST
107 * Interrupt Mask (IMR) All bits
108 * Data Control (DCR) LAS
109 * Transmit Config. (TCR) LB1, LB0
111 * We only look at the CR and ISR registers, however, because looking at
112 * the others would require changing register pages (which would be
113 * intrusive if this isn't an 8390).
115 * Return 1 if 8390 was found, 0 if not.
119 ed_probe_generic8390(struct ed_softc *sc)
121 if ((ed_nic_inb(sc, ED_P0_CR) &
122 (ED_CR_RD2 | ED_CR_TXP | ED_CR_STA | ED_CR_STP)) !=
123 (ED_CR_RD2 | ED_CR_STP))
125 if ((ed_nic_inb(sc, ED_P0_ISR) & ED_ISR_RST) != ED_ISR_RST)
132 ed_disable_16bit_access(struct ed_softc *sc)
135 * Disable 16 bit access to shared memory
137 if (sc->isa16bit && sc->vendor == ED_VENDOR_WD_SMC) {
138 if (sc->chip_type == ED_CHIP_TYPE_WD790)
139 ed_asic_outb(sc, ED_WD_MSR, 0x00);
140 ed_asic_outb(sc, ED_WD_LAAR,
141 sc->wd_laar_proto & ~ED_WD_LAAR_M16EN);
146 ed_enable_16bit_access(struct ed_softc *sc)
148 if (sc->isa16bit && sc->vendor == ED_VENDOR_WD_SMC) {
149 ed_asic_outb(sc, ED_WD_LAAR,
150 sc->wd_laar_proto | ED_WD_LAAR_M16EN);
151 if (sc->chip_type == ED_CHIP_TYPE_WD790)
152 ed_asic_outb(sc, ED_WD_MSR, ED_WD_MSR_MENB);
157 * Allocate a port resource with the given resource id.
160 ed_alloc_port(device_t dev, int rid, int size)
162 struct ed_softc *sc = device_get_softc(dev);
163 struct resource *res;
165 res = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
166 0ul, ~0ul, size, RF_ACTIVE);
170 sc->port_used = size;
171 sc->port_bst = rman_get_bustag(res);
172 sc->port_bsh = rman_get_bushandle(res);
179 * Allocate a memory resource with the given resource id.
182 ed_alloc_memory(device_t dev, int rid, int size)
184 struct ed_softc *sc = device_get_softc(dev);
185 struct resource *res;
187 res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid,
188 0ul, ~0ul, size, RF_ACTIVE);
193 sc->mem_bst = rman_get_bustag(res);
194 sc->mem_bsh = rman_get_bushandle(res);
201 * Allocate an irq resource with the given resource id.
204 ed_alloc_irq(device_t dev, int rid, int flags)
206 struct ed_softc *sc = device_get_softc(dev);
207 struct resource *res;
209 res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE | flags);
219 * Release all resources
222 ed_release_resources(device_t dev)
224 struct ed_softc *sc = device_get_softc(dev);
227 bus_release_resource(dev, SYS_RES_IOPORT,
228 sc->port_rid, sc->port_res);
232 bus_release_resource(dev, SYS_RES_MEMORY,
233 sc->mem_rid, sc->mem_res);
237 bus_release_resource(dev, SYS_RES_IRQ,
238 sc->irq_rid, sc->irq_res);
246 * Install interface into kernel networking data structures
249 ed_attach(device_t dev)
251 struct ed_softc *sc = device_get_softc(dev);
256 ifp = sc->ifp = if_alloc(IFT_ETHER);
258 device_printf(dev, "can not if_alloc()\n");
263 if (sc->readmem == NULL) {
264 if (sc->mem_shared) {
266 sc->readmem = ed_shmem_readmem16;
268 sc->readmem = ed_shmem_readmem8;
270 sc->readmem = ed_pio_readmem;
274 callout_init_mtx(&sc->tick_ch, ED_MUTEX(sc), 0);
276 * Set interface to stopped condition (reset)
281 * Initialize ifnet structure
284 if_initname(ifp, device_get_name(dev), device_get_unit(dev));
285 ifp->if_start = ed_start;
286 ifp->if_ioctl = ed_ioctl;
287 ifp->if_watchdog = ed_watchdog;
288 ifp->if_init = ed_init;
289 IFQ_SET_MAXLEN(&ifp->if_snd, IFQ_MAXLEN);
290 ifp->if_snd.ifq_drv_maxlen = IFQ_MAXLEN;
291 IFQ_SET_READY(&ifp->if_snd);
292 ifp->if_linkmib = &sc->mibdata;
293 ifp->if_linkmiblen = sizeof sc->mibdata;
295 * XXX - should do a better job.
297 if (sc->chip_type == ED_CHIP_TYPE_WD790)
298 sc->mibdata.dot3StatsEtherChipSet =
299 DOT3CHIPSET(dot3VendorWesternDigital,
300 dot3ChipSetWesternDigital83C790);
302 sc->mibdata.dot3StatsEtherChipSet =
303 DOT3CHIPSET(dot3VendorNational,
304 dot3ChipSetNational8390);
305 sc->mibdata.dot3Compliance = DOT3COMPLIANCE_COLLS;
308 * Set default state for ALTPHYS flag (used to disable the
309 * tranceiver for AUI operation), based on config option.
311 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
312 if (device_get_flags(dev) & ED_FLAGS_DISABLE_TRANCEIVER)
313 ifp->if_flags |= IFF_ALTPHYS;
316 * Attach the interface
318 ether_ifattach(ifp, sc->enaddr);
319 /* device attach does transition from UNCONFIGURED to IDLE state */
321 if (bootverbose || 1) {
322 if (sc->type_str && (*sc->type_str != 0))
323 device_printf(dev, "type %s ", sc->type_str);
325 device_printf(dev, "type unknown (0x%x) ", sc->type);
328 if (sc->vendor == ED_VENDOR_HP)
330 (sc->hpp_id & ED_HPP_ID_16_BIT_ACCESS) ?
332 sc->hpp_mem_start ? "memory mapped" : "regular");
335 printf("%s ", sc->isa16bit ? "(16 bit)" : "(8 bit)");
337 #if defined(ED_HPP) || defined(ED_3C503)
338 printf("%s", (((sc->vendor == ED_VENDOR_3COM) ||
339 (sc->vendor == ED_VENDOR_HP)) &&
340 (ifp->if_flags & IFF_ALTPHYS)) ?
341 " tranceiver disabled" : "");
349 * Detach the driver from the hardware and other systems in the kernel.
352 ed_detach(device_t dev)
354 struct ed_softc *sc = device_get_softc(dev);
355 struct ifnet *ifp = sc->ifp;
357 ED_ASSERT_UNLOCKED(sc);
359 if (bus_child_present(dev))
361 ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
363 callout_drain(&sc->tick_ch);
365 bus_teardown_intr(dev, sc->irq_res, sc->irq_handle);
366 ed_release_resources(dev);
368 bus_generic_detach(dev);
376 ed_reset(struct ifnet *ifp)
378 struct ed_softc *sc = ifp->if_softc;
380 ED_ASSERT_LOCKED(sc);
382 * Stop interface and re-initialize.
389 ed_stop_hw(struct ed_softc *sc)
394 * Stop everything on the interface, and select page 0 registers.
396 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STP);
399 * Wait for interface to enter stopped state, but limit # of checks to
400 * 'n' (about 5ms). It shouldn't even take 5us on modern DS8390's, but
401 * just in case it's an old one.
403 if (sc->chip_type != ED_CHIP_TYPE_AX88190)
404 while (((ed_nic_inb(sc, ED_P0_ISR) & ED_ISR_RST) == 0) && --n)
409 * Take interface offline.
412 ed_stop(struct ed_softc *sc)
414 ED_ASSERT_LOCKED(sc);
416 callout_stop(&sc->tick_ch);
421 * Device timeout/watchdog routine. Entered if the device neglects to
422 * generate an interrupt after a transmit has been started on it.
425 ed_watchdog(struct ifnet *ifp)
427 struct ed_softc *sc = ifp->if_softc;
429 log(LOG_ERR, "%s: device timeout\n", ifp->if_xname);
443 struct ed_softc *sc = xsc;
445 ED_ASSERT_UNLOCKED(sc);
452 ed_init_locked(struct ed_softc *sc)
454 struct ifnet *ifp = sc->ifp;
457 ED_ASSERT_LOCKED(sc);
460 * Initialize the NIC in the exact order outlined in the NS manual.
461 * This init procedure is "mandatory"...don't change what or when
465 /* reset transmitter flags */
473 /* This variable is used below - don't move this assignment */
474 sc->next_packet = sc->rec_page_start + 1;
477 * Set interface for page 0, Remote DMA complete, Stopped
479 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STP);
483 * Set FIFO threshold to 8, No auto-init Remote DMA, byte
484 * order=80x86, word-wide DMA xfers,
486 ed_nic_outb(sc, ED_P0_DCR, ED_DCR_FT1 | ED_DCR_WTS | ED_DCR_LS);
489 * Same as above, but byte-wide DMA xfers
491 ed_nic_outb(sc, ED_P0_DCR, ED_DCR_FT1 | ED_DCR_LS);
494 * Clear Remote Byte Count Registers
496 ed_nic_outb(sc, ED_P0_RBCR0, 0);
497 ed_nic_outb(sc, ED_P0_RBCR1, 0);
500 * For the moment, don't store incoming packets in memory.
502 ed_nic_outb(sc, ED_P0_RCR, ED_RCR_MON);
505 * Place NIC in internal loopback mode
507 ed_nic_outb(sc, ED_P0_TCR, ED_TCR_LB0);
510 * Initialize transmit/receive (ring-buffer) Page Start
512 ed_nic_outb(sc, ED_P0_TPSR, sc->tx_page_start);
513 ed_nic_outb(sc, ED_P0_PSTART, sc->rec_page_start);
514 /* Set lower bits of byte addressable framing to 0 */
515 if (sc->chip_type == ED_CHIP_TYPE_WD790)
516 ed_nic_outb(sc, 0x09, 0);
519 * Initialize Receiver (ring-buffer) Page Stop and Boundry
521 ed_nic_outb(sc, ED_P0_PSTOP, sc->rec_page_stop);
522 ed_nic_outb(sc, ED_P0_BNRY, sc->rec_page_start);
525 * Clear all interrupts. A '1' in each bit position clears the
526 * corresponding flag.
528 ed_nic_outb(sc, ED_P0_ISR, 0xff);
531 * Enable the following interrupts: receive/transmit complete,
532 * receive/transmit error, and Receiver OverWrite.
534 * Counter overflow and Remote DMA complete are *not* enabled.
536 ed_nic_outb(sc, ED_P0_IMR,
537 ED_IMR_PRXE | ED_IMR_PTXE | ED_IMR_RXEE | ED_IMR_TXEE | ED_IMR_OVWE);
540 * Program Command Register for page 1
542 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_PAGE_1 | ED_CR_STP);
545 * Copy out our station address
547 for (i = 0; i < ETHER_ADDR_LEN; ++i)
548 ed_nic_outb(sc, ED_P1_PAR(i), IFP2ENADDR(sc->ifp)[i]);
551 * Set Current Page pointer to next_packet (initialized above)
553 ed_nic_outb(sc, ED_P1_CURR, sc->next_packet);
556 * Program Receiver Configuration Register and multicast filter. CR is
557 * set to page 0 on return.
562 * Take interface out of loopback
564 ed_nic_outb(sc, ED_P0_TCR, 0);
568 * If this is a 3Com board, the tranceiver must be software enabled
569 * (there is no settable hardware default).
571 if (sc->vendor == ED_VENDOR_3COM) {
572 if (ifp->if_flags & IFF_ALTPHYS)
573 ed_asic_outb(sc, ED_3COM_CR, 0);
575 ed_asic_outb(sc, ED_3COM_CR, ED_3COM_CR_XSEL);
582 * Set 'running' flag, and clear output active flag.
584 ifp->if_drv_flags |= IFF_DRV_RUNNING;
585 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
588 * ...and attempt to start output
590 ed_start_locked(ifp);
593 callout_reset(&sc->tick_ch, hz, sc->sc_tick, sc);
597 * This routine actually starts the transmission on the interface
600 ed_xmit(struct ed_softc *sc)
602 struct ifnet *ifp = sc->ifp;
605 len = sc->txb_len[sc->txb_next_tx];
608 * Set NIC for page 0 register access
610 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STA);
613 * Set TX buffer start page
615 ed_nic_outb(sc, ED_P0_TPSR, sc->tx_page_start +
616 sc->txb_next_tx * ED_TXBUF_SIZE);
621 ed_nic_outb(sc, ED_P0_TBCR0, len);
622 ed_nic_outb(sc, ED_P0_TBCR1, len >> 8);
625 * Set page 0, Remote DMA complete, Transmit Packet, and *Start*
627 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_TXP | ED_CR_STA);
631 * Point to next transmit buffer slot and wrap if necessary.
634 if (sc->txb_next_tx == sc->txb_cnt)
638 * Set a timer just in case we never hear from the board again
644 * Start output on interface.
645 * We make two assumptions here:
646 * 1) that the current priority is set to splimp _before_ this code
647 * is called *and* is returned to the appropriate priority after
649 * 2) that the IFF_DRV_OACTIVE flag is checked before this code is called
650 * (i.e. that the output part of the interface is idle)
653 ed_start(struct ifnet *ifp)
655 struct ed_softc *sc = ifp->if_softc;
657 ED_ASSERT_UNLOCKED(sc);
659 ed_start_locked(ifp);
664 ed_start_locked(struct ifnet *ifp)
666 struct ed_softc *sc = ifp->if_softc;
671 ED_ASSERT_LOCKED(sc);
675 * First, see if there are buffered packets and an idle transmitter -
676 * should never happen at this point.
678 if (sc->txb_inuse && (sc->xmit_busy == 0)) {
679 printf("ed: packets buffered, but transmitter idle\n");
684 * See if there is room to put another packet in the buffer.
686 if (sc->txb_inuse == sc->txb_cnt) {
689 * No room. Indicate this to the outside world and exit.
691 ifp->if_drv_flags |= IFF_DRV_OACTIVE;
694 IFQ_DRV_DEQUEUE(&ifp->if_snd, m);
698 * We are using the !OACTIVE flag to indicate to the outside
699 * world that we can accept an additional packet rather than
700 * that the transmitter is _actually_ active. Indeed, the
701 * transmitter may be active, but if we haven't filled all the
702 * buffers with data then we still want to accept more.
704 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
709 * Copy the mbuf chain into the transmit buffer
713 /* txb_new points to next open buffer slot */
714 buffer = sc->mem_start + (sc->txb_new * ED_TXBUF_SIZE * ED_PAGE_SIZE);
716 if (sc->mem_shared) {
718 * Special case setup for 16 bit boards...
721 switch (sc->vendor) {
724 * For 16bit 3Com boards (which have 16k of
725 * memory), we have the xmit buffers in a
726 * different page of memory ('page 0') - so
730 ed_asic_outb(sc, ED_3COM_GACFR,
735 * Enable 16bit access to shared memory on
738 * XXX - same as ed_enable_16bit_access()
740 case ED_VENDOR_WD_SMC:
741 ed_asic_outb(sc, ED_WD_LAAR,
742 sc->wd_laar_proto | ED_WD_LAAR_M16EN);
743 if (sc->chip_type == ED_CHIP_TYPE_WD790)
744 ed_asic_outb(sc, ED_WD_MSR, ED_WD_MSR_MENB);
748 for (len = 0; m != 0; m = m->m_next) {
750 bus_space_write_region_2(sc->mem_bst,
752 mtod(m, uint16_t *), (m->m_len + 1)/ 2);
754 bus_space_write_region_1(sc->mem_bst,
756 mtod(m, uint8_t *), m->m_len);
762 * Restore previous shared memory access
765 switch (sc->vendor) {
768 ed_asic_outb(sc, ED_3COM_GACFR,
769 ED_3COM_GACFR_RSEL | ED_3COM_GACFR_MBS0);
772 case ED_VENDOR_WD_SMC:
773 /* XXX - same as ed_disable_16bit_access() */
774 if (sc->chip_type == ED_CHIP_TYPE_WD790)
775 ed_asic_outb(sc, ED_WD_MSR, 0x00);
776 ed_asic_outb(sc, ED_WD_LAAR,
777 sc->wd_laar_proto & ~ED_WD_LAAR_M16EN);
782 len = ed_pio_write_mbufs(sc, m, buffer);
789 sc->txb_len[sc->txb_new] = max(len, (ETHER_MIN_LEN-ETHER_CRC_LEN));
794 * Point to next buffer slot and wrap if necessary.
797 if (sc->txb_new == sc->txb_cnt)
800 if (sc->xmit_busy == 0)
804 * Tap off here if there is a bpf listener.
811 * Loop back to the top to possibly buffer more packets
817 * Ethernet interface receiver interrupt.
820 ed_rint(struct ed_softc *sc)
822 struct ifnet *ifp = sc->ifp;
825 struct ed_ring packet_hdr;
826 bus_size_t packet_ptr;
828 ED_ASSERT_LOCKED(sc);
831 * Set NIC to page 1 registers to get 'current' pointer
833 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_PAGE_1 | ED_CR_STA);
836 * 'sc->next_packet' is the logical beginning of the ring-buffer -
837 * i.e. it points to where new data has been buffered. The 'CURR'
838 * (current) register points to the logical end of the ring-buffer -
839 * i.e. it points to where additional new data will be added. We loop
840 * here until the logical beginning equals the logical end (or in
841 * other words, until the ring-buffer is empty).
843 while (sc->next_packet != ed_nic_inb(sc, ED_P1_CURR)) {
845 /* get pointer to this buffer's header structure */
846 packet_ptr = sc->mem_ring +
847 (sc->next_packet - sc->rec_page_start) * ED_PAGE_SIZE;
850 * The byte count includes a 4 byte header that was added by
853 sc->readmem(sc, packet_ptr, (char *) &packet_hdr,
855 len = packet_hdr.count;
856 if (len > (ETHER_MAX_LEN - ETHER_CRC_LEN + sizeof(struct ed_ring)) ||
857 len < (ETHER_MIN_LEN - ETHER_CRC_LEN + sizeof(struct ed_ring))) {
859 * Length is a wild value. There's a good chance that
860 * this was caused by the NIC being old and buggy.
861 * The bug is that the length low byte is duplicated in
862 * the high byte. Try to recalculate the length based on
863 * the pointer to the next packet.
866 * NOTE: sc->next_packet is pointing at the current packet.
868 len &= ED_PAGE_SIZE - 1; /* preserve offset into page */
869 if (packet_hdr.next_packet >= sc->next_packet)
870 len += (packet_hdr.next_packet -
871 sc->next_packet) * ED_PAGE_SIZE;
874 ((packet_hdr.next_packet - sc->rec_page_start) +
875 (sc->rec_page_stop - sc->next_packet)) * ED_PAGE_SIZE;
877 * because buffers are aligned on 256-byte boundary,
878 * the length computed above is off by 256 in almost
879 * all cases. Fix it...
883 if (len > (ETHER_MAX_LEN - ETHER_CRC_LEN
884 + sizeof(struct ed_ring)))
885 sc->mibdata.dot3StatsFrameTooLongs++;
889 * Be fairly liberal about what we allow as a "reasonable" length
890 * so that a [crufty] packet will make it to BPF (and can thus
891 * be analyzed). Note that all that is really important is that
892 * we have a length that will fit into one mbuf cluster or less;
893 * the upper layer protocols can then figure out the length from
894 * their own length field(s).
895 * But make sure that we have at least a full ethernet header
896 * or we would be unable to call ether_input() later.
898 if ((len >= sizeof(struct ed_ring) + ETHER_HDR_LEN) &&
900 (packet_hdr.next_packet >= sc->rec_page_start) &&
901 (packet_hdr.next_packet < sc->rec_page_stop)) {
905 ed_get_packet(sc, packet_ptr + sizeof(struct ed_ring),
906 len - sizeof(struct ed_ring));
910 * Really BAD. The ring pointers are corrupted.
913 "%s: NIC memory corrupt - invalid packet length %d\n",
921 * Update next packet pointer
923 sc->next_packet = packet_hdr.next_packet;
926 * Update NIC boundry pointer - being careful to keep it one
927 * buffer behind. (as recommended by NS databook)
929 boundry = sc->next_packet - 1;
930 if (boundry < sc->rec_page_start)
931 boundry = sc->rec_page_stop - 1;
934 * Set NIC to page 0 registers to update boundry register
936 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STA);
937 ed_nic_outb(sc, ED_P0_BNRY, boundry);
940 * Set NIC to page 1 registers before looping to top (prepare
941 * to get 'CURR' current pointer)
943 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_PAGE_1 | ED_CR_STA);
948 * Ethernet interface interrupt processor
953 struct ed_softc *sc = (struct ed_softc*) arg;
954 struct ifnet *ifp = sc->ifp;
959 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) {
964 * Set NIC to page 0 registers
966 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STA);
969 * loop until there are no more new interrupts. When the card
970 * goes away, the hardware will read back 0xff. Looking at
971 * the interrupts, it would appear that 0xff is impossible,
972 * or at least extremely unlikely.
974 while ((isr = ed_nic_inb(sc, ED_P0_ISR)) != 0 && isr != 0xff) {
977 * reset all the bits that we are 'acknowledging' by writing a
978 * '1' to each bit position that was set (writing a '1'
981 ed_nic_outb(sc, ED_P0_ISR, isr);
984 * XXX workaround for AX88190
985 * We limit this to 5000 iterations. At 1us per inb/outb,
986 * this translates to about 15ms, which should be plenty
987 * of time, and also gives protection in the card eject
990 if (sc->chip_type == ED_CHIP_TYPE_AX88190) {
991 count = 5000; /* 15ms */
992 while (count-- && (ed_nic_inb(sc, ED_P0_ISR) & isr)) {
993 ed_nic_outb(sc, ED_P0_ISR,0);
994 ed_nic_outb(sc, ED_P0_ISR,isr);
1001 * Handle transmitter interrupts. Handle these first because
1002 * the receiver will reset the board under some conditions.
1004 if (isr & (ED_ISR_PTX | ED_ISR_TXE)) {
1005 u_char collisions = ed_nic_inb(sc, ED_P0_NCR) & 0x0f;
1008 * Check for transmit error. If a TX completed with an
1009 * error, we end up throwing the packet away. Really
1010 * the only error that is possible is excessive
1011 * collisions, and in this case it is best to allow
1012 * the automatic mechanisms of TCP to backoff the
1013 * flow. Of course, with UDP we're screwed, but this
1014 * is expected when a network is heavily loaded.
1016 (void) ed_nic_inb(sc, ED_P0_TSR);
1017 if (isr & ED_ISR_TXE) {
1021 * Excessive collisions (16)
1023 tsr = ed_nic_inb(sc, ED_P0_TSR);
1024 if ((tsr & ED_TSR_ABT)
1025 && (collisions == 0)) {
1028 * When collisions total 16, the
1029 * P0_NCR will indicate 0, and the
1033 sc->mibdata.dot3StatsExcessiveCollisions++;
1034 sc->mibdata.dot3StatsCollFrequencies[15]++;
1036 if (tsr & ED_TSR_OWC)
1037 sc->mibdata.dot3StatsLateCollisions++;
1038 if (tsr & ED_TSR_CDH)
1039 sc->mibdata.dot3StatsSQETestErrors++;
1040 if (tsr & ED_TSR_CRS)
1041 sc->mibdata.dot3StatsCarrierSenseErrors++;
1042 if (tsr & ED_TSR_FU)
1043 sc->mibdata.dot3StatsInternalMacTransmitErrors++;
1046 * update output errors counter
1052 * Update total number of successfully
1053 * transmitted packets.
1059 * reset tx busy and output active flags
1062 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
1065 * clear watchdog timer
1070 * Add in total number of collisions on last
1073 ifp->if_collisions += collisions;
1074 switch(collisions) {
1079 sc->mibdata.dot3StatsSingleCollisionFrames++;
1080 sc->mibdata.dot3StatsCollFrequencies[0]++;
1083 sc->mibdata.dot3StatsMultipleCollisionFrames++;
1085 dot3StatsCollFrequencies[collisions-1]
1091 * Decrement buffer in-use count if not zero (can only
1092 * be zero if a transmitter interrupt occured while
1093 * not actually transmitting). If data is ready to
1094 * transmit, start it transmitting, otherwise defer
1095 * until after handling receiver
1097 if (sc->txb_inuse && --sc->txb_inuse)
1102 * Handle receiver interrupts
1104 if (isr & (ED_ISR_PRX | ED_ISR_RXE | ED_ISR_OVW)) {
1107 * Overwrite warning. In order to make sure that a
1108 * lockup of the local DMA hasn't occurred, we reset
1109 * and re-init the NIC. The NSC manual suggests only a
1110 * partial reset/re-init is necessary - but some chips
1111 * seem to want more. The DMA lockup has been seen
1112 * only with early rev chips - Methinks this bug was
1113 * fixed in later revs. -DG
1115 if (isr & ED_ISR_OVW) {
1119 "%s: warning - receiver ring buffer overrun\n",
1124 * Stop/reset/re-init NIC
1130 * Receiver Error. One or more of: CRC error,
1131 * frame alignment error FIFO overrun, or
1134 if (isr & ED_ISR_RXE) {
1136 rsr = ed_nic_inb(sc, ED_P0_RSR);
1137 if (rsr & ED_RSR_CRC)
1138 sc->mibdata.dot3StatsFCSErrors++;
1139 if (rsr & ED_RSR_FAE)
1140 sc->mibdata.dot3StatsAlignmentErrors++;
1141 if (rsr & ED_RSR_FO)
1142 sc->mibdata.dot3StatsInternalMacReceiveErrors++;
1145 if_printf(ifp, "receive error %x\n",
1146 ed_nic_inb(sc, ED_P0_RSR));
1151 * Go get the packet(s) XXX - Doing this on an
1152 * error is dubious because there shouldn't be
1153 * any data to get (we've configured the
1154 * interface to not accept packets with
1159 * Enable 16bit access to shared memory first
1162 ed_enable_16bit_access(sc);
1164 ed_disable_16bit_access(sc);
1169 * If it looks like the transmitter can take more data,
1170 * attempt to start output on the interface. This is done
1171 * after handling the receiver to give the receiver priority.
1173 if ((ifp->if_drv_flags & IFF_DRV_OACTIVE) == 0)
1174 ed_start_locked(ifp);
1177 * return NIC CR to standard state: page 0, remote DMA
1178 * complete, start (toggling the TXP bit off, even if was just
1179 * set in the transmit routine, is *okay* - it is 'edge'
1180 * triggered from low to high)
1182 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STA);
1185 * If the Network Talley Counters overflow, read them to reset
1186 * them. It appears that old 8390's won't clear the ISR flag
1187 * otherwise - resulting in an infinite loop.
1189 if (isr & ED_ISR_CNT) {
1190 (void) ed_nic_inb(sc, ED_P0_CNTR0);
1191 (void) ed_nic_inb(sc, ED_P0_CNTR1);
1192 (void) ed_nic_inb(sc, ED_P0_CNTR2);
1199 * Process an ioctl request.
1202 ed_ioctl(struct ifnet *ifp, u_long command, caddr_t data)
1204 struct ed_softc *sc = ifp->if_softc;
1205 struct ifreq *ifr = (struct ifreq *)data;
1209 * XXX really needed?
1212 ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
1219 * If the interface is marked up and stopped, then start it.
1220 * If it is marked down and running, then stop it.
1223 if (ifp->if_flags & IFF_UP) {
1224 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0)
1227 if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
1229 ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
1234 * Promiscuous flag may have changed, so reprogram the RCR.
1239 * An unfortunate hack to provide the (required) software
1240 * control of the tranceiver for 3Com/HP boards.
1241 * The ALTPHYS flag disables the tranceiver if set.
1244 if (sc->vendor == ED_VENDOR_3COM) {
1245 if (ifp->if_flags & IFF_ALTPHYS)
1246 ed_asic_outb(sc, ED_3COM_CR, 0);
1248 ed_asic_outb(sc, ED_3COM_CR, ED_3COM_CR_XSEL);
1252 if (sc->vendor == ED_VENDOR_HP)
1253 ed_hpp_set_physical_link(sc);
1261 * Multicast list has changed; set the hardware filter
1272 if (sc->sc_media_ioctl == NULL) {
1276 sc->sc_media_ioctl(sc, ifr, command);
1280 error = ether_ioctl(ifp, command, data);
1287 * Given a source and destination address, copy 'amount' of a packet from
1288 * the ring buffer into a linear destination buffer. Takes into account
1291 static __inline void
1292 ed_ring_copy(struct ed_softc *sc, bus_size_t src, char *dst, u_short amount)
1296 /* does copy wrap to lower addr in ring buffer? */
1297 if (src + amount > sc->mem_end) {
1298 tmp_amount = sc->mem_end - src;
1299 /* copy amount up to end of NIC memory */
1300 sc->readmem(sc, src, dst, tmp_amount);
1301 amount -= tmp_amount;
1305 sc->readmem(sc, src, dst, amount);
1309 * Retreive packet from shared memory and send to the next level up via
1313 ed_get_packet(struct ed_softc *sc, bus_size_t buf, u_short len)
1315 struct ifnet *ifp = sc->ifp;
1316 struct ether_header *eh;
1319 /* Allocate a header mbuf */
1320 MGETHDR(m, M_DONTWAIT, MT_DATA);
1323 m->m_pkthdr.rcvif = ifp;
1324 m->m_pkthdr.len = m->m_len = len;
1327 * We always put the received packet in a single buffer -
1328 * either with just an mbuf header or in a cluster attached
1329 * to the header. The +2 is to compensate for the alignment
1332 if ((len + 2) > MHLEN) {
1333 /* Attach an mbuf cluster */
1334 MCLGET(m, M_DONTWAIT);
1336 /* Insist on getting a cluster */
1337 if ((m->m_flags & M_EXT) == 0) {
1344 * The +2 is to longword align the start of the real packet.
1345 * This is important for NFS.
1348 eh = mtod(m, struct ether_header *);
1351 * Get packet, including link layer address, from interface.
1353 ed_ring_copy(sc, buf, (char *)eh, len);
1355 m->m_pkthdr.len = m->m_len = len;
1358 (*ifp->if_input)(ifp, m);
1363 * Supporting routines
1367 * Given a NIC memory source address and a host memory destination
1368 * address, copy 'amount' from NIC to host using shared memory.
1369 * The 'amount' is rounded up to a word - okay as long as mbufs
1370 * are word sized. That's what the +1 is below.
1371 * This routine accesses things as 16 bit quantities.
1374 ed_shmem_readmem16(struct ed_softc *sc, bus_size_t src, uint8_t *dst,
1377 bus_space_read_region_2(sc->mem_bst, sc->mem_bsh, src, (uint16_t *)dst,
1382 * Given a NIC memory source address and a host memory destination
1383 * address, copy 'amount' from NIC to host using shared memory.
1384 * This routine accesses things as 8 bit quantities.
1387 ed_shmem_readmem8(struct ed_softc *sc, bus_size_t src, uint8_t *dst,
1390 bus_space_read_region_1(sc->mem_bst, sc->mem_bsh, src, dst, amount);
1394 * Given a NIC memory source address and a host memory destination
1395 * address, copy 'amount' from NIC to host using Programmed I/O.
1396 * The 'amount' is rounded up to a word - okay as long as mbufs
1398 * This routine is currently Novell-specific.
1401 ed_pio_readmem(struct ed_softc *sc, bus_size_t src, uint8_t *dst,
1404 /* Regular Novell cards */
1405 /* select page 0 registers */
1406 ed_nic_outb(sc, ED_P0_CR, ED_CR_RD2 | ED_CR_STA);
1408 /* round up to a word */
1412 /* set up DMA byte count */
1413 ed_nic_outb(sc, ED_P0_RBCR0, amount);
1414 ed_nic_outb(sc, ED_P0_RBCR1, amount >> 8);
1416 /* set up source address in NIC mem */
1417 ed_nic_outb(sc, ED_P0_RSAR0, src);
1418 ed_nic_outb(sc, ED_P0_RSAR1, src >> 8);
1420 ed_nic_outb(sc, ED_P0_CR, ED_CR_RD0 | ED_CR_STA);
1423 ed_asic_insw(sc, ED_NOVELL_DATA, dst, amount / 2);
1425 ed_asic_insb(sc, ED_NOVELL_DATA, dst, amount);
1429 * Stripped down routine for writing a linear buffer to NIC memory.
1430 * Only used in the probe routine to test the memory. 'len' must
1434 ed_pio_writemem(struct ed_softc *sc, uint8_t *src, uint16_t dst, uint16_t len)
1436 int maxwait = 200; /* about 240us */
1438 /* select page 0 registers */
1439 ed_nic_outb(sc, ED_P0_CR, ED_CR_RD2 | ED_CR_STA);
1441 /* reset remote DMA complete flag */
1442 ed_nic_outb(sc, ED_P0_ISR, ED_ISR_RDC);
1444 /* set up DMA byte count */
1445 ed_nic_outb(sc, ED_P0_RBCR0, len);
1446 ed_nic_outb(sc, ED_P0_RBCR1, len >> 8);
1448 /* set up destination address in NIC mem */
1449 ed_nic_outb(sc, ED_P0_RSAR0, dst);
1450 ed_nic_outb(sc, ED_P0_RSAR1, dst >> 8);
1452 /* set remote DMA write */
1453 ed_nic_outb(sc, ED_P0_CR, ED_CR_RD1 | ED_CR_STA);
1456 ed_asic_outsw(sc, ED_NOVELL_DATA, src, len / 2);
1458 ed_asic_outsb(sc, ED_NOVELL_DATA, src, len);
1461 * Wait for remote DMA complete. This is necessary because on the
1462 * transmit side, data is handled internally by the NIC in bursts and
1463 * we can't start another remote DMA until this one completes. Not
1464 * waiting causes really bad things to happen - like the NIC
1465 * irrecoverably jamming the ISA bus.
1467 while (((ed_nic_inb(sc, ED_P0_ISR) & ED_ISR_RDC) != ED_ISR_RDC) &&
1473 * Write an mbuf chain to the destination NIC memory address using
1477 ed_pio_write_mbufs(struct ed_softc *sc, struct mbuf *m, bus_size_t dst)
1479 struct ifnet *ifp = sc->ifp;
1480 unsigned short total_len, dma_len;
1482 int maxwait = 200; /* about 240us */
1484 ED_ASSERT_LOCKED(sc);
1487 /* HP PC Lan+ cards need special handling */
1488 if (sc->vendor == ED_VENDOR_HP && sc->type == ED_TYPE_HP_PCLANPLUS)
1489 return ed_hpp_write_mbufs(sc, m, dst);
1492 /* Regular Novell cards */
1493 /* First, count up the total number of bytes to copy */
1494 for (total_len = 0, mp = m; mp; mp = mp->m_next)
1495 total_len += mp->m_len;
1497 dma_len = total_len;
1498 if (sc->isa16bit && (dma_len & 1))
1501 /* select page 0 registers */
1502 ed_nic_outb(sc, ED_P0_CR, ED_CR_RD2 | ED_CR_STA);
1504 /* reset remote DMA complete flag */
1505 ed_nic_outb(sc, ED_P0_ISR, ED_ISR_RDC);
1507 /* set up DMA byte count */
1508 ed_nic_outb(sc, ED_P0_RBCR0, dma_len);
1509 ed_nic_outb(sc, ED_P0_RBCR1, dma_len >> 8);
1511 /* set up destination address in NIC mem */
1512 ed_nic_outb(sc, ED_P0_RSAR0, dst);
1513 ed_nic_outb(sc, ED_P0_RSAR1, dst >> 8);
1515 /* set remote DMA write */
1516 ed_nic_outb(sc, ED_P0_CR, ED_CR_RD1 | ED_CR_STA);
1519 * Transfer the mbuf chain to the NIC memory.
1520 * 16-bit cards require that data be transferred as words, and only words.
1521 * So that case requires some extra code to patch over odd-length mbufs.
1524 if (!sc->isa16bit) {
1525 /* NE1000s are easy */
1528 ed_asic_outsb(sc, ED_NOVELL_DATA,
1529 m->m_data, m->m_len);
1533 /* NE2000s are a pain */
1534 unsigned char *data;
1536 unsigned char savebyte[2];
1543 data = mtod(m, caddr_t);
1544 /* finish the last word */
1546 savebyte[1] = *data;
1547 ed_asic_outw(sc, ED_NOVELL_DATA,
1548 *(u_short *)savebyte);
1553 /* output contiguous words */
1555 ed_asic_outsw(sc, ED_NOVELL_DATA,
1560 /* save last byte, if necessary */
1562 savebyte[0] = *data;
1568 /* spit last byte */
1570 ed_asic_outw(sc, ED_NOVELL_DATA, *(u_short *)savebyte);
1574 * Wait for remote DMA complete. This is necessary because on the
1575 * transmit side, data is handled internally by the NIC in bursts and
1576 * we can't start another remote DMA until this one completes. Not
1577 * waiting causes really bad things to happen - like the NIC
1578 * irrecoverably jamming the ISA bus.
1580 while (((ed_nic_inb(sc, ED_P0_ISR) & ED_ISR_RDC) != ED_ISR_RDC) &&
1585 log(LOG_WARNING, "%s: remote transmit DMA failed to complete\n",
1594 ed_setrcr(struct ed_softc *sc)
1596 struct ifnet *ifp = sc->ifp;
1600 ED_ASSERT_LOCKED(sc);
1602 /* Bit 6 in AX88190 RCR register must be set. */
1603 if (sc->chip_type == ED_CHIP_TYPE_AX88190)
1608 /* set page 1 registers */
1609 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_PAGE_1 | ED_CR_STP);
1611 if (ifp->if_flags & IFF_PROMISC) {
1614 * Reconfigure the multicast filter.
1616 for (i = 0; i < 8; i++)
1617 ed_nic_outb(sc, ED_P1_MAR(i), 0xff);
1620 * And turn on promiscuous mode. Also enable reception of
1621 * runts and packets with CRC & alignment errors.
1623 /* Set page 0 registers */
1624 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STP);
1626 ed_nic_outb(sc, ED_P0_RCR, ED_RCR_PRO | ED_RCR_AM |
1627 ED_RCR_AB | ED_RCR_AR | ED_RCR_SEP | reg1);
1629 /* set up multicast addresses and filter modes */
1630 if (ifp->if_flags & IFF_MULTICAST) {
1633 if (ifp->if_flags & IFF_ALLMULTI) {
1634 mcaf[0] = 0xffffffff;
1635 mcaf[1] = 0xffffffff;
1637 ed_ds_getmcaf(sc, mcaf);
1640 * Set multicast filter on chip.
1642 for (i = 0; i < 8; i++)
1643 ed_nic_outb(sc, ED_P1_MAR(i), ((u_char *) mcaf)[i]);
1645 /* Set page 0 registers */
1646 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STP);
1648 ed_nic_outb(sc, ED_P0_RCR, ED_RCR_AM | ED_RCR_AB | reg1);
1652 * Initialize multicast address hashing registers to
1653 * not accept multicasts.
1655 for (i = 0; i < 8; ++i)
1656 ed_nic_outb(sc, ED_P1_MAR(i), 0x00);
1658 /* Set page 0 registers */
1659 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STP);
1661 ed_nic_outb(sc, ED_P0_RCR, ED_RCR_AB | reg1);
1668 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STA);
1672 * Compute the multicast address filter from the
1673 * list of multicast addresses we need to listen to.
1676 ed_ds_getmcaf(struct ed_softc *sc, uint32_t *mcaf)
1679 u_char *af = (u_char *) mcaf;
1680 struct ifmultiaddr *ifma;
1685 IF_ADDR_LOCK(sc->ifp);
1686 TAILQ_FOREACH(ifma, &sc->ifp->if_multiaddrs, ifma_link) {
1687 if (ifma->ifma_addr->sa_family != AF_LINK)
1689 index = ether_crc32_be(LLADDR((struct sockaddr_dl *)
1690 ifma->ifma_addr), ETHER_ADDR_LEN) >> 26;
1691 af[index >> 3] |= 1 << (index & 7);
1693 IF_ADDR_UNLOCK(sc->ifp);
1697 ed_isa_mem_ok(device_t dev, u_long pmem, u_int memsize)
1699 if (pmem < 0xa0000 || pmem + memsize > 0x1000000) {
1700 device_printf(dev, "Invalid ISA memory address range "
1701 "configured: 0x%lx - 0x%lx\n", pmem, pmem + memsize);
1708 ed_clear_memory(device_t dev)
1710 struct ed_softc *sc = device_get_softc(dev);
1713 bus_space_set_region_1(sc->mem_bst, sc->mem_bsh, sc->mem_start,
1716 for (i = 0; i < sc->mem_size; i++) {
1717 if (bus_space_read_1(sc->mem_bst, sc->mem_bsh,
1718 sc->mem_start + i)) {
1719 device_printf(dev, "failed to clear shared memory at "
1720 "0x%jx - check configuration\n",
1721 (uintmax_t)rman_get_start(sc->mem_res) + i);