4 * Copyright (c) 2004-2006
5 * Damien Bergamini <damien.bergamini@free.fr>. All rights reserved.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice unmodified, this list of conditions, and the following
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 #include <sys/cdefs.h>
31 __FBSDID("$FreeBSD$");
34 * Intel(R) PRO/Wireless 2100 MiniPCI driver
35 * http://www.intel.com/network/connectivity/products/wireless/prowireless_mobile.htm
38 #include <sys/param.h>
39 #include <sys/sysctl.h>
40 #include <sys/sockio.h>
42 #include <sys/kernel.h>
43 #include <sys/socket.h>
44 #include <sys/systm.h>
45 #include <sys/malloc.h>
46 #include <sys/module.h>
48 #include <sys/endian.h>
50 #include <machine/bus.h>
51 #include <machine/resource.h>
52 #include <machine/clock.h>
55 #include <dev/pci/pcireg.h>
56 #include <dev/pci/pcivar.h>
60 #include <net/if_arp.h>
61 #include <net/ethernet.h>
62 #include <net/if_dl.h>
63 #include <net/if_media.h>
64 #include <net/if_types.h>
66 #include <netinet/in.h>
67 #include <netinet/in_systm.h>
68 #include <netinet/in_var.h>
69 #include <netinet/ip.h>
70 #include <netinet/if_ether.h>
72 #include <net80211/ieee80211_var.h>
73 #include <net80211/ieee80211_radiotap.h>
75 #include <dev/ipw/if_ipwreg.h>
76 #include <dev/ipw/if_ipwvar.h>
79 #define DPRINTF(x) do { if (ipw_debug > 0) printf x; } while (0)
80 #define DPRINTFN(n, x) do { if (ipw_debug >= (n)) printf x; } while (0)
82 SYSCTL_INT(_debug, OID_AUTO, ipw, CTLFLAG_RW, &ipw_debug, 0, "ipw debug level");
85 #define DPRINTFN(n, x)
88 MODULE_DEPEND(ipw, pci, 1, 1, 1);
89 MODULE_DEPEND(ipw, wlan, 1, 1, 1);
97 static const struct ipw_ident ipw_ident_table[] = {
98 { 0x8086, 0x1043, "Intel(R) PRO/Wireless 2100 MiniPCI" },
103 static int ipw_dma_alloc(struct ipw_softc *);
104 static void ipw_release(struct ipw_softc *);
105 static int ipw_media_change(struct ifnet *);
106 static void ipw_media_status(struct ifnet *, struct ifmediareq *);
107 static int ipw_newstate(struct ieee80211com *, enum ieee80211_state, int);
108 static uint16_t ipw_read_prom_word(struct ipw_softc *, uint8_t);
109 static void ipw_command_intr(struct ipw_softc *, struct ipw_soft_buf *);
110 static void ipw_newstate_intr(struct ipw_softc *, struct ipw_soft_buf *);
111 static void ipw_data_intr(struct ipw_softc *, struct ipw_status *,
112 struct ipw_soft_bd *, struct ipw_soft_buf *);
113 static void ipw_rx_intr(struct ipw_softc *);
114 static void ipw_release_sbd(struct ipw_softc *, struct ipw_soft_bd *);
115 static void ipw_tx_intr(struct ipw_softc *);
116 static void ipw_intr(void *);
117 static void ipw_dma_map_addr(void *, bus_dma_segment_t *, int, int);
118 static int ipw_cmd(struct ipw_softc *, uint32_t, void *, uint32_t);
119 static int ipw_tx_start(struct ifnet *, struct mbuf *,
120 struct ieee80211_node *);
121 static void ipw_start(struct ifnet *);
122 static void ipw_watchdog(struct ifnet *);
123 static int ipw_ioctl(struct ifnet *, u_long, caddr_t);
124 static void ipw_stop_master(struct ipw_softc *);
125 static int ipw_reset(struct ipw_softc *);
126 static int ipw_load_ucode(struct ipw_softc *, u_char *, int);
127 static int ipw_load_firmware(struct ipw_softc *, u_char *, int);
128 static int ipw_cache_firmware(struct ipw_softc *, void *);
129 static void ipw_free_firmware(struct ipw_softc *);
130 static int ipw_config(struct ipw_softc *);
131 static void ipw_init(void *);
132 static void ipw_stop(void *);
133 static int ipw_sysctl_stats(SYSCTL_HANDLER_ARGS);
134 static int ipw_sysctl_radio(SYSCTL_HANDLER_ARGS);
135 static uint32_t ipw_read_table1(struct ipw_softc *, uint32_t);
136 static void ipw_write_table1(struct ipw_softc *, uint32_t, uint32_t);
137 static int ipw_read_table2(struct ipw_softc *, uint32_t, void *,
139 static void ipw_read_mem_1(struct ipw_softc *, bus_size_t, uint8_t *,
141 static void ipw_write_mem_1(struct ipw_softc *, bus_size_t, uint8_t *,
144 static int ipw_probe(device_t);
145 static int ipw_attach(device_t);
146 static int ipw_detach(device_t);
147 static int ipw_shutdown(device_t);
148 static int ipw_suspend(device_t);
149 static int ipw_resume(device_t);
151 static device_method_t ipw_methods[] = {
152 /* Device interface */
153 DEVMETHOD(device_probe, ipw_probe),
154 DEVMETHOD(device_attach, ipw_attach),
155 DEVMETHOD(device_detach, ipw_detach),
156 DEVMETHOD(device_shutdown, ipw_shutdown),
157 DEVMETHOD(device_suspend, ipw_suspend),
158 DEVMETHOD(device_resume, ipw_resume),
163 static driver_t ipw_driver = {
166 sizeof (struct ipw_softc)
169 static devclass_t ipw_devclass;
171 DRIVER_MODULE(ipw, pci, ipw_driver, ipw_devclass, 0, 0);
174 * Supported rates for 802.11b mode (in 500Kbps unit).
176 static const struct ieee80211_rateset ipw_rateset_11b =
177 { 4, { 2, 4, 11, 22 } };
179 static __inline uint8_t
180 MEM_READ_1(struct ipw_softc *sc, uint32_t addr)
182 CSR_WRITE_4(sc, IPW_CSR_INDIRECT_ADDR, addr);
183 return CSR_READ_1(sc, IPW_CSR_INDIRECT_DATA);
186 static __inline uint32_t
187 MEM_READ_4(struct ipw_softc *sc, uint32_t addr)
189 CSR_WRITE_4(sc, IPW_CSR_INDIRECT_ADDR, addr);
190 return CSR_READ_4(sc, IPW_CSR_INDIRECT_DATA);
194 ipw_probe(device_t dev)
196 const struct ipw_ident *ident;
198 for (ident = ipw_ident_table; ident->name != NULL; ident++) {
199 if (pci_get_vendor(dev) == ident->vendor &&
200 pci_get_device(dev) == ident->device) {
201 device_set_desc(dev, ident->name);
208 /* Base Address Register */
209 #define IPW_PCI_BAR0 0x10
212 ipw_attach(device_t dev)
214 struct ipw_softc *sc = device_get_softc(dev);
216 struct ieee80211com *ic = &sc->sc_ic;
222 mtx_init(&sc->sc_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK,
225 if (pci_get_powerstate(dev) != PCI_POWERSTATE_D0) {
226 device_printf(dev, "chip is in D%d power mode "
227 "-- setting to D0\n", pci_get_powerstate(dev));
228 pci_set_powerstate(dev, PCI_POWERSTATE_D0);
231 pci_write_config(dev, 0x41, 0, 1);
233 /* enable bus-mastering */
234 pci_enable_busmaster(dev);
236 sc->mem_rid = IPW_PCI_BAR0;
237 sc->mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->mem_rid,
239 if (sc->mem == NULL) {
240 device_printf(dev, "could not allocate memory resource\n");
244 sc->sc_st = rman_get_bustag(sc->mem);
245 sc->sc_sh = rman_get_bushandle(sc->mem);
248 sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->irq_rid,
249 RF_ACTIVE | RF_SHAREABLE);
250 if (sc->irq == NULL) {
251 device_printf(dev, "could not allocate interrupt resource\n");
255 if (ipw_reset(sc) != 0) {
256 device_printf(dev, "could not reset adapter\n");
260 if (ipw_dma_alloc(sc) != 0) {
261 device_printf(dev, "could not allocate DMA resources\n");
265 ifp = sc->sc_ifp = if_alloc(IFT_ETHER);
267 device_printf(dev, "can not if_alloc()\n");
272 if_initname(ifp, device_get_name(dev), device_get_unit(dev));
273 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
274 ifp->if_init = ipw_init;
275 ifp->if_ioctl = ipw_ioctl;
276 ifp->if_start = ipw_start;
277 ifp->if_watchdog = ipw_watchdog;
278 IFQ_SET_MAXLEN(&ifp->if_snd, IFQ_MAXLEN);
279 ifp->if_snd.ifq_drv_maxlen = IFQ_MAXLEN;
280 IFQ_SET_READY(&ifp->if_snd);
283 ic->ic_phytype = IEEE80211_T_DS;
284 ic->ic_opmode = IEEE80211_M_STA;
285 ic->ic_state = IEEE80211_S_INIT;
287 /* set device capabilities */
288 ic->ic_caps = IEEE80211_C_SHPREAMBLE | IEEE80211_C_TXPMGT |
289 IEEE80211_C_PMGT | IEEE80211_C_IBSS | IEEE80211_C_MONITOR;
291 /* read MAC address from EEPROM */
292 val = ipw_read_prom_word(sc, IPW_EEPROM_MAC + 0);
293 ic->ic_myaddr[0] = val >> 8;
294 ic->ic_myaddr[1] = val & 0xff;
295 val = ipw_read_prom_word(sc, IPW_EEPROM_MAC + 1);
296 ic->ic_myaddr[2] = val >> 8;
297 ic->ic_myaddr[3] = val & 0xff;
298 val = ipw_read_prom_word(sc, IPW_EEPROM_MAC + 2);
299 ic->ic_myaddr[4] = val >> 8;
300 ic->ic_myaddr[5] = val & 0xff;
302 /* set supported .11b rates */
303 ic->ic_sup_rates[IEEE80211_MODE_11B] = ipw_rateset_11b;
305 /* set supported .11b channels (read from EEPROM) */
306 if ((val = ipw_read_prom_word(sc, IPW_EEPROM_CHANNEL_LIST)) == 0)
307 val = 0x7ff; /* default to channels 1-11 */
309 for (i = 1; i < 16; i++) {
310 if (val & (1 << i)) {
311 ic->ic_channels[i].ic_freq =
312 ieee80211_ieee2mhz(i, IEEE80211_CHAN_B);
313 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_B;
317 /* check support for radio transmitter switch in EEPROM */
318 if (!(ipw_read_prom_word(sc, IPW_EEPROM_RADIO) & 8))
319 sc->flags |= IPW_FLAG_HAS_RADIO_SWITCH;
321 ieee80211_ifattach(ic);
322 /* override state transition machine */
323 sc->sc_newstate = ic->ic_newstate;
324 ic->ic_newstate = ipw_newstate;
325 ieee80211_media_init(ic, ipw_media_change, ipw_media_status);
327 bpfattach2(ifp, DLT_IEEE802_11_RADIO,
328 sizeof (struct ieee80211_frame) + 64, &sc->sc_drvbpf);
330 sc->sc_rxtap_len = sizeof sc->sc_rxtapu;
331 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len);
332 sc->sc_rxtap.wr_ihdr.it_present = htole32(IPW_RX_RADIOTAP_PRESENT);
334 sc->sc_txtap_len = sizeof sc->sc_txtapu;
335 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len);
336 sc->sc_txtap.wt_ihdr.it_present = htole32(IPW_TX_RADIOTAP_PRESENT);
339 * Add a few sysctl knobs.
343 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev),
344 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, "radio",
345 CTLTYPE_INT | CTLFLAG_RD, sc, 0, ipw_sysctl_radio, "I",
346 "radio transmitter switch state (0=off, 1=on)");
348 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev),
349 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, "stats",
350 CTLTYPE_OPAQUE | CTLFLAG_RD, sc, 0, ipw_sysctl_stats, "S",
353 SYSCTL_ADD_INT(device_get_sysctl_ctx(dev),
354 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, "dwell",
355 CTLFLAG_RW, &sc->dwelltime, 0,
356 "channel dwell time (ms) for AP/station scanning");
359 * Hook our interrupt after all initialization is complete.
361 error = bus_setup_intr(dev, sc->irq, INTR_TYPE_NET | INTR_MPSAFE,
362 ipw_intr, sc, &sc->sc_ih);
364 device_printf(dev, "could not set up interrupt\n");
369 ieee80211_announce(ic);
373 fail: ipw_detach(dev);
378 ipw_detach(device_t dev)
380 struct ipw_softc *sc = device_get_softc(dev);
381 struct ieee80211com *ic = &sc->sc_ic;
382 struct ifnet *ifp = ic->ic_ifp;
388 ipw_free_firmware(sc);
394 ieee80211_ifdetach(ic);
399 if (sc->irq != NULL) {
400 bus_teardown_intr(dev, sc->irq, sc->sc_ih);
401 bus_release_resource(dev, SYS_RES_IRQ, sc->irq_rid, sc->irq);
405 bus_release_resource(dev, SYS_RES_MEMORY, sc->mem_rid, sc->mem);
409 mtx_destroy(&sc->sc_mtx);
415 ipw_dma_alloc(struct ipw_softc *sc)
417 struct ipw_soft_bd *sbd;
418 struct ipw_soft_hdr *shdr;
419 struct ipw_soft_buf *sbuf;
424 * Allocate and map tx ring.
426 error = bus_dma_tag_create(NULL, 4, 0, BUS_SPACE_MAXADDR_32BIT,
427 BUS_SPACE_MAXADDR, NULL, NULL, IPW_TBD_SZ, 1, IPW_TBD_SZ, 0, NULL,
428 NULL, &sc->tbd_dmat);
430 device_printf(sc->sc_dev, "could not create tx ring DMA tag\n");
434 error = bus_dmamem_alloc(sc->tbd_dmat, (void **)&sc->tbd_list,
435 BUS_DMA_NOWAIT | BUS_DMA_ZERO, &sc->tbd_map);
437 device_printf(sc->sc_dev,
438 "could not allocate tx ring DMA memory\n");
442 error = bus_dmamap_load(sc->tbd_dmat, sc->tbd_map, sc->tbd_list,
443 IPW_TBD_SZ, ipw_dma_map_addr, &sc->tbd_phys, 0);
445 device_printf(sc->sc_dev, "could not map tx ring DMA memory\n");
450 * Allocate and map rx ring.
452 error = bus_dma_tag_create(NULL, 4, 0, BUS_SPACE_MAXADDR_32BIT,
453 BUS_SPACE_MAXADDR, NULL, NULL, IPW_RBD_SZ, 1, IPW_RBD_SZ, 0, NULL,
454 NULL, &sc->rbd_dmat);
456 device_printf(sc->sc_dev, "could not create rx ring DMA tag\n");
460 error = bus_dmamem_alloc(sc->rbd_dmat, (void **)&sc->rbd_list,
461 BUS_DMA_NOWAIT | BUS_DMA_ZERO, &sc->rbd_map);
463 device_printf(sc->sc_dev,
464 "could not allocate rx ring DMA memory\n");
468 error = bus_dmamap_load(sc->rbd_dmat, sc->rbd_map, sc->rbd_list,
469 IPW_RBD_SZ, ipw_dma_map_addr, &sc->rbd_phys, 0);
471 device_printf(sc->sc_dev, "could not map rx ring DMA memory\n");
476 * Allocate and map status ring.
478 error = bus_dma_tag_create(NULL, 4, 0, BUS_SPACE_MAXADDR_32BIT,
479 BUS_SPACE_MAXADDR, NULL, NULL, IPW_STATUS_SZ, 1, IPW_STATUS_SZ, 0,
480 NULL, NULL, &sc->status_dmat);
482 device_printf(sc->sc_dev,
483 "could not create status ring DMA tag\n");
487 error = bus_dmamem_alloc(sc->status_dmat, (void **)&sc->status_list,
488 BUS_DMA_NOWAIT | BUS_DMA_ZERO, &sc->status_map);
490 device_printf(sc->sc_dev,
491 "could not allocate status ring DMA memory\n");
495 error = bus_dmamap_load(sc->status_dmat, sc->status_map,
496 sc->status_list, IPW_STATUS_SZ, ipw_dma_map_addr, &sc->status_phys,
499 device_printf(sc->sc_dev,
500 "could not map status ring DMA memory\n");
505 * Allocate command DMA map.
507 error = bus_dma_tag_create(NULL, 1, 0, BUS_SPACE_MAXADDR_32BIT,
508 BUS_SPACE_MAXADDR, NULL, NULL, sizeof (struct ipw_cmd), 1,
509 sizeof (struct ipw_cmd), 0, NULL, NULL, &sc->cmd_dmat);
511 device_printf(sc->sc_dev, "could not create command DMA tag\n");
515 error = bus_dmamap_create(sc->cmd_dmat, 0, &sc->cmd_map);
517 device_printf(sc->sc_dev,
518 "could not create command DMA map\n");
523 * Allocate headers DMA maps.
525 error = bus_dma_tag_create(NULL, 1, 0, BUS_SPACE_MAXADDR_32BIT,
526 BUS_SPACE_MAXADDR, NULL, NULL, sizeof (struct ipw_hdr), 1,
527 sizeof (struct ipw_hdr), 0, NULL, NULL, &sc->hdr_dmat);
529 device_printf(sc->sc_dev, "could not create header DMA tag\n");
533 SLIST_INIT(&sc->free_shdr);
534 for (i = 0; i < IPW_NDATA; i++) {
535 shdr = &sc->shdr_list[i];
536 error = bus_dmamap_create(sc->hdr_dmat, 0, &shdr->map);
538 device_printf(sc->sc_dev,
539 "could not create header DMA map\n");
542 SLIST_INSERT_HEAD(&sc->free_shdr, shdr, next);
546 * Allocate tx buffers DMA maps.
548 error = bus_dma_tag_create(NULL, 1, 0, BUS_SPACE_MAXADDR_32BIT,
549 BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES, IPW_MAX_NSEG, MCLBYTES, 0,
550 NULL, NULL, &sc->txbuf_dmat);
552 device_printf(sc->sc_dev, "could not create tx DMA tag\n");
556 SLIST_INIT(&sc->free_sbuf);
557 for (i = 0; i < IPW_NDATA; i++) {
558 sbuf = &sc->tx_sbuf_list[i];
559 error = bus_dmamap_create(sc->txbuf_dmat, 0, &sbuf->map);
561 device_printf(sc->sc_dev,
562 "could not create tx DMA map\n");
565 SLIST_INSERT_HEAD(&sc->free_sbuf, sbuf, next);
569 * Initialize tx ring.
571 for (i = 0; i < IPW_NTBD; i++) {
572 sbd = &sc->stbd_list[i];
573 sbd->bd = &sc->tbd_list[i];
574 sbd->type = IPW_SBD_TYPE_NOASSOC;
578 * Pre-allocate rx buffers and DMA maps.
580 error = bus_dma_tag_create(NULL, 1, 0, BUS_SPACE_MAXADDR_32BIT,
581 BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES, 1, MCLBYTES, 0, NULL,
582 NULL, &sc->rxbuf_dmat);
584 device_printf(sc->sc_dev, "could not create rx DMA tag\n");
588 for (i = 0; i < IPW_NRBD; i++) {
589 sbd = &sc->srbd_list[i];
590 sbuf = &sc->rx_sbuf_list[i];
591 sbd->bd = &sc->rbd_list[i];
593 sbuf->m = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR);
594 if (sbuf->m == NULL) {
595 device_printf(sc->sc_dev,
596 "could not allocate rx mbuf\n");
601 error = bus_dmamap_create(sc->rxbuf_dmat, 0, &sbuf->map);
603 device_printf(sc->sc_dev,
604 "could not create rx DMA map\n");
608 error = bus_dmamap_load(sc->rxbuf_dmat, sbuf->map,
609 mtod(sbuf->m, void *), MCLBYTES, ipw_dma_map_addr,
612 device_printf(sc->sc_dev,
613 "could not map rx DMA memory\n");
617 sbd->type = IPW_SBD_TYPE_DATA;
619 sbd->bd->physaddr = htole32(physaddr);
620 sbd->bd->len = htole32(MCLBYTES);
623 bus_dmamap_sync(sc->rbd_dmat, sc->rbd_map, BUS_DMASYNC_PREWRITE);
627 fail: ipw_release(sc);
632 ipw_release(struct ipw_softc *sc)
634 struct ipw_soft_buf *sbuf;
637 if (sc->tbd_dmat != NULL) {
638 if (sc->stbd_list != NULL) {
639 bus_dmamap_unload(sc->tbd_dmat, sc->tbd_map);
640 bus_dmamem_free(sc->tbd_dmat, sc->tbd_list,
643 bus_dma_tag_destroy(sc->tbd_dmat);
646 if (sc->rbd_dmat != NULL) {
647 if (sc->rbd_list != NULL) {
648 bus_dmamap_unload(sc->rbd_dmat, sc->rbd_map);
649 bus_dmamem_free(sc->rbd_dmat, sc->rbd_list,
652 bus_dma_tag_destroy(sc->rbd_dmat);
655 if (sc->status_dmat != NULL) {
656 if (sc->status_list != NULL) {
657 bus_dmamap_unload(sc->status_dmat, sc->status_map);
658 bus_dmamem_free(sc->status_dmat, sc->status_list,
661 bus_dma_tag_destroy(sc->status_dmat);
664 for (i = 0; i < IPW_NTBD; i++)
665 ipw_release_sbd(sc, &sc->stbd_list[i]);
667 if (sc->cmd_dmat != NULL) {
668 bus_dmamap_destroy(sc->cmd_dmat, sc->cmd_map);
669 bus_dma_tag_destroy(sc->cmd_dmat);
672 if (sc->hdr_dmat != NULL) {
673 for (i = 0; i < IPW_NDATA; i++)
674 bus_dmamap_destroy(sc->hdr_dmat, sc->shdr_list[i].map);
675 bus_dma_tag_destroy(sc->hdr_dmat);
678 if (sc->txbuf_dmat != NULL) {
679 for (i = 0; i < IPW_NDATA; i++) {
680 bus_dmamap_destroy(sc->txbuf_dmat,
681 sc->tx_sbuf_list[i].map);
683 bus_dma_tag_destroy(sc->txbuf_dmat);
686 if (sc->rxbuf_dmat != NULL) {
687 for (i = 0; i < IPW_NRBD; i++) {
688 sbuf = &sc->rx_sbuf_list[i];
689 if (sbuf->m != NULL) {
690 bus_dmamap_sync(sc->rxbuf_dmat, sbuf->map,
691 BUS_DMASYNC_POSTREAD);
692 bus_dmamap_unload(sc->rxbuf_dmat, sbuf->map);
695 bus_dmamap_destroy(sc->rxbuf_dmat, sbuf->map);
697 bus_dma_tag_destroy(sc->rxbuf_dmat);
702 ipw_shutdown(device_t dev)
704 struct ipw_softc *sc = device_get_softc(dev);
712 ipw_suspend(device_t dev)
714 struct ipw_softc *sc = device_get_softc(dev);
722 ipw_resume(device_t dev)
724 struct ipw_softc *sc = device_get_softc(dev);
725 struct ifnet *ifp = sc->sc_ic.ic_ifp;
730 pci_write_config(dev, 0x41, 0, 1);
732 if (ifp->if_flags & IFF_UP) {
733 ifp->if_init(ifp->if_softc);
734 if (ifp->if_drv_flags & IFF_DRV_RUNNING)
744 ipw_media_change(struct ifnet *ifp)
746 struct ipw_softc *sc = ifp->if_softc;
752 error = ieee80211_media_change(ifp);
753 if (error != ENETRESET) {
758 if ((ifp->if_flags & IFF_UP) && (ifp->if_drv_flags & IFF_DRV_RUNNING))
767 * The firmware automaticly adapt the transmit speed. We report the current
768 * transmit speed here.
771 ipw_media_status(struct ifnet *ifp, struct ifmediareq *imr)
773 #define N(a) (sizeof (a) / sizeof (a[0]))
774 struct ipw_softc *sc = ifp->if_softc;
775 struct ieee80211com *ic = &sc->sc_ic;
776 static const struct {
782 { IPW_RATE_DS5, 11 },
783 { IPW_RATE_DS11, 22 },
788 imr->ifm_status = IFM_AVALID;
789 imr->ifm_active = IFM_IEEE80211;
790 if (ic->ic_state == IEEE80211_S_RUN)
791 imr->ifm_status |= IFM_ACTIVE;
793 /* read current transmission rate from adapter */
794 val = ipw_read_table1(sc, IPW_INFO_CURRENT_TX_RATE) & 0xf;
796 /* convert ipw rate to 802.11 rate */
797 for (i = 0; i < N(rates) && rates[i].val != val; i++);
798 rate = (i < N(rates)) ? rates[i].rate : 0;
800 imr->ifm_active |= IFM_IEEE80211_11B;
801 imr->ifm_active |= ieee80211_rate2media(ic, rate, IEEE80211_MODE_11B);
802 switch (ic->ic_opmode) {
803 case IEEE80211_M_STA:
806 case IEEE80211_M_IBSS:
807 imr->ifm_active |= IFM_IEEE80211_IBSS;
810 case IEEE80211_M_MONITOR:
811 imr->ifm_active |= IFM_IEEE80211_MONITOR;
814 case IEEE80211_M_AHDEMO:
815 case IEEE80211_M_HOSTAP:
816 /* should not get there */
823 ipw_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg)
825 struct ifnet *ifp = ic->ic_ifp;
826 struct ipw_softc *sc = ifp->if_softc;
827 struct ieee80211_node *ni;
828 uint8_t macaddr[IEEE80211_ADDR_LEN];
832 case IEEE80211_S_RUN:
833 DELAY(200); /* firmware needs a short delay here */
835 len = IEEE80211_ADDR_LEN;
836 ipw_read_table2(sc, IPW_INFO_CURRENT_BSSID, macaddr, &len);
838 ni = ieee80211_find_node(&ic->ic_scan, macaddr);
842 ieee80211_ref_node(ni);
843 ieee80211_sta_join(ic, ni);
844 ieee80211_node_authorize(ni);
846 if (ic->ic_opmode == IEEE80211_M_STA)
847 ieee80211_notify_node_join(ic, ni, 1);
850 case IEEE80211_S_INIT:
851 case IEEE80211_S_SCAN:
852 case IEEE80211_S_AUTH:
853 case IEEE80211_S_ASSOC:
857 ic->ic_state = nstate;
862 * Read 16 bits at address 'addr' from the serial EEPROM.
865 ipw_read_prom_word(struct ipw_softc *sc, uint8_t addr)
871 /* clock C once before the first command */
872 IPW_EEPROM_CTL(sc, 0);
873 IPW_EEPROM_CTL(sc, IPW_EEPROM_S);
874 IPW_EEPROM_CTL(sc, IPW_EEPROM_S | IPW_EEPROM_C);
875 IPW_EEPROM_CTL(sc, IPW_EEPROM_S);
877 /* write start bit (1) */
878 IPW_EEPROM_CTL(sc, IPW_EEPROM_S | IPW_EEPROM_D);
879 IPW_EEPROM_CTL(sc, IPW_EEPROM_S | IPW_EEPROM_D | IPW_EEPROM_C);
881 /* write READ opcode (10) */
882 IPW_EEPROM_CTL(sc, IPW_EEPROM_S | IPW_EEPROM_D);
883 IPW_EEPROM_CTL(sc, IPW_EEPROM_S | IPW_EEPROM_D | IPW_EEPROM_C);
884 IPW_EEPROM_CTL(sc, IPW_EEPROM_S);
885 IPW_EEPROM_CTL(sc, IPW_EEPROM_S | IPW_EEPROM_C);
887 /* write address A7-A0 */
888 for (n = 7; n >= 0; n--) {
889 IPW_EEPROM_CTL(sc, IPW_EEPROM_S |
890 (((addr >> n) & 1) << IPW_EEPROM_SHIFT_D));
891 IPW_EEPROM_CTL(sc, IPW_EEPROM_S |
892 (((addr >> n) & 1) << IPW_EEPROM_SHIFT_D) | IPW_EEPROM_C);
895 IPW_EEPROM_CTL(sc, IPW_EEPROM_S);
897 /* read data Q15-Q0 */
899 for (n = 15; n >= 0; n--) {
900 IPW_EEPROM_CTL(sc, IPW_EEPROM_S | IPW_EEPROM_C);
901 IPW_EEPROM_CTL(sc, IPW_EEPROM_S);
902 tmp = MEM_READ_4(sc, IPW_MEM_EEPROM_CTL);
903 val |= ((tmp & IPW_EEPROM_Q) >> IPW_EEPROM_SHIFT_Q) << n;
906 IPW_EEPROM_CTL(sc, 0);
908 /* clear Chip Select and clock C */
909 IPW_EEPROM_CTL(sc, IPW_EEPROM_S);
910 IPW_EEPROM_CTL(sc, 0);
911 IPW_EEPROM_CTL(sc, IPW_EEPROM_C);
917 ipw_command_intr(struct ipw_softc *sc, struct ipw_soft_buf *sbuf)
921 bus_dmamap_sync(sc->rxbuf_dmat, sbuf->map, BUS_DMASYNC_POSTREAD);
923 cmd = mtod(sbuf->m, struct ipw_cmd *);
925 DPRINTFN(2, ("cmd ack'ed (%u, %u, %u, %u, %u)\n", le32toh(cmd->type),
926 le32toh(cmd->subtype), le32toh(cmd->seq), le32toh(cmd->len),
927 le32toh(cmd->status)));
933 ipw_newstate_intr(struct ipw_softc *sc, struct ipw_soft_buf *sbuf)
935 struct ieee80211com *ic = &sc->sc_ic;
938 bus_dmamap_sync(sc->rxbuf_dmat, sbuf->map, BUS_DMASYNC_POSTREAD);
940 state = le32toh(*mtod(sbuf->m, uint32_t *));
942 DPRINTFN(2, ("entering state %u\n", state));
945 case IPW_STATE_ASSOCIATED:
946 ieee80211_new_state(ic, IEEE80211_S_RUN, -1);
949 case IPW_STATE_SCANNING:
950 /* don't leave run state on background scan */
951 if (ic->ic_state != IEEE80211_S_RUN)
952 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1);
954 ic->ic_flags |= IEEE80211_F_SCAN;
957 case IPW_STATE_SCAN_COMPLETE:
958 ieee80211_notify_scan_done(ic);
959 ic->ic_flags &= ~IEEE80211_F_SCAN;
962 case IPW_STATE_ASSOCIATION_LOST:
963 ieee80211_new_state(ic, IEEE80211_S_INIT, -1);
966 case IPW_STATE_RADIO_DISABLED:
967 ic->ic_ifp->if_flags &= ~IFF_UP;
974 * XXX: Hack to set the current channel to the value advertised in beacons or
975 * probe responses. Only used during AP detection.
978 ipw_fix_channel(struct ieee80211com *ic, struct mbuf *m)
980 struct ieee80211_frame *wh;
984 wh = mtod(m, struct ieee80211_frame *);
986 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) != IEEE80211_FC0_TYPE_MGT)
989 subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
991 if (subtype != IEEE80211_FC0_SUBTYPE_BEACON &&
992 subtype != IEEE80211_FC0_SUBTYPE_PROBE_RESP)
995 frm = (uint8_t *)(wh + 1);
996 efrm = mtod(m, uint8_t *) + m->m_len;
998 frm += 12; /* skip tstamp, bintval and capinfo fields */
1000 if (*frm == IEEE80211_ELEMID_DSPARMS)
1001 #if IEEE80211_CHAN_MAX < 255
1002 if (frm[2] <= IEEE80211_CHAN_MAX)
1004 ic->ic_curchan = &ic->ic_channels[frm[2]];
1011 ipw_data_intr(struct ipw_softc *sc, struct ipw_status *status,
1012 struct ipw_soft_bd *sbd, struct ipw_soft_buf *sbuf)
1014 struct ieee80211com *ic = &sc->sc_ic;
1015 struct ifnet *ifp = ic->ic_ifp;
1016 struct mbuf *mnew, *m;
1017 struct ieee80211_frame *wh;
1018 struct ieee80211_node *ni;
1019 bus_addr_t physaddr;
1022 DPRINTFN(5, ("received frame len=%u, rssi=%u\n", le32toh(status->len),
1025 if (le32toh(status->len) < sizeof (struct ieee80211_frame_min) ||
1026 le32toh(status->len) > MCLBYTES)
1030 * Try to allocate a new mbuf for this ring element and load it before
1031 * processing the current mbuf. If the ring element cannot be loaded,
1032 * drop the received packet and reuse the old mbuf. In the unlikely
1033 * case that the old mbuf can't be reloaded either, explicitly panic.
1035 mnew = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR);
1041 bus_dmamap_sync(sc->rxbuf_dmat, sbuf->map, BUS_DMASYNC_POSTREAD);
1042 bus_dmamap_unload(sc->rxbuf_dmat, sbuf->map);
1044 error = bus_dmamap_load(sc->rxbuf_dmat, sbuf->map, mtod(mnew, void *),
1045 MCLBYTES, ipw_dma_map_addr, &physaddr, 0);
1049 /* try to reload the old mbuf */
1050 error = bus_dmamap_load(sc->rxbuf_dmat, sbuf->map,
1051 mtod(sbuf->m, void *), MCLBYTES, ipw_dma_map_addr,
1054 /* very unlikely that it will fail... */
1055 panic("%s: could not load old rx mbuf",
1056 device_get_name(sc->sc_dev));
1063 * New mbuf successfully loaded, update Rx ring and continue
1068 sbd->bd->physaddr = htole32(physaddr);
1071 m->m_pkthdr.rcvif = ifp;
1072 m->m_pkthdr.len = m->m_len = le32toh(status->len);
1074 if (bpf_peers_present(sc->sc_drvbpf)) {
1075 struct ipw_rx_radiotap_header *tap = &sc->sc_rxtap;
1078 tap->wr_antsignal = status->rssi;
1079 tap->wr_chan_freq = htole16(ic->ic_ibss_chan->ic_freq);
1080 tap->wr_chan_flags = htole16(ic->ic_ibss_chan->ic_flags);
1082 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_rxtap_len, m);
1085 if (ic->ic_state == IEEE80211_S_SCAN)
1086 ipw_fix_channel(ic, m);
1088 wh = mtod(m, struct ieee80211_frame *);
1089 mtx_unlock(&sc->sc_mtx);
1090 ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh);
1092 /* send the frame to the 802.11 layer */
1093 ieee80211_input(ic, m, ni, status->rssi, 0);
1095 /* node is no longer needed */
1096 ieee80211_free_node(ni);
1097 mtx_lock(&sc->sc_mtx);
1099 bus_dmamap_sync(sc->rbd_dmat, sc->rbd_map, BUS_DMASYNC_PREWRITE);
1103 ipw_rx_intr(struct ipw_softc *sc)
1105 struct ipw_status *status;
1106 struct ipw_soft_bd *sbd;
1107 struct ipw_soft_buf *sbuf;
1110 if (!(sc->flags & IPW_FLAG_FW_INITED))
1113 r = CSR_READ_4(sc, IPW_CSR_RX_READ);
1115 bus_dmamap_sync(sc->status_dmat, sc->status_map, BUS_DMASYNC_POSTREAD);
1117 for (i = (sc->rxcur + 1) % IPW_NRBD; i != r; i = (i + 1) % IPW_NRBD) {
1118 status = &sc->status_list[i];
1119 sbd = &sc->srbd_list[i];
1122 switch (le16toh(status->code) & 0xf) {
1123 case IPW_STATUS_CODE_COMMAND:
1124 ipw_command_intr(sc, sbuf);
1127 case IPW_STATUS_CODE_NEWSTATE:
1128 ipw_newstate_intr(sc, sbuf);
1131 case IPW_STATUS_CODE_DATA_802_3:
1132 case IPW_STATUS_CODE_DATA_802_11:
1133 ipw_data_intr(sc, status, sbd, sbuf);
1136 case IPW_STATUS_CODE_NOTIFICATION:
1137 DPRINTFN(2, ("received notification\n"));
1141 device_printf(sc->sc_dev, "unknown status code %u\n",
1142 le16toh(status->code));
1145 /* firmware was killed, stop processing received frames */
1146 if (!(sc->flags & IPW_FLAG_FW_INITED))
1152 bus_dmamap_sync(sc->rbd_dmat, sc->rbd_map, BUS_DMASYNC_PREWRITE);
1154 /* kick the firmware */
1155 sc->rxcur = (r == 0) ? IPW_NRBD - 1 : r - 1;
1156 CSR_WRITE_4(sc, IPW_CSR_RX_WRITE, sc->rxcur);
1160 ipw_release_sbd(struct ipw_softc *sc, struct ipw_soft_bd *sbd)
1162 struct ipw_soft_hdr *shdr;
1163 struct ipw_soft_buf *sbuf;
1165 switch (sbd->type) {
1166 case IPW_SBD_TYPE_COMMAND:
1167 bus_dmamap_sync(sc->cmd_dmat, sc->cmd_map,
1168 BUS_DMASYNC_POSTWRITE);
1169 bus_dmamap_unload(sc->cmd_dmat, sc->cmd_map);
1172 case IPW_SBD_TYPE_HEADER:
1174 bus_dmamap_sync(sc->hdr_dmat, shdr->map, BUS_DMASYNC_POSTWRITE);
1175 bus_dmamap_unload(sc->hdr_dmat, shdr->map);
1176 SLIST_INSERT_HEAD(&sc->free_shdr, shdr, next);
1179 case IPW_SBD_TYPE_DATA:
1181 bus_dmamap_sync(sc->txbuf_dmat, sbuf->map,
1182 BUS_DMASYNC_POSTWRITE);
1183 bus_dmamap_unload(sc->txbuf_dmat, sbuf->map);
1184 SLIST_INSERT_HEAD(&sc->free_sbuf, sbuf, next);
1187 ieee80211_free_node(sbuf->ni);
1189 sc->sc_tx_timer = 0;
1193 sbd->type = IPW_SBD_TYPE_NOASSOC;
1197 ipw_tx_intr(struct ipw_softc *sc)
1199 struct ifnet *ifp = sc->sc_ic.ic_ifp;
1200 struct ipw_soft_bd *sbd;
1203 if (!(sc->flags & IPW_FLAG_FW_INITED))
1206 r = CSR_READ_4(sc, IPW_CSR_TX_READ);
1208 for (i = (sc->txold + 1) % IPW_NTBD; i != r; i = (i + 1) % IPW_NTBD) {
1209 sbd = &sc->stbd_list[i];
1211 if (sbd->type == IPW_SBD_TYPE_DATA)
1214 ipw_release_sbd(sc, sbd);
1218 /* remember what the firmware has processed */
1219 sc->txold = (r == 0) ? IPW_NTBD - 1 : r - 1;
1221 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
1228 struct ipw_softc *sc = arg;
1234 if ((r = CSR_READ_4(sc, IPW_CSR_INTR)) == 0 || r == 0xffffffff) {
1239 /* disable interrupts */
1240 CSR_WRITE_4(sc, IPW_CSR_INTR_MASK, 0);
1242 if (r & (IPW_INTR_FATAL_ERROR | IPW_INTR_PARITY_ERROR)) {
1243 device_printf(sc->sc_dev, "fatal error\n");
1244 sc->sc_ic.ic_ifp->if_flags &= ~IFF_UP;
1248 if (r & IPW_INTR_FW_INIT_DONE) {
1249 if (!(r & (IPW_INTR_FATAL_ERROR | IPW_INTR_PARITY_ERROR)))
1253 if (r & IPW_INTR_RX_TRANSFER)
1256 if (r & IPW_INTR_TX_TRANSFER)
1259 /* acknowledge all interrupts */
1260 CSR_WRITE_4(sc, IPW_CSR_INTR, r);
1262 /* re-enable interrupts */
1263 CSR_WRITE_4(sc, IPW_CSR_INTR_MASK, IPW_INTR_MASK);
1269 ipw_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nseg, int error)
1274 KASSERT(nseg == 1, ("too many DMA segments, %d should be 1", nseg));
1276 *(bus_addr_t *)arg = segs[0].ds_addr;
1280 * Send a command to the firmware and wait for the acknowledgement.
1283 ipw_cmd(struct ipw_softc *sc, uint32_t type, void *data, uint32_t len)
1285 struct ipw_soft_bd *sbd;
1286 bus_addr_t physaddr;
1289 sbd = &sc->stbd_list[sc->txcur];
1291 error = bus_dmamap_load(sc->cmd_dmat, sc->cmd_map, &sc->cmd,
1292 sizeof (struct ipw_cmd), ipw_dma_map_addr, &physaddr, 0);
1294 device_printf(sc->sc_dev, "could not map command DMA memory\n");
1298 sc->cmd.type = htole32(type);
1299 sc->cmd.subtype = 0;
1300 sc->cmd.len = htole32(len);
1302 memcpy(sc->cmd.data, data, len);
1304 sbd->type = IPW_SBD_TYPE_COMMAND;
1305 sbd->bd->physaddr = htole32(physaddr);
1306 sbd->bd->len = htole32(sizeof (struct ipw_cmd));
1308 sbd->bd->flags = IPW_BD_FLAG_TX_FRAME_COMMAND |
1309 IPW_BD_FLAG_TX_LAST_FRAGMENT;
1311 bus_dmamap_sync(sc->cmd_dmat, sc->cmd_map, BUS_DMASYNC_PREWRITE);
1312 bus_dmamap_sync(sc->tbd_dmat, sc->tbd_map, BUS_DMASYNC_PREWRITE);
1314 DPRINTFN(2, ("sending command (%u, %u, %u, %u)\n", type, 0, 0, len));
1318 sc->txcur = (sc->txcur + 1) % IPW_NTBD;
1319 CSR_WRITE_4(sc, IPW_CSR_TX_WRITE, sc->txcur);
1321 /* wait at most one second for command to complete */
1322 return msleep(sc, &sc->sc_mtx, 0, "ipwcmd", hz);
1326 ipw_tx_start(struct ifnet *ifp, struct mbuf *m0, struct ieee80211_node *ni)
1328 struct ipw_softc *sc = ifp->if_softc;
1329 struct ieee80211com *ic = &sc->sc_ic;
1330 struct ieee80211_frame *wh;
1331 struct ipw_soft_bd *sbd;
1332 struct ipw_soft_hdr *shdr;
1333 struct ipw_soft_buf *sbuf;
1334 struct ieee80211_key *k;
1336 bus_dma_segment_t segs[IPW_MAX_NSEG];
1337 bus_addr_t physaddr;
1338 int nsegs, error, i;
1340 wh = mtod(m0, struct ieee80211_frame *);
1342 if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
1343 k = ieee80211_crypto_encap(ic, ni, m0);
1349 /* packet header may have moved, reset our local pointer */
1350 wh = mtod(m0, struct ieee80211_frame *);
1353 if (bpf_peers_present(sc->sc_drvbpf)) {
1354 struct ipw_tx_radiotap_header *tap = &sc->sc_txtap;
1357 tap->wt_chan_freq = htole16(ic->ic_ibss_chan->ic_freq);
1358 tap->wt_chan_flags = htole16(ic->ic_ibss_chan->ic_flags);
1360 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0);
1363 shdr = SLIST_FIRST(&sc->free_shdr);
1364 sbuf = SLIST_FIRST(&sc->free_sbuf);
1365 KASSERT(shdr != NULL && sbuf != NULL, ("empty sw hdr/buf pool"));
1367 shdr->hdr.type = htole32(IPW_HDR_TYPE_SEND);
1368 shdr->hdr.subtype = 0;
1369 shdr->hdr.encrypted = (wh->i_fc[1] & IEEE80211_FC1_WEP) ? 1 : 0;
1370 shdr->hdr.encrypt = 0;
1371 shdr->hdr.keyidx = 0;
1372 shdr->hdr.keysz = 0;
1373 shdr->hdr.fragmentsz = 0;
1374 IEEE80211_ADDR_COPY(shdr->hdr.src_addr, wh->i_addr2);
1375 if (ic->ic_opmode == IEEE80211_M_STA)
1376 IEEE80211_ADDR_COPY(shdr->hdr.dst_addr, wh->i_addr3);
1378 IEEE80211_ADDR_COPY(shdr->hdr.dst_addr, wh->i_addr1);
1380 /* trim IEEE802.11 header */
1381 m_adj(m0, sizeof (struct ieee80211_frame));
1383 error = bus_dmamap_load_mbuf_sg(sc->txbuf_dmat, sbuf->map, m0, segs,
1385 if (error != 0 && error != EFBIG) {
1386 device_printf(sc->sc_dev, "could not map mbuf (error %d)\n",
1392 mnew = m_defrag(m0, M_DONTWAIT);
1394 device_printf(sc->sc_dev,
1395 "could not defragment mbuf\n");
1401 error = bus_dmamap_load_mbuf_sg(sc->txbuf_dmat, sbuf->map, m0,
1404 device_printf(sc->sc_dev,
1405 "could not map mbuf (error %d)\n", error);
1411 error = bus_dmamap_load(sc->hdr_dmat, shdr->map, &shdr->hdr,
1412 sizeof (struct ipw_hdr), ipw_dma_map_addr, &physaddr, 0);
1414 device_printf(sc->sc_dev, "could not map header DMA memory\n");
1415 bus_dmamap_unload(sc->txbuf_dmat, sbuf->map);
1420 SLIST_REMOVE_HEAD(&sc->free_sbuf, next);
1421 SLIST_REMOVE_HEAD(&sc->free_shdr, next);
1423 sbd = &sc->stbd_list[sc->txcur];
1424 sbd->type = IPW_SBD_TYPE_HEADER;
1426 sbd->bd->physaddr = htole32(physaddr);
1427 sbd->bd->len = htole32(sizeof (struct ipw_hdr));
1428 sbd->bd->nfrag = 1 + nsegs;
1429 sbd->bd->flags = IPW_BD_FLAG_TX_FRAME_802_3 |
1430 IPW_BD_FLAG_TX_NOT_LAST_FRAGMENT;
1432 DPRINTFN(5, ("sending tx hdr (%u, %u, %u, %u, %6D, %6D)\n",
1433 shdr->hdr.type, shdr->hdr.subtype, shdr->hdr.encrypted,
1434 shdr->hdr.encrypt, shdr->hdr.src_addr, ":", shdr->hdr.dst_addr,
1438 sc->txcur = (sc->txcur + 1) % IPW_NTBD;
1443 for (i = 0; i < nsegs; i++) {
1444 sbd = &sc->stbd_list[sc->txcur];
1446 sbd->bd->physaddr = htole32(segs[i].ds_addr);
1447 sbd->bd->len = htole32(segs[i].ds_len);
1449 sbd->bd->flags = IPW_BD_FLAG_TX_FRAME_802_3;
1450 if (i == nsegs - 1) {
1451 sbd->type = IPW_SBD_TYPE_DATA;
1453 sbd->bd->flags |= IPW_BD_FLAG_TX_LAST_FRAGMENT;
1455 sbd->type = IPW_SBD_TYPE_NOASSOC;
1456 sbd->bd->flags |= IPW_BD_FLAG_TX_NOT_LAST_FRAGMENT;
1459 DPRINTFN(5, ("sending fragment (%d, %d)\n", i, segs[i].ds_len));
1462 sc->txcur = (sc->txcur + 1) % IPW_NTBD;
1465 bus_dmamap_sync(sc->hdr_dmat, shdr->map, BUS_DMASYNC_PREWRITE);
1466 bus_dmamap_sync(sc->txbuf_dmat, sbuf->map, BUS_DMASYNC_PREWRITE);
1467 bus_dmamap_sync(sc->tbd_dmat, sc->tbd_map, BUS_DMASYNC_PREWRITE);
1470 CSR_WRITE_4(sc, IPW_CSR_TX_WRITE, sc->txcur);
1476 ipw_start(struct ifnet *ifp)
1478 struct ipw_softc *sc = ifp->if_softc;
1479 struct ieee80211com *ic = &sc->sc_ic;
1481 struct ether_header *eh;
1482 struct ieee80211_node *ni;
1487 if (ic->ic_state != IEEE80211_S_RUN) {
1493 IFQ_DRV_DEQUEUE(&ifp->if_snd, m0);
1497 if (sc->txfree < 1 + IPW_MAX_NSEG) {
1498 IFQ_DRV_PREPEND(&ifp->if_snd, m0);
1499 ifp->if_drv_flags |= IFF_DRV_OACTIVE;
1503 if (m0->m_len < sizeof (struct ether_header) &&
1504 (m0 = m_pullup(m0, sizeof (struct ether_header))) == NULL)
1507 eh = mtod(m0, struct ether_header *);
1508 ni = ieee80211_find_txnode(ic, eh->ether_dhost);
1515 m0 = ieee80211_encap(ic, m0, ni);
1517 ieee80211_free_node(ni);
1521 if (bpf_peers_present(ic->ic_rawbpf))
1522 bpf_mtap(ic->ic_rawbpf, m0);
1524 if (ipw_tx_start(ifp, m0, ni) != 0) {
1525 ieee80211_free_node(ni);
1530 /* start watchdog timer */
1531 sc->sc_tx_timer = 5;
1539 ipw_watchdog(struct ifnet *ifp)
1541 struct ipw_softc *sc = ifp->if_softc;
1542 struct ieee80211com *ic = &sc->sc_ic;
1546 if (sc->sc_tx_timer > 0) {
1547 if (--sc->sc_tx_timer == 0) {
1548 if_printf(ifp, "device timeout\n");
1550 ifp->if_flags &= ~IFF_UP;
1557 ieee80211_watchdog(ic);
1561 ipw_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
1563 struct ipw_softc *sc = ifp->if_softc;
1564 struct ieee80211com *ic = &sc->sc_ic;
1573 if (ifp->if_flags & IFF_UP) {
1574 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING))
1577 if (ifp->if_drv_flags & IFF_DRV_RUNNING)
1583 /* only super-user can do that! */
1584 if ((error = suser(curthread)) != 0)
1587 ifr = (struct ifreq *)data;
1588 error = ipw_cache_firmware(sc, ifr->ifr_data);
1592 /* only super-user can do that! */
1593 if ((error = suser(curthread)) != 0)
1596 ifp->if_flags &= ~IFF_UP;
1598 ipw_free_firmware(sc);
1602 error = ieee80211_ioctl(ic, cmd, data);
1605 if (error == ENETRESET) {
1606 if ((ifp->if_flags & IFF_UP) &&
1607 (ifp->if_drv_flags & IFF_DRV_RUNNING))
1618 ipw_stop_master(struct ipw_softc *sc)
1622 /* disable interrupts */
1623 CSR_WRITE_4(sc, IPW_CSR_INTR_MASK, 0);
1625 CSR_WRITE_4(sc, IPW_CSR_RST, IPW_RST_STOP_MASTER);
1626 for (ntries = 0; ntries < 50; ntries++) {
1627 if (CSR_READ_4(sc, IPW_CSR_RST) & IPW_RST_MASTER_DISABLED)
1632 device_printf(sc->sc_dev, "timeout waiting for master\n");
1634 CSR_WRITE_4(sc, IPW_CSR_RST, CSR_READ_4(sc, IPW_CSR_RST) |
1635 IPW_RST_PRINCETON_RESET);
1637 sc->flags &= ~IPW_FLAG_FW_INITED;
1641 ipw_reset(struct ipw_softc *sc)
1645 ipw_stop_master(sc);
1647 /* move adapter to D0 state */
1648 CSR_WRITE_4(sc, IPW_CSR_CTL, CSR_READ_4(sc, IPW_CSR_CTL) |
1651 /* wait for clock stabilization */
1652 for (ntries = 0; ntries < 1000; ntries++) {
1653 if (CSR_READ_4(sc, IPW_CSR_CTL) & IPW_CTL_CLOCK_READY)
1660 CSR_WRITE_4(sc, IPW_CSR_RST, CSR_READ_4(sc, IPW_CSR_RST) |
1665 CSR_WRITE_4(sc, IPW_CSR_CTL, CSR_READ_4(sc, IPW_CSR_CTL) |
1672 * Upload the microcode to the device.
1675 ipw_load_ucode(struct ipw_softc *sc, u_char *uc, int size)
1679 MEM_WRITE_4(sc, 0x3000e0, 0x80000000);
1680 CSR_WRITE_4(sc, IPW_CSR_RST, 0);
1682 MEM_WRITE_2(sc, 0x220000, 0x0703);
1683 MEM_WRITE_2(sc, 0x220000, 0x0707);
1685 MEM_WRITE_1(sc, 0x210014, 0x72);
1686 MEM_WRITE_1(sc, 0x210014, 0x72);
1688 MEM_WRITE_1(sc, 0x210000, 0x40);
1689 MEM_WRITE_1(sc, 0x210000, 0x00);
1690 MEM_WRITE_1(sc, 0x210000, 0x40);
1692 MEM_WRITE_MULTI_1(sc, 0x210010, uc, size);
1694 MEM_WRITE_1(sc, 0x210000, 0x00);
1695 MEM_WRITE_1(sc, 0x210000, 0x00);
1696 MEM_WRITE_1(sc, 0x210000, 0x80);
1698 MEM_WRITE_2(sc, 0x220000, 0x0703);
1699 MEM_WRITE_2(sc, 0x220000, 0x0707);
1701 MEM_WRITE_1(sc, 0x210014, 0x72);
1702 MEM_WRITE_1(sc, 0x210014, 0x72);
1704 MEM_WRITE_1(sc, 0x210000, 0x00);
1705 MEM_WRITE_1(sc, 0x210000, 0x80);
1707 for (ntries = 0; ntries < 10; ntries++) {
1708 if (MEM_READ_1(sc, 0x210000) & 1)
1713 device_printf(sc->sc_dev,
1714 "timeout waiting for ucode to initialize\n");
1718 MEM_WRITE_4(sc, 0x3000e0, 0);
1723 /* set of macros to handle unaligned little endian data in firmware image */
1724 #define GETLE32(p) ((p)[0] | (p)[1] << 8 | (p)[2] << 16 | (p)[3] << 24)
1725 #define GETLE16(p) ((p)[0] | (p)[1] << 8)
1727 ipw_load_firmware(struct ipw_softc *sc, u_char *fw, int size)
1737 dst = GETLE32(p); p += 4;
1738 len = GETLE16(p); p += 2;
1740 ipw_write_mem_1(sc, dst, p, len);
1744 CSR_WRITE_4(sc, IPW_CSR_IO, IPW_IO_GPIO1_ENABLE | IPW_IO_GPIO3_MASK |
1747 /* enable interrupts */
1748 CSR_WRITE_4(sc, IPW_CSR_INTR_MASK, IPW_INTR_MASK);
1750 /* kick the firmware */
1751 CSR_WRITE_4(sc, IPW_CSR_RST, 0);
1753 CSR_WRITE_4(sc, IPW_CSR_CTL, CSR_READ_4(sc, IPW_CSR_CTL) |
1754 IPW_CTL_ALLOW_STANDBY);
1756 /* wait at most one second for firmware initialization to complete */
1757 if ((error = msleep(sc, &sc->sc_mtx, 0, "ipwinit", hz)) != 0) {
1758 device_printf(sc->sc_dev, "timeout waiting for firmware "
1759 "initialization to complete\n");
1763 CSR_WRITE_4(sc, IPW_CSR_IO, CSR_READ_4(sc, IPW_CSR_IO) |
1764 IPW_IO_GPIO1_MASK | IPW_IO_GPIO3_MASK);
1770 * Store firmware into kernel memory so we can download it when we need to,
1771 * e.g when the adapter wakes up from suspend mode.
1774 ipw_cache_firmware(struct ipw_softc *sc, void *data)
1776 struct ipw_firmware *fw = &sc->fw;
1777 struct ipw_firmware_hdr hdr;
1782 ipw_free_firmware(sc);
1786 if ((error = copyin(data, &hdr, sizeof hdr)) != 0)
1789 fw->main_size = le32toh(hdr.main_size);
1790 fw->ucode_size = le32toh(hdr.ucode_size);
1793 fw->main = malloc(fw->main_size, M_DEVBUF, M_NOWAIT);
1794 if (fw->main == NULL) {
1799 fw->ucode = malloc(fw->ucode_size, M_DEVBUF, M_NOWAIT);
1800 if (fw->ucode == NULL) {
1805 if ((error = copyin(p, fw->main, fw->main_size)) != 0)
1809 if ((error = copyin(p, fw->ucode, fw->ucode_size)) != 0)
1812 DPRINTF(("Firmware cached: main %u, ucode %u\n", fw->main_size,
1817 sc->flags |= IPW_FLAG_FW_CACHED;
1821 fail3: free(fw->ucode, M_DEVBUF);
1822 fail2: free(fw->main, M_DEVBUF);
1823 fail1: IPW_LOCK(sc);
1829 ipw_free_firmware(struct ipw_softc *sc)
1831 if (!(sc->flags & IPW_FLAG_FW_CACHED))
1834 free(sc->fw.main, M_DEVBUF);
1835 free(sc->fw.ucode, M_DEVBUF);
1837 sc->flags &= ~IPW_FLAG_FW_CACHED;
1841 ipw_config(struct ipw_softc *sc)
1843 struct ieee80211com *ic = &sc->sc_ic;
1844 struct ifnet *ifp = ic->ic_ifp;
1845 struct ipw_security security;
1846 struct ieee80211_key *k;
1847 struct ipw_wep_key wepkey;
1848 struct ipw_scan_options options;
1849 struct ipw_configuration config;
1853 switch (ic->ic_opmode) {
1854 case IEEE80211_M_STA:
1855 case IEEE80211_M_HOSTAP:
1856 data = htole32(IPW_MODE_BSS);
1859 case IEEE80211_M_IBSS:
1860 case IEEE80211_M_AHDEMO:
1861 data = htole32(IPW_MODE_IBSS);
1864 case IEEE80211_M_MONITOR:
1865 data = htole32(IPW_MODE_MONITOR);
1868 DPRINTF(("Setting mode to %u\n", le32toh(data)));
1869 error = ipw_cmd(sc, IPW_CMD_SET_MODE, &data, sizeof data);
1873 if (ic->ic_opmode == IEEE80211_M_IBSS ||
1874 ic->ic_opmode == IEEE80211_M_MONITOR) {
1875 data = htole32(ieee80211_chan2ieee(ic, ic->ic_ibss_chan));
1876 DPRINTF(("Setting channel to %u\n", le32toh(data)));
1877 error = ipw_cmd(sc, IPW_CMD_SET_CHANNEL, &data, sizeof data);
1882 if (ic->ic_opmode == IEEE80211_M_MONITOR) {
1883 DPRINTF(("Enabling adapter\n"));
1884 return ipw_cmd(sc, IPW_CMD_ENABLE, NULL, 0);
1887 IEEE80211_ADDR_COPY(ic->ic_myaddr, IF_LLADDR(ifp));
1888 DPRINTF(("Setting MAC address to %6D\n", ic->ic_myaddr, ":"));
1889 error = ipw_cmd(sc, IPW_CMD_SET_MAC_ADDRESS, ic->ic_myaddr,
1890 IEEE80211_ADDR_LEN);
1894 config.flags = htole32(IPW_CFG_BSS_MASK | IPW_CFG_IBSS_MASK |
1895 IPW_CFG_PREAMBLE_AUTO | IPW_CFG_802_1x_ENABLE);
1896 if (ic->ic_opmode == IEEE80211_M_IBSS)
1897 config.flags |= htole32(IPW_CFG_IBSS_AUTO_START);
1898 if (ifp->if_flags & IFF_PROMISC)
1899 config.flags |= htole32(IPW_CFG_PROMISCUOUS);
1900 config.bss_chan = htole32(0x3fff); /* channels 1-14 */
1901 config.ibss_chan = htole32(0x7ff); /* channels 1-11 */
1902 DPRINTF(("Setting configuration to 0x%x\n", le32toh(config.flags)));
1903 error = ipw_cmd(sc, IPW_CMD_SET_CONFIGURATION, &config, sizeof config);
1907 data = htole32(0x3); /* 1, 2 */
1908 DPRINTF(("Setting basic tx rates to 0x%x\n", le32toh(data)));
1909 error = ipw_cmd(sc, IPW_CMD_SET_BASIC_TX_RATES, &data, sizeof data);
1913 data = htole32(0xf); /* 1, 2, 5.5, 11 */
1914 DPRINTF(("Setting tx rates to 0x%x\n", le32toh(data)));
1915 error = ipw_cmd(sc, IPW_CMD_SET_TX_RATES, &data, sizeof data);
1919 data = htole32(IPW_POWER_MODE_CAM);
1920 DPRINTF(("Setting power mode to %u\n", le32toh(data)));
1921 error = ipw_cmd(sc, IPW_CMD_SET_POWER_MODE, &data, sizeof data);
1925 if (ic->ic_opmode == IEEE80211_M_IBSS) {
1926 data = htole32(32); /* default value */
1927 DPRINTF(("Setting tx power index to %u\n", le32toh(data)));
1928 error = ipw_cmd(sc, IPW_CMD_SET_TX_POWER_INDEX, &data,
1934 data = htole32(ic->ic_rtsthreshold);
1935 DPRINTF(("Setting RTS threshold to %u\n", le32toh(data)));
1936 error = ipw_cmd(sc, IPW_CMD_SET_RTS_THRESHOLD, &data, sizeof data);
1940 data = htole32(ic->ic_fragthreshold);
1941 DPRINTF(("Setting frag threshold to %u\n", le32toh(data)));
1942 error = ipw_cmd(sc, IPW_CMD_SET_FRAG_THRESHOLD, &data, sizeof data);
1947 if (ipw_debug > 0) {
1948 printf("Setting ESSID to ");
1949 ieee80211_print_essid(ic->ic_des_essid, ic->ic_des_esslen);
1953 error = ipw_cmd(sc, IPW_CMD_SET_ESSID, ic->ic_des_essid,
1958 /* no mandatory BSSID */
1959 DPRINTF(("Setting mandatory BSSID to null\n"));
1960 error = ipw_cmd(sc, IPW_CMD_SET_MANDATORY_BSSID, NULL, 0);
1964 if (ic->ic_flags & IEEE80211_F_DESBSSID) {
1965 DPRINTF(("Setting desired BSSID to %6D\n", ic->ic_des_bssid,
1967 error = ipw_cmd(sc, IPW_CMD_SET_DESIRED_BSSID,
1968 ic->ic_des_bssid, IEEE80211_ADDR_LEN);
1973 memset(&security, 0, sizeof security);
1974 security.authmode = (ic->ic_bss->ni_authmode == IEEE80211_AUTH_SHARED) ?
1975 IPW_AUTH_SHARED : IPW_AUTH_OPEN;
1976 security.ciphers = htole32(IPW_CIPHER_NONE);
1977 DPRINTF(("Setting authmode to %u\n", security.authmode));
1978 error = ipw_cmd(sc, IPW_CMD_SET_SECURITY_INFORMATION, &security,
1983 if (ic->ic_flags & IEEE80211_F_PRIVACY) {
1984 k = ic->ic_crypto.cs_nw_keys;
1985 for (i = 0; i < IEEE80211_WEP_NKID; i++, k++) {
1986 if (k->wk_keylen == 0)
1990 wepkey.len = k->wk_keylen;
1991 memset(wepkey.key, 0, sizeof wepkey.key);
1992 memcpy(wepkey.key, k->wk_key, k->wk_keylen);
1993 DPRINTF(("Setting wep key index %u len %u\n",
1994 wepkey.idx, wepkey.len));
1995 error = ipw_cmd(sc, IPW_CMD_SET_WEP_KEY, &wepkey,
2001 data = htole32(ic->ic_crypto.cs_def_txkey);
2002 DPRINTF(("Setting wep tx key index to %u\n", le32toh(data)));
2003 error = ipw_cmd(sc, IPW_CMD_SET_WEP_KEY_INDEX, &data,
2009 data = htole32((ic->ic_flags & IEEE80211_F_PRIVACY) ? IPW_WEPON : 0);
2010 DPRINTF(("Setting wep flags to 0x%x\n", le32toh(data)));
2011 error = ipw_cmd(sc, IPW_CMD_SET_WEP_FLAGS, &data, sizeof data);
2016 struct ipw_wpa_ie ie;
2018 memset(&ie, 0, sizeof ie);
2019 ie.len = htole32(sizeof (struct ieee80211_ie_wpa));
2020 DPRINTF(("Setting wpa ie\n"));
2021 error = ipw_cmd(sc, IPW_CMD_SET_WPA_IE, &ie, sizeof ie);
2026 if (ic->ic_opmode == IEEE80211_M_IBSS) {
2027 data = htole32(ic->ic_bintval);
2028 DPRINTF(("Setting beacon interval to %u\n", le32toh(data)));
2029 error = ipw_cmd(sc, IPW_CMD_SET_BEACON_INTERVAL, &data,
2036 options.channels = htole32(0x3fff); /* scan channels 1-14 */
2037 DPRINTF(("Setting scan options to 0x%x\n", le32toh(options.flags)));
2038 error = ipw_cmd(sc, IPW_CMD_SET_SCAN_OPTIONS, &options, sizeof options);
2042 /* finally, enable adapter (start scanning for an access point) */
2043 DPRINTF(("Enabling adapter\n"));
2044 return ipw_cmd(sc, IPW_CMD_ENABLE, NULL, 0);
2048 ipw_init(void *priv)
2050 struct ipw_softc *sc = priv;
2051 struct ieee80211com *ic = &sc->sc_ic;
2052 struct ifnet *ifp = ic->ic_ifp;
2053 struct ipw_firmware *fw = &sc->fw;
2055 /* exit immediately if firmware has not been ioctl'd */
2056 if (!(sc->flags & IPW_FLAG_FW_CACHED)) {
2057 if (!(sc->flags & IPW_FLAG_FW_WARNED))
2058 device_printf(sc->sc_dev, "Please load firmware\n");
2059 sc->flags |= IPW_FLAG_FW_WARNED;
2060 ifp->if_flags &= ~IFF_UP;
2066 if (ipw_reset(sc) != 0) {
2067 device_printf(sc->sc_dev, "could not reset adapter\n");
2071 if (ipw_load_ucode(sc, fw->ucode, fw->ucode_size) != 0) {
2072 device_printf(sc->sc_dev, "could not load microcode\n");
2076 ipw_stop_master(sc);
2079 * Setup tx, rx and status rings.
2081 sc->txold = IPW_NTBD - 1;
2083 sc->txfree = IPW_NTBD - 2;
2084 sc->rxcur = IPW_NRBD - 1;
2086 CSR_WRITE_4(sc, IPW_CSR_TX_BASE, sc->tbd_phys);
2087 CSR_WRITE_4(sc, IPW_CSR_TX_SIZE, IPW_NTBD);
2088 CSR_WRITE_4(sc, IPW_CSR_TX_READ, 0);
2089 CSR_WRITE_4(sc, IPW_CSR_TX_WRITE, sc->txcur);
2091 CSR_WRITE_4(sc, IPW_CSR_RX_BASE, sc->rbd_phys);
2092 CSR_WRITE_4(sc, IPW_CSR_RX_SIZE, IPW_NRBD);
2093 CSR_WRITE_4(sc, IPW_CSR_RX_READ, 0);
2094 CSR_WRITE_4(sc, IPW_CSR_RX_WRITE, sc->rxcur);
2096 CSR_WRITE_4(sc, IPW_CSR_STATUS_BASE, sc->status_phys);
2098 if (ipw_load_firmware(sc, fw->main, fw->main_size) != 0) {
2099 device_printf(sc->sc_dev, "could not load firmware\n");
2103 sc->flags |= IPW_FLAG_FW_INITED;
2105 /* retrieve information tables base addresses */
2106 sc->table1_base = CSR_READ_4(sc, IPW_CSR_TABLE1_BASE);
2107 sc->table2_base = CSR_READ_4(sc, IPW_CSR_TABLE2_BASE);
2109 ipw_write_table1(sc, IPW_INFO_LOCK, 0);
2111 if (ipw_config(sc) != 0) {
2112 device_printf(sc->sc_dev, "device configuration failed\n");
2116 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
2117 ifp->if_drv_flags |= IFF_DRV_RUNNING;
2121 fail: ifp->if_flags &= ~IFF_UP;
2126 ipw_stop(void *priv)
2128 struct ipw_softc *sc = priv;
2129 struct ieee80211com *ic = &sc->sc_ic;
2130 struct ifnet *ifp = ic->ic_ifp;
2133 ipw_stop_master(sc);
2135 CSR_WRITE_4(sc, IPW_CSR_RST, IPW_RST_SW_RESET);
2138 * Release tx buffers.
2140 for (i = 0; i < IPW_NTBD; i++)
2141 ipw_release_sbd(sc, &sc->stbd_list[i]);
2143 sc->sc_tx_timer = 0;
2145 ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
2147 ieee80211_new_state(ic, IEEE80211_S_INIT, -1);
2151 ipw_sysctl_stats(SYSCTL_HANDLER_ARGS)
2153 struct ipw_softc *sc = arg1;
2154 uint32_t i, size, buf[256];
2156 memset(buf, 0, sizeof buf);
2158 if (!(sc->flags & IPW_FLAG_FW_INITED))
2159 return SYSCTL_OUT(req, buf, sizeof buf);
2161 CSR_WRITE_4(sc, IPW_CSR_AUTOINC_ADDR, sc->table1_base);
2163 size = min(CSR_READ_4(sc, IPW_CSR_AUTOINC_DATA), 256);
2164 for (i = 1; i < size; i++)
2165 buf[i] = MEM_READ_4(sc, CSR_READ_4(sc, IPW_CSR_AUTOINC_DATA));
2167 return SYSCTL_OUT(req, buf, size);
2171 ipw_sysctl_radio(SYSCTL_HANDLER_ARGS)
2173 struct ipw_softc *sc = arg1;
2176 val = !((sc->flags & IPW_FLAG_HAS_RADIO_SWITCH) &&
2177 (CSR_READ_4(sc, IPW_CSR_IO) & IPW_IO_RADIO_DISABLED));
2179 return SYSCTL_OUT(req, &val, sizeof val);
2183 ipw_read_table1(struct ipw_softc *sc, uint32_t off)
2185 return MEM_READ_4(sc, MEM_READ_4(sc, sc->table1_base + off));
2189 ipw_write_table1(struct ipw_softc *sc, uint32_t off, uint32_t info)
2191 MEM_WRITE_4(sc, MEM_READ_4(sc, sc->table1_base + off), info);
2195 ipw_read_table2(struct ipw_softc *sc, uint32_t off, void *buf, uint32_t *len)
2197 uint32_t addr, info;
2198 uint16_t count, size;
2201 /* addr[4] + count[2] + size[2] */
2202 addr = MEM_READ_4(sc, sc->table2_base + off);
2203 info = MEM_READ_4(sc, sc->table2_base + off + 4);
2206 size = info & 0xffff;
2207 total = count * size;
2215 ipw_read_mem_1(sc, addr, buf, total);
2221 ipw_read_mem_1(struct ipw_softc *sc, bus_size_t offset, uint8_t *datap,
2224 for (; count > 0; offset++, datap++, count--) {
2225 CSR_WRITE_4(sc, IPW_CSR_INDIRECT_ADDR, offset & ~3);
2226 *datap = CSR_READ_1(sc, IPW_CSR_INDIRECT_DATA + (offset & 3));
2231 ipw_write_mem_1(struct ipw_softc *sc, bus_size_t offset, uint8_t *datap,
2234 for (; count > 0; offset++, datap++, count--) {
2235 CSR_WRITE_4(sc, IPW_CSR_INDIRECT_ADDR, offset & ~3);
2236 CSR_WRITE_1(sc, IPW_CSR_INDIRECT_DATA + (offset & 3), *datap);