2 * Copyright (c) 2004 David O'Brien <obrien@FreeBSD.org>
3 * Copyright (c) 2003 Orlando Bassotto <orlando.bassotto@ieo-research.it>
4 * Copyright (c) 1999 Cameron Grant <cg@freebsd.org>
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHERIN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 #include <dev/sound/pcm/sound.h>
30 #include <dev/sound/pcm/ac97.h>
31 #include <gnu/dev/sound/pci/emu10k1.h>
32 #include "emu10k1-alsa%diked.h"
34 #include <dev/pci/pcireg.h>
35 #include <dev/pci/pcivar.h>
36 #include <sys/queue.h>
38 SND_DECLARE_FILE("$FreeBSD$");
40 /* -------------------------------------------------------------------- */
42 #define NUM_G 64 /* use all channels */
43 #define WAVEOUT_MAXBUFSIZE 32768
44 #define EMUPAGESIZE 4096 /* don't change */
45 #define EMUMAXPAGES (WAVEOUT_MAXBUFSIZE * NUM_G / EMUPAGESIZE)
46 #define EMU10K1_PCI_ID 0x00021102 /* 1102 => Creative Labs Vendor ID */
47 #define EMU10K2_PCI_ID 0x00041102
48 #define EMU10K3_PCI_ID 0x00081102
49 #define EMU_DEFAULT_BUFSZ 4096
50 #define EMU_MAX_CHANS 8
53 #define MAXREQVOICES 8
58 #define TMEMSIZE 256*1024
61 #define ENABLE 0xffffffff
62 #define DISABLE 0x00000000
63 #define ENV_ON DCYSUSV_CHANNELENABLE_MASK
64 #define ENV_OFF 0x00 /* XXX: should this be 1? */
66 #define A_IOCFG_GPOUT_A 0x40 /* Analog Output */
67 #define A_IOCFG_GPOUT_D 0x04 /* Digital Output */
68 #define A_IOCFG_GPOUT_AD (A_IOCFG_GPOUT_A|A_IOCFG_GPOUT_D) /* A_IOCFG_GPOUT0 */
71 SLIST_ENTRY(emu_memblk) link;
74 u_int32_t pte_start, pte_size;
78 u_int8_t bmap[EMUMAXPAGES / 8];
81 bus_addr_t silent_page_addr;
82 bus_addr_t ptb_pages_addr;
83 SLIST_HEAD(, emu_memblk) blocks;
88 int b16:1, stereo:1, busy:1, running:1, ismaster:1;
91 int fxrt1; /* FX routing */
92 int fxrt2; /* FX routing (only for audigy) */
94 struct emu_voice *slave;
95 struct pcm_channel *channel;
100 /* channel registers */
102 int spd, fmt, blksz, run;
103 struct emu_voice *master, *slave;
104 struct snd_dbuf *buffer;
105 struct pcm_channel *channel;
106 struct sc_info *parent;
110 int spd, fmt, run, blksz, num;
111 u_int32_t idxreg, basereg, sizereg, setupreg, irqmask;
112 struct snd_dbuf *buffer;
113 struct pcm_channel *channel;
114 struct sc_info *parent;
117 /* device private data */
121 u_int32_t tos_link:1, APS:1, audigy:1, audigy2:1;
122 u_int32_t addrmask; /* wider if audigy */
125 bus_space_handle_t sh;
126 bus_dma_tag_t parent_dmat;
128 struct resource *reg, *irq;
133 int timer, timerinterval;
137 struct emu_voice voice[64];
138 struct sc_pchinfo pch[EMU_MAX_CHANS];
139 struct sc_rchinfo rch[3];
142 /* -------------------------------------------------------------------- */
149 static int emu_init(struct sc_info *);
150 static void emu_intr(void *);
151 static void *emu_malloc(struct sc_info *sc, u_int32_t sz, bus_addr_t *addr);
152 static void *emu_memalloc(struct sc_info *sc, u_int32_t sz, bus_addr_t *addr);
153 static int emu_memfree(struct sc_info *sc, void *buf);
154 static int emu_memstart(struct sc_info *sc, void *buf);
156 static void emu_vdump(struct sc_info *sc, struct emu_voice *v);
159 /* talk to the card */
160 static u_int32_t emu_rd(struct sc_info *, int, int);
161 static void emu_wr(struct sc_info *, int, u_int32_t, int);
163 /* -------------------------------------------------------------------- */
165 static u_int32_t emu_rfmt_ac97[] = {
167 AFMT_STEREO | AFMT_S16_LE,
171 static u_int32_t emu_rfmt_mic[] = {
176 static u_int32_t emu_rfmt_efx[] = {
177 AFMT_STEREO | AFMT_S16_LE,
181 static struct pcmchan_caps emu_reccaps[3] = {
182 {8000, 48000, emu_rfmt_ac97, 0},
183 {8000, 8000, emu_rfmt_mic, 0},
184 {48000, 48000, emu_rfmt_efx, 0},
187 static u_int32_t emu_pfmt[] = {
189 AFMT_STEREO | AFMT_U8,
191 AFMT_STEREO | AFMT_S16_LE,
195 static struct pcmchan_caps emu_playcaps = {4000, 48000, emu_pfmt, 0};
197 static int adcspeed[8] = {48000, 44100, 32000, 24000, 22050, 16000, 11025, 8000};
198 /* audigy supports 12kHz. */
199 static int audigy_adcspeed[9] = {
200 48000, 44100, 32000, 24000, 22050, 16000, 12000, 11025, 8000
203 /* -------------------------------------------------------------------- */
206 emu_rd(struct sc_info *sc, int regno, int size)
210 return bus_space_read_1(sc->st, sc->sh, regno);
212 return bus_space_read_2(sc->st, sc->sh, regno);
214 return bus_space_read_4(sc->st, sc->sh, regno);
221 emu_wr(struct sc_info *sc, int regno, u_int32_t data, int size)
225 bus_space_write_1(sc->st, sc->sh, regno, data);
228 bus_space_write_2(sc->st, sc->sh, regno, data);
231 bus_space_write_4(sc->st, sc->sh, regno, data);
237 emu_rdptr(struct sc_info *sc, int chn, int reg)
239 u_int32_t ptr, val, mask, size, offset;
241 ptr = ((reg << 16) & sc->addrmask) | (chn & PTR_CHANNELNUM_MASK);
242 emu_wr(sc, PTR, ptr, 4);
243 val = emu_rd(sc, DATA, 4);
244 if (reg & 0xff000000) {
245 size = (reg >> 24) & 0x3f;
246 offset = (reg >> 16) & 0x1f;
247 mask = ((1 << size) - 1) << offset;
255 emu_wrptr(struct sc_info *sc, int chn, int reg, u_int32_t data)
257 u_int32_t ptr, mask, size, offset;
259 ptr = ((reg << 16) & sc->addrmask) | (chn & PTR_CHANNELNUM_MASK);
260 emu_wr(sc, PTR, ptr, 4);
261 if (reg & 0xff000000) {
262 size = (reg >> 24) & 0x3f;
263 offset = (reg >> 16) & 0x1f;
264 mask = ((1 << size) - 1) << offset;
267 data |= emu_rd(sc, DATA, 4) & ~mask;
269 emu_wr(sc, DATA, data, 4);
273 emu_wrefx(struct sc_info *sc, unsigned int pc, unsigned int data)
275 pc += sc->audigy ? AUDIGY_CODEBASE : MICROCODEBASE;
276 emu_wrptr(sc, 0, pc, data);
279 /* -------------------------------------------------------------------- */
281 /* no locking needed */
284 emu_rdcd(kobj_t obj, void *devinfo, int regno)
286 struct sc_info *sc = (struct sc_info *)devinfo;
288 emu_wr(sc, AC97ADDRESS, regno, 1);
289 return emu_rd(sc, AC97DATA, 2);
293 emu_wrcd(kobj_t obj, void *devinfo, int regno, u_int32_t data)
295 struct sc_info *sc = (struct sc_info *)devinfo;
297 emu_wr(sc, AC97ADDRESS, regno, 1);
298 emu_wr(sc, AC97DATA, data, 2);
302 static kobj_method_t emu_ac97_methods[] = {
303 KOBJMETHOD(ac97_read, emu_rdcd),
304 KOBJMETHOD(ac97_write, emu_wrcd),
307 AC97_DECLARE(emu_ac97);
309 /* -------------------------------------------------------------------- */
312 emu_settimer(struct sc_info *sc)
314 struct sc_pchinfo *pch;
315 struct sc_rchinfo *rch;
319 for (i = 0; i < sc->nchans; i++) {
322 tmp = (pch->spd * sndbuf_getbps(pch->buffer))
329 for (i = 0; i < 3; i++) {
332 tmp = (rch->spd * sndbuf_getbps(rch->buffer))
338 RANGE(rate, 48, 9600);
339 sc->timerinterval = 48000 / rate;
340 emu_wr(sc, TIMER, sc->timerinterval & 0x03ff, 2);
342 return sc->timerinterval;
346 emu_enatimer(struct sc_info *sc, int go)
350 if (sc->timer++ == 0) {
351 x = emu_rd(sc, INTE, 4);
352 x |= INTE_INTERVALTIMERENB;
353 emu_wr(sc, INTE, x, 4);
357 x = emu_rd(sc, INTE, 4);
358 x &= ~INTE_INTERVALTIMERENB;
359 emu_wr(sc, INTE, x, 4);
365 emu_enastop(struct sc_info *sc, char channel, int enable)
367 int reg = (channel & 0x20) ? SOLEH : SOLEL;
370 reg |= channel << 16;
371 emu_wrptr(sc, 0, reg, enable);
375 emu_recval(int speed) {
379 while (val < 7 && speed < adcspeed[val])
385 audigy_recval(int speed) {
389 while (val < 8 && speed < audigy_adcspeed[val])
395 emu_rate_to_pitch(u_int32_t rate)
397 static u_int32_t logMagTable[128] = {
398 0x00000, 0x02dfc, 0x05b9e, 0x088e6, 0x0b5d6, 0x0e26f, 0x10eb3, 0x13aa2,
399 0x1663f, 0x1918a, 0x1bc84, 0x1e72e, 0x2118b, 0x23b9a, 0x2655d, 0x28ed5,
400 0x2b803, 0x2e0e8, 0x30985, 0x331db, 0x359eb, 0x381b6, 0x3a93d, 0x3d081,
401 0x3f782, 0x41e42, 0x444c1, 0x46b01, 0x49101, 0x4b6c4, 0x4dc49, 0x50191,
402 0x5269e, 0x54b6f, 0x57006, 0x59463, 0x5b888, 0x5dc74, 0x60029, 0x623a7,
403 0x646ee, 0x66a00, 0x68cdd, 0x6af86, 0x6d1fa, 0x6f43c, 0x7164b, 0x73829,
404 0x759d4, 0x77b4f, 0x79c9a, 0x7bdb5, 0x7dea1, 0x7ff5e, 0x81fed, 0x8404e,
405 0x86082, 0x88089, 0x8a064, 0x8c014, 0x8df98, 0x8fef1, 0x91e20, 0x93d26,
406 0x95c01, 0x97ab4, 0x9993e, 0x9b79f, 0x9d5d9, 0x9f3ec, 0xa11d8, 0xa2f9d,
407 0xa4d3c, 0xa6ab5, 0xa8808, 0xaa537, 0xac241, 0xadf26, 0xafbe7, 0xb1885,
408 0xb3500, 0xb5157, 0xb6d8c, 0xb899f, 0xba58f, 0xbc15e, 0xbdd0c, 0xbf899,
409 0xc1404, 0xc2f50, 0xc4a7b, 0xc6587, 0xc8073, 0xc9b3f, 0xcb5ed, 0xcd07c,
410 0xceaec, 0xd053f, 0xd1f73, 0xd398a, 0xd5384, 0xd6d60, 0xd8720, 0xda0c3,
411 0xdba4a, 0xdd3b4, 0xded03, 0xe0636, 0xe1f4e, 0xe384a, 0xe512c, 0xe69f3,
412 0xe829f, 0xe9b31, 0xeb3a9, 0xecc08, 0xee44c, 0xefc78, 0xf148a, 0xf2c83,
413 0xf4463, 0xf5c2a, 0xf73da, 0xf8b71, 0xfa2f0, 0xfba57, 0xfd1a7, 0xfe8df
415 static char logSlopeTable[128] = {
416 0x5c, 0x5c, 0x5b, 0x5a, 0x5a, 0x59, 0x58, 0x58,
417 0x57, 0x56, 0x56, 0x55, 0x55, 0x54, 0x53, 0x53,
418 0x52, 0x52, 0x51, 0x51, 0x50, 0x50, 0x4f, 0x4f,
419 0x4e, 0x4d, 0x4d, 0x4d, 0x4c, 0x4c, 0x4b, 0x4b,
420 0x4a, 0x4a, 0x49, 0x49, 0x48, 0x48, 0x47, 0x47,
421 0x47, 0x46, 0x46, 0x45, 0x45, 0x45, 0x44, 0x44,
422 0x43, 0x43, 0x43, 0x42, 0x42, 0x42, 0x41, 0x41,
423 0x41, 0x40, 0x40, 0x40, 0x3f, 0x3f, 0x3f, 0x3e,
424 0x3e, 0x3e, 0x3d, 0x3d, 0x3d, 0x3c, 0x3c, 0x3c,
425 0x3b, 0x3b, 0x3b, 0x3b, 0x3a, 0x3a, 0x3a, 0x39,
426 0x39, 0x39, 0x39, 0x38, 0x38, 0x38, 0x38, 0x37,
427 0x37, 0x37, 0x37, 0x36, 0x36, 0x36, 0x36, 0x35,
428 0x35, 0x35, 0x35, 0x34, 0x34, 0x34, 0x34, 0x34,
429 0x33, 0x33, 0x33, 0x33, 0x32, 0x32, 0x32, 0x32,
430 0x32, 0x31, 0x31, 0x31, 0x31, 0x31, 0x30, 0x30,
431 0x30, 0x30, 0x30, 0x2f, 0x2f, 0x2f, 0x2f, 0x2f
436 return 0; /* Bail out if no leading "1" */
437 rate *= 11185; /* Scale 48000 to 0x20002380 */
438 for (i = 31; i > 0; i--) {
439 if (rate & 0x80000000) { /* Detect leading "1" */
440 return (((u_int32_t) (i - 15) << 20) +
441 logMagTable[0x7f & (rate >> 24)] +
442 (0x7f & (rate >> 17)) *
443 logSlopeTable[0x7f & (rate >> 24)]);
448 return 0; /* Should never reach this point */
452 emu_rate_to_linearpitch(u_int32_t rate)
454 rate = (rate << 8) / 375;
455 return (rate >> 1) + (rate & 1);
458 static struct emu_voice *
459 emu_valloc(struct sc_info *sc)
465 for (i = 0; i < 64 && sc->voice[i].busy; i++);
474 emu_vinit(struct sc_info *sc, struct emu_voice *m, struct emu_voice *s,
475 u_int32_t sz, struct snd_dbuf *b)
480 buf = emu_memalloc(sc, sz, &tmp_addr);
484 sndbuf_setup(b, buf, sz);
485 m->start = emu_memstart(sc, buf) * EMUPAGESIZE;
486 m->end = m->start + sz;
497 m->fxrt1 = FXBUS_MIDI_CHORUS | FXBUS_PCM_RIGHT << 8 |
498 FXBUS_PCM_LEFT << 16 | FXBUS_MIDI_REVERB << 24;
499 m->fxrt2 = 0x3f3f3f3f; /* No effects on second route */
501 m->fxrt1 = FXBUS_MIDI_CHORUS | FXBUS_PCM_RIGHT << 4 |
502 FXBUS_PCM_LEFT << 8 | FXBUS_MIDI_REVERB << 12;
525 emu_vsetup(struct sc_pchinfo *ch)
527 struct emu_voice *v = ch->master;
530 v->b16 = (ch->fmt & AFMT_16BIT) ? 1 : 0;
531 v->stereo = (ch->fmt & AFMT_STEREO) ? 1 : 0;
532 if (v->slave != NULL) {
533 v->slave->b16 = v->b16;
534 v->slave->stereo = v->stereo;
539 if (v->slave != NULL)
540 v->slave->speed = v->speed;
545 emu_vwrite(struct sc_info *sc, struct emu_voice *v)
549 u_int32_t sa, ea, start, val, silent_page;
551 s = (v->stereo ? 1 : 0) + (v->b16 ? 1 : 0);
556 l = r = x = y = v->vol;
558 l = v->ismaster ? l : 0;
559 r = v->ismaster ? 0 : r;
562 emu_wrptr(sc, v->vnum, CPF, v->stereo ? CPF_STEREO_MASK : 0);
563 val = v->stereo ? 28 : 30;
564 val *= v->b16 ? 1 : 2;
568 emu_wrptr(sc, v->vnum, A_FXRT1, v->fxrt1);
569 emu_wrptr(sc, v->vnum, A_FXRT2, v->fxrt2);
570 emu_wrptr(sc, v->vnum, A_SENDAMOUNTS, 0);
573 emu_wrptr(sc, v->vnum, FXRT, v->fxrt1 << 16);
575 emu_wrptr(sc, v->vnum, PTRX, (x << 8) | r);
576 emu_wrptr(sc, v->vnum, DSL, ea | (y << 24));
577 emu_wrptr(sc, v->vnum, PSST, sa | (l << 24));
578 emu_wrptr(sc, v->vnum, CCCA, start | (v->b16 ? 0 : CCCA_8BITSELECT));
580 emu_wrptr(sc, v->vnum, Z1, 0);
581 emu_wrptr(sc, v->vnum, Z2, 0);
583 silent_page = ((u_int32_t)(sc->mem.silent_page_addr) << 1)
585 emu_wrptr(sc, v->vnum, MAPA, silent_page);
586 emu_wrptr(sc, v->vnum, MAPB, silent_page);
588 emu_wrptr(sc, v->vnum, CVCF, CVCF_CURRENTFILTER_MASK);
589 emu_wrptr(sc, v->vnum, VTFT, VTFT_FILTERTARGET_MASK);
590 emu_wrptr(sc, v->vnum, ATKHLDM, 0);
591 emu_wrptr(sc, v->vnum, DCYSUSM, DCYSUSM_DECAYTIME_MASK);
592 emu_wrptr(sc, v->vnum, LFOVAL1, 0x8000);
593 emu_wrptr(sc, v->vnum, LFOVAL2, 0x8000);
594 emu_wrptr(sc, v->vnum, FMMOD, 0);
595 emu_wrptr(sc, v->vnum, TREMFRQ, 0);
596 emu_wrptr(sc, v->vnum, FM2FRQ2, 0);
597 emu_wrptr(sc, v->vnum, ENVVAL, 0x8000);
599 emu_wrptr(sc, v->vnum, ATKHLDV,
600 ATKHLDV_HOLDTIME_MASK | ATKHLDV_ATTACKTIME_MASK);
601 emu_wrptr(sc, v->vnum, ENVVOL, 0x8000);
603 emu_wrptr(sc, v->vnum, PEFE_FILTERAMOUNT, 0x7f);
604 emu_wrptr(sc, v->vnum, PEFE_PITCHAMOUNT, 0);
606 if (v->slave != NULL)
607 emu_vwrite(sc, v->slave);
611 emu_vtrigger(struct sc_info *sc, struct emu_voice *v, int go)
613 u_int32_t pitch_target, initial_pitch;
614 u_int32_t cra, cs, ccis;
619 cs = v->stereo ? 4 : 2;
620 ccis = v->stereo ? 28 : 30;
621 ccis *= v->b16 ? 1 : 2;
622 sample = v->b16 ? 0x00000000 : 0x80808080;
624 for (i = 0; i < cs; i++)
625 emu_wrptr(sc, v->vnum, CD0 + i, sample);
626 emu_wrptr(sc, v->vnum, CCR_CACHEINVALIDSIZE, 0);
627 emu_wrptr(sc, v->vnum, CCR_READADDRESS, cra);
628 emu_wrptr(sc, v->vnum, CCR_CACHEINVALIDSIZE, ccis);
630 emu_wrptr(sc, v->vnum, IFATN, 0xff00);
631 emu_wrptr(sc, v->vnum, VTFT, 0xffffffff);
632 emu_wrptr(sc, v->vnum, CVCF, 0xffffffff);
633 emu_wrptr(sc, v->vnum, DCYSUSV, 0x00007f7f);
634 emu_enastop(sc, v->vnum, 0);
636 pitch_target = emu_rate_to_linearpitch(v->speed);
637 initial_pitch = emu_rate_to_pitch(v->speed) >> 8;
638 emu_wrptr(sc, v->vnum, PTRX_PITCHTARGET, pitch_target);
639 emu_wrptr(sc, v->vnum, CPF_CURRENTPITCH, pitch_target);
640 emu_wrptr(sc, v->vnum, IP, initial_pitch);
642 emu_wrptr(sc, v->vnum, PTRX_PITCHTARGET, 0);
643 emu_wrptr(sc, v->vnum, CPF_CURRENTPITCH, 0);
644 emu_wrptr(sc, v->vnum, IFATN, 0xffff);
645 emu_wrptr(sc, v->vnum, VTFT, 0x0000ffff);
646 emu_wrptr(sc, v->vnum, CVCF, 0x0000ffff);
647 emu_wrptr(sc, v->vnum, IP, 0);
648 emu_enastop(sc, v->vnum, 1);
650 if (v->slave != NULL)
651 emu_vtrigger(sc, v->slave, go);
655 emu_vpos(struct sc_info *sc, struct emu_voice *v)
659 s = (v->b16 ? 1 : 0) + (v->stereo ? 1 : 0);
660 ptr = (emu_rdptr(sc, v->vnum, CCCA_CURRADDR) - (v->start >> s)) << s;
661 return ptr & ~0x0000001f;
666 emu_vdump(struct sc_info *sc, struct emu_voice *v)
669 "cpf", "ptrx", "cvcf", "vtft", "z2", "z1", "psst", "dsl",
670 "ccca", "ccr", "clp", "fxrt", "mapa", "mapb", NULL, NULL,
671 "envvol", "atkhldv", "dcysusv", "lfoval1",
672 "envval", "atkhldm", "dcysusm", "lfoval2",
673 "ip", "ifatn", "pefe", "fmmod", "tremfrq", "fmfrq2",
677 "mudata1", "mustat1", "mudata2", "mustat2",
678 "fxwc1", "fxwc2", "spdrate", NULL, NULL,
679 NULL, NULL, NULL, "fxrt2", "sndamnt", "fxrt1",
684 printf("voice number %d\n", v->vnum);
685 for (i = 0, x = 0; i <= 0x1e; i++) {
686 if (regname[i] == NULL)
688 printf("%s\t[%08x]", regname[i], emu_rdptr(sc, v->vnum, i));
689 printf("%s", (x == 2) ? "\n" : "\t");
695 /* Print out audigy extra registers */
697 for (i = 0; i <= 0xe; i++) {
698 if (regname2[i] == NULL)
700 printf("%s\t[%08x]", regname2[i],
701 emu_rdptr(sc, v->vnum, i + 0x70));
702 printf("%s", (x == 2)? "\n" : "\t");
712 /* channel interface */
714 emupchan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b,
715 struct pcm_channel *c, int dir)
717 struct sc_info *sc = devinfo;
718 struct sc_pchinfo *ch;
721 KASSERT(dir == PCMDIR_PLAY, ("emupchan_init: bad direction"));
722 ch = &sc->pch[sc->pnum++];
726 ch->blksz = sc->bufsz / 2;
729 snd_mtxlock(sc->lock);
730 ch->master = emu_valloc(sc);
731 ch->slave = emu_valloc(sc);
732 snd_mtxunlock(sc->lock);
733 r = (emu_vinit(sc, ch->master, ch->slave, sc->bufsz, ch->buffer))
740 emupchan_free(kobj_t obj, void *data)
742 struct sc_pchinfo *ch = data;
743 struct sc_info *sc = ch->parent;
746 snd_mtxlock(sc->lock);
747 r = emu_memfree(sc, sndbuf_getbuf(ch->buffer));
748 snd_mtxunlock(sc->lock);
754 emupchan_setformat(kobj_t obj, void *data, u_int32_t format)
756 struct sc_pchinfo *ch = data;
763 emupchan_setspeed(kobj_t obj, void *data, u_int32_t speed)
765 struct sc_pchinfo *ch = data;
772 emupchan_setblocksize(kobj_t obj, void *data, u_int32_t blocksize)
774 struct sc_pchinfo *ch = data;
775 struct sc_info *sc = ch->parent;
778 ch->blksz = blocksize;
779 snd_mtxlock(sc->lock);
781 irqrate = 48000 / sc->timerinterval;
782 snd_mtxunlock(sc->lock);
783 blksz = (ch->spd * sndbuf_getbps(ch->buffer)) / irqrate;
788 emupchan_trigger(kobj_t obj, void *data, int go)
790 struct sc_pchinfo *ch = data;
791 struct sc_info *sc = ch->parent;
793 if (go == PCMTRIG_EMLDMAWR || go == PCMTRIG_EMLDMARD)
796 snd_mtxlock(sc->lock);
797 if (go == PCMTRIG_START) {
799 emu_vwrite(sc, ch->master);
803 printf("start [%d bit, %s, %d hz]\n",
804 ch->master->b16 ? 16 : 8,
805 ch->master->stereo ? "stereo" : "mono",
807 emu_vdump(sc, ch->master);
808 emu_vdump(sc, ch->slave);
811 ch->run = (go == PCMTRIG_START) ? 1 : 0;
812 emu_vtrigger(sc, ch->master, ch->run);
813 snd_mtxunlock(sc->lock);
818 emupchan_getptr(kobj_t obj, void *data)
820 struct sc_pchinfo *ch = data;
821 struct sc_info *sc = ch->parent;
824 snd_mtxlock(sc->lock);
825 r = emu_vpos(sc, ch->master);
826 snd_mtxunlock(sc->lock);
831 static struct pcmchan_caps *
832 emupchan_getcaps(kobj_t obj, void *data)
834 return &emu_playcaps;
837 static kobj_method_t emupchan_methods[] = {
838 KOBJMETHOD(channel_init, emupchan_init),
839 KOBJMETHOD(channel_free, emupchan_free),
840 KOBJMETHOD(channel_setformat, emupchan_setformat),
841 KOBJMETHOD(channel_setspeed, emupchan_setspeed),
842 KOBJMETHOD(channel_setblocksize, emupchan_setblocksize),
843 KOBJMETHOD(channel_trigger, emupchan_trigger),
844 KOBJMETHOD(channel_getptr, emupchan_getptr),
845 KOBJMETHOD(channel_getcaps, emupchan_getcaps),
848 CHANNEL_DECLARE(emupchan);
850 /* channel interface */
852 emurchan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b,
853 struct pcm_channel *c, int dir)
855 struct sc_info *sc = devinfo;
856 struct sc_rchinfo *ch;
858 KASSERT(dir == PCMDIR_REC, ("emurchan_init: bad direction"));
859 ch = &sc->rch[sc->rnum];
863 ch->blksz = sc->bufsz / 2;
869 ch->idxreg = sc->audigy ? A_ADCIDX : ADCIDX;
872 ch->setupreg = ADCCR;
873 ch->irqmask = INTE_ADCBUFENABLE;
881 ch->irqmask = INTE_EFXBUFENABLE;
889 ch->irqmask = INTE_MICBUFENABLE;
893 if (sndbuf_alloc(ch->buffer, sc->parent_dmat, sc->bufsz) != 0)
896 snd_mtxlock(sc->lock);
897 emu_wrptr(sc, 0, ch->basereg, sndbuf_getbufaddr(ch->buffer));
898 emu_wrptr(sc, 0, ch->sizereg, 0); /* off */
899 snd_mtxunlock(sc->lock);
905 emurchan_setformat(kobj_t obj, void *data, u_int32_t format)
907 struct sc_rchinfo *ch = data;
914 emurchan_setspeed(kobj_t obj, void *data, u_int32_t speed)
916 struct sc_rchinfo *ch = data;
919 if (ch->parent->audigy)
920 speed = audigy_adcspeed[audigy_recval(speed)];
922 speed = adcspeed[emu_recval(speed)];
933 emurchan_setblocksize(kobj_t obj, void *data, u_int32_t blocksize)
935 struct sc_rchinfo *ch = data;
936 struct sc_info *sc = ch->parent;
939 ch->blksz = blocksize;
940 snd_mtxlock(sc->lock);
942 irqrate = 48000 / sc->timerinterval;
943 snd_mtxunlock(sc->lock);
944 blksz = (ch->spd * sndbuf_getbps(ch->buffer)) / irqrate;
948 /* semantic note: must start at beginning of buffer */
950 emurchan_trigger(kobj_t obj, void *data, int go)
952 struct sc_rchinfo *ch = data;
953 struct sc_info *sc = ch->parent;
958 sz = ADCBS_BUFSIZE_4096;
962 sz = ADCBS_BUFSIZE_8192;
966 sz = ADCBS_BUFSIZE_16384;
970 sz = ADCBS_BUFSIZE_32768;
974 sz = ADCBS_BUFSIZE_65536;
978 sz = ADCBS_BUFSIZE_4096;
981 snd_mtxlock(sc->lock);
985 emu_wrptr(sc, 0, ch->sizereg, sz);
988 val = A_ADCCR_LCHANENABLE;
989 if (ch->fmt & AFMT_STEREO)
990 val |= A_ADCCR_RCHANENABLE;
991 val |= audigy_recval(ch->spd);
993 val = ADCCR_LCHANENABLE;
994 if (ch->fmt & AFMT_STEREO)
995 val |= ADCCR_RCHANENABLE;
996 val |= emu_recval(ch->spd);
999 emu_wrptr(sc, 0, ch->setupreg, 0);
1000 emu_wrptr(sc, 0, ch->setupreg, val);
1002 val = emu_rd(sc, INTE, 4);
1004 emu_wr(sc, INTE, val, 4);
1010 emu_wrptr(sc, 0, ch->sizereg, 0);
1012 emu_wrptr(sc, 0, ch->setupreg, 0);
1013 val = emu_rd(sc, INTE, 4);
1014 val &= ~ch->irqmask;
1015 emu_wr(sc, INTE, val, 4);
1018 case PCMTRIG_EMLDMAWR:
1019 case PCMTRIG_EMLDMARD:
1023 snd_mtxunlock(sc->lock);
1029 emurchan_getptr(kobj_t obj, void *data)
1031 struct sc_rchinfo *ch = data;
1032 struct sc_info *sc = ch->parent;
1035 snd_mtxlock(sc->lock);
1036 r = emu_rdptr(sc, 0, ch->idxreg) & 0x0000ffff;
1037 snd_mtxunlock(sc->lock);
1042 static struct pcmchan_caps *
1043 emurchan_getcaps(kobj_t obj, void *data)
1045 struct sc_rchinfo *ch = data;
1047 return &emu_reccaps[ch->num];
1050 static kobj_method_t emurchan_methods[] = {
1051 KOBJMETHOD(channel_init, emurchan_init),
1052 KOBJMETHOD(channel_setformat, emurchan_setformat),
1053 KOBJMETHOD(channel_setspeed, emurchan_setspeed),
1054 KOBJMETHOD(channel_setblocksize, emurchan_setblocksize),
1055 KOBJMETHOD(channel_trigger, emurchan_trigger),
1056 KOBJMETHOD(channel_getptr, emurchan_getptr),
1057 KOBJMETHOD(channel_getcaps, emurchan_getcaps),
1060 CHANNEL_DECLARE(emurchan);
1062 /* -------------------------------------------------------------------- */
1063 /* The interrupt handler */
1065 emu_intr(void *data)
1067 struct sc_info *sc = data;
1068 u_int32_t stat, ack, i, x;
1070 snd_mtxlock(sc->lock);
1072 stat = emu_rd(sc, IPR, 4);
1078 if (stat & IPR_INTERVALTIMER)
1079 ack |= IPR_INTERVALTIMER;
1081 if (stat & (IPR_ADCBUFFULL | IPR_ADCBUFHALFFULL))
1082 ack |= stat & (IPR_ADCBUFFULL | IPR_ADCBUFHALFFULL);
1084 if (stat & (IPR_EFXBUFFULL | IPR_EFXBUFHALFFULL))
1085 ack |= stat & (IPR_EFXBUFFULL | IPR_EFXBUFHALFFULL);
1087 if (stat & (IPR_MICBUFFULL | IPR_MICBUFHALFFULL))
1088 ack |= stat & (IPR_MICBUFFULL | IPR_MICBUFHALFFULL);
1090 if (stat & IPR_PCIERROR) {
1091 ack |= IPR_PCIERROR;
1092 device_printf(sc->dev, "pci error\n");
1093 /* we still get an nmi with ecc ram even if we ack this */
1095 if (stat & IPR_SAMPLERATETRACKER) {
1096 ack |= IPR_SAMPLERATETRACKER;
1098 device_printf(sc->dev,
1099 "sample rate tracker lock status change\n");
1104 device_printf(sc->dev, "dodgy irq: %x (harmless)\n",
1107 emu_wr(sc, IPR, stat, 4);
1110 snd_mtxunlock(sc->lock);
1112 if (ack & IPR_INTERVALTIMER) {
1114 for (i = 0; i < sc->nchans; i++) {
1115 if (sc->pch[i].run) {
1117 chn_intr(sc->pch[i].channel);
1121 emu_enatimer(sc, 0);
1125 if (ack & (IPR_ADCBUFFULL | IPR_ADCBUFHALFFULL)) {
1126 if (sc->rch[0].channel)
1127 chn_intr(sc->rch[0].channel);
1129 if (ack & (IPR_EFXBUFFULL | IPR_EFXBUFHALFFULL)) {
1130 if (sc->rch[1].channel)
1131 chn_intr(sc->rch[1].channel);
1133 if (ack & (IPR_MICBUFFULL | IPR_MICBUFHALFFULL)) {
1134 if (sc->rch[2].channel)
1135 chn_intr(sc->rch[2].channel);
1138 snd_mtxlock(sc->lock);
1141 snd_mtxunlock(sc->lock);
1144 /* -------------------------------------------------------------------- */
1147 emu_setmap(void *arg, bus_dma_segment_t *segs, int nseg, int error)
1149 bus_addr_t *phys = arg;
1151 *phys = error ? 0 : (bus_addr_t)segs->ds_addr;
1154 printf("emu: setmap (%lx, %lx), nseg=%d, error=%d\n",
1155 (unsigned long)segs->ds_addr, (unsigned long)segs->ds_len,
1161 emu_malloc(struct sc_info *sc, u_int32_t sz, bus_addr_t *addr)
1167 if (bus_dmamem_alloc(sc->parent_dmat, &buf, BUS_DMA_NOWAIT, &map))
1169 if (bus_dmamap_load(sc->parent_dmat, map, buf, sz, emu_setmap, addr, 0)
1176 emu_free(struct sc_info *sc, void *buf)
1178 bus_dmamem_free(sc->parent_dmat, buf, NULL);
1182 emu_memalloc(struct sc_info *sc, u_int32_t sz, bus_addr_t *addr)
1184 u_int32_t blksz, start, idx, ofs, tmp, found;
1185 struct emu_mem *mem = &sc->mem;
1186 struct emu_memblk *blk;
1189 blksz = sz / EMUPAGESIZE;
1190 if (sz > (blksz * EMUPAGESIZE))
1192 /* find a free block in the bitmap */
1195 while (!found && start + blksz < EMUMAXPAGES) {
1197 for (idx = start; idx < start + blksz; idx++)
1198 if (mem->bmap[idx >> 3] & (1 << (idx & 7)))
1205 blk = malloc(sizeof(*blk), M_DEVBUF, M_NOWAIT);
1208 buf = emu_malloc(sc, sz, &blk->buf_addr);
1209 *addr = blk->buf_addr;
1211 free(blk, M_DEVBUF);
1215 blk->pte_start = start;
1216 blk->pte_size = blksz;
1218 printf("buf %p, pte_start %d, pte_size %d\n", blk->buf,
1219 blk->pte_start, blk->pte_size);
1222 for (idx = start; idx < start + blksz; idx++) {
1223 mem->bmap[idx >> 3] |= 1 << (idx & 7);
1224 tmp = (u_int32_t)(u_long)((u_int8_t *)blk->buf_addr + ofs);
1226 printf("pte[%d] -> %x phys, %x virt\n", idx, tmp,
1227 ((u_int32_t)buf) + ofs);
1229 mem->ptb_pages[idx] = (tmp << 1) | idx;
1232 SLIST_INSERT_HEAD(&mem->blocks, blk, link);
1237 emu_memfree(struct sc_info *sc, void *buf)
1240 struct emu_mem *mem = &sc->mem;
1241 struct emu_memblk *blk, *i;
1244 SLIST_FOREACH(i, &mem->blocks, link) {
1250 SLIST_REMOVE(&mem->blocks, blk, emu_memblk, link);
1252 tmp = (u_int32_t)(sc->mem.silent_page_addr) << 1;
1253 for (idx = blk->pte_start; idx < blk->pte_start + blk->pte_size; idx++) {
1254 mem->bmap[idx >> 3] &= ~(1 << (idx & 7));
1255 mem->ptb_pages[idx] = tmp | idx;
1257 free(blk, M_DEVBUF);
1262 emu_memstart(struct sc_info *sc, void *buf)
1264 struct emu_mem *mem = &sc->mem;
1265 struct emu_memblk *blk, *i;
1268 SLIST_FOREACH(i, &mem->blocks, link) {
1274 return blk->pte_start;
1278 emu_addefxop(struct sc_info *sc, int op, int z, int w, int x, int y,
1281 emu_wrefx(sc, (*pc) * 2, (x << 10) | y);
1282 emu_wrefx(sc, (*pc) * 2 + 1, (op << 20) | (z << 10) | w);
1287 audigy_addefxop(struct sc_info *sc, int op, int z, int w, int x, int y,
1290 emu_wrefx(sc, (*pc) * 2, (x << 12) | y);
1291 emu_wrefx(sc, (*pc) * 2 + 1, (op << 24) | (z << 12) | w);
1296 audigy_initefx(struct sc_info *sc)
1301 /* skip 0, 0, -1, 0 - NOPs */
1302 for (i = 0; i < 512; i++)
1303 audigy_addefxop(sc, 0x0f, 0x0c0, 0x0c0, 0x0cf, 0x0c0, &pc);
1305 for (i = 0; i < 512; i++)
1306 emu_wrptr(sc, 0, A_FXGPREGBASE + i, 0x0);
1310 /* stop fx processor */
1311 emu_wrptr(sc, 0, A_DBG, A_DBG_SINGLE_STEP);
1313 /* Audigy 2 (EMU10K2) DSP Registers:
1315 0x000-0x00f : 16 registers (???)
1317 0x040/0x041 : AC97 Codec (l/r)
1318 0x042/0x043 : ADC, S/PDIF (l/r)
1319 0x044/0x045 : Optical S/PDIF in (l/r)
1321 0x048/0x049 : Line/Mic 2 (l/r)
1322 0x04a/0x04b : RCA S/PDIF (l/r)
1323 0x04c/0x04d : Aux 2 (l/r)
1325 0x060/0x061 : Digital Front (l/r)
1326 0x062/0x063 : Digital Center/LFE
1327 0x064/0x065 : AudigyDrive Heaphone (l/r)
1328 0x066/0x067 : Digital Rear (l/r)
1329 0x068/0x069 : Analog Front (l/r)
1330 0x06a/0x06b : Analog Center/LFE
1332 0x06e/0x06f : Analog Rear (l/r)
1333 0x070/0x071 : AC97 Output (l/r)
1336 0x076/0x077 : ADC Recording Buffer (l/r)
1338 0x0c0 - 0x0c4 = 0 - 4
1339 0x0c5 = 0x8, 0x0c6 = 0x10, 0x0c7 = 0x20
1340 0x0c8 = 0x100, 0x0c9 = 0x10000, 0x0ca = 0x80000
1341 0x0cb = 0x10000000, 0x0cc = 0x20000000, 0x0cd = 0x40000000
1342 0x0ce = 0x80000000, 0x0cf = 0x7fffffff, 0x0d0 = 0xffffffff
1343 0x0d1 = 0xfffffffe, 0x0d2 = 0xc0000000, 0x0d3 = 0x41fbbcdc
1344 0x0d4 = 0x5a7ef9db, 0x0d5 = 0x00100000, 0x0dc = 0x00000001 (???)
1346 0x0d6 : Accumulator (???)
1347 0x0d7 : Condition Register
1348 0x0d8 : Noise source
1349 0x0d9 : Noise source
1350 Tank Memory Data Registers
1352 Tank Memory Address Registers
1354 General Purpose Registers
1358 /* AC97Output[l/r] = FXBus PCM[l/r] */
1359 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_AC97_L), A_C_00000000,
1360 A_C_00000000, A_FXBUS(FXBUS_PCM_LEFT), &pc);
1361 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_AC97_R), A_C_00000000,
1362 A_C_00000000, A_FXBUS(FXBUS_PCM_RIGHT), &pc);
1364 /* GPR[0/1] = RCA S/PDIF[l/r] -- Master volume */
1365 audigy_addefxop(sc, iACC3, A_GPR(0), A_C_00000000,
1366 A_C_00000000, A_EXTIN(EXTIN_COAX_SPDIF_L), &pc);
1367 audigy_addefxop(sc, iACC3, A_GPR(1), A_C_00000000,
1368 A_C_00000000, A_EXTIN(EXTIN_COAX_SPDIF_R), &pc);
1370 /* GPR[2] = GPR[0] (Left) / 2 + GPR[1] (Right) / 2 -- Central volume */
1371 audigy_addefxop(sc, iINTERP, A_GPR(2), A_GPR(1),
1372 A_C_40000000, A_GPR(0), &pc);
1374 /* Headphones[l/r] = GPR[0/1] */
1375 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_HEADPHONE_L),
1376 A_C_00000000, A_C_00000000, A_GPR(0), &pc);
1377 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_HEADPHONE_R),
1378 A_C_00000000, A_C_00000000, A_GPR(1), &pc);
1380 /* Analog Front[l/r] = GPR[0/1] */
1381 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_AFRONT_L), A_C_00000000,
1382 A_C_00000000, A_GPR(0), &pc);
1383 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_AFRONT_R), A_C_00000000,
1384 A_C_00000000, A_GPR(1), &pc);
1386 /* Digital Front[l/r] = GPR[0/1] */
1387 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_FRONT_L), A_C_00000000,
1388 A_C_00000000, A_GPR(0), &pc);
1389 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_FRONT_R), A_C_00000000,
1390 A_C_00000000, A_GPR(1), &pc);
1392 /* Center and Subwoofer configuration */
1393 /* Analog Center = GPR[0] + GPR[2] */
1394 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_ACENTER), A_C_00000000,
1395 A_GPR(0), A_GPR(2), &pc);
1396 /* Analog Sub = GPR[1] + GPR[2] */
1397 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_ALFE), A_C_00000000,
1398 A_GPR(1), A_GPR(2), &pc);
1400 /* Digital Center = GPR[0] + GPR[2] */
1401 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_CENTER), A_C_00000000,
1402 A_GPR(0), A_GPR(2), &pc);
1403 /* Digital Sub = GPR[1] + GPR[2] */
1404 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_LFE), A_C_00000000,
1405 A_GPR(1), A_GPR(2), &pc);
1408 /* Analog Rear[l/r] = (GPR[0/1] * RearVolume[l/r]) >> 31 */
1409 /* RearVolume = GPR[0x10/0x11] (Will this ever be implemented?) */
1410 audigy_addefxop(sc, iMAC0, A_EXTOUT(A_EXTOUT_AREAR_L), A_C_00000000,
1411 A_GPR(16), A_GPR(0), &pc);
1412 audigy_addefxop(sc, iMAC0, A_EXTOUT(A_EXTOUT_AREAR_R), A_C_00000000,
1413 A_GPR(17), A_GPR(1), &pc);
1415 /* Digital Rear[l/r] = (GPR[0/1] * RearVolume[l/r]) >> 31 */
1416 /* RearVolume = GPR[0x10/0x11] (Will this ever be implemented?) */
1417 audigy_addefxop(sc, iMAC0, A_EXTOUT(A_EXTOUT_REAR_L), A_C_00000000,
1418 A_GPR(16), A_GPR(0), &pc);
1419 audigy_addefxop(sc, iMAC0, A_EXTOUT(A_EXTOUT_REAR_R), A_C_00000000,
1420 A_GPR(17), A_GPR(1), &pc);
1422 /* XXX This is just a copy to the channel, since we do not have
1423 * a patch manager, it is useful for have another output enabled.
1426 /* Analog Rear[l/r] = GPR[0/1] */
1427 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_AREAR_L), A_C_00000000,
1428 A_C_00000000, A_GPR(0), &pc);
1429 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_AREAR_R), A_C_00000000,
1430 A_C_00000000, A_GPR(1), &pc);
1432 /* Digital Rear[l/r] = GPR[0/1] */
1433 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_REAR_L), A_C_00000000,
1434 A_C_00000000, A_GPR(0), &pc);
1435 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_REAR_R), A_C_00000000,
1436 A_C_00000000, A_GPR(1), &pc);
1439 /* ADC Recording buffer[l/r] = AC97Input[l/r] */
1440 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_ADC_CAP_L), A_C_00000000,
1441 A_C_00000000, A_EXTIN(A_EXTIN_AC97_L), &pc);
1442 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_ADC_CAP_R), A_C_00000000,
1443 A_C_00000000, A_EXTIN(A_EXTIN_AC97_R), &pc);
1445 /* resume normal operations */
1446 emu_wrptr(sc, 0, A_DBG, 0);
1450 emu_initefx(struct sc_info *sc)
1455 /* acc3 0,0,0,0 - NOPs */
1456 for (i = 0; i < 512; i++) {
1457 emu_wrefx(sc, i * 2, 0x10040);
1458 emu_wrefx(sc, i * 2 + 1, 0x610040);
1461 for (i = 0; i < 256; i++)
1462 emu_wrptr(sc, 0, FXGPREGBASE + i, 0);
1464 /* FX-8010 DSP Registers:
1466 0x000-0x00f : 16 registers
1468 0x010/0x011 : AC97 Codec (l/r)
1469 0x012/0x013 : ADC, S/PDIF (l/r)
1470 0x014/0x015 : Mic(left), Zoom (l/r)
1471 0x016/0x017 : TOS link in (l/r)
1472 0x018/0x019 : Line/Mic 1 (l/r)
1473 0x01a/0x01b : COAX S/PDIF (l/r)
1474 0x01c/0x01d : Line/Mic 2 (l/r)
1476 0x020/0x021 : AC97 Output (l/r)
1477 0x022/0x023 : TOS link out (l/r)
1478 0x024/0x025 : Center/LFE
1479 0x026/0x027 : LiveDrive Headphone (l/r)
1480 0x028/0x029 : Rear Channel (l/r)
1481 0x02a/0x02b : ADC Recording Buffer (l/r)
1482 0x02c : Mic Recording Buffer
1483 0x031/0x032 : Analog Center/LFE
1485 0x040 - 0x044 = 0 - 4
1486 0x045 = 0x8, 0x046 = 0x10, 0x047 = 0x20
1487 0x048 = 0x100, 0x049 = 0x10000, 0x04a = 0x80000
1488 0x04b = 0x10000000, 0x04c = 0x20000000, 0x04d = 0x40000000
1489 0x04e = 0x80000000, 0x04f = 0x7fffffff, 0x050 = 0xffffffff
1490 0x051 = 0xfffffffe, 0x052 = 0xc0000000, 0x053 = 0x41fbbcdc
1491 0x054 = 0x5a7ef9db, 0x055 = 0x00100000
1494 0x057 : Condition Register
1495 0x058 : Noise source
1496 0x059 : Noise source
1497 0x05a : IRQ Register
1498 0x05b : TRAM Delay Base Address Count
1499 General Purpose Registers
1501 Tank Memory Data Registers
1503 Tank Memory Address Registers
1507 /* Routing - this will be configurable in later version */
1509 /* GPR[0/1] = FX * 4 + SPDIF-in */
1510 emu_addefxop(sc, iMACINT0, GPR(0), EXTIN(EXTIN_SPDIF_CD_L),
1511 FXBUS(FXBUS_PCM_LEFT), C_00000004, &pc);
1512 emu_addefxop(sc, iMACINT0, GPR(1), EXTIN(EXTIN_SPDIF_CD_R),
1513 FXBUS(FXBUS_PCM_RIGHT), C_00000004, &pc);
1515 /* GPR[0/1] += APS-input */
1516 emu_addefxop(sc, iACC3, GPR(0), GPR(0), C_00000000,
1517 sc->APS ? EXTIN(EXTIN_TOSLINK_L) : C_00000000, &pc);
1518 emu_addefxop(sc, iACC3, GPR(1), GPR(1), C_00000000,
1519 sc->APS ? EXTIN(EXTIN_TOSLINK_R) : C_00000000, &pc);
1521 /* FrontOut (AC97) = GPR[0/1] */
1522 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_AC97_L), C_00000000,
1523 C_00000000, GPR(0), &pc);
1524 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_AC97_R), C_00000000,
1525 C_00000001, GPR(1), &pc);
1527 /* GPR[2] = GPR[0] (Left) / 2 + GPR[1] (Right) / 2 -- Central volume */
1528 emu_addefxop(sc, iINTERP, GPR(2), GPR(1), C_40000000, GPR(0), &pc);
1531 /* RearOut = (GPR[0/1] * RearVolume) >> 31 */
1532 /* RearVolume = GPR[0x10/0x11] */
1533 emu_addefxop(sc, iMAC0, EXTOUT(EXTOUT_REAR_L), C_00000000,
1534 GPR(16), GPR(0), &pc);
1535 emu_addefxop(sc, iMAC0, EXTOUT(EXTOUT_REAR_R), C_00000000,
1536 GPR(17), GPR(1), &pc);
1538 /* XXX This is just a copy to the channel, since we do not have
1539 * a patch manager, it is useful for have another output enabled.
1542 /* Rear[l/r] = GPR[0/1] */
1543 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_REAR_L), C_00000000,
1544 C_00000000, GPR(0), &pc);
1545 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_REAR_R), C_00000000,
1546 C_00000000, GPR(1), &pc);
1549 /* TOS out[l/r] = GPR[0/1] */
1550 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_TOSLINK_L), C_00000000,
1551 C_00000000, GPR(0), &pc);
1552 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_TOSLINK_R), C_00000000,
1553 C_00000000, GPR(1), &pc);
1555 /* Center and Subwoofer configuration */
1556 /* Analog Center = GPR[0] + GPR[2] */
1557 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_ACENTER), C_00000000,
1558 GPR(0), GPR(2), &pc);
1559 /* Analog Sub = GPR[1] + GPR[2] */
1560 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_ALFE), C_00000000,
1561 GPR(1), GPR(2), &pc);
1562 /* Digital Center = GPR[0] + GPR[2] */
1563 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_CENTER), C_00000000,
1564 GPR(0), GPR(2), &pc);
1565 /* Digital Sub = GPR[1] + GPR[2] */
1566 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_LFE), C_00000000,
1567 GPR(1), GPR(2), &pc);
1569 /* Headphones[l/r] = GPR[0/1] */
1570 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_HEADPHONE_L), C_00000000,
1571 C_00000000, GPR(0), &pc);
1572 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_HEADPHONE_R), C_00000000,
1573 C_00000000, GPR(1), &pc);
1575 /* ADC Recording buffer[l/r] = AC97Input[l/r] */
1576 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_ADC_CAP_L), C_00000000,
1577 C_00000000, EXTIN(EXTIN_AC97_L), &pc);
1578 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_ADC_CAP_R), C_00000000,
1579 C_00000000, EXTIN(EXTIN_AC97_R), &pc);
1581 /* resume normal operations */
1582 emu_wrptr(sc, 0, DBG, 0);
1585 /* Probe and attach the card */
1587 emu_init(struct sc_info *sc)
1589 u_int32_t spcs, ch, tmp, i;
1592 /* enable additional AC97 slots */
1593 emu_wrptr(sc, 0, AC97SLOT, AC97SLOT_CNTR | AC97SLOT_LFE);
1596 /* disable audio and lock cache */
1598 HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE,
1601 /* reset recording buffers */
1602 emu_wrptr(sc, 0, MICBS, ADCBS_BUFSIZE_NONE);
1603 emu_wrptr(sc, 0, MICBA, 0);
1604 emu_wrptr(sc, 0, FXBS, ADCBS_BUFSIZE_NONE);
1605 emu_wrptr(sc, 0, FXBA, 0);
1606 emu_wrptr(sc, 0, ADCBS, ADCBS_BUFSIZE_NONE);
1607 emu_wrptr(sc, 0, ADCBA, 0);
1609 /* disable channel interrupt */
1611 INTE_INTERVALTIMERENB | INTE_SAMPLERATETRACKER | INTE_PCIERRORENABLE,
1613 emu_wrptr(sc, 0, CLIEL, 0);
1614 emu_wrptr(sc, 0, CLIEH, 0);
1615 emu_wrptr(sc, 0, SOLEL, 0);
1616 emu_wrptr(sc, 0, SOLEH, 0);
1618 /* wonder what these do... */
1620 emu_wrptr(sc, 0, SPBYPASS, 0xf00);
1621 emu_wrptr(sc, 0, AC97SLOT, 0x3);
1624 /* init envelope engine */
1625 for (ch = 0; ch < NUM_G; ch++) {
1626 emu_wrptr(sc, ch, DCYSUSV, ENV_OFF);
1627 emu_wrptr(sc, ch, IP, 0);
1628 emu_wrptr(sc, ch, VTFT, 0xffff);
1629 emu_wrptr(sc, ch, CVCF, 0xffff);
1630 emu_wrptr(sc, ch, PTRX, 0);
1631 emu_wrptr(sc, ch, CPF, 0);
1632 emu_wrptr(sc, ch, CCR, 0);
1634 emu_wrptr(sc, ch, PSST, 0);
1635 emu_wrptr(sc, ch, DSL, 0x10);
1636 emu_wrptr(sc, ch, CCCA, 0);
1637 emu_wrptr(sc, ch, Z1, 0);
1638 emu_wrptr(sc, ch, Z2, 0);
1639 emu_wrptr(sc, ch, FXRT, 0xd01c0000);
1641 emu_wrptr(sc, ch, ATKHLDM, 0);
1642 emu_wrptr(sc, ch, DCYSUSM, 0);
1643 emu_wrptr(sc, ch, IFATN, 0xffff);
1644 emu_wrptr(sc, ch, PEFE, 0);
1645 emu_wrptr(sc, ch, FMMOD, 0);
1646 emu_wrptr(sc, ch, TREMFRQ, 24); /* 1 Hz */
1647 emu_wrptr(sc, ch, FM2FRQ2, 24); /* 1 Hz */
1648 emu_wrptr(sc, ch, TEMPENV, 0);
1650 /*** these are last so OFF prevents writing ***/
1651 emu_wrptr(sc, ch, LFOVAL2, 0);
1652 emu_wrptr(sc, ch, LFOVAL1, 0);
1653 emu_wrptr(sc, ch, ATKHLDV, 0);
1654 emu_wrptr(sc, ch, ENVVOL, 0);
1655 emu_wrptr(sc, ch, ENVVAL, 0);
1658 /* audigy cards need this to initialize correctly */
1659 emu_wrptr(sc, ch, 0x4c, 0);
1660 emu_wrptr(sc, ch, 0x4d, 0);
1661 emu_wrptr(sc, ch, 0x4e, 0);
1662 emu_wrptr(sc, ch, 0x4f, 0);
1663 /* set default routing */
1664 emu_wrptr(sc, ch, A_FXRT1, 0x03020100);
1665 emu_wrptr(sc, ch, A_FXRT2, 0x3f3f3f3f);
1666 emu_wrptr(sc, ch, A_SENDAMOUNTS, 0);
1669 sc->voice[ch].vnum = ch;
1670 sc->voice[ch].slave = NULL;
1671 sc->voice[ch].busy = 0;
1672 sc->voice[ch].ismaster = 0;
1673 sc->voice[ch].running = 0;
1674 sc->voice[ch].b16 = 0;
1675 sc->voice[ch].stereo = 0;
1676 sc->voice[ch].speed = 0;
1677 sc->voice[ch].start = 0;
1678 sc->voice[ch].end = 0;
1679 sc->voice[ch].channel = NULL;
1681 sc->pnum = sc->rnum = 0;
1684 * Init to 0x02109204 :
1685 * Clock accuracy = 0 (1000ppm)
1686 * Sample Rate = 2 (48kHz)
1687 * Audio Channel = 1 (Left of 2)
1688 * Source Number = 0 (Unspecified)
1689 * Generation Status = 1 (Original for Cat Code 12)
1690 * Cat Code = 12 (Digital Signal Mixer)
1692 * Emphasis = 0 (None)
1693 * CP = 1 (Copyright unasserted)
1694 * AN = 0 (Audio data)
1697 spcs = SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
1698 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
1699 SPCS_GENERATIONSTATUS | 0x00001200 | 0x00000000 |
1700 SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT;
1701 emu_wrptr(sc, 0, SPCS0, spcs);
1702 emu_wrptr(sc, 0, SPCS1, spcs);
1703 emu_wrptr(sc, 0, SPCS2, spcs);
1707 else if (sc->audigy2) { /* Audigy 2 */
1708 /* from ALSA initialization code: */
1710 /* Hack for Alice3 to work independent of haP16V driver */
1713 /* Setup SRCMulti_I2S SamplingRate */
1714 tmp = emu_rdptr(sc, 0, A_SPDIF_SAMPLERATE) & 0xfffff1ff;
1715 emu_wrptr(sc, 0, A_SPDIF_SAMPLERATE, tmp | 0x400);
1717 /* Setup SRCSel (Enable SPDIF, I2S SRCMulti) */
1718 emu_wr(sc, 0x20, 0x00600000, 4);
1719 emu_wr(sc, 0x24, 0x00000014, 4);
1721 /* Setup SRCMulti Input Audio Enable */
1722 emu_wr(sc, 0x20, 0x006e0000, 4);
1723 emu_wr(sc, 0x24, 0xff00ff00, 4);
1726 SLIST_INIT(&sc->mem.blocks);
1727 sc->mem.ptb_pages = emu_malloc(sc, EMUMAXPAGES * sizeof(u_int32_t),
1728 &sc->mem.ptb_pages_addr);
1729 if (sc->mem.ptb_pages == NULL)
1732 sc->mem.silent_page = emu_malloc(sc, EMUPAGESIZE,
1733 &sc->mem.silent_page_addr);
1734 if (sc->mem.silent_page == NULL) {
1735 emu_free(sc, sc->mem.ptb_pages);
1738 /* Clear page with silence & setup all pointers to this page */
1739 bzero(sc->mem.silent_page, EMUPAGESIZE);
1740 tmp = (u_int32_t)(sc->mem.silent_page_addr) << 1;
1741 for (i = 0; i < EMUMAXPAGES; i++)
1742 sc->mem.ptb_pages[i] = tmp | i;
1744 emu_wrptr(sc, 0, PTB, (sc->mem.ptb_pages_addr));
1745 emu_wrptr(sc, 0, TCB, 0); /* taken from original driver */
1746 emu_wrptr(sc, 0, TCBS, 0); /* taken from original driver */
1748 for (ch = 0; ch < NUM_G; ch++) {
1749 emu_wrptr(sc, ch, MAPA, tmp | MAP_PTI_MASK);
1750 emu_wrptr(sc, ch, MAPB, tmp | MAP_PTI_MASK);
1753 /* emu_memalloc(sc, EMUPAGESIZE); */
1755 * Hokay, now enable the AUD bit
1758 * Enable Audio = 0 (enabled after fx processor initialization)
1759 * Mute Disable Audio = 0
1764 * Mute Disable Audio = 0
1766 * GP S/PDIF AC3 Enable = 1
1767 * CD S/PDIF AC3 Enable = 1
1771 * Mute Disable Audio = 0
1772 * Lock Tank Memory = 1
1773 * Lock Sound Memory = 0
1778 tmp = HCFG_AUTOMUTE | HCFG_JOYENABLE;
1779 if (sc->audigy2) /* Audigy 2 */
1780 tmp = HCFG_AUDIOENABLE | HCFG_AC3ENABLE_CDSPDIF |
1781 HCFG_AC3ENABLE_GPSPDIF;
1782 emu_wr(sc, HCFG, tmp, 4);
1786 /* from ALSA initialization code: */
1788 /* enable audio and disable both audio/digital outputs */
1789 emu_wr(sc, HCFG, emu_rd(sc, HCFG, 4) | HCFG_AUDIOENABLE, 4);
1790 emu_wr(sc, A_IOCFG, emu_rd(sc, A_IOCFG, 4) & ~A_IOCFG_GPOUT_AD,
1792 if (sc->audigy2) { /* Audigy 2 */
1794 * Set GPO6 to 1 for Apollo. This has to be done after
1795 * init Alice3 I2SOut beyond 48kHz.
1796 * So, sequence is important.
1799 emu_rd(sc, A_IOCFG, 4) | A_IOCFG_GPOUT_A, 4);
1802 /* EMU10K1 initialization code */
1803 tmp = HCFG_AUDIOENABLE | HCFG_LOCKTANKCACHE_MASK
1806 tmp |= HCFG_JOYENABLE;
1808 emu_wr(sc, HCFG, tmp, 4);
1810 /* TOSLink detection */
1812 tmp = emu_rd(sc, HCFG, 4);
1813 if (tmp & (HCFG_GPINPUT0 | HCFG_GPINPUT1)) {
1814 emu_wr(sc, HCFG, tmp | HCFG_GPOUT1, 4);
1816 if (tmp != (emu_rd(sc, HCFG, 4) & ~HCFG_GPOUT1)) {
1818 emu_wr(sc, HCFG, tmp, 4);
1827 emu_uninit(struct sc_info *sc)
1831 emu_wr(sc, INTE, 0, 4);
1832 for (ch = 0; ch < NUM_G; ch++)
1833 emu_wrptr(sc, ch, DCYSUSV, ENV_OFF);
1834 for (ch = 0; ch < NUM_G; ch++) {
1835 emu_wrptr(sc, ch, VTFT, 0);
1836 emu_wrptr(sc, ch, CVCF, 0);
1837 emu_wrptr(sc, ch, PTRX, 0);
1838 emu_wrptr(sc, ch, CPF, 0);
1841 if (sc->audigy) { /* stop fx processor */
1842 emu_wrptr(sc, 0, A_DBG, A_DBG_SINGLE_STEP);
1845 /* disable audio and lock cache */
1847 HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE,
1850 emu_wrptr(sc, 0, PTB, 0);
1851 /* reset recording buffers */
1852 emu_wrptr(sc, 0, MICBS, ADCBS_BUFSIZE_NONE);
1853 emu_wrptr(sc, 0, MICBA, 0);
1854 emu_wrptr(sc, 0, FXBS, ADCBS_BUFSIZE_NONE);
1855 emu_wrptr(sc, 0, FXBA, 0);
1856 emu_wrptr(sc, 0, FXWC, 0);
1857 emu_wrptr(sc, 0, ADCBS, ADCBS_BUFSIZE_NONE);
1858 emu_wrptr(sc, 0, ADCBA, 0);
1859 emu_wrptr(sc, 0, TCB, 0);
1860 emu_wrptr(sc, 0, TCBS, 0);
1862 /* disable channel interrupt */
1863 emu_wrptr(sc, 0, CLIEL, 0);
1864 emu_wrptr(sc, 0, CLIEH, 0);
1865 emu_wrptr(sc, 0, SOLEL, 0);
1866 emu_wrptr(sc, 0, SOLEH, 0);
1868 /* init envelope engine */
1869 if (!SLIST_EMPTY(&sc->mem.blocks))
1870 device_printf(sc->dev, "warning: memblock list not empty\n");
1871 emu_free(sc, sc->mem.ptb_pages);
1872 emu_free(sc, sc->mem.silent_page);
1878 emu_pci_probe(device_t dev)
1882 switch (pci_get_devid(dev)) {
1883 case EMU10K1_PCI_ID:
1884 s = "Creative EMU10K1";
1887 case EMU10K2_PCI_ID:
1888 if (pci_get_revid(dev) == 0x04)
1889 s = "Creative Audigy 2 (EMU10K2)";
1891 s = "Creative Audigy (EMU10K2)";
1894 case EMU10K3_PCI_ID:
1895 s = "Creative Audigy 2 (EMU10K3)";
1902 device_set_desc(dev, s);
1903 return BUS_PROBE_DEFAULT;
1907 emu_pci_attach(device_t dev)
1909 struct ac97_info *codec = NULL;
1913 char status[SND_STATUSLEN];
1915 if ((sc = malloc(sizeof(*sc), M_DEVBUF, M_WAITOK | M_ZERO)) == NULL) {
1916 device_printf(dev, "cannot allocate softc\n");
1920 sc->lock = snd_mtxcreate(device_get_nameunit(dev), "sound softc");
1922 sc->type = pci_get_devid(dev);
1923 sc->rev = pci_get_revid(dev);
1924 sc->audigy = sc->type == EMU10K2_PCI_ID || sc->type == EMU10K3_PCI_ID;
1925 sc->audigy2 = (sc->audigy && sc->rev == 0x04);
1926 sc->nchans = sc->audigy ? 8 : 4;
1927 sc->addrmask = sc->audigy ? A_PTR_ADDRESS_MASK : PTR_ADDRESS_MASK;
1929 data = pci_read_config(dev, PCIR_COMMAND, 2);
1930 data |= (PCIM_CMD_PORTEN | PCIM_CMD_BUSMASTEREN);
1931 pci_write_config(dev, PCIR_COMMAND, data, 2);
1932 data = pci_read_config(dev, PCIR_COMMAND, 2);
1935 sc->reg = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &i, RF_ACTIVE);
1936 if (sc->reg == NULL) {
1937 device_printf(dev, "unable to map register space\n");
1940 sc->st = rman_get_bustag(sc->reg);
1941 sc->sh = rman_get_bushandle(sc->reg);
1943 sc->bufsz = pcm_getbuffersize(dev, 4096, EMU_DEFAULT_BUFSZ, 65536);
1945 if (bus_dma_tag_create(/*parent*/NULL, /*alignment*/2, /*boundary*/0,
1946 /*lowaddr*/1 << 31, /* can only access 0-2gb */
1947 /*highaddr*/BUS_SPACE_MAXADDR,
1948 /*filter*/NULL, /*filterarg*/NULL,
1949 /*maxsize*/sc->bufsz, /*nsegments*/1, /*maxsegz*/0x3ffff,
1950 /*flags*/0, /*lockfunc*/busdma_lock_mutex,
1951 /*lockarg*/&Giant, &sc->parent_dmat) != 0) {
1952 device_printf(dev, "unable to create dma tag\n");
1956 if (emu_init(sc) == -1) {
1957 device_printf(dev, "unable to initialize the card\n");
1961 codec = AC97_CREATE(dev, sc, emu_ac97);
1962 if (codec == NULL) goto bad;
1963 gotmic = (ac97_getcaps(codec) & AC97_CAP_MICCHANNEL) ? 1 : 0;
1964 if (mixer_init(dev, ac97_getmixerclass(), codec) == -1) goto bad;
1967 sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &i,
1968 RF_ACTIVE | RF_SHAREABLE);
1970 snd_setup_intr(dev, sc->irq, INTR_MPSAFE, emu_intr, sc, &sc->ih)) {
1971 device_printf(dev, "unable to map interrupt\n");
1975 snprintf(status, SND_STATUSLEN, "at io 0x%lx irq %ld %s",
1976 rman_get_start(sc->reg), rman_get_start(sc->irq),
1977 PCM_KLDSTRING(snd_emu10k1));
1979 if (pcm_register(dev, sc, sc->nchans, gotmic ? 3 : 2)) goto bad;
1980 for (i = 0; i < sc->nchans; i++)
1981 pcm_addchan(dev, PCMDIR_PLAY, &emupchan_class, sc);
1982 for (i = 0; i < (gotmic ? 3 : 2); i++)
1983 pcm_addchan(dev, PCMDIR_REC, &emurchan_class, sc);
1985 pcm_setstatus(dev, status);
1990 if (codec) ac97_destroy(codec);
1991 if (sc->reg) bus_release_resource(dev, SYS_RES_IOPORT, PCIR_BAR(0), sc->reg);
1992 if (sc->ih) bus_teardown_intr(dev, sc->irq, sc->ih);
1993 if (sc->irq) bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq);
1994 if (sc->parent_dmat) bus_dma_tag_destroy(sc->parent_dmat);
1995 if (sc->lock) snd_mtxfree(sc->lock);
2001 emu_pci_detach(device_t dev)
2006 r = pcm_unregister(dev);
2010 sc = pcm_getdevinfo(dev);
2014 bus_release_resource(dev, SYS_RES_IOPORT, PCIR_BAR(0), sc->reg);
2015 bus_teardown_intr(dev, sc->irq, sc->ih);
2016 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq);
2017 bus_dma_tag_destroy(sc->parent_dmat);
2018 snd_mtxfree(sc->lock);
2024 /* add suspend, resume */
2025 static device_method_t emu_methods[] = {
2026 /* Device interface */
2027 DEVMETHOD(device_probe, emu_pci_probe),
2028 DEVMETHOD(device_attach, emu_pci_attach),
2029 DEVMETHOD(device_detach, emu_pci_detach),
2034 static driver_t emu_driver = {
2040 DRIVER_MODULE(snd_emu10k1, pci, emu_driver, pcm_devclass, 0, 0);
2041 DRIVER_MODULE(snd_emu10k1, cardbus, emu_driver, pcm_devclass, 0, 0);
2042 MODULE_DEPEND(snd_emu10k1, sound, SOUND_MINVER, SOUND_PREFVER, SOUND_MAXVER);
2043 MODULE_VERSION(snd_emu10k1, 1);
2045 /* dummy driver to silence the joystick device */
2047 emujoy_pci_probe(device_t dev)
2051 switch (pci_get_devid(dev)) {
2053 s = "Creative EMU10K1 Joystick";
2057 s = "Creative EMU10K2 Joystick";
2062 if (s) device_set_desc(dev, s);
2063 return s ? -1000 : ENXIO;
2067 emujoy_pci_attach(device_t dev)
2073 emujoy_pci_detach(device_t dev)
2078 static device_method_t emujoy_methods[] = {
2079 DEVMETHOD(device_probe, emujoy_pci_probe),
2080 DEVMETHOD(device_attach, emujoy_pci_attach),
2081 DEVMETHOD(device_detach, emujoy_pci_detach),
2086 static driver_t emujoy_driver = {
2092 static devclass_t emujoy_devclass;
2094 DRIVER_MODULE(emujoy, pci, emujoy_driver, emujoy_devclass, 0, 0);