1 /* $NetBSD: ohci.c,v 1.138 2003/02/08 03:32:50 ichiro Exp $ */
3 /* Also, already ported:
4 * $NetBSD: ohci.c,v 1.140 2003/05/13 04:42:00 gson Exp $
5 * $NetBSD: ohci.c,v 1.141 2003/09/10 20:08:29 mycroft Exp $
6 * $NetBSD: ohci.c,v 1.142 2003/10/11 03:04:26 toshii Exp $
7 * $NetBSD: ohci.c,v 1.143 2003/10/18 04:50:35 simonb Exp $
8 * $NetBSD: ohci.c,v 1.144 2003/11/23 19:18:06 augustss Exp $
9 * $NetBSD: ohci.c,v 1.145 2003/11/23 19:20:25 augustss Exp $
10 * $NetBSD: ohci.c,v 1.146 2003/12/29 08:17:10 toshii Exp $
11 * $NetBSD: ohci.c,v 1.147 2004/06/22 07:20:35 mycroft Exp $
12 * $NetBSD: ohci.c,v 1.148 2004/06/22 18:27:46 mycroft Exp $
15 #include <sys/cdefs.h>
16 __FBSDID("$FreeBSD$");
19 * Copyright (c) 1998 The NetBSD Foundation, Inc.
20 * All rights reserved.
22 * This code is derived from software contributed to The NetBSD Foundation
23 * by Lennart Augustsson (lennart@augustsson.net) at
24 * Carlstedt Research & Technology.
26 * Redistribution and use in source and binary forms, with or without
27 * modification, are permitted provided that the following conditions
29 * 1. Redistributions of source code must retain the above copyright
30 * notice, this list of conditions and the following disclaimer.
31 * 2. Redistributions in binary form must reproduce the above copyright
32 * notice, this list of conditions and the following disclaimer in the
33 * documentation and/or other materials provided with the distribution.
34 * 3. All advertising materials mentioning features or use of this software
35 * must display the following acknowledgement:
36 * This product includes software developed by the NetBSD
37 * Foundation, Inc. and its contributors.
38 * 4. Neither the name of The NetBSD Foundation nor the names of its
39 * contributors may be used to endorse or promote products derived
40 * from this software without specific prior written permission.
42 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
43 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
44 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
45 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
46 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
47 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
48 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
49 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
50 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
51 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
52 * POSSIBILITY OF SUCH DAMAGE.
56 * USB Open Host Controller driver.
58 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html
59 * USB spec: http://www.usb.org/developers/docs/usbspec.zip
62 #include <sys/param.h>
63 #include <sys/systm.h>
64 #include <sys/malloc.h>
65 #include <sys/kernel.h>
66 #if defined(__NetBSD__) || defined(__OpenBSD__)
67 #include <sys/device.h>
68 #include <sys/select.h>
69 #elif defined(__FreeBSD__)
70 #include <sys/endian.h>
71 #include <sys/module.h>
73 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__)
74 #include <machine/cpu.h>
78 #include <sys/queue.h>
79 #include <sys/sysctl.h>
81 #include <machine/bus.h>
82 #include <machine/endian.h>
84 #include <dev/usb/usb.h>
85 #include <dev/usb/usbdi.h>
86 #include <dev/usb/usbdivar.h>
87 #include <dev/usb/usb_mem.h>
88 #include <dev/usb/usb_quirks.h>
90 #include <dev/usb/ohcireg.h>
91 #include <dev/usb/ohcivar.h>
93 #if defined(__FreeBSD__)
94 #include <machine/clock.h>
96 #define delay(d) DELAY(d)
99 #if defined(__OpenBSD__)
100 struct cfdriver ohci_cd = {
101 NULL, "ohci", DV_DULL
106 #define DPRINTF(x) if (ohcidebug) logprintf x
107 #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x
109 SYSCTL_NODE(_hw_usb, OID_AUTO, ohci, CTLFLAG_RW, 0, "USB ohci");
110 SYSCTL_INT(_hw_usb_ohci, OID_AUTO, debug, CTLFLAG_RW,
111 &ohcidebug, 0, "ohci debug level");
113 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f))
117 #define DPRINTFN(n,x)
121 * The OHCI controller is little endian, so on big endian machines
122 * the data strored in memory needs to be swapped.
124 #if defined(__OpenBSD__)
125 #if BYTE_ORDER == BIG_ENDIAN
126 #define htole32(x) (bswap32(x))
127 #define le32toh(x) (bswap32(x))
129 #define htole32(x) (x)
130 #define le32toh(x) (x)
136 Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *);
137 Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *);
139 Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *);
140 Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *);
142 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *);
143 Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *);
146 Static void ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *,
149 Static usbd_status ohci_alloc_std_chain(struct ohci_pipe *,
150 ohci_softc_t *, int, int, usbd_xfer_handle,
151 ohci_soft_td_t *, ohci_soft_td_t **);
153 #if defined(__NetBSD__) || defined(__OpenBSD__)
154 Static void ohci_shutdown(void *v);
155 Static void ohci_power(int, void *);
157 Static usbd_status ohci_open(usbd_pipe_handle);
158 Static void ohci_poll(struct usbd_bus *);
159 Static void ohci_softintr(void *);
160 Static void ohci_waitintr(ohci_softc_t *, usbd_xfer_handle);
161 Static void ohci_add_done(ohci_softc_t *, ohci_physaddr_t);
162 Static void ohci_rhsc(ohci_softc_t *, usbd_xfer_handle);
164 Static usbd_status ohci_device_request(usbd_xfer_handle xfer);
165 Static void ohci_add_ed(ohci_soft_ed_t *, ohci_soft_ed_t *);
166 Static void ohci_rem_ed(ohci_soft_ed_t *, ohci_soft_ed_t *);
167 Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *);
168 Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *);
169 Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t);
170 Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *);
171 Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *);
172 Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t);
174 Static usbd_status ohci_setup_isoc(usbd_pipe_handle pipe);
175 Static void ohci_device_isoc_enter(usbd_xfer_handle);
177 Static usbd_status ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
178 Static void ohci_freem(struct usbd_bus *, usb_dma_t *);
180 Static usbd_xfer_handle ohci_allocx(struct usbd_bus *);
181 Static void ohci_freex(struct usbd_bus *, usbd_xfer_handle);
183 Static usbd_status ohci_root_ctrl_transfer(usbd_xfer_handle);
184 Static usbd_status ohci_root_ctrl_start(usbd_xfer_handle);
185 Static void ohci_root_ctrl_abort(usbd_xfer_handle);
186 Static void ohci_root_ctrl_close(usbd_pipe_handle);
187 Static void ohci_root_ctrl_done(usbd_xfer_handle);
189 Static usbd_status ohci_root_intr_transfer(usbd_xfer_handle);
190 Static usbd_status ohci_root_intr_start(usbd_xfer_handle);
191 Static void ohci_root_intr_abort(usbd_xfer_handle);
192 Static void ohci_root_intr_close(usbd_pipe_handle);
193 Static void ohci_root_intr_done(usbd_xfer_handle);
195 Static usbd_status ohci_device_ctrl_transfer(usbd_xfer_handle);
196 Static usbd_status ohci_device_ctrl_start(usbd_xfer_handle);
197 Static void ohci_device_ctrl_abort(usbd_xfer_handle);
198 Static void ohci_device_ctrl_close(usbd_pipe_handle);
199 Static void ohci_device_ctrl_done(usbd_xfer_handle);
201 Static usbd_status ohci_device_bulk_transfer(usbd_xfer_handle);
202 Static usbd_status ohci_device_bulk_start(usbd_xfer_handle);
203 Static void ohci_device_bulk_abort(usbd_xfer_handle);
204 Static void ohci_device_bulk_close(usbd_pipe_handle);
205 Static void ohci_device_bulk_done(usbd_xfer_handle);
207 Static usbd_status ohci_device_intr_transfer(usbd_xfer_handle);
208 Static usbd_status ohci_device_intr_start(usbd_xfer_handle);
209 Static void ohci_device_intr_abort(usbd_xfer_handle);
210 Static void ohci_device_intr_close(usbd_pipe_handle);
211 Static void ohci_device_intr_done(usbd_xfer_handle);
213 Static usbd_status ohci_device_isoc_transfer(usbd_xfer_handle);
214 Static usbd_status ohci_device_isoc_start(usbd_xfer_handle);
215 Static void ohci_device_isoc_abort(usbd_xfer_handle);
216 Static void ohci_device_isoc_close(usbd_pipe_handle);
217 Static void ohci_device_isoc_done(usbd_xfer_handle);
219 Static usbd_status ohci_device_setintr(ohci_softc_t *sc,
220 struct ohci_pipe *pipe, int ival);
222 Static int ohci_str(usb_string_descriptor_t *, int, const char *);
224 Static void ohci_timeout(void *);
225 Static void ohci_timeout_task(void *);
226 Static void ohci_rhsc_able(ohci_softc_t *, int);
227 Static void ohci_rhsc_enable(void *);
229 Static void ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *);
230 Static void ohci_abort_xfer(usbd_xfer_handle, usbd_status);
232 Static void ohci_device_clear_toggle(usbd_pipe_handle pipe);
233 Static void ohci_noop(usbd_pipe_handle pipe);
235 Static usbd_status ohci_controller_init(ohci_softc_t *sc);
238 Static void ohci_dumpregs(ohci_softc_t *);
239 Static void ohci_dump_tds(ohci_soft_td_t *);
240 Static void ohci_dump_td(ohci_soft_td_t *);
241 Static void ohci_dump_ed(ohci_soft_ed_t *);
242 Static void ohci_dump_itd(ohci_soft_itd_t *);
243 Static void ohci_dump_itds(ohci_soft_itd_t *);
246 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \
247 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
248 #define OWRITE1(sc, r, x) \
249 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
250 #define OWRITE2(sc, r, x) \
251 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
252 #define OWRITE4(sc, r, x) \
253 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
254 #define OREAD1(sc, r) (OBARR(sc), bus_space_read_1((sc)->iot, (sc)->ioh, (r)))
255 #define OREAD2(sc, r) (OBARR(sc), bus_space_read_2((sc)->iot, (sc)->ioh, (r)))
256 #define OREAD4(sc, r) (OBARR(sc), bus_space_read_4((sc)->iot, (sc)->ioh, (r)))
258 /* Reverse the bits in a value 0 .. 31 */
259 Static u_int8_t revbits[OHCI_NO_INTRS] =
260 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c,
261 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e,
262 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d,
263 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f };
266 struct usbd_pipe pipe;
271 ohci_soft_itd_t *itd;
273 /* Info needed for different pipe kinds. */
279 ohci_soft_td_t *setup, *data, *stat;
298 #define OHCI_INTR_ENDPT 1
300 Static struct usbd_bus_methods ohci_bus_methods = {
310 Static struct usbd_pipe_methods ohci_root_ctrl_methods = {
311 ohci_root_ctrl_transfer,
312 ohci_root_ctrl_start,
313 ohci_root_ctrl_abort,
314 ohci_root_ctrl_close,
319 Static struct usbd_pipe_methods ohci_root_intr_methods = {
320 ohci_root_intr_transfer,
321 ohci_root_intr_start,
322 ohci_root_intr_abort,
323 ohci_root_intr_close,
328 Static struct usbd_pipe_methods ohci_device_ctrl_methods = {
329 ohci_device_ctrl_transfer,
330 ohci_device_ctrl_start,
331 ohci_device_ctrl_abort,
332 ohci_device_ctrl_close,
334 ohci_device_ctrl_done,
337 Static struct usbd_pipe_methods ohci_device_intr_methods = {
338 ohci_device_intr_transfer,
339 ohci_device_intr_start,
340 ohci_device_intr_abort,
341 ohci_device_intr_close,
342 ohci_device_clear_toggle,
343 ohci_device_intr_done,
346 Static struct usbd_pipe_methods ohci_device_bulk_methods = {
347 ohci_device_bulk_transfer,
348 ohci_device_bulk_start,
349 ohci_device_bulk_abort,
350 ohci_device_bulk_close,
351 ohci_device_clear_toggle,
352 ohci_device_bulk_done,
355 Static struct usbd_pipe_methods ohci_device_isoc_methods = {
356 ohci_device_isoc_transfer,
357 ohci_device_isoc_start,
358 ohci_device_isoc_abort,
359 ohci_device_isoc_close,
361 ohci_device_isoc_done,
364 #if defined(__NetBSD__) || defined(__OpenBSD__)
366 ohci_activate(device_ptr_t self, enum devact act)
368 struct ohci_softc *sc = (struct ohci_softc *)self;
375 case DVACT_DEACTIVATE:
376 if (sc->sc_child != NULL)
377 rv = config_deactivate(sc->sc_child);
386 ohci_detach(struct ohci_softc *sc, int flags)
390 #if defined(__NetBSD__) || defined(__OpenBSD__)
391 if (sc->sc_child != NULL)
392 rv = config_detach(sc->sc_child, flags);
400 usb_uncallout(sc->sc_tmo_rhsc, ohci_rhsc_enable, sc);
402 #if defined(__NetBSD__) || defined(__OpenBSD__)
403 powerhook_disestablish(sc->sc_powerhook);
404 shutdownhook_disestablish(sc->sc_shutdownhook);
407 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
408 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
410 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */
412 for (i = 0; i < OHCI_NO_EDS; i++)
413 ohci_free_sed(sc, sc->sc_eds[i]);
414 ohci_free_sed(sc, sc->sc_isoc_head);
415 ohci_free_sed(sc, sc->sc_bulk_head);
416 ohci_free_sed(sc, sc->sc_ctrl_head);
417 usb_freemem(&sc->sc_bus, &sc->sc_hccadma);
423 ohci_alloc_sed(ohci_softc_t *sc)
430 if (sc->sc_freeeds == NULL) {
431 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n"));
432 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK,
433 OHCI_ED_ALIGN, &dma);
436 for(i = 0; i < OHCI_SED_CHUNK; i++) {
437 offs = i * OHCI_SED_SIZE;
438 sed = KERNADDR(&dma, offs);
439 sed->physaddr = DMAADDR(&dma, offs);
440 sed->next = sc->sc_freeeds;
441 sc->sc_freeeds = sed;
444 sed = sc->sc_freeeds;
445 sc->sc_freeeds = sed->next;
446 memset(&sed->ed, 0, sizeof(ohci_ed_t));
452 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed)
454 sed->next = sc->sc_freeeds;
455 sc->sc_freeeds = sed;
459 ohci_alloc_std(ohci_softc_t *sc)
467 if (sc->sc_freetds == NULL) {
468 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n"));
469 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK,
470 OHCI_TD_ALIGN, &dma);
474 for(i = 0; i < OHCI_STD_CHUNK; i++) {
475 offs = i * OHCI_STD_SIZE;
476 std = KERNADDR(&dma, offs);
477 std->physaddr = DMAADDR(&dma, offs);
478 std->nexttd = sc->sc_freetds;
479 sc->sc_freetds = std;
485 std = sc->sc_freetds;
486 sc->sc_freetds = std->nexttd;
487 memset(&std->td, 0, sizeof(ohci_td_t));
490 ohci_hash_add_td(sc, std);
497 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std)
502 ohci_hash_rem_td(sc, std);
503 std->nexttd = sc->sc_freetds;
504 sc->sc_freetds = std;
509 ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc,
510 int alen, int rd, usbd_xfer_handle xfer,
511 ohci_soft_td_t *sp, ohci_soft_td_t **ep)
513 ohci_soft_td_t *next, *cur;
514 ohci_physaddr_t dataphys;
518 usb_dma_t *dma = &xfer->dmabuf;
519 u_int16_t flags = xfer->flags;
521 DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen));
527 (rd ? OHCI_TD_IN : OHCI_TD_OUT) |
528 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) |
529 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_SET_DI(6));
532 next = ohci_alloc_std(sc);
536 dataphys = DMAADDR(dma, offset);
539 * The OHCI hardware can handle at most one 4k crossing.
540 * XXX - currently we only allocate contigous buffers, but
541 * the OHCI spec says: If during the data transfer the buffer
542 * address contained in the HC's working copy of
543 * CurrentBufferPointer crosses a 4K boundary, the upper 20
544 * bits of Buffer End are copied to the working value of
545 * CurrentBufferPointer causing the next buffer address to
546 * be the 0th byte in the same 4K page that contains the
547 * last byte of the buffer (the 4K boundary crossing may
548 * occur within a data packet transfer.)
550 * If/when dma has multiple segments, this will need to
551 * properly handle fragmenting TD's.
553 * Note that if we are gathering data from multiple SMALL
554 * segments, e.g. mbufs, we need to do special gymnastics,
555 * e.g. bounce buffering or data aggregation,
556 * BEFORE WE GET HERE because a bulk USB transfer must
557 * consist of maximally sized packets right up to the end.
558 * A shorter than maximal packet means that it is the end
559 * of the transfer. If the data transfer length is a
560 * multiple of the packet size, then a 0 byte
561 * packet will be the signal of the end of transfer.
562 * Since packets can't cross TDs this means that
563 * each TD except the last one must cover an exact multiple
564 * of the maximal packet length.
566 if (OHCI_PAGE_OFFSET(dataphys) + len <= (2 * OHCI_PAGE_SIZE)) {
567 /* We can handle all that remains in this TD */
570 /* must use multiple TDs, fill as much as possible. */
571 curlen = 2 * OHCI_PAGE_SIZE -
572 OHCI_PAGE_OFFSET(dataphys);
573 /* the length must be a multiple of the max size */
575 UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize);
576 KASSERT((curlen != 0), ("ohci_alloc_std: curlen == 0"));
578 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x "
579 "len=%d curlen=%d\n",
580 dataphys, len, curlen));
583 cur->td.td_flags = tdflags;
584 cur->td.td_cbp = htole32(dataphys);
586 cur->td.td_nexttd = htole32(next->physaddr);
587 cur->td.td_be = htole32(DMAADDR(dma, offset + curlen - 1));
589 cur->flags = OHCI_ADD_LEN;
591 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n",
592 dataphys, dataphys + curlen - 1));
596 panic("Length went negative: %d curlen %d dma %p offset %08x", len, curlen, dma, (int)0);
598 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n"));
602 if ((flags & USBD_FORCE_SHORT_XFER) &&
603 alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) {
604 /* Force a 0 length transfer at the end. */
608 next = ohci_alloc_std(sc);
612 cur->td.td_flags = tdflags;
613 cur->td.td_cbp = 0; /* indicate 0 length packet */
615 cur->td.td_nexttd = htole32(next->physaddr);
620 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n"));
624 return (USBD_NORMAL_COMPLETION);
633 ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std,
634 ohci_soft_td_t *stdend)
638 for (; std != stdend; std = p) {
640 ohci_free_std(sc, std);
646 ohci_alloc_sitd(ohci_softc_t *sc)
648 ohci_soft_itd_t *sitd;
653 if (sc->sc_freeitds == NULL) {
654 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n"));
655 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK,
656 OHCI_ITD_ALIGN, &dma);
660 for(i = 0; i < OHCI_SITD_CHUNK; i++) {
661 offs = i * OHCI_SITD_SIZE;
662 sitd = KERNADDR(&dma, offs);
663 sitd->physaddr = DMAADDR(&dma, offs);
664 sitd->nextitd = sc->sc_freeitds;
665 sc->sc_freeitds = sitd;
671 sitd = sc->sc_freeitds;
672 sc->sc_freeitds = sitd->nextitd;
673 memset(&sitd->itd, 0, sizeof(ohci_itd_t));
674 sitd->nextitd = NULL;
676 ohci_hash_add_itd(sc, sitd);
687 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
691 DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd));
695 panic("ohci_free_sitd: sitd=%p not done", sitd);
698 /* Warn double free */
703 ohci_hash_rem_itd(sc, sitd);
704 sitd->nextitd = sc->sc_freeitds;
705 sc->sc_freeitds = sitd;
710 ohci_init(ohci_softc_t *sc)
712 ohci_soft_ed_t *sed, *psed;
717 DPRINTF(("ohci_init: start\n"));
718 #if defined(__OpenBSD__)
721 printf("%s:", USBDEVNAME(sc->sc_bus.bdev));
723 rev = OREAD4(sc, OHCI_REVISION);
724 printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev),
725 OHCI_REV_LEGACY(rev) ? ", legacy support" : "");
727 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) {
728 printf("%s: unsupported OHCI revision\n",
729 USBDEVNAME(sc->sc_bus.bdev));
730 sc->sc_bus.usbrev = USBREV_UNKNOWN;
733 sc->sc_bus.usbrev = USBREV_1_0;
735 for (i = 0; i < OHCI_HASH_SIZE; i++)
736 LIST_INIT(&sc->sc_hash_tds[i]);
737 for (i = 0; i < OHCI_HASH_SIZE; i++)
738 LIST_INIT(&sc->sc_hash_itds[i]);
740 SIMPLEQ_INIT(&sc->sc_free_xfers);
742 /* XXX determine alignment by R/W */
743 /* Allocate the HCCA area. */
744 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE,
745 OHCI_HCCA_ALIGN, &sc->sc_hccadma);
748 sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0);
749 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE);
751 sc->sc_eintrs = OHCI_NORMAL_INTRS;
753 /* Allocate dummy ED that starts the control list. */
754 sc->sc_ctrl_head = ohci_alloc_sed(sc);
755 if (sc->sc_ctrl_head == NULL) {
759 sc->sc_ctrl_head->ed.ed_flags |= htole32(OHCI_ED_SKIP);
761 /* Allocate dummy ED that starts the bulk list. */
762 sc->sc_bulk_head = ohci_alloc_sed(sc);
763 if (sc->sc_bulk_head == NULL) {
767 sc->sc_bulk_head->ed.ed_flags |= htole32(OHCI_ED_SKIP);
769 /* Allocate dummy ED that starts the isochronous list. */
770 sc->sc_isoc_head = ohci_alloc_sed(sc);
771 if (sc->sc_isoc_head == NULL) {
775 sc->sc_isoc_head->ed.ed_flags |= htole32(OHCI_ED_SKIP);
777 /* Allocate all the dummy EDs that make up the interrupt tree. */
778 for (i = 0; i < OHCI_NO_EDS; i++) {
779 sed = ohci_alloc_sed(sc);
782 ohci_free_sed(sc, sc->sc_eds[i]);
786 /* All ED fields are set to 0. */
788 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP);
790 psed = sc->sc_eds[(i-1) / 2];
792 psed= sc->sc_isoc_head;
794 sed->ed.ed_nexted = htole32(psed->physaddr);
797 * Fill HCCA interrupt table. The bit reversal is to get
798 * the tree set up properly to spread the interrupts.
800 for (i = 0; i < OHCI_NO_INTRS; i++)
801 sc->sc_hcca->hcca_interrupt_table[revbits[i]] =
802 htole32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr);
805 if (ohcidebug > 15) {
806 for (i = 0; i < OHCI_NO_EDS; i++) {
808 ohci_dump_ed(sc->sc_eds[i]);
811 ohci_dump_ed(sc->sc_isoc_head);
815 err = ohci_controller_init(sc);
816 if (err != USBD_NORMAL_COMPLETION)
819 /* Set up the bus struct. */
820 sc->sc_bus.methods = &ohci_bus_methods;
821 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe);
823 #if defined(__NetBSD__) || defined(__OpenBSD__)
824 sc->sc_control = sc->sc_intre = 0;
825 sc->sc_powerhook = powerhook_establish(ohci_power, sc);
826 sc->sc_shutdownhook = shutdownhook_establish(ohci_shutdown, sc);
829 usb_callout_init(sc->sc_tmo_rhsc);
831 return (USBD_NORMAL_COMPLETION);
834 for (i = 0; i < OHCI_NO_EDS; i++)
835 ohci_free_sed(sc, sc->sc_eds[i]);
837 ohci_free_sed(sc, sc->sc_isoc_head);
839 ohci_free_sed(sc, sc->sc_bulk_head);
841 ohci_free_sed(sc, sc->sc_ctrl_head);
843 usb_freemem(&sc->sc_bus, &sc->sc_hccadma);
848 ohci_controller_init(ohci_softc_t *sc)
851 u_int32_t s, ctl, ival, hcr, fm, per, desca;
853 /* Determine in what context we are running. */
854 ctl = OREAD4(sc, OHCI_CONTROL);
856 /* SMM active, request change */
857 DPRINTF(("ohci_init: SMM active, request owner change\n"));
858 s = OREAD4(sc, OHCI_COMMAND_STATUS);
859 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR);
860 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) {
861 usb_delay_ms(&sc->sc_bus, 1);
862 ctl = OREAD4(sc, OHCI_CONTROL);
864 if ((ctl & OHCI_IR) == 0) {
865 printf("%s: SMM does not respond, resetting\n",
866 USBDEVNAME(sc->sc_bus.bdev));
867 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
871 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */
872 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) {
873 /* BIOS started controller. */
874 DPRINTF(("ohci_init: BIOS active\n"));
875 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) {
876 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL);
877 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
881 DPRINTF(("ohci_init: cold started\n"));
883 /* Controller was cold started. */
884 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
888 * This reset should not be necessary according to the OHCI spec, but
889 * without it some controllers do not start.
891 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev)));
892 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
893 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
895 /* We now own the host controller and the bus has been reset. */
896 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL));
898 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */
899 /* Nominal time for a reset is 10 us. */
900 for (i = 0; i < 10; i++) {
902 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR;
907 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev));
908 return (USBD_IOERROR);
915 /* The controller is now in SUSPEND state, we have 2ms to finish. */
917 /* Set up HC registers. */
918 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0));
919 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
920 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
921 /* disable all interrupts and then switch on all desired interrupts */
922 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
923 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE);
924 /* switch on desired functional features */
925 ctl = OREAD4(sc, OHCI_CONTROL);
926 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR);
927 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE |
928 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL;
929 /* And finally start it! */
930 OWRITE4(sc, OHCI_CONTROL, ctl);
933 * The controller is now OPERATIONAL. Set a some final
934 * registers that should be set earlier, but that the
935 * controller ignores when in the SUSPEND state.
937 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT;
938 fm |= OHCI_FSMPS(ival) | ival;
939 OWRITE4(sc, OHCI_FM_INTERVAL, fm);
940 per = OHCI_PERIODIC(ival); /* 90% periodic */
941 OWRITE4(sc, OHCI_PERIODIC_START, per);
943 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */
944 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
945 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP);
946 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */
947 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY);
948 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca);
951 * The AMD756 requires a delay before re-reading the register,
952 * otherwise it will occasionally report 0 ports.
955 for (i = 0; i < 10 && sc->sc_noport == 0; i++) {
956 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY);
957 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A));
964 return (USBD_NORMAL_COMPLETION);
968 ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
970 return (usb_allocmem(bus, size, 0, dma));
974 ohci_freem(struct usbd_bus *bus, usb_dma_t *dma)
976 usb_freemem(bus, dma);
980 ohci_allocx(struct usbd_bus *bus)
982 struct ohci_softc *sc = (struct ohci_softc *)bus;
983 usbd_xfer_handle xfer;
985 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
987 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
989 if (xfer->busy_free != XFER_FREE) {
990 printf("ohci_allocx: xfer=%p not free, 0x%08x\n", xfer,
995 xfer = malloc(sizeof(struct ohci_xfer), M_USB, M_NOWAIT);
998 memset(xfer, 0, sizeof (struct ohci_xfer));
999 usb_init_task(&OXFER(xfer)->abort_task, ohci_timeout_task,
1001 OXFER(xfer)->ohci_xfer_flags = 0;
1003 xfer->busy_free = XFER_BUSY;
1010 ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
1012 struct ohci_softc *sc = (struct ohci_softc *)bus;
1013 struct ohci_xfer *oxfer = (struct ohci_xfer *)xfer;
1014 ohci_soft_itd_t *sitd;
1016 if (oxfer->ohci_xfer_flags & OHCI_ISOC_DIRTY) {
1017 for (sitd = xfer->hcpriv; sitd != NULL && sitd->xfer == xfer;
1018 sitd = sitd->nextitd)
1019 ohci_free_sitd(sc, sitd);
1023 if (xfer->busy_free != XFER_BUSY) {
1024 printf("ohci_freex: xfer=%p not busy, 0x%08x\n", xfer,
1028 xfer->busy_free = XFER_FREE;
1030 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
1034 * Shut down the controller when the system is going down.
1037 ohci_shutdown(void *v)
1039 ohci_softc_t *sc = v;
1041 DPRINTF(("ohci_shutdown: stopping the HC\n"));
1042 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
1046 * Handle suspend/resume.
1048 * We need to switch to polling mode here, because this routine is
1049 * called from an intterupt context. This is all right since we
1050 * are almost suspended anyway.
1053 ohci_power(int why, void *v)
1055 ohci_softc_t *sc = v;
1060 DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why));
1065 if (why != PWR_RESUME) {
1066 sc->sc_bus.use_polling++;
1067 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK;
1068 if (sc->sc_control == 0) {
1070 * Preserve register values, in case that APM BIOS
1071 * does not recover them.
1073 sc->sc_control = ctl;
1074 sc->sc_intre = OREAD4(sc, OHCI_INTERRUPT_ENABLE);
1076 ctl |= OHCI_HCFS_SUSPEND;
1077 OWRITE4(sc, OHCI_CONTROL, ctl);
1078 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
1079 sc->sc_bus.use_polling--;
1081 sc->sc_bus.use_polling++;
1083 /* Some broken BIOSes never initialize Controller chip */
1084 ohci_controller_init(sc);
1087 OWRITE4(sc, OHCI_INTERRUPT_ENABLE,
1088 sc->sc_intre & (OHCI_ALL_INTRS | OHCI_MIE));
1090 ctl = sc->sc_control;
1092 ctl = OREAD4(sc, OHCI_CONTROL);
1093 ctl |= OHCI_HCFS_RESUME;
1094 OWRITE4(sc, OHCI_CONTROL, ctl);
1095 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
1096 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL;
1097 OWRITE4(sc, OHCI_CONTROL, ctl);
1098 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
1099 sc->sc_control = sc->sc_intre = 0;
1100 sc->sc_bus.use_polling--;
1107 ohci_dumpregs(ohci_softc_t *sc)
1109 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n",
1110 OREAD4(sc, OHCI_REVISION),
1111 OREAD4(sc, OHCI_CONTROL),
1112 OREAD4(sc, OHCI_COMMAND_STATUS)));
1113 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n",
1114 OREAD4(sc, OHCI_INTERRUPT_STATUS),
1115 OREAD4(sc, OHCI_INTERRUPT_ENABLE),
1116 OREAD4(sc, OHCI_INTERRUPT_DISABLE)));
1117 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n",
1118 OREAD4(sc, OHCI_HCCA),
1119 OREAD4(sc, OHCI_PERIOD_CURRENT_ED),
1120 OREAD4(sc, OHCI_CONTROL_HEAD_ED)));
1121 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n",
1122 OREAD4(sc, OHCI_CONTROL_CURRENT_ED),
1123 OREAD4(sc, OHCI_BULK_HEAD_ED),
1124 OREAD4(sc, OHCI_BULK_CURRENT_ED)));
1125 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n",
1126 OREAD4(sc, OHCI_DONE_HEAD),
1127 OREAD4(sc, OHCI_FM_INTERVAL),
1128 OREAD4(sc, OHCI_FM_REMAINING)));
1129 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n",
1130 OREAD4(sc, OHCI_FM_NUMBER),
1131 OREAD4(sc, OHCI_PERIODIC_START),
1132 OREAD4(sc, OHCI_LS_THRESHOLD)));
1133 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n",
1134 OREAD4(sc, OHCI_RH_DESCRIPTOR_A),
1135 OREAD4(sc, OHCI_RH_DESCRIPTOR_B),
1136 OREAD4(sc, OHCI_RH_STATUS)));
1137 DPRINTF((" port1=0x%08x port2=0x%08x\n",
1138 OREAD4(sc, OHCI_RH_PORT_STATUS(1)),
1139 OREAD4(sc, OHCI_RH_PORT_STATUS(2))));
1140 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n",
1141 le32toh(sc->sc_hcca->hcca_frame_number),
1142 le32toh(sc->sc_hcca->hcca_done_head)));
1146 Static int ohci_intr1(ohci_softc_t *);
1151 ohci_softc_t *sc = p;
1153 if (sc == NULL || sc->sc_dying)
1156 /* If we get an interrupt while polling, then just ignore it. */
1157 if (sc->sc_bus.use_polling) {
1159 printf("ohci_intr: ignored interrupt while polling\n");
1164 return (ohci_intr1(sc));
1168 ohci_intr1(ohci_softc_t *sc)
1170 u_int32_t intrs, eintrs;
1171 ohci_physaddr_t done;
1173 DPRINTFN(14,("ohci_intr1: enter\n"));
1175 /* In case the interrupt occurs before initialization has completed. */
1176 if (sc == NULL || sc->sc_hcca == NULL) {
1178 printf("ohci_intr: sc->sc_hcca == NULL\n");
1184 done = le32toh(sc->sc_hcca->hcca_done_head);
1186 /* The LSb of done is used to inform the HC Driver that an interrupt
1187 * condition exists for both the Done list and for another event
1188 * recorded in HcInterruptStatus. On an interrupt from the HC, the HC
1189 * Driver checks the HccaDoneHead Value. If this value is 0, then the
1190 * interrupt was caused by other than the HccaDoneHead update and the
1191 * HcInterruptStatus register needs to be accessed to determine that
1192 * exact interrupt cause. If HccaDoneHead is nonzero, then a Done list
1193 * update interrupt is indicated and if the LSb of done is nonzero,
1194 * then an additional interrupt event is indicated and
1195 * HcInterruptStatus should be checked to determine its cause.
1198 if (done & ~OHCI_DONE_INTRS)
1200 if (done & OHCI_DONE_INTRS) {
1201 intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS);
1202 done &= ~OHCI_DONE_INTRS;
1204 sc->sc_hcca->hcca_done_head = 0;
1206 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & ~OHCI_WDH;
1208 if (intrs == 0) /* nothing to be done (PCI shared interrupt) */
1212 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */
1213 eintrs = intrs & sc->sc_eintrs;
1217 sc->sc_bus.intr_context++;
1218 sc->sc_bus.no_intrs++;
1219 DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n",
1220 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS),
1223 if (eintrs & OHCI_SO) {
1224 sc->sc_overrun_cnt++;
1225 if (usbd_ratecheck(&sc->sc_overrun_ntc)) {
1226 printf("%s: %u scheduling overruns\n",
1227 USBDEVNAME(sc->sc_bus.bdev), sc->sc_overrun_cnt);
1228 sc->sc_overrun_cnt = 0;
1233 if (eintrs & OHCI_WDH) {
1234 ohci_add_done(sc, done &~ OHCI_DONE_INTRS);
1235 usb_schedsoftintr(&sc->sc_bus);
1236 eintrs &= ~OHCI_WDH;
1238 if (eintrs & OHCI_RD) {
1239 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev));
1240 /* XXX process resume detect */
1242 if (eintrs & OHCI_UE) {
1243 printf("%s: unrecoverable error, controller halted\n",
1244 USBDEVNAME(sc->sc_bus.bdev));
1245 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
1248 if (eintrs & OHCI_RHSC) {
1249 ohci_rhsc(sc, sc->sc_intrxfer);
1251 * Disable RHSC interrupt for now, because it will be
1252 * on until the port has been reset.
1254 ohci_rhsc_able(sc, 0);
1255 /* Do not allow RHSC interrupts > 1 per second */
1256 usb_callout(sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc);
1257 eintrs &= ~OHCI_RHSC;
1260 sc->sc_bus.intr_context--;
1263 /* Block unprocessed interrupts. XXX */
1264 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs);
1265 sc->sc_eintrs &= ~eintrs;
1266 printf("%s: blocking intrs 0x%x\n",
1267 USBDEVNAME(sc->sc_bus.bdev), eintrs);
1274 ohci_rhsc_able(ohci_softc_t *sc, int on)
1276 DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on));
1278 sc->sc_eintrs |= OHCI_RHSC;
1279 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC);
1281 sc->sc_eintrs &= ~OHCI_RHSC;
1282 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC);
1287 ohci_rhsc_enable(void *v_sc)
1289 ohci_softc_t *sc = v_sc;
1293 ohci_rhsc_able(sc, 1);
1298 char *ohci_cc_strs[] = {
1302 "DATA_TOGGLE_MISMATCH",
1304 "DEVICE_NOT_RESPONDING",
1305 "PID_CHECK_FAILURE",
1319 ohci_add_done(ohci_softc_t *sc, ohci_physaddr_t done)
1321 ohci_soft_itd_t *sitd, *sidone, **ip;
1322 ohci_soft_td_t *std, *sdone, **p;
1324 /* Reverse the done list. */
1325 for (sdone = NULL, sidone = NULL; done != 0; ) {
1326 std = ohci_hash_find_td(sc, done);
1329 done = le32toh(std->td.td_nexttd);
1331 DPRINTFN(10,("add TD %p\n", std));
1334 sitd = ohci_hash_find_itd(sc, done);
1336 sitd->dnext = sidone;
1337 done = le32toh(sitd->itd.itd_nextitd);
1339 DPRINTFN(5,("add ITD %p\n", sitd));
1342 panic("ohci_add_done: addr 0x%08lx not found", (u_long)done);
1345 /* sdone & sidone now hold the done lists. */
1346 /* Put them on the already processed lists. */
1347 for (p = &sc->sc_sdone; *p != NULL; p = &(*p)->dnext)
1350 for (ip = &sc->sc_sidone; *ip != NULL; ip = &(*ip)->dnext)
1356 ohci_softintr(void *v)
1358 ohci_softc_t *sc = v;
1359 ohci_soft_itd_t *sitd, *sidone, *sitdnext;
1360 ohci_soft_td_t *std, *sdone, *stdnext, *p, *n;
1361 usbd_xfer_handle xfer;
1362 struct ohci_pipe *opipe;
1366 DPRINTFN(10,("ohci_softintr: enter\n"));
1368 sc->sc_bus.intr_context++;
1371 sdone = sc->sc_sdone;
1372 sc->sc_sdone = NULL;
1373 sidone = sc->sc_sidone;
1374 sc->sc_sidone = NULL;
1377 DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone, sidone));
1380 if (ohcidebug > 10) {
1381 DPRINTF(("ohci_process_done: TD done:\n"));
1382 ohci_dump_tds(sdone);
1386 for (std = sdone; std; std = stdnext) {
1388 stdnext = std->dnext;
1389 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n",
1390 std, xfer, (xfer ? xfer->hcpriv : NULL)));
1393 * xfer == NULL: There seems to be no xfer associated
1394 * with this TD. It is tailp that happened to end up on
1399 if (xfer->status == USBD_CANCELLED ||
1400 xfer->status == USBD_TIMEOUT) {
1401 DPRINTF(("ohci_process_done: cancel/timeout %p\n",
1403 /* Handled by abort routine. */
1408 if (std->td.td_cbp != 0)
1409 len -= le32toh(std->td.td_be) -
1410 le32toh(std->td.td_cbp) + 1;
1411 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", len,
1413 if (std->flags & OHCI_ADD_LEN)
1414 xfer->actlen += len;
1416 cc = OHCI_TD_GET_CC(le32toh(std->td.td_flags));
1417 if (cc != OHCI_CC_NO_ERROR) {
1419 * Endpoint is halted. First unlink all the TDs
1420 * belonging to the failed transfer, and then restart
1423 opipe = (struct ohci_pipe *)xfer->pipe;
1425 DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n",
1426 OHCI_TD_GET_CC(le32toh(std->td.td_flags)),
1427 ohci_cc_strs[OHCI_TD_GET_CC(le32toh(std->td.td_flags))]));
1428 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer);
1429 usb_rem_task(OXFER(xfer)->xfer.pipe->device,
1430 &OXFER(xfer)->abort_task);
1432 /* Remove all this xfer's TDs from the done queue. */
1433 for (p = std; p->dnext != NULL; p = p->dnext) {
1434 if (p->dnext->xfer != xfer)
1436 p->dnext = p->dnext->dnext;
1438 /* The next TD may have been removed. */
1439 stdnext = std->dnext;
1441 /* Remove all TDs belonging to this xfer. */
1442 for (p = xfer->hcpriv; p->xfer == xfer; p = n) {
1444 ohci_free_std(sc, p);
1448 opipe->sed->ed.ed_headp = htole32(p->physaddr);
1449 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1451 if (cc == OHCI_CC_STALL)
1452 xfer->status = USBD_STALLED;
1454 xfer->status = USBD_IOERROR;
1456 usb_transfer_complete(xfer);
1461 * Skip intermediate TDs. They remain linked from
1462 * xfer->hcpriv and we free them when the transfer completes.
1464 if ((std->flags & OHCI_CALL_DONE) == 0)
1467 /* Normal transfer completion */
1468 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer);
1469 usb_rem_task(OXFER(xfer)->xfer.pipe->device,
1470 &OXFER(xfer)->abort_task);
1471 for (p = xfer->hcpriv; p->xfer == xfer; p = n) {
1473 ohci_free_std(sc, p);
1475 xfer->status = USBD_NORMAL_COMPLETION;
1477 usb_transfer_complete(xfer);
1482 if (ohcidebug > 10) {
1483 DPRINTF(("ohci_softintr: ITD done:\n"));
1484 ohci_dump_itds(sidone);
1488 for (sitd = sidone; sitd != NULL; sitd = sitdnext) {
1490 sitdnext = sitd->dnext;
1491 sitd->flags |= OHCI_ITD_INTFIN;
1492 DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n",
1493 sitd, xfer, xfer ? xfer->hcpriv : 0));
1496 if (xfer->status == USBD_CANCELLED ||
1497 xfer->status == USBD_TIMEOUT) {
1498 DPRINTF(("ohci_process_done: cancel/timeout %p\n",
1500 /* Handled by abort routine. */
1504 if (xfer->pipe->aborting)
1505 continue; /*Ignore.*/
1508 printf("ohci_softintr: sitd=%p is done\n", sitd);
1511 opipe = (struct ohci_pipe *)xfer->pipe;
1512 if (opipe->aborting)
1515 if (sitd->flags & OHCI_CALL_DONE) {
1516 ohci_soft_itd_t *next;
1518 opipe->u.iso.inuse -= xfer->nframes;
1519 xfer->status = USBD_NORMAL_COMPLETION;
1520 for (i = 0, sitd = xfer->hcpriv;;sitd = next) {
1521 next = sitd->nextitd;
1522 if (OHCI_ITD_GET_CC(sitd->itd.itd_flags) != OHCI_CC_NO_ERROR)
1523 xfer->status = USBD_IOERROR;
1525 if (xfer->status == USBD_NORMAL_COMPLETION) {
1526 iframes = OHCI_ITD_GET_FC(sitd->itd.itd_flags);
1527 for (j = 0; j < iframes; i++, j++) {
1528 len = le16toh(sitd->itd.itd_offset[j]);
1530 (OHCI_ITD_PSW_GET_CC(len) ==
1531 OHCI_CC_NOT_ACCESSED) ? 0 :
1532 OHCI_ITD_PSW_LENGTH(len);
1533 xfer->frlengths[i] = len;
1536 if (sitd->flags & OHCI_CALL_DONE)
1541 usb_transfer_complete(xfer);
1546 #ifdef USB_USE_SOFTINTR
1547 if (sc->sc_softwake) {
1548 sc->sc_softwake = 0;
1549 wakeup(&sc->sc_softwake);
1551 #endif /* USB_USE_SOFTINTR */
1553 sc->sc_bus.intr_context--;
1554 DPRINTFN(10,("ohci_softintr: done:\n"));
1558 ohci_device_ctrl_done(usbd_xfer_handle xfer)
1560 DPRINTFN(10,("ohci_device_ctrl_done: xfer=%p\n", xfer));
1563 if (!(xfer->rqflags & URQ_REQUEST)) {
1564 panic("ohci_device_ctrl_done: not a request");
1567 xfer->hcpriv = NULL;
1571 ohci_device_intr_done(usbd_xfer_handle xfer)
1573 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1574 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
1575 ohci_soft_ed_t *sed = opipe->sed;
1576 ohci_soft_td_t *data, *tail;
1579 DPRINTFN(10,("ohci_device_intr_done: xfer=%p, actlen=%d\n",
1580 xfer, xfer->actlen));
1582 xfer->hcpriv = NULL;
1584 if (xfer->pipe->repeat) {
1585 data = opipe->tail.td;
1586 tail = ohci_alloc_std(sc); /* XXX should reuse TD */
1588 xfer->status = USBD_NOMEM;
1593 data->td.td_flags = htole32(
1594 OHCI_TD_IN | OHCI_TD_NOCC |
1595 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
1596 if (xfer->flags & USBD_SHORT_XFER_OK)
1597 data->td.td_flags |= htole32(OHCI_TD_R);
1598 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf, 0));
1599 data->nexttd = tail;
1600 data->td.td_nexttd = htole32(tail->physaddr);
1601 data->td.td_be = htole32(le32toh(data->td.td_cbp) +
1603 data->len = xfer->length;
1605 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
1606 xfer->hcpriv = data;
1609 sed->ed.ed_tailp = htole32(tail->physaddr);
1610 opipe->tail.td = tail;
1615 ohci_device_bulk_done(usbd_xfer_handle xfer)
1617 DPRINTFN(10,("ohci_device_bulk_done: xfer=%p, actlen=%d\n",
1618 xfer, xfer->actlen));
1620 xfer->hcpriv = NULL;
1624 ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer)
1626 usbd_pipe_handle pipe;
1631 hstatus = OREAD4(sc, OHCI_RH_STATUS);
1632 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n",
1633 sc, xfer, hstatus));
1636 /* Just ignore the change. */
1642 p = KERNADDR(&xfer->dmabuf, 0);
1643 m = min(sc->sc_noport, xfer->length * 8 - 1);
1644 memset(p, 0, xfer->length);
1645 for (i = 1; i <= m; i++) {
1646 /* Pick out CHANGE bits from the status reg. */
1647 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16)
1648 p[i/8] |= 1 << (i%8);
1650 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p));
1651 xfer->actlen = xfer->length;
1652 xfer->status = USBD_NORMAL_COMPLETION;
1654 usb_transfer_complete(xfer);
1658 ohci_root_intr_done(usbd_xfer_handle xfer)
1660 xfer->hcpriv = NULL;
1664 ohci_root_ctrl_done(usbd_xfer_handle xfer)
1666 xfer->hcpriv = NULL;
1670 * Wait here until controller claims to have an interrupt.
1671 * Then call ohci_intr and return. Use timeout to avoid waiting
1675 ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer)
1677 int timo = xfer->timeout;
1681 xfer->status = USBD_IN_PROGRESS;
1682 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) {
1683 usb_delay_ms(&sc->sc_bus, 1);
1686 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs;
1687 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs));
1694 if (xfer->status != USBD_IN_PROGRESS)
1700 DPRINTF(("ohci_waitintr: timeout\n"));
1701 xfer->status = USBD_TIMEOUT;
1702 usb_transfer_complete(xfer);
1703 /* XXX should free TD */
1707 ohci_poll(struct usbd_bus *bus)
1709 ohci_softc_t *sc = (ohci_softc_t *)bus;
1713 new = OREAD4(sc, OHCI_INTERRUPT_STATUS);
1715 DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new));
1720 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs)
1725 ohci_device_request(usbd_xfer_handle xfer)
1727 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1728 usb_device_request_t *req = &xfer->request;
1729 usbd_device_handle dev = opipe->pipe.device;
1730 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
1731 int addr = dev->address;
1732 ohci_soft_td_t *setup, *stat, *next, *tail;
1733 ohci_soft_ed_t *sed;
1739 isread = req->bmRequestType & UT_READ;
1740 len = UGETW(req->wLength);
1742 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, "
1743 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
1744 req->bmRequestType, req->bRequest, UGETW(req->wValue),
1745 UGETW(req->wIndex), len, addr,
1746 opipe->pipe.endpoint->edesc->bEndpointAddress));
1748 setup = opipe->tail.td;
1749 stat = ohci_alloc_std(sc);
1754 tail = ohci_alloc_std(sc);
1762 opipe->u.ctl.length = len;
1764 /* Update device address and length since they may have changed
1765 during the setup of the control pipe in usbd_new_device(). */
1766 /* XXX This only needs to be done once, but it's too early in open. */
1767 /* XXXX Should not touch ED here! */
1768 sed->ed.ed_flags = htole32(
1769 (le32toh(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) |
1770 OHCI_ED_SET_FA(addr) |
1771 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize)));
1775 /* Set up data transaction */
1777 ohci_soft_td_t *std = stat;
1779 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer,
1781 stat = stat->nexttd; /* point at free TD */
1784 /* Start toggle at 1 and then use the carried toggle. */
1785 std->td.td_flags &= htole32(~OHCI_TD_TOGGLE_MASK);
1786 std->td.td_flags |= htole32(OHCI_TD_TOGGLE_1);
1789 memcpy(KERNADDR(&opipe->u.ctl.reqdma, 0), req, sizeof *req);
1791 setup->td.td_flags = htole32(OHCI_TD_SETUP | OHCI_TD_NOCC |
1792 OHCI_TD_TOGGLE_0 | OHCI_TD_SET_DI(6));
1793 setup->td.td_cbp = htole32(DMAADDR(&opipe->u.ctl.reqdma, 0));
1794 setup->nexttd = next;
1795 setup->td.td_nexttd = htole32(next->physaddr);
1796 setup->td.td_be = htole32(le32toh(setup->td.td_cbp) + sizeof *req - 1);
1800 xfer->hcpriv = setup;
1802 stat->td.td_flags = htole32(
1803 (isread ? OHCI_TD_OUT : OHCI_TD_IN) |
1804 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
1805 stat->td.td_cbp = 0;
1806 stat->nexttd = tail;
1807 stat->td.td_nexttd = htole32(tail->physaddr);
1809 stat->flags = OHCI_CALL_DONE;
1814 if (ohcidebug > 5) {
1815 DPRINTF(("ohci_device_request:\n"));
1817 ohci_dump_tds(setup);
1821 /* Insert ED in schedule */
1823 sed->ed.ed_tailp = htole32(tail->physaddr);
1824 opipe->tail.td = tail;
1825 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1826 if (xfer->timeout && !sc->sc_bus.use_polling) {
1827 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
1828 ohci_timeout, xfer);
1833 if (ohcidebug > 20) {
1835 DPRINTF(("ohci_device_request: status=%x\n",
1836 OREAD4(sc, OHCI_COMMAND_STATUS)));
1838 printf("ctrl head:\n");
1839 ohci_dump_ed(sc->sc_ctrl_head);
1842 ohci_dump_tds(setup);
1846 return (USBD_NORMAL_COMPLETION);
1849 ohci_free_std(sc, tail);
1851 ohci_free_std(sc, stat);
1857 * Add an ED to the schedule. Called at splusb().
1860 ohci_add_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head)
1862 DPRINTFN(8,("ohci_add_ed: sed=%p head=%p\n", sed, head));
1865 sed->next = head->next;
1866 sed->ed.ed_nexted = head->ed.ed_nexted;
1868 head->ed.ed_nexted = htole32(sed->physaddr);
1872 * Remove an ED from the schedule. Called at splusb().
1875 ohci_rem_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head)
1882 for (p = head; p != NULL && p->next != sed; p = p->next)
1885 panic("ohci_rem_ed: ED not found");
1886 p->next = sed->next;
1887 p->ed.ed_nexted = sed->ed.ed_nexted;
1891 * When a transfer is completed the TD is added to the done queue by
1892 * the host controller. This queue is the processed by software.
1893 * Unfortunately the queue contains the physical address of the TD
1894 * and we have no simple way to translate this back to a kernel address.
1895 * To make the translation possible (and fast) we use a hash table of
1896 * TDs currently in the schedule. The physical address is used as the
1900 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE)
1901 /* Called at splusb() */
1903 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std)
1905 int h = HASH(std->physaddr);
1909 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext);
1912 /* Called at splusb() */
1914 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std)
1918 LIST_REMOVE(std, hnext);
1922 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a)
1925 ohci_soft_td_t *std;
1927 /* if these are present they should be masked out at an earlier
1930 KASSERT((a&~OHCI_HEADMASK) == 0, ("%s: 0x%b has lower bits set\n",
1931 USBDEVNAME(sc->sc_bus.bdev),
1932 (int) a, "\20\1HALT\2TOGGLE"));
1934 for (std = LIST_FIRST(&sc->sc_hash_tds[h]);
1936 std = LIST_NEXT(std, hnext))
1937 if (std->physaddr == a)
1940 DPRINTF(("%s: ohci_hash_find_td: addr 0x%08lx not found\n",
1941 USBDEVNAME(sc->sc_bus.bdev), (u_long) a));
1945 /* Called at splusb() */
1947 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
1949 int h = HASH(sitd->physaddr);
1953 DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n",
1954 sitd, (u_long)sitd->physaddr));
1956 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext);
1959 /* Called at splusb() */
1961 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
1965 DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n",
1966 sitd, (u_long)sitd->physaddr));
1968 LIST_REMOVE(sitd, hnext);
1972 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a)
1975 ohci_soft_itd_t *sitd;
1977 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]);
1979 sitd = LIST_NEXT(sitd, hnext))
1980 if (sitd->physaddr == a)
1986 ohci_timeout(void *addr)
1988 struct ohci_xfer *oxfer = addr;
1989 struct ohci_pipe *opipe = (struct ohci_pipe *)oxfer->xfer.pipe;
1990 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
1992 DPRINTF(("ohci_timeout: oxfer=%p\n", oxfer));
1995 ohci_abort_xfer(&oxfer->xfer, USBD_TIMEOUT);
1999 /* Execute the abort in a process context. */
2000 usb_add_task(oxfer->xfer.pipe->device, &oxfer->abort_task);
2004 ohci_timeout_task(void *addr)
2006 usbd_xfer_handle xfer = addr;
2009 DPRINTF(("ohci_timeout_task: xfer=%p\n", xfer));
2012 ohci_abort_xfer(xfer, USBD_TIMEOUT);
2018 ohci_dump_tds(ohci_soft_td_t *std)
2020 for (; std; std = std->nexttd)
2025 ohci_dump_td(ohci_soft_td_t *std)
2029 bitmask_snprintf((u_int32_t)le32toh(std->td.td_flags),
2030 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE",
2031 sbuf, sizeof(sbuf));
2033 printf("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx "
2034 "nexttd=0x%08lx be=0x%08lx\n",
2035 std, (u_long)std->physaddr, sbuf,
2036 OHCI_TD_GET_DI(le32toh(std->td.td_flags)),
2037 OHCI_TD_GET_EC(le32toh(std->td.td_flags)),
2038 OHCI_TD_GET_CC(le32toh(std->td.td_flags)),
2039 (u_long)le32toh(std->td.td_cbp),
2040 (u_long)le32toh(std->td.td_nexttd),
2041 (u_long)le32toh(std->td.td_be));
2045 ohci_dump_itd(ohci_soft_itd_t *sitd)
2049 printf("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n"
2050 "bp0=0x%08lx next=0x%08lx be=0x%08lx\n",
2051 sitd, (u_long)sitd->physaddr,
2052 OHCI_ITD_GET_SF(le32toh(sitd->itd.itd_flags)),
2053 OHCI_ITD_GET_DI(le32toh(sitd->itd.itd_flags)),
2054 OHCI_ITD_GET_FC(le32toh(sitd->itd.itd_flags)),
2055 OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags)),
2056 (u_long)le32toh(sitd->itd.itd_bp0),
2057 (u_long)le32toh(sitd->itd.itd_nextitd),
2058 (u_long)le32toh(sitd->itd.itd_be));
2059 for (i = 0; i < OHCI_ITD_NOFFSET; i++)
2060 printf("offs[%d]=0x%04x ", i,
2061 (u_int)le16toh(sitd->itd.itd_offset[i]));
2066 ohci_dump_itds(ohci_soft_itd_t *sitd)
2068 for (; sitd; sitd = sitd->nextitd)
2069 ohci_dump_itd(sitd);
2073 ohci_dump_ed(ohci_soft_ed_t *sed)
2075 char sbuf[128], sbuf2[128];
2077 bitmask_snprintf((u_int32_t)le32toh(sed->ed.ed_flags),
2078 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO",
2079 sbuf, sizeof(sbuf));
2080 bitmask_snprintf((u_int32_t)le32toh(sed->ed.ed_headp),
2081 "\20\1HALT\2CARRY", sbuf2, sizeof(sbuf2));
2083 printf("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d flags=%s\ntailp=0x%08lx "
2084 "headflags=%s headp=0x%08lx nexted=0x%08lx\n",
2085 sed, (u_long)sed->physaddr,
2086 OHCI_ED_GET_FA(le32toh(sed->ed.ed_flags)),
2087 OHCI_ED_GET_EN(le32toh(sed->ed.ed_flags)),
2088 OHCI_ED_GET_MAXP(le32toh(sed->ed.ed_flags)), sbuf,
2089 (u_long)le32toh(sed->ed.ed_tailp), sbuf2,
2090 (u_long)le32toh(sed->ed.ed_headp),
2091 (u_long)le32toh(sed->ed.ed_nexted));
2096 ohci_open(usbd_pipe_handle pipe)
2098 usbd_device_handle dev = pipe->device;
2099 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
2100 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
2101 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2102 u_int8_t addr = dev->address;
2103 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE;
2104 ohci_soft_ed_t *sed;
2105 ohci_soft_td_t *std;
2106 ohci_soft_itd_t *sitd;
2107 ohci_physaddr_t tdphys;
2113 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
2114 pipe, addr, ed->bEndpointAddress, sc->sc_addr));
2117 return (USBD_IOERROR);
2122 if (addr == sc->sc_addr) {
2123 switch (ed->bEndpointAddress) {
2124 case USB_CONTROL_ENDPOINT:
2125 pipe->methods = &ohci_root_ctrl_methods;
2127 case UE_DIR_IN | OHCI_INTR_ENDPT:
2128 pipe->methods = &ohci_root_intr_methods;
2131 return (USBD_INVAL);
2134 sed = ohci_alloc_sed(sc);
2138 if (xfertype == UE_ISOCHRONOUS) {
2139 sitd = ohci_alloc_sitd(sc);
2142 opipe->tail.itd = sitd;
2143 opipe->aborting = 0;
2144 tdphys = sitd->physaddr;
2145 fmt = OHCI_ED_FORMAT_ISO;
2146 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN)
2147 fmt |= OHCI_ED_DIR_IN;
2149 fmt |= OHCI_ED_DIR_OUT;
2151 std = ohci_alloc_std(sc);
2154 opipe->tail.td = std;
2155 tdphys = std->physaddr;
2156 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD;
2158 sed->ed.ed_flags = htole32(
2159 OHCI_ED_SET_FA(addr) |
2160 OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) |
2161 (dev->speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) |
2163 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize)));
2164 sed->ed.ed_headp = htole32(tdphys |
2165 (pipe->endpoint->savedtoggle ? OHCI_TOGGLECARRY : 0));
2166 sed->ed.ed_tailp = htole32(tdphys);
2170 pipe->methods = &ohci_device_ctrl_methods;
2171 err = usb_allocmem(&sc->sc_bus,
2172 sizeof(usb_device_request_t),
2173 0, &opipe->u.ctl.reqdma);
2177 ohci_add_ed(sed, sc->sc_ctrl_head);
2181 pipe->methods = &ohci_device_intr_methods;
2182 ival = pipe->interval;
2183 if (ival == USBD_DEFAULT_INTERVAL)
2184 ival = ed->bInterval;
2185 return (ohci_device_setintr(sc, opipe, ival));
2186 case UE_ISOCHRONOUS:
2187 pipe->methods = &ohci_device_isoc_methods;
2188 return (ohci_setup_isoc(pipe));
2190 pipe->methods = &ohci_device_bulk_methods;
2192 ohci_add_ed(sed, sc->sc_bulk_head);
2197 return (USBD_NORMAL_COMPLETION);
2201 ohci_free_std(sc, std);
2204 ohci_free_sed(sc, sed);
2206 return (USBD_NOMEM);
2211 * Close a reqular pipe.
2212 * Assumes that there are no pending transactions.
2215 ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head)
2217 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2218 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2219 ohci_soft_ed_t *sed = opipe->sed;
2224 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP);
2225 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
2226 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) {
2227 ohci_soft_td_t *std;
2228 std = ohci_hash_find_td(sc, le32toh(sed->ed.ed_headp));
2229 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x "
2230 "tl=0x%x pipe=%p, std=%p\n", sed,
2231 (int)le32toh(sed->ed.ed_headp),
2232 (int)le32toh(sed->ed.ed_tailp),
2235 usbd_dump_pipe(&opipe->pipe);
2242 usb_delay_ms(&sc->sc_bus, 2);
2243 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
2244 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK))
2245 printf("ohci_close_pipe: pipe still not empty\n");
2248 ohci_rem_ed(sed, head);
2249 /* Make sure the host controller is not touching this ED */
2250 usb_delay_ms(&sc->sc_bus, 1);
2252 pipe->endpoint->savedtoggle =
2253 (le32toh(sed->ed.ed_headp) & OHCI_TOGGLECARRY) ? 1 : 0;
2254 ohci_free_sed(sc, opipe->sed);
2258 * Abort a device request.
2259 * If this routine is called at splusb() it guarantees that the request
2260 * will be removed from the hardware scheduling and that the callback
2261 * for it will be called with USBD_CANCELLED status.
2262 * It's impossible to guarantee that the requested transfer will not
2263 * have happened since the hardware runs concurrently.
2264 * If the transaction has already happened we rely on the ordinary
2265 * interrupt processing to process it.
2268 ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
2270 struct ohci_xfer *oxfer = OXFER(xfer);
2271 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
2272 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
2273 ohci_soft_ed_t *sed = opipe->sed;
2274 ohci_soft_td_t *p, *n;
2275 ohci_physaddr_t headp;
2278 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p sed=%p\n", xfer, opipe,sed));
2281 /* If we're dying, just do the software part. */
2283 xfer->status = status; /* make software ignore it */
2284 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer);
2285 usb_rem_task(xfer->pipe->device, &OXFER(xfer)->abort_task);
2286 usb_transfer_complete(xfer);
2290 if (xfer->device->bus->intr_context || !curproc)
2291 panic("ohci_abort_xfer: not in process context");
2294 * If an abort is already in progress then just wait for it to
2295 * complete and return.
2297 if (oxfer->ohci_xfer_flags & OHCI_XFER_ABORTING) {
2298 DPRINTFN(2, ("ohci_abort_xfer: already aborting\n"));
2299 /* No need to wait if we're aborting from a timeout. */
2300 if (status == USBD_TIMEOUT)
2302 /* Override the status which might be USBD_TIMEOUT. */
2303 xfer->status = status;
2304 DPRINTFN(2, ("ohci_abort_xfer: waiting for abort to finish\n"));
2305 oxfer->ohci_xfer_flags |= OHCI_XFER_ABORTWAIT;
2306 while (oxfer->ohci_xfer_flags & OHCI_XFER_ABORTING)
2307 tsleep(&oxfer->ohci_xfer_flags, PZERO, "ohciaw", 0);
2312 * Step 1: Make interrupt routine and hardware ignore xfer.
2315 oxfer->ohci_xfer_flags |= OHCI_XFER_ABORTING;
2316 xfer->status = status; /* make software ignore it */
2317 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer);
2318 usb_rem_task(xfer->pipe->device, &OXFER(xfer)->abort_task);
2320 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed));
2321 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */
2324 * Step 2: Wait until we know hardware has finished any possible
2325 * use of the xfer. Also make sure the soft interrupt routine
2328 usb_delay_ms(opipe->pipe.device->bus, 20); /* Hardware finishes in 1ms */
2330 #ifdef USB_USE_SOFTINTR
2331 sc->sc_softwake = 1;
2332 #endif /* USB_USE_SOFTINTR */
2333 usb_schedsoftintr(&sc->sc_bus);
2334 #ifdef USB_USE_SOFTINTR
2335 tsleep(&sc->sc_softwake, PZERO, "ohciab", 0);
2336 #endif /* USB_USE_SOFTINTR */
2340 * Step 3: Remove any vestiges of the xfer from the hardware.
2341 * The complication here is that the hardware may have executed
2342 * beyond the xfer we're trying to abort. So as we're scanning
2343 * the TDs of this xfer we check if the hardware points to
2346 s = splusb(); /* XXX why? */
2350 oxfer->ohci_xfer_flags &= ~OHCI_XFER_ABORTING; /* XXX */
2352 printf("ohci_abort_xfer: hcpriv is NULL\n");
2357 if (ohcidebug > 1) {
2358 DPRINTF(("ohci_abort_xfer: sed=\n"));
2363 headp = le32toh(sed->ed.ed_headp) & OHCI_HEADMASK;
2365 for (; p->xfer == xfer; p = n) {
2366 hit |= headp == p->physaddr;
2368 ohci_free_std(sc, p);
2370 /* Zap headp register if hardware pointed inside the xfer. */
2372 DPRINTFN(1,("ohci_abort_xfer: set hd=0x08%x, tl=0x%08x\n",
2373 (int)p->physaddr, (int)le32toh(sed->ed.ed_tailp)));
2374 sed->ed.ed_headp = htole32(p->physaddr); /* unlink TDs */
2376 DPRINTFN(1,("ohci_abort_xfer: no hit\n"));
2380 * Step 4: Turn on hardware again.
2382 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */
2385 * Step 5: Execute callback.
2387 /* Do the wakeup first to avoid touching the xfer after the callback. */
2388 oxfer->ohci_xfer_flags &= ~OHCI_XFER_ABORTING;
2389 if (oxfer->ohci_xfer_flags & OHCI_XFER_ABORTWAIT) {
2390 oxfer->ohci_xfer_flags &= ~OHCI_XFER_ABORTWAIT;
2391 wakeup(&oxfer->ohci_xfer_flags);
2393 usb_transfer_complete(xfer);
2399 * Data structures and routines to emulate the root hub.
2401 Static usb_device_descriptor_t ohci_devd = {
2402 USB_DEVICE_DESCRIPTOR_SIZE,
2403 UDESC_DEVICE, /* type */
2404 {0x00, 0x01}, /* USB version */
2405 UDCLASS_HUB, /* class */
2406 UDSUBCLASS_HUB, /* subclass */
2407 UDPROTO_FSHUB, /* protocol */
2408 64, /* max packet */
2409 {0},{0},{0x00,0x01}, /* device id */
2410 1,2,0, /* string indicies */
2411 1 /* # of configurations */
2414 Static usb_config_descriptor_t ohci_confd = {
2415 USB_CONFIG_DESCRIPTOR_SIZE,
2417 {USB_CONFIG_DESCRIPTOR_SIZE +
2418 USB_INTERFACE_DESCRIPTOR_SIZE +
2419 USB_ENDPOINT_DESCRIPTOR_SIZE},
2427 Static usb_interface_descriptor_t ohci_ifcd = {
2428 USB_INTERFACE_DESCRIPTOR_SIZE,
2439 Static usb_endpoint_descriptor_t ohci_endpd = {
2440 USB_ENDPOINT_DESCRIPTOR_SIZE,
2442 UE_DIR_IN | OHCI_INTR_ENDPT,
2444 {8, 0}, /* max packet */
2448 Static usb_hub_descriptor_t ohci_hubd = {
2449 USB_HUB_DESCRIPTOR_SIZE,
2459 ohci_str(usb_string_descriptor_t *p, int l, const char *s)
2465 p->bLength = 2 * strlen(s) + 2;
2468 p->bDescriptorType = UDESC_STRING;
2470 for (i = 0; s[i] && l > 1; i++, l -= 2)
2471 USETW2(p->bString[i], 0, s[i]);
2476 * Simulate a hardware hub by handling all the necessary requests.
2479 ohci_root_ctrl_transfer(usbd_xfer_handle xfer)
2483 /* Insert last in queue. */
2484 err = usb_insert_transfer(xfer);
2488 /* Pipe isn't running, start first */
2489 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2493 ohci_root_ctrl_start(usbd_xfer_handle xfer)
2495 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus;
2496 usb_device_request_t *req;
2499 int s, len, value, index, l, totlen = 0;
2500 usb_port_status_t ps;
2501 usb_hub_descriptor_t hubd;
2506 return (USBD_IOERROR);
2509 if (!(xfer->rqflags & URQ_REQUEST))
2511 return (USBD_INVAL);
2513 req = &xfer->request;
2515 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n",
2516 req->bmRequestType, req->bRequest));
2518 len = UGETW(req->wLength);
2519 value = UGETW(req->wValue);
2520 index = UGETW(req->wIndex);
2523 buf = KERNADDR(&xfer->dmabuf, 0);
2525 #define C(x,y) ((x) | ((y) << 8))
2526 switch(C(req->bRequest, req->bmRequestType)) {
2527 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
2528 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
2529 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
2531 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
2532 * for the integrated root hub.
2535 case C(UR_GET_CONFIG, UT_READ_DEVICE):
2537 *(u_int8_t *)buf = sc->sc_conf;
2541 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
2542 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value));
2543 switch(value >> 8) {
2545 if ((value & 0xff) != 0) {
2549 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
2550 USETW(ohci_devd.idVendor, sc->sc_id_vendor);
2551 memcpy(buf, &ohci_devd, l);
2554 if ((value & 0xff) != 0) {
2558 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
2559 memcpy(buf, &ohci_confd, l);
2560 buf = (char *)buf + l;
2562 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
2564 memcpy(buf, &ohci_ifcd, l);
2565 buf = (char *)buf + l;
2567 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
2569 memcpy(buf, &ohci_endpd, l);
2574 *(u_int8_t *)buf = 0;
2576 switch (value & 0xff) {
2577 case 1: /* Vendor */
2578 totlen = ohci_str(buf, len, sc->sc_vendor);
2580 case 2: /* Product */
2581 totlen = ohci_str(buf, len, "OHCI root hub");
2590 case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
2592 *(u_int8_t *)buf = 0;
2596 case C(UR_GET_STATUS, UT_READ_DEVICE):
2598 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
2602 case C(UR_GET_STATUS, UT_READ_INTERFACE):
2603 case C(UR_GET_STATUS, UT_READ_ENDPOINT):
2605 USETW(((usb_status_t *)buf)->wStatus, 0);
2609 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
2610 if (value >= USB_MAX_DEVICES) {
2614 sc->sc_addr = value;
2616 case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
2617 if (value != 0 && value != 1) {
2621 sc->sc_conf = value;
2623 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
2625 case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
2626 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
2627 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
2630 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
2632 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
2635 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
2637 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
2638 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
2639 "port=%d feature=%d\n",
2641 if (index < 1 || index > sc->sc_noport) {
2645 port = OHCI_RH_PORT_STATUS(index);
2647 case UHF_PORT_ENABLE:
2648 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS);
2650 case UHF_PORT_SUSPEND:
2651 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR);
2653 case UHF_PORT_POWER:
2654 /* Yes, writing to the LOW_SPEED bit clears power. */
2655 OWRITE4(sc, port, UPS_LOW_SPEED);
2657 case UHF_C_PORT_CONNECTION:
2658 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16);
2660 case UHF_C_PORT_ENABLE:
2661 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16);
2663 case UHF_C_PORT_SUSPEND:
2664 OWRITE4(sc, port, UPS_C_SUSPEND << 16);
2666 case UHF_C_PORT_OVER_CURRENT:
2667 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16);
2669 case UHF_C_PORT_RESET:
2670 OWRITE4(sc, port, UPS_C_PORT_RESET << 16);
2677 case UHF_C_PORT_CONNECTION:
2678 case UHF_C_PORT_ENABLE:
2679 case UHF_C_PORT_SUSPEND:
2680 case UHF_C_PORT_OVER_CURRENT:
2681 case UHF_C_PORT_RESET:
2682 /* Enable RHSC interrupt if condition is cleared. */
2683 if ((OREAD4(sc, port) >> 16) == 0)
2684 ohci_rhsc_able(sc, 1);
2690 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
2691 if ((value & 0xff) != 0) {
2695 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
2697 hubd.bNbrPorts = sc->sc_noport;
2698 USETW(hubd.wHubCharacteristics,
2699 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH :
2700 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL)
2701 /* XXX overcurrent */
2703 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v);
2704 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
2705 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
2706 hubd.DeviceRemovable[i++] = (u_int8_t)v;
2707 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
2708 l = min(len, hubd.bDescLength);
2710 memcpy(buf, &hubd, l);
2712 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
2717 memset(buf, 0, len); /* ? XXX */
2720 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
2721 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n",
2723 if (index < 1 || index > sc->sc_noport) {
2731 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index));
2732 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n",
2734 USETW(ps.wPortStatus, v);
2735 USETW(ps.wPortChange, v >> 16);
2736 l = min(len, sizeof ps);
2737 memcpy(buf, &ps, l);
2740 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
2743 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
2745 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
2746 if (index < 1 || index > sc->sc_noport) {
2750 port = OHCI_RH_PORT_STATUS(index);
2752 case UHF_PORT_ENABLE:
2753 OWRITE4(sc, port, UPS_PORT_ENABLED);
2755 case UHF_PORT_SUSPEND:
2756 OWRITE4(sc, port, UPS_SUSPEND);
2758 case UHF_PORT_RESET:
2759 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n",
2761 OWRITE4(sc, port, UPS_RESET);
2762 for (i = 0; i < 5; i++) {
2763 usb_delay_ms(&sc->sc_bus,
2764 USB_PORT_ROOT_RESET_DELAY);
2769 if ((OREAD4(sc, port) & UPS_RESET) == 0)
2772 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n",
2773 index, OREAD4(sc, port)));
2775 case UHF_PORT_POWER:
2776 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power "
2778 OWRITE4(sc, port, UPS_PORT_POWER);
2789 xfer->actlen = totlen;
2790 err = USBD_NORMAL_COMPLETION;
2794 usb_transfer_complete(xfer);
2796 return (USBD_IN_PROGRESS);
2799 /* Abort a root control request. */
2801 ohci_root_ctrl_abort(usbd_xfer_handle xfer)
2803 /* Nothing to do, all transfers are synchronous. */
2806 /* Close the root pipe. */
2808 ohci_root_ctrl_close(usbd_pipe_handle pipe)
2810 DPRINTF(("ohci_root_ctrl_close\n"));
2811 /* Nothing to do. */
2815 ohci_root_intr_transfer(usbd_xfer_handle xfer)
2819 /* Insert last in queue. */
2820 err = usb_insert_transfer(xfer);
2824 /* Pipe isn't running, start first */
2825 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2829 ohci_root_intr_start(usbd_xfer_handle xfer)
2831 usbd_pipe_handle pipe = xfer->pipe;
2832 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2835 return (USBD_IOERROR);
2837 sc->sc_intrxfer = xfer;
2839 return (USBD_IN_PROGRESS);
2842 /* Abort a root interrupt request. */
2844 ohci_root_intr_abort(usbd_xfer_handle xfer)
2848 if (xfer->pipe->intrxfer == xfer) {
2849 DPRINTF(("ohci_root_intr_abort: remove\n"));
2850 xfer->pipe->intrxfer = NULL;
2852 xfer->status = USBD_CANCELLED;
2854 usb_transfer_complete(xfer);
2858 /* Close the root pipe. */
2860 ohci_root_intr_close(usbd_pipe_handle pipe)
2862 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2864 DPRINTF(("ohci_root_intr_close\n"));
2866 sc->sc_intrxfer = NULL;
2869 /************************/
2872 ohci_device_ctrl_transfer(usbd_xfer_handle xfer)
2876 /* Insert last in queue. */
2877 err = usb_insert_transfer(xfer);
2881 /* Pipe isn't running, start first */
2882 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2886 ohci_device_ctrl_start(usbd_xfer_handle xfer)
2888 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus;
2892 return (USBD_IOERROR);
2895 if (!(xfer->rqflags & URQ_REQUEST)) {
2897 printf("ohci_device_ctrl_transfer: not a request\n");
2898 return (USBD_INVAL);
2902 err = ohci_device_request(xfer);
2906 if (sc->sc_bus.use_polling)
2907 ohci_waitintr(sc, xfer);
2908 return (USBD_IN_PROGRESS);
2911 /* Abort a device control request. */
2913 ohci_device_ctrl_abort(usbd_xfer_handle xfer)
2915 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer));
2916 ohci_abort_xfer(xfer, USBD_CANCELLED);
2919 /* Close a device control pipe. */
2921 ohci_device_ctrl_close(usbd_pipe_handle pipe)
2923 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2924 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2926 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe));
2927 ohci_close_pipe(pipe, sc->sc_ctrl_head);
2928 ohci_free_std(sc, opipe->tail.td);
2931 /************************/
2934 ohci_device_clear_toggle(usbd_pipe_handle pipe)
2936 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2938 opipe->sed->ed.ed_headp &= htole32(~OHCI_TOGGLECARRY);
2942 ohci_noop(usbd_pipe_handle pipe)
2947 ohci_device_bulk_transfer(usbd_xfer_handle xfer)
2951 /* Insert last in queue. */
2952 err = usb_insert_transfer(xfer);
2956 /* Pipe isn't running, start first */
2957 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2961 ohci_device_bulk_start(usbd_xfer_handle xfer)
2963 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
2964 usbd_device_handle dev = opipe->pipe.device;
2965 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
2966 int addr = dev->address;
2967 ohci_soft_td_t *data, *tail, *tdp;
2968 ohci_soft_ed_t *sed;
2969 int s, len, isread, endpt;
2973 return (USBD_IOERROR);
2976 if (xfer->rqflags & URQ_REQUEST) {
2978 printf("ohci_device_bulk_start: a request\n");
2979 return (USBD_INVAL);
2984 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress;
2985 isread = UE_GET_DIR(endpt) == UE_DIR_IN;
2988 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d "
2989 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags,
2992 opipe->u.bulk.isread = isread;
2993 opipe->u.bulk.length = len;
2995 /* Update device address */
2996 sed->ed.ed_flags = htole32(
2997 (le32toh(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) |
2998 OHCI_ED_SET_FA(addr));
3000 /* Allocate a chain of new TDs (including a new tail). */
3001 data = opipe->tail.td;
3002 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer,
3004 /* We want interrupt at the end of the transfer. */
3005 tail->td.td_flags &= htole32(~OHCI_TD_INTR_MASK);
3006 tail->td.td_flags |= htole32(OHCI_TD_SET_DI(1));
3007 tail->flags |= OHCI_CALL_DONE;
3008 tail = tail->nexttd; /* point at sentinel */
3013 xfer->hcpriv = data;
3015 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x "
3016 "td_cbp=0x%08x td_be=0x%08x\n",
3017 (int)le32toh(sed->ed.ed_flags),
3018 (int)le32toh(data->td.td_flags),
3019 (int)le32toh(data->td.td_cbp),
3020 (int)le32toh(data->td.td_be)));
3023 if (ohcidebug > 5) {
3025 ohci_dump_tds(data);
3029 /* Insert ED in schedule */
3031 for (tdp = data; tdp != tail; tdp = tdp->nexttd) {
3034 sed->ed.ed_tailp = htole32(tail->physaddr);
3035 opipe->tail.td = tail;
3036 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP);
3037 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
3038 if (xfer->timeout && !sc->sc_bus.use_polling) {
3039 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
3040 ohci_timeout, xfer);
3044 /* This goes wrong if we are too slow. */
3045 if (ohcidebug > 10) {
3047 DPRINTF(("ohci_device_intr_transfer: status=%x\n",
3048 OREAD4(sc, OHCI_COMMAND_STATUS)));
3050 ohci_dump_tds(data);
3056 if (sc->sc_bus.use_polling)
3057 ohci_waitintr(sc, xfer);
3059 return (USBD_IN_PROGRESS);
3063 ohci_device_bulk_abort(usbd_xfer_handle xfer)
3065 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer));
3066 ohci_abort_xfer(xfer, USBD_CANCELLED);
3070 * Close a device bulk pipe.
3073 ohci_device_bulk_close(usbd_pipe_handle pipe)
3075 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3076 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
3078 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe));
3079 ohci_close_pipe(pipe, sc->sc_bulk_head);
3080 ohci_free_std(sc, opipe->tail.td);
3083 /************************/
3086 ohci_device_intr_transfer(usbd_xfer_handle xfer)
3090 /* Insert last in queue. */
3091 err = usb_insert_transfer(xfer);
3095 /* Pipe isn't running, start first */
3096 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
3100 ohci_device_intr_start(usbd_xfer_handle xfer)
3102 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3103 usbd_device_handle dev = opipe->pipe.device;
3104 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
3105 ohci_soft_ed_t *sed = opipe->sed;
3106 ohci_soft_td_t *data, *tail;
3111 return (USBD_IOERROR);
3113 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d "
3114 "flags=%d priv=%p\n",
3115 xfer, xfer->length, xfer->flags, xfer->priv));
3118 if (xfer->rqflags & URQ_REQUEST)
3119 panic("ohci_device_intr_transfer: a request");
3124 data = opipe->tail.td;
3125 tail = ohci_alloc_std(sc);
3127 return (USBD_NOMEM);
3130 data->td.td_flags = htole32(
3131 OHCI_TD_IN | OHCI_TD_NOCC |
3132 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
3133 if (xfer->flags & USBD_SHORT_XFER_OK)
3134 data->td.td_flags |= htole32(OHCI_TD_R);
3135 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf, 0));
3136 data->nexttd = tail;
3137 data->td.td_nexttd = htole32(tail->physaddr);
3138 data->td.td_be = htole32(le32toh(data->td.td_cbp) + len - 1);
3141 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
3142 xfer->hcpriv = data;
3145 if (ohcidebug > 5) {
3146 DPRINTF(("ohci_device_intr_transfer:\n"));
3148 ohci_dump_tds(data);
3152 /* Insert ED in schedule */
3154 sed->ed.ed_tailp = htole32(tail->physaddr);
3155 opipe->tail.td = tail;
3156 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP);
3160 * This goes horribly wrong, printing thousands of descriptors,
3161 * because false references are followed due to the fact that the
3164 if (ohcidebug > 5) {
3165 usb_delay_ms(&sc->sc_bus, 5);
3166 DPRINTF(("ohci_device_intr_transfer: status=%x\n",
3167 OREAD4(sc, OHCI_COMMAND_STATUS)));
3169 ohci_dump_tds(data);
3174 return (USBD_IN_PROGRESS);
3177 /* Abort a device control request. */
3179 ohci_device_intr_abort(usbd_xfer_handle xfer)
3181 if (xfer->pipe->intrxfer == xfer) {
3182 DPRINTF(("ohci_device_intr_abort: remove\n"));
3183 xfer->pipe->intrxfer = NULL;
3185 ohci_abort_xfer(xfer, USBD_CANCELLED);
3188 /* Close a device interrupt pipe. */
3190 ohci_device_intr_close(usbd_pipe_handle pipe)
3192 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3193 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
3194 int nslots = opipe->u.intr.nslots;
3195 int pos = opipe->u.intr.pos;
3197 ohci_soft_ed_t *p, *sed = opipe->sed;
3200 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n",
3201 pipe, nslots, pos));
3203 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP);
3204 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
3205 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK))
3206 usb_delay_ms(&sc->sc_bus, 2);
3208 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
3209 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK))
3210 panic("%s: Intr pipe %p still has TDs queued",
3211 USBDEVNAME(sc->sc_bus.bdev), pipe);
3214 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next)
3218 panic("ohci_device_intr_close: ED not found");
3220 p->next = sed->next;
3221 p->ed.ed_nexted = sed->ed.ed_nexted;
3224 for (j = 0; j < nslots; j++)
3225 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS];
3227 ohci_free_std(sc, opipe->tail.td);
3228 ohci_free_sed(sc, opipe->sed);
3232 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival)
3235 u_int npoll, slow, shigh, nslots;
3237 ohci_soft_ed_t *hsed, *sed = opipe->sed;
3239 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe));
3241 printf("ohci_setintr: 0 interval\n");
3242 return (USBD_INVAL);
3245 npoll = OHCI_NO_INTRS;
3246 while (npoll > ival)
3248 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll));
3251 * We now know which level in the tree the ED must go into.
3252 * Figure out which slot has most bandwidth left over.
3258 * 8 7 8 9 10 11 12 13 14
3259 * N (N-1) .. (N-1+N-1)
3262 shigh = slow + npoll;
3263 nslots = OHCI_NO_INTRS / npoll;
3264 for (best = i = slow, bestbw = ~0; i < shigh; i++) {
3266 for (j = 0; j < nslots; j++)
3267 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS];
3273 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n",
3274 best, slow, shigh, bestbw));
3277 hsed = sc->sc_eds[best];
3278 sed->next = hsed->next;
3279 sed->ed.ed_nexted = hsed->ed.ed_nexted;
3281 hsed->ed.ed_nexted = htole32(sed->physaddr);
3284 for (j = 0; j < nslots; j++)
3285 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS];
3286 opipe->u.intr.nslots = nslots;
3287 opipe->u.intr.pos = best;
3289 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe));
3290 return (USBD_NORMAL_COMPLETION);
3293 /***********************/
3296 ohci_device_isoc_transfer(usbd_xfer_handle xfer)
3300 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer));
3302 /* Put it on our queue, */
3303 err = usb_insert_transfer(xfer);
3305 /* bail out on error, */
3306 if (err && err != USBD_IN_PROGRESS)
3309 /* XXX should check inuse here */
3311 /* insert into schedule, */
3312 ohci_device_isoc_enter(xfer);
3314 /* and start if the pipe wasn't running */
3316 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue));
3322 ohci_device_isoc_enter(usbd_xfer_handle xfer)
3324 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3325 usbd_device_handle dev = opipe->pipe.device;
3326 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
3327 ohci_soft_ed_t *sed = opipe->sed;
3328 struct iso *iso = &opipe->u.iso;
3329 struct ohci_xfer *oxfer = (struct ohci_xfer *)xfer;
3330 ohci_soft_itd_t *sitd, *nsitd;
3331 ohci_physaddr_t buf, offs, noffs, bp0, tdphys;
3332 int i, ncur, nframes;
3335 DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p "
3337 iso->inuse, iso->next, xfer, xfer->nframes));
3342 if (iso->next == -1) {
3343 /* Not in use yet, schedule it a few frames ahead. */
3344 iso->next = le32toh(sc->sc_hcca->hcca_frame_number) + 5;
3345 DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n",
3350 for (sitd = xfer->hcpriv; sitd != NULL && sitd->xfer == xfer;
3351 sitd = sitd->nextitd)
3352 ohci_free_sitd(sc, sitd); /* Free ITDs in prev xfer*/
3355 sitd = ohci_alloc_sitd(sc);
3357 panic("cant alloc isoc");
3358 opipe->tail.itd = sitd;
3359 tdphys = sitd->physaddr;
3360 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* Stop*/
3362 sed->ed.ed_tailp = htole32(tdphys);
3363 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* Start.*/
3367 sitd = opipe->tail.itd;
3368 buf = DMAADDR(&xfer->dmabuf, 0);
3369 bp0 = OHCI_PAGE(buf);
3370 offs = OHCI_PAGE_OFFSET(buf);
3371 nframes = xfer->nframes;
3372 xfer->hcpriv = sitd;
3373 for (i = ncur = 0; i < nframes; i++, ncur++) {
3374 noffs = offs + xfer->frlengths[i];
3375 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */
3376 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */
3378 /* Allocate next ITD */
3379 nsitd = ohci_alloc_sitd(sc);
3380 if (nsitd == NULL) {
3382 printf("%s: isoc TD alloc failed\n",
3383 USBDEVNAME(sc->sc_bus.bdev));
3387 /* Fill current ITD */
3388 sitd->itd.itd_flags = htole32(
3390 OHCI_ITD_SET_SF(iso->next) |
3391 OHCI_ITD_SET_DI(6) | /* delay intr a little */
3392 OHCI_ITD_SET_FC(ncur));
3393 sitd->itd.itd_bp0 = htole32(bp0);
3394 sitd->nextitd = nsitd;
3395 sitd->itd.itd_nextitd = htole32(nsitd->physaddr);
3396 sitd->itd.itd_be = htole32(bp0 + offs - 1);
3398 sitd->flags = OHCI_ITD_ACTIVE;
3401 iso->next = iso->next + ncur;
3402 bp0 = OHCI_PAGE(buf + offs);
3405 sitd->itd.itd_offset[ncur] = htole16(OHCI_ITD_MK_OFFS(offs));
3408 nsitd = ohci_alloc_sitd(sc);
3409 if (nsitd == NULL) {
3411 printf("%s: isoc TD alloc failed\n",
3412 USBDEVNAME(sc->sc_bus.bdev));
3415 /* Fixup last used ITD */
3416 sitd->itd.itd_flags = htole32(
3418 OHCI_ITD_SET_SF(iso->next) |
3419 OHCI_ITD_SET_DI(0) |
3420 OHCI_ITD_SET_FC(ncur));
3421 sitd->itd.itd_bp0 = htole32(bp0);
3422 sitd->nextitd = nsitd;
3423 sitd->itd.itd_nextitd = htole32(nsitd->physaddr);
3424 sitd->itd.itd_be = htole32(bp0 + offs - 1);
3426 sitd->flags = OHCI_CALL_DONE | OHCI_ITD_ACTIVE;
3428 iso->next = iso->next + ncur;
3429 iso->inuse += nframes;
3431 xfer->actlen = offs; /* XXX pretend we did it all */
3433 xfer->status = USBD_IN_PROGRESS;
3435 oxfer->ohci_xfer_flags |= OHCI_ISOC_DIRTY;
3438 if (ohcidebug > 5) {
3439 DPRINTF(("ohci_device_isoc_enter: frame=%d\n",
3440 le32toh(sc->sc_hcca->hcca_frame_number)));
3441 ohci_dump_itds(xfer->hcpriv);
3447 opipe->tail.itd = nsitd;
3448 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP);
3449 sed->ed.ed_tailp = htole32(nsitd->physaddr);
3453 if (ohcidebug > 5) {
3455 DPRINTF(("ohci_device_isoc_enter: after frame=%d\n",
3456 le32toh(sc->sc_hcca->hcca_frame_number)));
3457 ohci_dump_itds(xfer->hcpriv);
3464 ohci_device_isoc_start(usbd_xfer_handle xfer)
3466 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3467 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
3468 ohci_soft_ed_t *sed;
3471 DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer));
3474 return (USBD_IOERROR);
3477 if (xfer->status != USBD_IN_PROGRESS)
3478 printf("ohci_device_isoc_start: not in progress %p\n", xfer);
3481 /* XXX anything to do? */
3484 sed = opipe->sed; /* Turn off ED skip-bit to start processing */
3485 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* ED's ITD list.*/
3488 return (USBD_IN_PROGRESS);
3492 ohci_device_isoc_abort(usbd_xfer_handle xfer)
3494 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3495 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
3496 ohci_soft_ed_t *sed;
3497 ohci_soft_itd_t *sitd, *tmp_sitd;
3498 int s,undone,num_sitds;
3501 opipe->aborting = 1;
3503 DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer));
3505 /* Transfer is already done. */
3506 if (xfer->status != USBD_NOT_STARTED &&
3507 xfer->status != USBD_IN_PROGRESS) {
3509 printf("ohci_device_isoc_abort: early return\n");
3513 /* Give xfer the requested abort code. */
3514 xfer->status = USBD_CANCELLED;
3517 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */
3520 sitd = xfer->hcpriv;
3524 printf("ohci_device_isoc_abort: hcpriv==0\n");
3528 for (; sitd != NULL && sitd->xfer == xfer; sitd = sitd->nextitd) {
3531 DPRINTFN(1,("abort sets done sitd=%p\n", sitd));
3539 * Each sitd has up to OHCI_ITD_NOFFSET transfers, each can
3540 * take a usb 1ms cycle. Conservatively wait for it to drain.
3541 * Even with DMA done, it can take awhile for the "batch"
3542 * delivery of completion interrupts to occur thru the controller.
3546 usb_delay_ms(&sc->sc_bus, 2*(num_sitds*OHCI_ITD_NOFFSET));
3549 tmp_sitd = xfer->hcpriv;
3550 for (; tmp_sitd != NULL && tmp_sitd->xfer == xfer;
3551 tmp_sitd = tmp_sitd->nextitd) {
3552 if (OHCI_CC_NO_ERROR ==
3553 OHCI_ITD_GET_CC(le32toh(tmp_sitd->itd.itd_flags)) &&
3554 tmp_sitd->flags & OHCI_ITD_ACTIVE &&
3555 (tmp_sitd->flags & OHCI_ITD_INTFIN) == 0)
3558 } while( undone != 0 );
3564 usb_transfer_complete(xfer);
3568 * Only if there is a `next' sitd in next xfer...
3569 * unlink this xfer's sitds.
3571 sed->ed.ed_headp = htole32(sitd->physaddr);
3573 sed->ed.ed_headp = 0;
3575 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */
3581 ohci_device_isoc_done(usbd_xfer_handle xfer)
3583 /* This null routine corresponds to non-isoc "done()" routines
3584 * that free the stds associated with an xfer after a completed
3585 * xfer interrupt. However, in the case of isoc transfers, the
3586 * sitds associated with the transfer have already been processed
3587 * and reallocated for the next iteration by
3588 * "ohci_device_isoc_transfer()".
3590 * Routine "usb_transfer_complete()" is called at the end of every
3591 * relevant usb interrupt. "usb_transfer_complete()" indirectly
3592 * calls 1) "ohci_device_isoc_transfer()" (which keeps pumping the
3593 * pipeline by setting up the next transfer iteration) and 2) then
3594 * calls "ohci_device_isoc_done()". Isoc transfers have not been
3595 * working for the ohci usb because this routine was trashing the
3596 * xfer set up for the next iteration (thus, only the first
3597 * UGEN_NISOREQS xfers outstanding on an open would work). Perhaps
3598 * this could all be re-factored, but that's another pass...
3603 ohci_setup_isoc(usbd_pipe_handle pipe)
3605 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3606 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
3607 struct iso *iso = &opipe->u.iso;
3614 ohci_add_ed(opipe->sed, sc->sc_isoc_head);
3617 return (USBD_NORMAL_COMPLETION);
3621 ohci_device_isoc_close(usbd_pipe_handle pipe)
3623 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3624 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
3625 ohci_soft_ed_t *sed;
3627 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe));
3630 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* Stop device. */
3632 ohci_close_pipe(pipe, sc->sc_isoc_head); /* Stop isoc list, free ED.*/
3634 /* up to NISOREQs xfers still outstanding. */
3637 opipe->tail.itd->isdone = 1;
3639 ohci_free_sitd(sc, opipe->tail.itd); /* Next `avail free' sitd.*/