2 * Copyright (c) 1991 Regents of the University of California.
4 * Copyright (c) 1994 John S. Dyson
6 * Copyright (c) 1994 David Greenman
8 * Copyright (c) 2005 Alan L. Cox <alc@cs.rice.edu>
11 * This code is derived from software contributed to Berkeley by
12 * the Systems Programming Group of the University of Utah Computer
13 * Science Department and William Jolitz of UUNET Technologies Inc.
15 * Redistribution and use in source and binary forms, with or without
16 * modification, are permitted provided that the following conditions
18 * 1. Redistributions of source code must retain the above copyright
19 * notice, this list of conditions and the following disclaimer.
20 * 2. Redistributions in binary form must reproduce the above copyright
21 * notice, this list of conditions and the following disclaimer in the
22 * documentation and/or other materials provided with the distribution.
23 * 3. All advertising materials mentioning features or use of this software
24 * must display the following acknowledgement:
25 * This product includes software developed by the University of
26 * California, Berkeley and its contributors.
27 * 4. Neither the name of the University nor the names of its contributors
28 * may be used to endorse or promote products derived from this software
29 * without specific prior written permission.
31 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
32 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
33 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
34 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
35 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
36 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
37 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
38 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
39 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
40 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
43 * from: @(#)pmap.c 7.7 (Berkeley) 5/12/91
46 * Copyright (c) 2003 Networks Associates Technology, Inc.
47 * All rights reserved.
49 * This software was developed for the FreeBSD Project by Jake Burkholder,
50 * Safeport Network Services, and Network Associates Laboratories, the
51 * Security Research Division of Network Associates, Inc. under
52 * DARPA/SPAWAR contract N66001-01-C-8035 ("CBOSS"), as part of the DARPA
53 * CHATS research program.
55 * Redistribution and use in source and binary forms, with or without
56 * modification, are permitted provided that the following conditions
58 * 1. Redistributions of source code must retain the above copyright
59 * notice, this list of conditions and the following disclaimer.
60 * 2. Redistributions in binary form must reproduce the above copyright
61 * notice, this list of conditions and the following disclaimer in the
62 * documentation and/or other materials provided with the distribution.
64 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
65 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
66 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
67 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
68 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
69 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
70 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
71 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
72 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
73 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
77 #include <sys/cdefs.h>
78 __FBSDID("$FreeBSD$");
81 * Manages physical address maps.
83 * In addition to hardware address maps, this
84 * module is called upon to provide software-use-only
85 * maps which may or may not be stored in the same
86 * form as hardware maps. These pseudo-maps are
87 * used to store intermediate results from copy
88 * operations to and from address spaces.
90 * Since the information managed by this module is
91 * also stored by the logical address mapping module,
92 * this module may throw away valid virtual-to-physical
93 * mappings at almost any time. However, invalidations
94 * of virtual-to-physical mappings must be done as
97 * In order to cope with hardware architectures which
98 * make virtual-to-physical map invalidates expensive,
99 * this module may delay invalidate or reduced protection
100 * operations until such time as they are actually
101 * necessary. This module is given full information as
102 * to which processors are currently using which maps,
103 * and to when physical maps must be made correct.
107 #include "opt_pmap.h"
108 #include "opt_msgbuf.h"
109 #include "opt_xbox.h"
111 #include <sys/param.h>
112 #include <sys/systm.h>
113 #include <sys/kernel.h>
115 #include <sys/lock.h>
116 #include <sys/malloc.h>
117 #include <sys/mman.h>
118 #include <sys/msgbuf.h>
119 #include <sys/mutex.h>
120 #include <sys/proc.h>
122 #include <sys/vmmeter.h>
123 #include <sys/sched.h>
124 #include <sys/sysctl.h>
125 #include <sys/syslog.h>
131 #include <machine/xbox.h>
135 #include <vm/vm_param.h>
136 #include <vm/vm_kern.h>
137 #include <vm/vm_page.h>
138 #include <vm/vm_map.h>
139 #include <vm/vm_object.h>
140 #include <vm/vm_extern.h>
141 #include <vm/vm_pageout.h>
142 #include <vm/vm_pager.h>
146 #include <xen/interface/xen.h>
147 #include <machine/xen/hypervisor.h>
148 #include <machine/xen/hypercall.h>
149 #include <machine/xen/xenvar.h>
150 #include <machine/xen/xenfunc.h>
153 #include <machine/cpu.h>
154 #include <machine/cputypes.h>
155 #include <machine/md_var.h>
156 #include <machine/pcb.h>
157 #include <machine/specialreg.h>
159 #include <machine/smp.h>
162 #if !defined(CPU_DISABLE_SSE) && defined(I686_CPU)
163 #define CPU_ENABLE_SSE
166 #ifndef PMAP_SHPGPERPROC
167 #define PMAP_SHPGPERPROC 200
170 #define PMAP_DIAGNOSTIC
172 #if defined(DIAGNOSTIC)
173 #define PMAP_DIAGNOSTIC
176 #if !defined(PMAP_DIAGNOSTIC)
177 #define PMAP_INLINE __inline
183 * Get PDEs and PTEs for user/kernel address space
185 #define pmap_pde(m, v) (&((m)->pm_pdir[(vm_offset_t)(v) >> PDRSHIFT]))
186 #define pdir_pde(m, v) (m[(vm_offset_t)(v) >> PDRSHIFT])
188 #define pmap_pde_v(pte) ((*(int *)pte & PG_V) != 0)
189 #define pmap_pte_w(pte) ((*(int *)pte & PG_W) != 0)
190 #define pmap_pte_m(pte) ((*(int *)pte & PG_M) != 0)
191 #define pmap_pte_u(pte) ((*(int *)pte & PG_A) != 0)
192 #define pmap_pte_v(pte) ((*(int *)pte & PG_V) != 0)
195 #define pmap_pte_set_w(pte, v) ((v) ? atomic_set_int((u_int *)(pte), PG_W) : \
196 atomic_clear_int((u_int *)(pte), PG_W))
197 #define pmap_pte_set_prot(pte, v) ((*(int *)pte &= ~PG_PROT), (*(int *)pte |= (v)))
200 struct pmap kernel_pmap_store;
201 LIST_HEAD(pmaplist, pmap);
202 static struct pmaplist allpmaps;
203 static struct mtx allpmaps_lock;
205 vm_paddr_t avail_end; /* PA of last available physical page */
206 vm_offset_t virtual_avail; /* VA of first avail page (after kernel bss) */
207 vm_offset_t virtual_end; /* VA of last avail page (end of kernel AS) */
208 int pgeflag = 0; /* PG_G or-in */
209 int pseflag = 0; /* PG_PS or-in */
212 vm_offset_t kernel_vm_end;
213 extern u_int32_t KERNend;
215 #if defined(PAE) && !defined(XEN)
216 static uma_zone_t pdptzone;
220 * Data for the pv entry allocation mechanism
222 static uma_zone_t pvzone;
223 static struct vm_object pvzone_obj;
224 static int pv_entry_count = 0, pv_entry_max = 0, pv_entry_high_water = 0;
225 int pmap_pagedaemon_waken;
228 * All those kernel PT submaps that BSD is so fond of
237 static struct sysmaps sysmaps_pcpu[MAXCPU];
238 pt_entry_t *CMAP1 = 0;
239 static pt_entry_t *CMAP3;
240 caddr_t CADDR1 = 0, ptvmmap = 0;
241 static caddr_t CADDR3;
242 struct msgbuf *msgbufp = 0;
247 static caddr_t crashdumpmap;
250 extern pt_entry_t *SMPpt;
252 static pt_entry_t *PMAP1 = 0, *PMAP2;
253 static pt_entry_t *PADDR1 = 0, *PADDR2;
256 static int PMAP1changedcpu;
257 SYSCTL_INT(_debug, OID_AUTO, PMAP1changedcpu, CTLFLAG_RD,
259 "Number of times pmap_pte_quick changed CPU with same PMAP1");
261 static int PMAP1changed;
262 SYSCTL_INT(_debug, OID_AUTO, PMAP1changed, CTLFLAG_RD,
264 "Number of times pmap_pte_quick changed PMAP1");
265 static int PMAP1unchanged;
266 SYSCTL_INT(_debug, OID_AUTO, PMAP1unchanged, CTLFLAG_RD,
268 "Number of times pmap_pte_quick didn't change PMAP1");
269 static struct mtx PMAP2mutex;
271 static PMAP_INLINE void free_pv_entry(pv_entry_t pv);
272 static pv_entry_t get_pv_entry(void);
273 static void pmap_clear_ptes(vm_page_t m, int bit);
275 static vm_page_t pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va,
276 vm_page_t m, vm_prot_t prot, vm_page_t mpte);
277 static int pmap_remove_pte(pmap_t pmap, pt_entry_t *ptq, vm_offset_t sva,
279 static void pmap_remove_page(struct pmap *pmap, vm_offset_t va);
280 static void pmap_remove_entry(struct pmap *pmap, vm_page_t m,
282 static void pmap_insert_entry(pmap_t pmap, vm_offset_t va, vm_page_t m);
283 static boolean_t pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va,
286 static vm_page_t pmap_allocpte(pmap_t pmap, vm_offset_t va, int flags);
288 static vm_page_t _pmap_allocpte(pmap_t pmap, unsigned ptepindex, int flags);
289 static int _pmap_unwire_pte_hold(pmap_t pmap, vm_page_t m, vm_page_t *free);
290 static pt_entry_t *pmap_pte_quick(pmap_t pmap, vm_offset_t va);
291 static void pmap_pte_release(pt_entry_t *pte);
292 static int pmap_unuse_pt(pmap_t, vm_offset_t, vm_page_t *);
293 static vm_offset_t pmap_kmem_choose(vm_offset_t addr);
294 #if defined(PAE) && !defined(XEN)
295 static void *pmap_pdpt_allocf(uma_zone_t zone, int bytes, u_int8_t *flags, int wait);
298 CTASSERT(1 << PDESHIFT == sizeof(pd_entry_t));
299 CTASSERT(1 << PTESHIFT == sizeof(pt_entry_t));
302 * If you get an error here, then you set KVA_PAGES wrong! See the
303 * description of KVA_PAGES in sys/i386/include/pmap.h. It must be
304 * multiple of 4 for a normal kernel, or a multiple of 8 for a PAE.
306 CTASSERT(KERNBASE % (1 << 24) == 0);
311 #if defined(I686_CPU)
312 if (cpu_class == CPUCLASS_686) {
313 #if defined(CPU_ENABLE_SSE)
314 if (cpu_feature & CPUID_SSE2)
321 bzero(page, PAGE_SIZE);
325 pd_set(struct pmap *pmap, int ptepindex, vm_paddr_t val, int type)
327 vm_paddr_t pdir_ma = vtomach(&pmap->pm_pdir[ptepindex]);
332 xen_queue_pt_update(shadow_pdir_ma,
333 xpmap_ptom(val & ~(PG_RW)));
335 xen_queue_pt_update(pdir_ma,
338 case SH_PD_SET_VA_MA:
340 xen_queue_pt_update(shadow_pdir_ma,
343 xen_queue_pt_update(pdir_ma, val);
345 case SH_PD_SET_VA_CLEAR:
347 xen_queue_pt_update(shadow_pdir_ma, 0);
349 xen_queue_pt_update(pdir_ma, 0);
355 * Move the kernel virtual free pointer to the next
356 * 4MB. This is used to help improve performance
357 * by using a large (4MB) page for much of the kernel
358 * (.text, .data, .bss)
361 pmap_kmem_choose(vm_offset_t addr)
363 vm_offset_t newaddr = addr;
366 if (cpu_feature & CPUID_PSE)
367 newaddr = (addr + PDRMASK) & ~PDRMASK;
373 * Bootstrap the system enough to run with virtual memory.
375 * On the i386 this is called after mapping has already been enabled
376 * and just syncs the pmap module with what has already been done.
377 * [We can't call it easily with mapping off since the kernel is not
378 * mapped with PA == VA, hence we would have to relocate every address
379 * from the linked base (virtual) address "KERNBASE" to the actual
380 * (physical) address starting relative to 0]
383 pmap_bootstrap(firstaddr, loadaddr)
384 vm_paddr_t firstaddr;
388 pt_entry_t *pte, *unused;
389 struct sysmaps *sysmaps;
393 * XXX The calculation of virtual_avail is wrong. It's NKPT*PAGE_SIZE too
394 * large. It should instead be correctly calculated in locore.s and
395 * not based on 'first' (which is a physical address, not a virtual
396 * address, for the start of unused physical memory). The kernel
397 * page tables are NOT double mapped and thus should not be included
398 * in this calculation.
400 virtual_avail = (vm_offset_t) KERNBASE + firstaddr;
401 virtual_avail = pmap_kmem_choose(virtual_avail);
403 virtual_end = VM_MAX_KERNEL_ADDRESS;
406 * Initialize the kernel pmap (which is statically allocated).
408 PMAP_LOCK_INIT(kernel_pmap);
409 kernel_pmap->pm_pdir = (pd_entry_t *) (KERNBASE + (u_int)IdlePTD);
411 kernel_pmap->pm_pdpt = (pdpt_entry_t *) (KERNBASE + (u_int)IdlePDPT);
413 kernel_pmap->pm_active = -1; /* don't allow deactivation */
414 TAILQ_INIT(&kernel_pmap->pm_pvlist);
415 LIST_INIT(&allpmaps);
416 mtx_init(&allpmaps_lock, "allpmaps", NULL, MTX_SPIN);
417 mtx_lock_spin(&allpmaps_lock);
418 LIST_INSERT_HEAD(&allpmaps, kernel_pmap, pm_list);
419 mtx_unlock_spin(&allpmaps_lock);
423 * Reserve some special page table entries/VA space for temporary
426 #define SYSMAP(c, p, v, n) \
427 v = (c)va; va += ((n)*PAGE_SIZE); p = pte; pte += (n);
433 * CMAP1/CMAP2 are used for zeroing and copying pages.
434 * CMAP3 is used for the idle process page zeroing.
436 for (i = 0; i < MAXCPU; i++) {
437 sysmaps = &sysmaps_pcpu[i];
438 mtx_init(&sysmaps->lock, "SYSMAPS", NULL, MTX_DEF);
439 SYSMAP(caddr_t, sysmaps->CMAP1, sysmaps->CADDR1, 1)
440 SYSMAP(caddr_t, sysmaps->CMAP2, sysmaps->CADDR2, 1)
442 SYSMAP(caddr_t, CMAP1, CADDR1, 1)
443 SYSMAP(caddr_t, CMAP3, CADDR3, 1)
445 PT_SET_MA(CADDR3, 0);
452 SYSMAP(caddr_t, unused, crashdumpmap, MAXDUMPPGS)
455 * ptvmmap is used for reading arbitrary physical pages via /dev/mem.
457 SYSMAP(caddr_t, unused, ptvmmap, 1)
460 * msgbufp is used to map the system message buffer.
462 SYSMAP(struct msgbuf *, unused, msgbufp, atop(round_page(MSGBUF_SIZE)))
465 * ptemap is used for pmap_pte_quick
467 SYSMAP(pt_entry_t *, PMAP1, PADDR1, 1);
468 SYSMAP(pt_entry_t *, PMAP2, PADDR2, 1);
470 mtx_init(&PMAP2mutex, "PMAP2", NULL, MTX_DEF);
474 PT_SET_MA(CADDR1, 0);
481 /* FIXME: This is gross, but needed for the XBOX. Since we are in such
482 * an early stadium, we cannot yet neatly map video memory ... :-(
483 * Better fixes are very welcome!
485 if (!arch_i386_is_xbox)
487 for (i = 0; i < NKPT; i++)
490 /* Initialize the PAT MSR if present. */
493 /* Turn on PG_G on kernel page(s) */
506 /* Bail if this CPU doesn't implement PAT. */
507 if (!(cpu_feature & CPUID_PAT))
512 * Leave the indices 0-3 at the default of WB, WT, UC, and UC-.
513 * Program 4 and 5 as WP and WC.
514 * Leave 6 and 7 as UC and UC-.
516 pat_msr = rdmsr(MSR_PAT);
517 pat_msr &= ~(PAT_MASK(4) | PAT_MASK(5));
518 pat_msr |= PAT_VALUE(4, PAT_WRITE_PROTECTED) |
519 PAT_VALUE(5, PAT_WRITE_COMBINING);
522 * Due to some Intel errata, we can only safely use the lower 4
523 * PAT entries. Thus, just replace PAT Index 2 with WC instead
526 * Intel Pentium III Processor Specification Update
527 * Errata E.27 (Upper Four PAT Entries Not Usable With Mode B
530 * Intel Pentium IV Processor Specification Update
531 * Errata N46 (PAT Index MSB May Be Calculated Incorrectly)
533 pat_msr = rdmsr(MSR_PAT);
534 pat_msr &= ~PAT_MASK(2);
535 pat_msr |= PAT_VALUE(2, PAT_WRITE_COMBINING);
537 wrmsr(MSR_PAT, pat_msr);
541 * Set PG_G on kernel pages. Only the BSP calls this when SMP is turned on.
548 vm_offset_t va, endva;
555 endva = KERNBASE + KERNend;
558 va = KERNBASE + KERNLOAD;
560 pdir = kernel_pmap->pm_pdir[KPTDI+i];
562 kernel_pmap->pm_pdir[KPTDI+i] = PTD[KPTDI+i] = pdir;
563 invltlb(); /* Play it safe, invltlb() every time */
568 va = (vm_offset_t)btext;
573 PT_SET_MA(va, *pte | pgeflag);
578 invltlb(); /* Play it safe, invltlb() every time */
585 * Initialize a vm_page's machine-dependent fields.
588 pmap_page_init(vm_page_t m)
591 TAILQ_INIT(&m->md.pv_list);
592 m->md.pv_list_count = 0;
595 #if defined(PAE) && !defined(XEN)
597 static MALLOC_DEFINE(M_PMAPPDPT, "pmap", "pmap pdpt");
600 pmap_pdpt_allocf(uma_zone_t zone, int bytes, u_int8_t *flags, int wait)
602 *flags = UMA_SLAB_PRIV;
603 return (contigmalloc(PAGE_SIZE, M_PMAPPDPT, 0, 0x0ULL, 0xffffffffULL,
609 * Initialize the pmap module.
610 * Called by vm_init, to initialize any structures that the pmap
611 * system needs to map virtual memory.
616 int shpgperproc = PMAP_SHPGPERPROC;
619 * Initialize the address space (zone) for the pv entries. Set a
620 * high water mark so that the system can recover from excessive
621 * numbers of pv entries.
623 pvzone = uma_zcreate("PV ENTRY", sizeof(struct pv_entry), NULL, NULL,
624 NULL, NULL, UMA_ALIGN_PTR, UMA_ZONE_VM | UMA_ZONE_NOFREE);
625 TUNABLE_INT_FETCH("vm.pmap.shpgperproc", &shpgperproc);
626 pv_entry_max = shpgperproc * maxproc + cnt.v_page_count;
627 TUNABLE_INT_FETCH("vm.pmap.pv_entries", &pv_entry_max);
628 pv_entry_high_water = 9 * (pv_entry_max / 10);
629 uma_zone_set_obj(pvzone, &pvzone_obj, pv_entry_max);
631 #if defined(PAE) && !defined(XEN)
632 pdptzone = uma_zcreate("PDPT", NPGPTD * sizeof(pdpt_entry_t), NULL,
633 NULL, NULL, NULL, (NPGPTD * sizeof(pdpt_entry_t)) - 1,
634 UMA_ZONE_VM | UMA_ZONE_NOFREE);
635 uma_zone_set_allocf(pdptzone, pmap_pdpt_allocf);
645 /***************************************************
646 * Low level helper routines.....
647 ***************************************************/
650 * Determine the appropriate bits to set in a PTE or PDE for a specified
654 pmap_cache_bits(int mode, boolean_t is_pde)
656 int pat_flag, pat_index, cache_bits;
658 /* The PAT bit is different for PTE's and PDE's. */
659 pat_flag = is_pde ? PG_PDE_PAT : PG_PTE_PAT;
661 /* If we don't support PAT, map extended modes to older ones. */
662 if (!(cpu_feature & CPUID_PAT)) {
664 case PAT_UNCACHEABLE:
665 case PAT_WRITE_THROUGH:
669 case PAT_WRITE_COMBINING:
670 case PAT_WRITE_PROTECTED:
671 mode = PAT_UNCACHEABLE;
676 /* Map the caching mode to a PAT index. */
679 case PAT_UNCACHEABLE:
682 case PAT_WRITE_THROUGH:
691 case PAT_WRITE_COMBINING:
694 case PAT_WRITE_PROTECTED:
699 case PAT_UNCACHEABLE:
700 case PAT_WRITE_PROTECTED:
703 case PAT_WRITE_THROUGH:
709 case PAT_WRITE_COMBINING:
714 panic("Unknown caching mode %d\n", mode);
717 /* Map the 3-bit index value into the PAT, PCD, and PWT bits. */
720 cache_bits |= pat_flag;
722 cache_bits |= PG_NC_PCD;
724 cache_bits |= PG_NC_PWT;
729 * For SMP, these functions have to use the IPI mechanism for coherence.
731 * N.B.: Before calling any of the following TLB invalidation functions,
732 * the calling processor must ensure that all stores updating a non-
733 * kernel page table are globally performed. Otherwise, another
734 * processor could cache an old, pre-update entry without being
735 * invalidated. This can happen one of two ways: (1) The pmap becomes
736 * active on another processor after its pm_active field is checked by
737 * one of the following functions but before a store updating the page
738 * table is globally performed. (2) The pmap becomes active on another
739 * processor before its pm_active field is checked but due to
740 * speculative loads one of the following functions stills reads the
741 * pmap as inactive on the other processor.
743 * The kernel page table is exempt because its pm_active field is
744 * immutable. The kernel page table is always active on every
748 pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
753 CTR2(KTR_PMAP, "pmap_invalidate_page: pmap=%p va=0x%x",
757 if (pmap == kernel_pmap || pmap->pm_active == all_cpus) {
761 cpumask = PCPU_GET(cpumask);
762 other_cpus = PCPU_GET(other_cpus);
763 if (pmap->pm_active & cpumask)
765 if (pmap->pm_active & other_cpus)
766 smp_masked_invlpg(pmap->pm_active & other_cpus, va);
773 pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
779 CTR3(KTR_PMAP, "pmap_invalidate_page: pmap=%p eva=0x%x sva=0x%x",
783 if (pmap == kernel_pmap || pmap->pm_active == all_cpus) {
784 for (addr = sva; addr < eva; addr += PAGE_SIZE)
786 smp_invlpg_range(sva, eva);
788 cpumask = PCPU_GET(cpumask);
789 other_cpus = PCPU_GET(other_cpus);
790 if (pmap->pm_active & cpumask)
791 for (addr = sva; addr < eva; addr += PAGE_SIZE)
793 if (pmap->pm_active & other_cpus)
794 smp_masked_invlpg_range(pmap->pm_active & other_cpus,
802 pmap_invalidate_all(pmap_t pmap)
807 CTR1(KTR_PMAP, "pmap_invalidate_page: pmap=%p", pmap);
809 if (pmap == kernel_pmap || pmap->pm_active == all_cpus) {
813 cpumask = PCPU_GET(cpumask);
814 other_cpus = PCPU_GET(other_cpus);
815 if (pmap->pm_active & cpumask)
817 if (pmap->pm_active & other_cpus)
818 smp_masked_invltlb(pmap->pm_active & other_cpus);
824 pmap_invalidate_cache(void)
834 * Normal, non-SMP, 486+ invalidation functions.
835 * We inline these within pmap.c for speed.
838 pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
840 if (pmap == kernel_pmap || pmap->pm_active) {
841 CTR2(KTR_PMAP, "pmap_invalidate_page: pmap=%p va=0x%x",
849 pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
853 if (pmap == kernel_pmap || pmap->pm_active) {
854 if (eva - sva > PAGE_SIZE)
856 "pmap_invalidate_range: pmap=%p sva=0x%x eva=0x%x",
858 for (addr = sva; addr < eva; addr += PAGE_SIZE)
865 pmap_invalidate_all(pmap_t pmap)
869 if (pmap == kernel_pmap || pmap->pm_active) {
870 CTR1(KTR_PMAP, "pmap_invalidate_all: pmap=%p", pmap);
876 pmap_invalidate_cache(void)
884 * Are we current address space or kernel? N.B. We return FALSE when
885 * a pmap's page table is in use because a kernel thread is borrowing
886 * it. The borrowed page table can change spontaneously, making any
887 * dependence on its continued use subject to a race condition.
890 pmap_is_current(pmap_t pmap)
893 return (pmap == kernel_pmap ||
894 (pmap == vmspace_pmap(curthread->td_proc->p_vmspace) &&
895 (pmap->pm_pdir[PTDPTDI] & PG_FRAME) == (PTDpde[0] & PG_FRAME)));
899 * If the given pmap is not the current or kernel pmap, the returned pte must
900 * be released by passing it to pmap_pte_release().
903 pmap_pte(pmap_t pmap, vm_offset_t va)
908 pde = pmap_pde(pmap, va);
912 /* are we current address space or kernel? */
913 if (pmap_is_current(pmap))
915 mtx_lock(&PMAP2mutex);
916 newpf = *pde & PG_FRAME;
917 if ((*PMAP2 & PG_FRAME) != newpf) {
919 PT_SET_MA(PADDR2, newpf | PG_V | PG_A | PG_M);
920 CTR3(KTR_PMAP, "pmap_pte: pmap=%p va=0x%x newpte=0x%08x",
921 pmap, va, (*PMAP2 & 0xffffffff));
923 *PMAP2 = newpf | PG_RW | PG_V | PG_A | PG_M;
924 pmap_invalidate_page(kernel_pmap, (vm_offset_t)PADDR2);
927 return (PADDR2 + (i386_btop(va) & (NPTEPG - 1)));
933 * Releases a pte that was obtained from pmap_pte(). Be prepared for the pte
937 pmap_pte_release(pt_entry_t *pte)
940 if ((pt_entry_t *)((vm_offset_t)pte & ~PAGE_MASK) == PADDR2) {
941 CTR1(KTR_PMAP, "pmap_pte_release: pte=0x%jx",
943 PT_SET_VA_MA(PMAP2, 0, TRUE);
944 mtx_unlock(&PMAP2mutex);
949 invlcaddr(void *caddr)
952 invlpg((u_int)caddr);
957 * Super fast pmap_pte routine best used when scanning
958 * the pv lists. This eliminates many coarse-grained
959 * invltlb calls. Note that many of the pv list
960 * scans are across different pmaps. It is very wasteful
961 * to do an entire invltlb for checking a single mapping.
963 * If the given pmap is not the current pmap, vm_page_queue_mtx
964 * must be held and curthread pinned to a CPU.
967 pmap_pte_quick(pmap_t pmap, vm_offset_t va)
972 pde = pmap_pde(pmap, va);
978 * XXX hitting this indicates that things are AFU
981 /* are we current address space or kernel? */
982 if (pmap_is_current(pmap))
984 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
985 KASSERT(curthread->td_pinned > 0, ("curthread not pinned"));
986 newpf = *pde & PG_FRAME;
987 if ((*PMAP1 & PG_FRAME) != newpf) {
989 PT_SET_MA(PADDR1, newpf | PG_V | PG_A | PG_M);
991 "pmap_pte_quick: pmap=%p va=0x%x newpte=0x%08x",
992 pmap, va, (u_long)*PMAP1);
994 *PMAP1 = newpf | PG_RW | PG_V | PG_A | PG_M;
997 PMAP1cpu = PCPU_GET(cpuid);
1003 if (PMAP1cpu != PCPU_GET(cpuid)) {
1004 PMAP1cpu = PCPU_GET(cpuid);
1010 return (PADDR1 + (i386_btop(va) & (NPTEPG - 1)));
1016 * Routine: pmap_extract
1018 * Extract the physical page address associated
1019 * with the given map/virtual_address pair.
1023 pmap_extract(pmap_t pmap, vm_offset_t va)
1031 pde = pmap->pm_pdir[va >> PDRSHIFT];
1033 if ((pde & PG_PS) != 0) {
1035 rtval = xpmap_mtop(pde & PG_PS_FRAME) | (va & PDRMASK);
1037 rtval = (pde & ~PDRMASK) | (va & PDRMASK);
1042 pte = pmap_pte(pmap, va);
1044 rtval = ((*pte ? xpmap_mtop(*pte) : 0) & PG_FRAME) | (va & PAGE_MASK);
1047 rtval = (*pte & PG_FRAME) | (va & PAGE_MASK);
1049 pmap_pte_release(pte);
1056 pmap_extract_ma(pmap_t pmap, vm_offset_t va)
1064 pde = pmap->pm_pdir[va >> PDRSHIFT];
1066 if ((pde & PG_PS) != 0) {
1067 rtval = (pde & ~PDRMASK) | (va & PDRMASK);
1072 pte = pmap_pte(pmap, va);
1074 rtval = (*pte & PG_FRAME) | (va & PAGE_MASK);
1075 pmap_pte_release(pte);
1083 * Routine: pmap_extract_and_hold
1085 * Atomically extract and hold the physical page
1086 * with the given pmap and virtual address pair
1087 * if that mapping permits the given protection.
1090 pmap_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_prot_t prot)
1097 vm_page_lock_queues();
1099 pde = PT_GET(pmap_pde(pmap, va));
1102 if ((pde & PG_RW) || (prot & VM_PROT_WRITE) == 0) {
1103 m = PHYS_TO_VM_PAGE((pde & ~PDRMASK) |
1109 pte = PT_GET(pmap_pte_quick(pmap, va));
1111 ((pte & PG_RW) || (prot & VM_PROT_WRITE) == 0)) {
1112 m = PHYS_TO_VM_PAGE(pte & PG_FRAME);
1118 vm_page_unlock_queues();
1123 /***************************************************
1124 * Low level mapping routines.....
1125 ***************************************************/
1128 * Add a wired page to the kva.
1129 * Note: not SMP coherent.
1132 pmap_kenter(vm_offset_t va, vm_paddr_t pa)
1134 PT_SET_MA(va, xpmap_ptom(pa)| PG_RW | PG_V | pgeflag);
1138 pmap_kenter_ma(vm_offset_t va, vm_paddr_t pa)
1141 PT_SET_MA(va, pa | PG_RW | PG_V | pgeflag);
1145 pmap_kenter_attr(vm_offset_t va, vm_paddr_t pa, int mode)
1147 PT_SET_MA(va, pa | PG_RW | PG_V | pgeflag | pmap_cache_bits(mode, 0));
1151 * Remove a page from the kernel pagetables.
1152 * Note: not SMP coherent.
1155 pmap_kremove(vm_offset_t va)
1160 PT_SET_VA_MA(pte, 0, FALSE);
1164 * Used to map a range of physical addresses into kernel
1165 * virtual address space.
1167 * The value passed in '*virt' is a suggested virtual address for
1168 * the mapping. Architectures which can support a direct-mapped
1169 * physical to virtual region can return the appropriate address
1170 * within that region, leaving '*virt' unchanged. Other
1171 * architectures should map the pages starting at '*virt' and
1172 * update '*virt' with the first usable address after the mapped
1176 pmap_map(vm_offset_t *virt, vm_paddr_t start, vm_paddr_t end, int prot)
1178 vm_offset_t va, sva;
1181 while (start < end) {
1182 pmap_kenter(va, start);
1186 pmap_invalidate_range(kernel_pmap, sva, va);
1193 * Add a list of wired pages to the kva
1194 * this routine is only used for temporary
1195 * kernel mappings that do not need to have
1196 * page modification or references recorded.
1197 * Note that old mappings are simply written
1198 * over. The page *must* be wired.
1199 * Note: SMP coherent. Uses a ranged shootdown IPI.
1202 pmap_qenter(vm_offset_t sva, vm_page_t *ma, int count)
1204 pt_entry_t *endpte, oldpte, *pte;
1208 endpte = pte + count;
1209 vm_page_lock_queues();
1211 while (pte < endpte) {
1214 PT_SET_VA(pte, VM_PAGE_TO_PHYS(*ma) | pgeflag | PG_RW | PG_V, FALSE);
1216 pte_store(pte, VM_PAGE_TO_PHYS(*ma) | pgeflag | PG_RW | PG_V);
1222 if ((oldpte & PG_V) != 0)
1223 pmap_invalidate_range(kernel_pmap, sva, sva + count *
1225 vm_page_unlock_queues();
1230 * This routine tears out page mappings from the
1231 * kernel -- it is meant only for temporary mappings.
1232 * Note: SMP coherent. Uses a ranged shootdown IPI.
1235 pmap_qremove(vm_offset_t sva, int count)
1240 vm_page_lock_queues();
1242 while (count-- > 0) {
1246 pmap_invalidate_range(kernel_pmap, sva, va);
1248 vm_page_unlock_queues();
1252 /***************************************************
1253 * Page table page management routines.....
1254 ***************************************************/
1255 static PMAP_INLINE void
1256 pmap_free_zero_pages(vm_page_t free)
1260 while (free != NULL) {
1263 vm_page_free_zero(m);
1268 * This routine unholds page table pages, and if the hold count
1269 * drops to zero, then it decrements the wire count.
1271 static PMAP_INLINE int
1272 pmap_unwire_pte_hold(pmap_t pmap, vm_page_t m, vm_page_t *free)
1276 if (m->wire_count == 0)
1277 return _pmap_unwire_pte_hold(pmap, m, free);
1283 _pmap_unwire_pte_hold(pmap_t pmap, vm_page_t m, vm_page_t *free)
1289 * unmap the page table page
1292 xen_pt_unpin(pmap->pm_pdir[m->pindex]);
1293 PT_SET_VA_MA(&pmap->pm_pdir[m->pindex], 0, TRUE);
1296 pmap->pm_pdir[m->pindex] = 0;
1298 --pmap->pm_stats.resident_count;
1301 * This is a release store so that the ordinary store unmapping
1302 * the page table page is globally performed before TLB shoot-
1305 atomic_subtract_rel_int(&cnt.v_wire_count, 1);
1308 * Do an invltlb to make the invalidated mapping
1309 * take effect immediately.
1311 pteva = VM_MAXUSER_ADDRESS + i386_ptob(m->pindex);
1312 pmap_invalidate_page(pmap, pteva);
1315 * Put page on a list so that it is released after
1316 * *ALL* TLB shootdown is done
1325 * After removing a page table entry, this routine is used to
1326 * conditionally free the page, and manage the hold/wire counts.
1329 pmap_unuse_pt(pmap_t pmap, vm_offset_t va, vm_page_t *free)
1334 if (va >= VM_MAXUSER_ADDRESS)
1336 ptepde = PT_GET(pmap_pde(pmap, va));
1337 mpte = PHYS_TO_VM_PAGE(ptepde & PG_FRAME);
1338 return pmap_unwire_pte_hold(pmap, mpte, free);
1346 PMAP_LOCK_INIT(pmap);
1347 pmap->pm_pdir = (pd_entry_t *)(KERNBASE + (vm_offset_t)IdlePTD);
1349 pmap->pm_pdpt = (pdpt_entry_t *)(KERNBASE + (vm_offset_t)IdlePDPT);
1351 pmap->pm_active = 0;
1352 PCPU_SET(curpmap, pmap);
1353 TAILQ_INIT(&pmap->pm_pvlist);
1354 bzero(&pmap->pm_stats, sizeof pmap->pm_stats);
1355 mtx_lock_spin(&allpmaps_lock);
1356 LIST_INSERT_HEAD(&allpmaps, pmap, pm_list);
1357 mtx_unlock_spin(&allpmaps_lock);
1361 * Initialize a preallocated and zeroed pmap structure,
1362 * such as one in a vmspace structure.
1365 pmap_pinit(struct pmap *pmap)
1368 vm_page_t m, ptdpg[NPGPTD + 1];
1369 int npgptd = NPGPTD + 1;
1371 vm_page_t m, ptdpg[NPGPTD];
1373 int npgptd = NPGPTD;
1378 PMAP_LOCK_INIT(pmap);
1381 * No need to allocate page table space yet but we do need a valid
1382 * page directory table.
1384 if (pmap->pm_pdir == NULL) {
1385 pmap->pm_pdir = (pd_entry_t *)kmem_alloc_nofault(kernel_map,
1390 pmap->pm_pdpt = (pd_entry_t *)kmem_alloc_nofault(kernel_map, 1);
1392 pmap->pm_pdpt = uma_zalloc(pdptzone, M_WAITOK | M_ZERO);
1393 KASSERT(((vm_offset_t)pmap->pm_pdpt &
1394 ((NPGPTD * sizeof(pdpt_entry_t)) - 1)) == 0,
1395 ("pmap_pinit: pdpt misaligned"));
1396 KASSERT(pmap_kextract((vm_offset_t)pmap->pm_pdpt) < (4ULL<<30),
1397 ("pmap_pinit: pdpt above 4g"));
1403 * allocate the page directory page(s)
1405 for (i = 0; i < npgptd;) {
1406 m = vm_page_alloc(NULL, color++,
1407 VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED |
1416 pmap_qenter((vm_offset_t)pmap->pm_pdir, ptdpg, NPGPTD);
1418 for (i = 0; i < NPGPTD; i++) {
1419 if ((ptdpg[i]->flags & PG_ZERO) == 0)
1420 pagezero(&pmap->pm_pdir[i*NPDEPG]);
1423 mtx_lock_spin(&allpmaps_lock);
1424 LIST_INSERT_HEAD(&allpmaps, pmap, pm_list);
1425 mtx_unlock_spin(&allpmaps_lock);
1426 /* Wire in kernel global address entries. */
1427 bcopy(PTD + KPTDI, pmap->pm_pdir + KPTDI, nkpt * sizeof(pd_entry_t));
1431 pmap_qenter((vm_offset_t)pmap->pm_pdpt, &ptdpg[NPGPTD], 1);
1432 if ((ptdpg[NPGPTD]->flags & PG_ZERO) == 0)
1433 bzero(pmap->pm_pdpt, PAGE_SIZE);
1435 for (i = 0; i < NPGPTD; i++) {
1438 ma = xpmap_ptom(VM_PAGE_TO_PHYS(ptdpg[i]));
1439 pmap->pm_pdpt[i] = ma | PG_V;
1445 for (i = 0; i < NPGPTD; i++) {
1449 ma = xpmap_ptom(VM_PAGE_TO_PHYS(ptdpg[i]));
1450 pd = pmap->pm_pdir + (i * NPDEPG);
1451 PT_SET_MA(pd, *vtopte((vm_offset_t)pd) & ~(PG_M|PG_A|PG_U|PG_RW));
1456 PT_SET_MA(pmap->pm_pdpt, *vtopte((vm_offset_t)pmap->pm_pdpt) & ~PG_RW);
1458 vm_page_lock_queues();
1460 xen_pgdpt_pin(xpmap_ptom(VM_PAGE_TO_PHYS(ptdpg[NPGPTD])));
1461 for (i = 0; i < NPGPTD; i++) {
1462 vm_paddr_t ma = xpmap_ptom(VM_PAGE_TO_PHYS(ptdpg[i]));
1463 PT_SET_VA_MA(&pmap->pm_pdir[PTDPTDI + i], ma | PG_V | PG_A, FALSE);
1466 vm_page_unlock_queues();
1468 /* install self-referential address mapping entry(s) */
1469 for (i = 0; i < NPGPTD; i++) {
1470 pa = VM_PAGE_TO_PHYS(ptdpg[i]);
1471 pmap->pm_pdir[PTDPTDI + i] = pa | PG_V | PG_RW | PG_A | PG_M;
1473 pmap->pm_pdpt[i] = pa | PG_V;
1477 pmap->pm_active = 0;
1478 TAILQ_INIT(&pmap->pm_pvlist);
1479 bzero(&pmap->pm_stats, sizeof pmap->pm_stats);
1483 * this routine is called if the page table page is not
1487 _pmap_allocpte(pmap_t pmap, unsigned int ptepindex, int flags)
1492 KASSERT((flags & (M_NOWAIT | M_WAITOK)) == M_NOWAIT ||
1493 (flags & (M_NOWAIT | M_WAITOK)) == M_WAITOK,
1494 ("_pmap_allocpte: flags is neither M_NOWAIT nor M_WAITOK"));
1497 * Allocate a page table page.
1499 if ((m = vm_page_alloc(NULL, ptepindex, VM_ALLOC_NOOBJ |
1500 VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL) {
1501 if (flags & M_WAITOK) {
1503 vm_page_unlock_queues();
1505 vm_page_lock_queues();
1510 * Indicate the need to retry. While waiting, the page table
1511 * page may have been allocated.
1515 if ((m->flags & PG_ZERO) == 0)
1519 * Map the pagetable page into the process address space, if
1520 * it isn't already there.
1523 pmap->pm_stats.resident_count++;
1525 ptepa = xpmap_ptom(VM_PAGE_TO_PHYS(m));
1527 PT_SET_VA_MA(&pmap->pm_pdir[ptepindex],
1528 (ptepa | PG_U | PG_RW | PG_V | PG_A | PG_M), TRUE);
1530 KASSERT(pmap->pm_pdir[ptepindex],
1531 ("_pmap_allocpte: ptepindex=%d did not get mapped", ptepindex));
1533 ptepa = VM_PAGE_TO_PHYS(m);
1534 pmap->pm_pdir[ptepindex] =
1535 (pd_entry_t) (ptepa | PG_U | PG_RW | PG_V | PG_A | PG_M);
1541 pmap_allocpte(pmap_t pmap, vm_offset_t va, int flags)
1547 KASSERT((flags & (M_NOWAIT | M_WAITOK)) == M_NOWAIT ||
1548 (flags & (M_NOWAIT | M_WAITOK)) == M_WAITOK,
1549 ("pmap_allocpte: flags is neither M_NOWAIT nor M_WAITOK"));
1552 * Calculate pagetable page index
1554 ptepindex = va >> PDRSHIFT;
1557 * Get the page directory entry
1559 ptepa = pmap->pm_pdir[ptepindex];
1562 * XXX track me down and fix me!
1564 if ((ptepa & PG_V) == 0) {
1565 if (ptepa && ((ptepa & PG_V) == 0))
1566 panic("phys addr set but not valid");
1570 * This supports switching from a 4MB page to a
1573 if (ptepa & PG_PS) {
1574 pmap->pm_pdir[ptepindex] = 0;
1576 pmap->pm_stats.resident_count -= NBPDR / PAGE_SIZE;
1577 pmap_invalidate_all(kernel_pmap);
1581 * If the page table page is mapped, we just increment the
1582 * hold count, and activate it.
1586 m = PHYS_TO_VM_PAGE(xpmap_mtop(ptepa));
1588 m = PHYS_TO_VM_PAGE(ptepa);
1593 * Here if the pte page isn't mapped, or if it has
1596 CTR3(KTR_PMAP, "pmap_allocpte: pmap=%p va=0x%08x flags=0x%x",
1599 m = _pmap_allocpte(pmap, ptepindex, flags);
1600 if (m == NULL && (flags & M_WAITOK))
1602 KASSERT(pmap->pm_pdir[ptepindex],
1603 ("ptepindex=%d did not get mapped", ptepindex));
1609 /***************************************************
1610 * Pmap allocation/deallocation routines.
1611 ***************************************************/
1615 * Deal with a SMP shootdown of other users of the pmap that we are
1616 * trying to dispose of. This can be a bit hairy.
1618 static u_int *lazymask;
1619 static u_int lazyptd;
1620 static volatile u_int lazywait;
1622 void pmap_lazyfix_action(void);
1625 pmap_lazyfix_action(void)
1627 u_int mymask = PCPU_GET(cpumask);
1629 if (rcr3() == lazyptd)
1630 load_cr3(PCPU_GET(curpcb)->pcb_cr3);
1631 atomic_clear_int(lazymask, mymask);
1632 atomic_store_rel_int(&lazywait, 1);
1636 pmap_lazyfix_self(u_int mymask)
1639 if (rcr3() == lazyptd)
1640 load_cr3(PCPU_GET(curpcb)->pcb_cr3);
1641 atomic_clear_int(lazymask, mymask);
1646 pmap_lazyfix(pmap_t pmap)
1650 register u_int spins;
1652 while ((mask = pmap->pm_active) != 0) {
1654 mask = mask & -mask; /* Find least significant set bit */
1655 mtx_lock_spin(&smp_ipi_mtx);
1657 lazyptd = vtophys(pmap->pm_pdpt);
1659 lazyptd = vtophys(pmap->pm_pdir);
1661 mymask = PCPU_GET(cpumask);
1662 if (mask == mymask) {
1663 lazymask = &pmap->pm_active;
1664 pmap_lazyfix_self(mymask);
1666 atomic_store_rel_int((u_int *)&lazymask,
1667 (u_int)&pmap->pm_active);
1668 atomic_store_rel_int(&lazywait, 0);
1669 ipi_selected(mask, IPI_LAZYPMAP);
1670 while (lazywait == 0) {
1676 mtx_unlock_spin(&smp_ipi_mtx);
1678 printf("pmap_lazyfix: spun for 50000000\n");
1685 * Cleaning up on uniprocessor is easy. For various reasons, we're
1686 * unlikely to have to even execute this code, including the fact
1687 * that the cleanup is deferred until the parent does a wait(2), which
1688 * means that another userland process has run.
1691 pmap_lazyfix(pmap_t pmap)
1695 cr3 = vtophys(pmap->pm_pdir);
1696 if (cr3 == rcr3()) {
1697 load_cr3(PCPU_GET(curpcb)->pcb_cr3);
1698 pmap->pm_active &= ~(PCPU_GET(cpumask));
1704 * Release any resources held by the given physical map.
1705 * Called when a pmap initialized by pmap_pinit is being released.
1706 * Should only be called if the map contains no valid mappings.
1709 pmap_release(pmap_t pmap)
1712 vm_page_t m, ptdpg[NPGPTD+1];
1713 int npgptd = NPGPTD + 1;
1715 vm_page_t m, ptdpg[NPGPTD];
1716 int npgptd = NPGPTD;
1720 KASSERT(pmap->pm_stats.resident_count == 0,
1721 ("pmap_release: pmap resident count %ld != 0",
1722 pmap->pm_stats.resident_count));
1725 mtx_lock_spin(&allpmaps_lock);
1726 LIST_REMOVE(pmap, pm_list);
1727 mtx_unlock_spin(&allpmaps_lock);
1730 for (i = 0; i < NPGPTD; i++)
1731 ptdpg[i] = PHYS_TO_VM_PAGE(xpmap_mtop(pmap->pm_pdir[PTDPTDI + i]));
1733 for (i = 0; i < NPGPTD; i++)
1734 ptdpg[i] = PHYS_TO_VM_PAGE(pmap->pm_pdir[PTDPTDI + i]);
1737 bzero(pmap->pm_pdir + PTDPTDI, (nkpt + NPGPTD) *
1738 sizeof(*pmap->pm_pdir));
1740 pmap_qremove((vm_offset_t)pmap->pm_pdir, NPGPTD);
1741 #if defined(PAE) && defined(XEN)
1742 ptdpg[NPGPTD] = PHYS_TO_VM_PAGE(vtophys(pmap->pm_pdpt));
1745 vm_page_lock_queues();
1746 for (i = 0; i < npgptd; i++) {
1750 ma = xpmap_ptom(VM_PAGE_TO_PHYS(m));
1751 /* unpinning L1 and L2 treated the same */
1756 xpmap_ptom(VM_PAGE_TO_PHYS(m))
1760 == (pmap->pm_pdpt[i] & PG_FRAME),
1761 ("pmap_release: got wrong ptd page"));
1764 atomic_subtract_int(&cnt.v_wire_count, 1);
1767 vm_page_unlock_queues();
1768 PMAP_LOCK_DESTROY(pmap);
1772 kvm_size(SYSCTL_HANDLER_ARGS)
1774 unsigned long ksize = VM_MAX_KERNEL_ADDRESS - KERNBASE;
1776 return sysctl_handle_long(oidp, &ksize, 0, req);
1778 SYSCTL_PROC(_vm, OID_AUTO, kvm_size, CTLTYPE_LONG|CTLFLAG_RD,
1779 0, 0, kvm_size, "IU", "Size of KVM");
1782 kvm_free(SYSCTL_HANDLER_ARGS)
1784 unsigned long kfree = VM_MAX_KERNEL_ADDRESS - kernel_vm_end;
1786 return sysctl_handle_long(oidp, &kfree, 0, req);
1788 SYSCTL_PROC(_vm, OID_AUTO, kvm_free, CTLTYPE_LONG|CTLFLAG_RD,
1789 0, 0, kvm_free, "IU", "Amount of KVM free");
1792 * grow the number of kernel page table entries, if needed
1795 pmap_growkernel(vm_offset_t addr)
1798 vm_paddr_t ptppaddr;
1802 mtx_assert(&kernel_map->system_mtx, MA_OWNED);
1803 if (kernel_vm_end == 0) {
1804 kernel_vm_end = KERNBASE;
1806 while (pdir_pde(PTD, kernel_vm_end)) {
1807 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1);
1809 if (kernel_vm_end - 1 >= kernel_map->max_offset) {
1810 kernel_vm_end = kernel_map->max_offset;
1815 addr = roundup2(addr, PAGE_SIZE * NPTEPG);
1816 if (addr - 1 >= kernel_map->max_offset)
1817 addr = kernel_map->max_offset;
1818 while (kernel_vm_end < addr) {
1819 if (pdir_pde(PTD, kernel_vm_end)) {
1820 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1);
1821 if (kernel_vm_end - 1 >= kernel_map->max_offset) {
1822 kernel_vm_end = kernel_map->max_offset;
1828 nkpg = vm_page_alloc(NULL, kernel_vm_end >> PDRSHIFT,
1829 VM_ALLOC_NOOBJ | VM_ALLOC_SYSTEM | VM_ALLOC_WIRED);
1831 panic("pmap_growkernel: no memory to grow kernel");
1835 pmap_zero_page(nkpg);
1836 ptppaddr = VM_PAGE_TO_PHYS(nkpg);
1837 newpdir = (pd_entry_t) (ptppaddr | PG_V | PG_RW | PG_A | PG_M);
1838 vm_page_lock_queues();
1839 PD_SET_VA(kernel_pmap, (kernel_vm_end >> PDRSHIFT), newpdir, TRUE);
1840 mtx_lock_spin(&allpmaps_lock);
1841 LIST_FOREACH(pmap, &allpmaps, pm_list) {
1842 PD_SET_VA(pmap, (kernel_vm_end >> PDRSHIFT), newpdir, TRUE);
1844 mtx_unlock_spin(&allpmaps_lock);
1845 vm_page_unlock_queues();
1847 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1);
1848 if (kernel_vm_end - 1 >= kernel_map->max_offset) {
1849 kernel_vm_end = kernel_map->max_offset;
1856 /***************************************************
1857 * page management routines.
1858 ***************************************************/
1861 * free the pv_entry back to the free list
1863 static PMAP_INLINE void
1864 free_pv_entry(pv_entry_t pv)
1867 uma_zfree(pvzone, pv);
1871 * get a new pv_entry, allocating a block from the system
1873 * the memory allocation is performed bypassing the malloc code
1874 * because of the possibility of allocations at interrupt time.
1880 if ((pv_entry_count > pv_entry_high_water) &&
1881 (pmap_pagedaemon_waken == 0)) {
1882 pmap_pagedaemon_waken = 1;
1883 wakeup (&vm_pages_needed);
1885 return uma_zalloc(pvzone, M_NOWAIT);
1890 pmap_remove_entry(pmap_t pmap, vm_page_t m, vm_offset_t va)
1894 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1895 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
1896 if (m->md.pv_list_count < pmap->pm_stats.resident_count) {
1897 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
1898 if (pmap == pv->pv_pmap && va == pv->pv_va)
1902 TAILQ_FOREACH(pv, &pmap->pm_pvlist, pv_plist) {
1903 if (va == pv->pv_va)
1907 KASSERT(pv != NULL, ("pmap_remove_entry: pv not found"));
1908 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
1909 m->md.pv_list_count--;
1910 if (TAILQ_EMPTY(&m->md.pv_list))
1911 vm_page_flag_clear(m, PG_WRITEABLE);
1912 TAILQ_REMOVE(&pmap->pm_pvlist, pv, pv_plist);
1917 * Create a pv entry for page at pa for
1921 pmap_insert_entry(pmap_t pmap, vm_offset_t va, vm_page_t m)
1925 pv = get_pv_entry();
1927 panic("no pv entries: increase vm.pmap.shpgperproc");
1931 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1932 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
1933 TAILQ_INSERT_TAIL(&pmap->pm_pvlist, pv, pv_plist);
1934 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list);
1935 m->md.pv_list_count++;
1939 * Conditionally create a pv entry.
1942 pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va, vm_page_t m)
1946 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1947 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
1948 if (pv_entry_count < pv_entry_high_water &&
1949 (pv = uma_zalloc(pvzone, M_NOWAIT)) != NULL) {
1953 TAILQ_INSERT_TAIL(&pmap->pm_pvlist, pv, pv_plist);
1954 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list);
1955 m->md.pv_list_count++;
1962 * pmap_remove_pte: do the things to unmap a page in a process
1965 pmap_remove_pte(pmap_t pmap, pt_entry_t *ptq, vm_offset_t va, vm_page_t *free)
1970 CTR3(KTR_PMAP, "pmap_remove_pte: pmap=%p *ptq=0x%x va=0x%x",
1971 pmap, (u_long)*ptq, va);
1973 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
1974 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1977 PT_SET_VA_MA(ptq, 0, TRUE);
1979 oldpte = pte_load_clear(ptq);
1982 pmap->pm_stats.wired_count -= 1;
1984 * Machines that don't support invlpg, also don't support
1988 pmap_invalidate_page(kernel_pmap, va);
1989 pmap->pm_stats.resident_count -= 1;
1990 if (oldpte & PG_MANAGED) {
1991 m = PHYS_TO_VM_PAGE(xpmap_mtop(oldpte));
1992 if (oldpte & PG_M) {
1993 KASSERT((oldpte & PG_RW),
1994 ("pmap_remove_pte: modified page not writable: va: %#x, pte: %#jx",
1995 va, (uintmax_t)oldpte));
1999 vm_page_flag_set(m, PG_REFERENCED);
2000 pmap_remove_entry(pmap, m, va);
2002 return (pmap_unuse_pt(pmap, va, free));
2006 * Remove a single page from a process address space
2009 pmap_remove_page(pmap_t pmap, vm_offset_t va)
2012 vm_page_t free = NULL;
2014 CTR2(KTR_PMAP, "pmap_remove_page: pmap=%p va=0x%x",
2017 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2018 KASSERT(curthread->td_pinned > 0, ("curthread not pinned"));
2019 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2020 if ((pte = pmap_pte_quick(pmap, va)) == NULL || *pte == 0)
2022 pmap_remove_pte(pmap, pte, va, &free);
2023 pmap_invalidate_page(pmap, va);
2024 pmap_free_zero_pages(free);
2028 * Remove the given range of addresses from the specified map.
2030 * It is assumed that the start and end are properly
2031 * rounded to the page size.
2034 pmap_remove(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
2039 vm_page_t free = NULL;
2042 CTR3(KTR_PMAP, "pmap_remove: pmap=%p sva=0x%x eva=0x%x",
2046 * Perform an unsynchronized read. This is, however, safe.
2048 if (pmap->pm_stats.resident_count == 0)
2053 vm_page_lock_queues();
2058 * special handling of removing one page. a very
2059 * common operation and easy to short circuit some
2062 if ((sva + PAGE_SIZE == eva) &&
2063 ((pmap->pm_pdir[(sva >> PDRSHIFT)] & PG_PS) == 0)) {
2064 pmap_remove_page(pmap, sva);
2068 for (; sva < eva; sva = pdnxt) {
2072 * Calculate index for next page table.
2074 pdnxt = (sva + NBPDR) & ~PDRMASK;
2075 if (pmap->pm_stats.resident_count == 0)
2078 pdirindex = sva >> PDRSHIFT;
2079 ptpaddr = pmap->pm_pdir[pdirindex];
2082 * Weed out invalid mappings. Note: we assume that the page
2083 * directory table is always allocated, and in kernel virtual.
2089 * Check for large page.
2091 if ((ptpaddr & PG_PS) != 0) {
2093 PT_SET_VA_MA(&pmap->pm_pdir[pdirindex], 0, TRUE);
2095 pmap->pm_pdir[pdirindex] = 0;
2097 pmap->pm_stats.resident_count -= NBPDR / PAGE_SIZE;
2103 * Limit our scan to either the end of the va represented
2104 * by the current page table page, or to the end of the
2105 * range being removed.
2110 for (pte = pmap_pte_quick(pmap, sva); sva != pdnxt; pte++,
2116 * The TLB entry for a PG_G mapping is invalidated
2117 * by pmap_remove_pte().
2119 if ((*pte & PG_G) == 0)
2121 if (pmap_remove_pte(pmap, pte, sva, &free))
2129 pmap_invalidate_all(pmap);
2130 pmap_free_zero_pages(free);
2133 vm_page_unlock_queues();
2138 * Routine: pmap_remove_all
2140 * Removes this physical page from
2141 * all physical maps in which it resides.
2142 * Reflects back modify bits to the pager.
2145 * Original versions of this routine were very
2146 * inefficient because they iteratively called
2147 * pmap_remove (slow...)
2151 pmap_remove_all(vm_page_t m)
2153 register pv_entry_t pv;
2154 pt_entry_t *pte, tpte;
2157 #if defined(PMAP_DIAGNOSTIC)
2159 * XXX This makes pmap_remove_all() illegal for non-managed pages!
2161 if (m->flags & PG_FICTITIOUS) {
2162 panic("pmap_remove_all: illegal for unmanaged page, va: 0x%jx",
2163 VM_PAGE_TO_PHYS(m));
2166 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2168 while ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) {
2169 PMAP_LOCK(pv->pv_pmap);
2170 pv->pv_pmap->pm_stats.resident_count--;
2171 pte = pmap_pte_quick(pv->pv_pmap, pv->pv_va);
2174 PT_SET_VA_MA(pte, 0, TRUE);
2176 tpte = pte_load_clear(pte);
2179 pv->pv_pmap->pm_stats.wired_count--;
2181 vm_page_flag_set(m, PG_REFERENCED);
2184 * Update the vm_page_t clean and reference bits.
2187 KASSERT((tpte & PG_RW),
2188 ("pmap_remove_all: modified page not writable: va: %#x, pte: %#jx",
2189 pv->pv_va, (uintmax_t)tpte));
2193 pmap_unuse_pt(pv->pv_pmap, pv->pv_va, &free);
2194 pmap_invalidate_page(pv->pv_pmap, pv->pv_va);
2195 pmap_free_zero_pages(free);
2196 TAILQ_REMOVE(&pv->pv_pmap->pm_pvlist, pv, pv_plist);
2197 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
2198 m->md.pv_list_count--;
2199 PMAP_UNLOCK(pv->pv_pmap);
2202 vm_page_flag_clear(m, PG_WRITEABLE);
2208 * Set the physical protection on the
2209 * specified range of this map as requested.
2212 pmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot)
2219 CTR4(KTR_PMAP, "pmap_protect: pmap=%p sva=0x%x eva=0x%x prot=0x%x",
2220 pmap, sva, eva, prot);
2222 if ((prot & VM_PROT_READ) == VM_PROT_NONE) {
2223 pmap_remove(pmap, sva, eva);
2227 if (prot & VM_PROT_WRITE)
2232 vm_page_lock_queues();
2235 for (; sva < eva; sva = pdnxt) {
2237 vm_paddr_t obits, pbits;
2239 pdnxt = (sva + NBPDR) & ~PDRMASK;
2241 pdirindex = sva >> PDRSHIFT;
2242 ptpaddr = pmap->pm_pdir[pdirindex];
2245 * Weed out invalid mappings. Note: we assume that the page
2246 * directory table is always allocated, and in kernel virtual.
2252 * Check for large page.
2254 if ((ptpaddr & PG_PS) != 0) {
2255 pmap->pm_pdir[pdirindex] &= ~(PG_M|PG_RW);
2263 for (pte = pmap_pte_quick(pmap, sva); sva != pdnxt; pte++,
2269 * Regardless of whether a pte is 32 or 64 bits in
2270 * size, PG_RW, PG_A, and PG_M are among the least
2271 * significant 32 bits.
2273 obits = pbits = *pte;
2274 if (pbits & PG_MANAGED) {
2276 pt_entry_t pteval = xpmap_mtop(*pte);
2278 pt_entry_t pteval = *pte;
2283 m = PHYS_TO_VM_PAGE(pteval);
2285 vm_page_flag_set(m, PG_REFERENCED);
2288 if ((pbits & PG_M) != 0) {
2290 m = PHYS_TO_VM_PAGE(pteval);
2295 pbits &= ~(PG_RW | PG_M);
2297 if (pbits != obits) {
2300 PT_SET_VA_MA(pte, pbits, TRUE);
2304 if (!atomic_cmpset_int((u_int *)pte, obits,
2309 pmap_invalidate_page(pmap, sva);
2317 pmap_invalidate_all(pmap);
2319 vm_page_unlock_queues();
2324 * Insert the given physical page (p) at
2325 * the specified virtual address (v) in the
2326 * target physical map with the protection requested.
2328 * If specified, the page will be wired down, meaning
2329 * that the related pte can not be reclaimed.
2331 * NB: This is the only routine which MAY NOT lazy-evaluate
2332 * or lose information. That is, this routine must actually
2333 * insert this page into the given map NOW.
2336 pmap_enter(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot,
2341 register pt_entry_t *pte;
2343 pt_entry_t origpte, newpte;
2349 "pmap_enter: pmap=%08p va=0x%08x ma=0x%08x prot=0x%x wired=%d",
2350 pmap, va, xpmap_ptom(VM_PAGE_TO_PHYS(m)), prot, wired);
2352 #ifdef PMAP_DIAGNOSTIC
2353 if (va > VM_MAX_KERNEL_ADDRESS)
2354 panic("pmap_enter: toobig");
2355 if ((va >= UPT_MIN_ADDRESS) && (va < UPT_MAX_ADDRESS))
2356 panic("pmap_enter: invalid to pmap_enter page table pages (va: 0x%x)", va);
2361 vm_page_lock_queues();
2366 * In the case that a page table page is not
2367 * resident, we are creating it here.
2369 if (va < VM_MAXUSER_ADDRESS) {
2370 mpte = pmap_allocpte(pmap, va, M_WAITOK);
2372 #if 0 && defined(PMAP_DIAGNOSTIC)
2374 pd_entry_t *pdeaddr = pmap_pde(pmap, va);
2376 if ((origpte & PG_V) == 0) {
2377 panic("pmap_enter: invalid kernel page table page, pdir=%p, pde=%p, va=%p\n",
2378 pmap->pm_pdir[PTDPTDI], origpte, va);
2383 pde = pmap_pde(pmap, va);
2384 if ((*pde & PG_PS) != 0)
2385 panic("pmap_enter: attempted pmap_enter on 4MB page");
2386 pte = pmap_pte_quick(pmap, va);
2389 * Page Directory table entry not valid, we need a new PT page
2392 panic("pmap_enter: invalid page directory pdir=%#jx, va=%#x\n",
2393 (uintmax_t)pmap->pm_pdir[PTDPTDI], va);
2396 pa = VM_PAGE_TO_PHYS(m);
2401 origpte = xpmap_mtop(origpte);
2402 opa = origpte & PG_FRAME;
2405 * Mapping has not changed, must be protection or wiring change.
2407 if (origpte && (opa == pa)) {
2409 * Wiring change, just update stats. We don't worry about
2410 * wiring PT pages as they remain resident as long as there
2411 * are valid mappings in them. Hence, if a user page is wired,
2412 * the PT page will be also.
2414 if (wired && ((origpte & PG_W) == 0))
2415 pmap->pm_stats.wired_count++;
2416 else if (!wired && (origpte & PG_W))
2417 pmap->pm_stats.wired_count--;
2420 * Remove extra pte reference
2426 * We might be turning off write access to the page,
2427 * so we go ahead and sense modify status.
2429 if (origpte & PG_MANAGED) {
2436 * Mapping has changed, invalidate old range and fall through to
2437 * handle validating new mapping.
2441 pmap->pm_stats.wired_count--;
2442 if (origpte & PG_MANAGED) {
2443 om = PHYS_TO_VM_PAGE(opa);
2444 pmap_remove_entry(pmap, om, va);
2448 KASSERT(mpte->wire_count > 0,
2449 ("pmap_enter: missing reference to page table page,"
2453 pmap->pm_stats.resident_count++;
2456 * Enter on the PV list if part of our managed memory.
2458 if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0) {
2459 KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva,
2460 ("pmap_enter: managed mapping within the clean submap"));
2461 pmap_insert_entry(pmap, va, m);
2466 * Increment counters
2469 pmap->pm_stats.wired_count++;
2473 * Now validate mapping with desired protection/wiring.
2475 newpte = (pt_entry_t)(pa | PG_V);
2476 if ((prot & VM_PROT_WRITE) != 0)
2480 if (va < VM_MAXUSER_ADDRESS)
2482 if (pmap == kernel_pmap)
2487 * if the mapping or permission bits are different, we need
2488 * to update the pte.
2490 if ((origpte & ~(PG_M|PG_A)) != newpte) {
2491 if (origpte & PG_V) {
2495 PT_SET_VA(pte, newpte | PG_A, FALSE);
2497 origpte = pte_load_store(pte, newpte | PG_A);
2499 if (origpte & PG_A) {
2500 if (origpte & PG_MANAGED)
2501 vm_page_flag_set(om, PG_REFERENCED);
2502 if (opa != VM_PAGE_TO_PHYS(m))
2505 if (origpte & PG_M) {
2506 KASSERT((origpte & PG_RW),
2507 ("pmap_enter: modified page not writable: va: %#x, pte: %#jx",
2508 va, (uintmax_t)origpte));
2509 if ((origpte & PG_MANAGED) != 0)
2511 if ((prot & VM_PROT_WRITE) == 0)
2515 pmap_invalidate_page(pmap, va);
2518 PT_SET_VA(pte, newpte | PG_A, FALSE);
2520 pte_store(pte, newpte | PG_A);
2527 vm_page_unlock_queues();
2532 * Maps a sequence of resident pages belonging to the same object.
2533 * The sequence begins with the given page m_start. This page is
2534 * mapped at the given virtual address start. Each subsequent page is
2535 * mapped at a virtual address that is offset from start by the same
2536 * amount as the page is offset from m_start within the object. The
2537 * last page in the sequence is the page with the largest offset from
2538 * m_start that can be mapped at a virtual address less than the given
2539 * virtual address end. Not every virtual page between start and end
2540 * is mapped; only those for which a resident page exists with the
2541 * corresponding offset from m_start are mapped.
2544 pmap_enter_object(pmap_t pmap, vm_offset_t start, vm_offset_t end,
2545 vm_page_t m_start, vm_prot_t prot)
2548 vm_pindex_t diff, psize;
2550 VM_OBJECT_LOCK_ASSERT(m_start->object, MA_OWNED);
2551 psize = atop(end - start);
2555 while (m != NULL && (diff = m->pindex - m_start->pindex) < psize) {
2556 mpte = pmap_enter_quick_locked(pmap, start + ptoa(diff), m,
2558 m = TAILQ_NEXT(m, listq);
2564 * this code makes some *MAJOR* assumptions:
2565 * 1. Current pmap & pmap exists.
2568 * 4. No page table pages.
2569 * but is *MUCH* faster than pmap_enter...
2573 pmap_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot)
2577 (void) pmap_enter_quick_locked(pmap, va, m, prot, NULL);
2582 pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va, vm_page_t m,
2583 vm_prot_t prot, vm_page_t mpte)
2589 pa = VM_PAGE_TO_PHYS(m);
2590 pa = pa ? xpmap_ptom(pa) >> PAGE_SHIFT : 0;
2593 "pmap_enter_quick_locked: pmap=%p va=0x%08x mfn=%d prot=0x%x",
2594 pmap, va, pa, prot);
2595 KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva ||
2596 (m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) != 0,
2597 ("pmap_enter_quick_locked: managed mapping within the clean submap"));
2598 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2599 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2602 * In the case that a page table page is not
2603 * resident, we are creating it here.
2605 if (va < VM_MAXUSER_ADDRESS) {
2610 * Calculate pagetable page index
2612 ptepindex = va >> PDRSHIFT;
2613 if (mpte && (mpte->pindex == ptepindex)) {
2617 * Get the page directory entry
2619 ptepa = pmap->pm_pdir[ptepindex];
2622 * If the page table page is mapped, we just increment
2623 * the hold count, and activate it.
2626 ptepa = xpmap_mtop(ptepa);
2628 panic("pmap_enter_quick: unexpected mapping into 4MB page");
2629 mpte = PHYS_TO_VM_PAGE(ptepa);
2632 mpte = _pmap_allocpte(pmap, ptepindex,
2643 * This call to vtopte makes the assumption that we are
2644 * entering the page into the current pmap. In order to support
2645 * quick entry into any pmap, one would likely use pmap_pte_quick.
2646 * But that isn't as quick as vtopte.
2658 * Enter on the PV list if part of our managed memory.
2660 if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0 &&
2661 !pmap_try_insert_pv_entry(pmap, va, m)) {
2664 if (pmap_unwire_pte_hold(pmap, mpte, &free)) {
2665 pmap_invalidate_page(pmap, va);
2666 pmap_free_zero_pages(free);
2675 * Increment counters
2677 pmap->pm_stats.resident_count++;
2679 pa = VM_PAGE_TO_PHYS(m);
2682 * Now validate mapping with RO protection
2685 if (m->flags & (PG_FICTITIOUS|PG_UNMANAGED))
2686 PT_SET_VA(pte, pa | PG_V | PG_U, TRUE);
2688 PT_SET_VA(pte, pa | PG_V | PG_U | PG_MANAGED, TRUE);
2690 if (m->flags & (PG_FICTITIOUS|PG_UNMANAGED))
2691 pte_store(pte, pa | PG_V | PG_U);
2693 pte_store(pte, pa | PG_V | PG_U | PG_MANAGED);
2699 * Make a temporary mapping for a physical address. This is only intended
2700 * to be used for panic dumps.
2703 pmap_kenter_temporary(vm_paddr_t pa, int i)
2707 va = (vm_offset_t)crashdumpmap + (i * PAGE_SIZE);
2708 pmap_kenter(va, pa);
2710 return ((void *)crashdumpmap);
2714 * This code maps large physical mmap regions into the
2715 * processor address space. Note that some shortcuts
2716 * are taken, but the code works.
2719 pmap_object_init_pt(pmap_t pmap, vm_offset_t addr,
2720 vm_object_t object, vm_pindex_t pindex,
2726 "pmap_object_init_pt: pmap=%p addr=0x%08x object=%p pindex=%d size=%d",
2727 pmap, addr, object, pindex, size);
2728 VM_OBJECT_LOCK_ASSERT(object, MA_OWNED);
2729 KASSERT(object->type == OBJT_DEVICE,
2730 ("pmap_object_init_pt: non-device object"));
2732 ((addr & (NBPDR - 1)) == 0) && ((size & (NBPDR - 1)) == 0)) {
2735 unsigned int ptepindex;
2740 if (pmap->pm_pdir[ptepindex = (addr >> PDRSHIFT)])
2744 p = vm_page_lookup(object, pindex);
2746 vm_page_lock_queues();
2747 if (vm_page_sleep_if_busy(p, FALSE, "init4p"))
2750 p = vm_page_alloc(object, pindex, VM_ALLOC_NORMAL);
2755 if (vm_pager_get_pages(object, m, 1, 0) != VM_PAGER_OK) {
2756 vm_page_lock_queues();
2758 vm_page_unlock_queues();
2762 p = vm_page_lookup(object, pindex);
2763 vm_page_lock_queues();
2766 vm_page_unlock_queues();
2769 ptepa = VM_PAGE_TO_PHYS(p);
2770 if (ptepa & (NBPDR - 1))
2773 p->valid = VM_PAGE_BITS_ALL;
2776 pmap->pm_stats.resident_count += size >> PAGE_SHIFT;
2777 npdes = size >> PDRSHIFT;
2779 for (i = 0; i < npdes; i++) {
2781 int flags = PG_U | PG_RW | PG_V | PG_PS;
2783 int flags = PG_U | PG_V | PG_PS;
2785 pde_store(&pmap->pm_pdir[ptepindex],
2790 pmap_invalidate_all(pmap);
2798 * Routine: pmap_change_wiring
2799 * Function: Change the wiring attribute for a map/virtual-address
2801 * In/out conditions:
2802 * The mapping must already exist in the pmap.
2805 pmap_change_wiring(pmap, va, wired)
2806 register pmap_t pmap;
2810 register pt_entry_t *pte;
2812 vm_page_lock_queues();
2814 pte = pmap_pte(pmap, va);
2816 if (wired && !pmap_pte_w(pte)) {
2817 PT_SET_VA_MA((pte), *(pte) | PG_W, TRUE);
2818 pmap->pm_stats.wired_count++;
2819 } else if (!wired && pmap_pte_w(pte)) {
2820 PT_SET_VA_MA((pte), *(pte) & ~PG_W, TRUE);
2821 pmap->pm_stats.wired_count--;
2825 * Wiring is not a hardware characteristic so there is no need to
2828 pmap_pte_release(pte);
2830 vm_page_unlock_queues();
2836 * Copy the range specified by src_addr/len
2837 * from the source map to the range dst_addr/len
2838 * in the destination map.
2840 * This routine is only advisory and need not do anything.
2844 pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr, vm_size_t len,
2845 vm_offset_t src_addr)
2849 vm_offset_t end_addr = src_addr + len;
2852 if (dst_addr != src_addr)
2855 if (!pmap_is_current(src_pmap))
2859 "pmap_copy: dst_pmap=%p src_pmap=%p dst_addr=0x%x len=%d src_addr=0x%x",
2860 dst_pmap, src_pmap, dst_addr, len, src_addr);
2862 vm_page_lock_queues();
2863 if (dst_pmap < src_pmap) {
2864 PMAP_LOCK(dst_pmap);
2865 PMAP_LOCK(src_pmap);
2867 PMAP_LOCK(src_pmap);
2868 PMAP_LOCK(dst_pmap);
2871 for (addr = src_addr; addr < end_addr; addr = pdnxt) {
2872 pt_entry_t *src_pte, *dst_pte;
2873 vm_page_t dstmpte, srcmpte;
2874 pd_entry_t srcptepaddr;
2877 if (addr >= UPT_MIN_ADDRESS)
2878 panic("pmap_copy: invalid to pmap_copy page tables");
2880 pdnxt = (addr + NBPDR) & ~PDRMASK;
2881 ptepindex = addr >> PDRSHIFT;
2883 srcptepaddr = src_pmap->pm_pdir[ptepindex];
2884 if (srcptepaddr == 0)
2887 if (srcptepaddr & PG_PS) {
2888 if (dst_pmap->pm_pdir[ptepindex] == 0) {
2889 dst_pmap->pm_pdir[ptepindex] = srcptepaddr &
2891 dst_pmap->pm_stats.resident_count +=
2897 srcmpte = MACH_TO_VM_PAGE(srcptepaddr);
2898 if (srcmpte->wire_count == 0)
2899 panic("pmap_copy: source page table page is unused");
2901 if (pdnxt > end_addr)
2904 src_pte = vtopte(addr);
2905 while (addr < pdnxt) {
2909 * we only virtual copy managed pages
2911 if ((ptetemp & PG_MANAGED) != 0) {
2912 dstmpte = pmap_allocpte(dst_pmap, addr,
2914 if (dstmpte == NULL)
2916 dst_pte = pmap_pte_quick(dst_pmap, addr);
2917 if (*dst_pte == 0 &&
2918 pmap_try_insert_pv_entry(dst_pmap, addr,
2919 MACH_TO_VM_PAGE(ptetemp & PG_FRAME))) {
2921 * Clear the wired, modified, and
2922 * accessed (referenced) bits
2925 PT_SET_VA_MA(dst_pte, ptetemp & ~(PG_W | PG_M |
2927 dst_pmap->pm_stats.resident_count++;
2930 if (pmap_unwire_pte_hold( dst_pmap,
2932 pmap_invalidate_page(dst_pmap,
2934 pmap_free_zero_pages(free);
2937 if (dstmpte->wire_count >= srcmpte->wire_count)
2945 vm_page_unlock_queues();
2946 PMAP_UNLOCK(src_pmap);
2947 PMAP_UNLOCK(dst_pmap);
2951 * pmap_zero_page zeros the specified hardware page by mapping
2952 * the page into KVM and using bzero to clear its contents.
2955 pmap_zero_page(vm_page_t m)
2957 struct sysmaps *sysmaps;
2959 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)];
2960 mtx_lock(&sysmaps->lock);
2961 if (*sysmaps->CMAP2)
2962 panic("pmap_zero_page: CMAP2 busy");
2965 PT_SET_MA(sysmaps->CADDR2, PG_V | PG_RW | xpmap_ptom(VM_PAGE_TO_PHYS(m)) | PG_A | PG_M);
2967 *sysmaps->CMAP2 = PG_V | PG_RW | VM_PAGE_TO_PHYS(m) | PG_A | PG_M;
2969 invlcaddr(sysmaps->CADDR2);
2970 pagezero(sysmaps->CADDR2);
2972 PT_SET_MA(sysmaps->CADDR2, 0);
2974 *sysmaps->CMAP2 = 0;
2977 mtx_unlock(&sysmaps->lock);
2981 * pmap_zero_page_area zeros the specified hardware page by mapping
2982 * the page into KVM and using bzero to clear its contents.
2984 * off and size may not cover an area beyond a single hardware page.
2987 pmap_zero_page_area(vm_page_t m, int off, int size)
2989 struct sysmaps *sysmaps;
2991 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)];
2992 mtx_lock(&sysmaps->lock);
2993 if (*sysmaps->CMAP2)
2994 panic("pmap_zero_page: CMAP2 busy");
2997 PT_SET_MA(sysmaps->CADDR2, PG_V | PG_RW | xpmap_ptom(VM_PAGE_TO_PHYS(m)) | PG_A | PG_M);
2999 *sysmaps->CMAP2 = PG_V | PG_RW | VM_PAGE_TO_PHYS(m) | PG_A | PG_M;
3001 invlcaddr(sysmaps->CADDR2);
3002 if (off == 0 && size == PAGE_SIZE)
3003 pagezero(sysmaps->CADDR2);
3005 bzero((char *)sysmaps->CADDR2 + off, size);
3007 PT_SET_MA(sysmaps->CADDR2, 0);
3009 *sysmaps->CMAP2 = 0;
3012 mtx_unlock(&sysmaps->lock);
3016 * pmap_zero_page_idle zeros the specified hardware page by mapping
3017 * the page into KVM and using bzero to clear its contents. This
3018 * is intended to be called from the vm_pagezero process only and
3022 pmap_zero_page_idle(vm_page_t m)
3026 panic("pmap_zero_page: CMAP3 busy");
3029 PT_SET_MA(CADDR3, PG_V | PG_RW | xpmap_ptom(VM_PAGE_TO_PHYS(m)) | PG_A | PG_M);
3031 *CMAP3 = PG_V | PG_RW | VM_PAGE_TO_PHYS(m) | PG_A | PG_M;
3036 PT_SET_MA(CADDR3, 0);
3044 * pmap_copy_page copies the specified (machine independent)
3045 * page by mapping the page into virtual memory and using
3046 * bcopy to copy the page, one machine dependent page at a
3050 pmap_copy_page(vm_page_t src, vm_page_t dst)
3052 struct sysmaps *sysmaps;
3054 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)];
3055 mtx_lock(&sysmaps->lock);
3056 if (*sysmaps->CMAP1)
3057 panic("pmap_copy_page: CMAP1 busy");
3058 if (*sysmaps->CMAP2)
3059 panic("pmap_copy_page: CMAP2 busy");
3061 invlpg((u_int)sysmaps->CADDR1);
3062 invlpg((u_int)sysmaps->CADDR2);
3064 PT_SET_MA(sysmaps->CADDR1, PG_V | xpmap_ptom(VM_PAGE_TO_PHYS(src)) | PG_A);
3065 PT_SET_MA(sysmaps->CADDR2, PG_V | PG_RW | xpmap_ptom(VM_PAGE_TO_PHYS(dst)) | PG_A | PG_M);
3068 *sysmaps->CMAP1 = PG_V | VM_PAGE_TO_PHYS(src) | PG_A;
3069 *sysmaps->CMAP2 = PG_V | PG_RW | VM_PAGE_TO_PHYS(dst) | PG_A | PG_M;
3071 bcopy(sysmaps->CADDR1, sysmaps->CADDR2, PAGE_SIZE);
3073 PT_SET_MA(sysmaps->CADDR1, 0);
3074 PT_SET_MA(sysmaps->CADDR2, 0);
3076 *sysmaps->CMAP1 = 0;
3077 *sysmaps->CMAP2 = 0;
3080 mtx_unlock(&sysmaps->lock);
3084 * Returns true if the pmap's pv is one of the first
3085 * 16 pvs linked to from this page. This count may
3086 * be changed upwards or downwards in the future; it
3087 * is only necessary that true be returned for a small
3088 * subset of pmaps for proper page aging.
3091 pmap_page_exists_quick(pmap, m)
3098 if (m->flags & PG_FICTITIOUS)
3101 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
3102 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
3103 if (pv->pv_pmap == pmap) {
3113 #define PMAP_REMOVE_PAGES_CURPROC_ONLY
3115 * Remove all pages from specified address space
3116 * this aids process exit speeds. Also, this code
3117 * is special cased for current process only, but
3118 * can have the more generic (and slightly slower)
3119 * mode enabled. This is much faster than pmap_remove
3120 * in the case of running down an entire address space.
3123 pmap_remove_pages(pmap, sva, eva)
3125 vm_offset_t sva, eva;
3127 pt_entry_t *pte, tpte;
3128 vm_page_t m, free = NULL;
3131 CTR1(KTR_PMAP, "pmap_remove_pages: pmap=%p", pmap);
3132 #ifdef PMAP_REMOVE_PAGES_CURPROC_ONLY
3133 if (pmap != vmspace_pmap(curthread->td_proc->p_vmspace)) {
3134 printf("warning: pmap_remove_pages called with non-current pmap\n");
3138 vm_page_lock_queues();
3139 KASSERT(pmap_is_current(pmap), ("removing pages from non-current pmap"));
3142 for (pv = TAILQ_FIRST(&pmap->pm_pvlist); pv; pv = npv) {
3144 if (pv->pv_va >= eva || pv->pv_va < sva) {
3145 npv = TAILQ_NEXT(pv, pv_plist);
3149 #ifdef PMAP_REMOVE_PAGES_CURPROC_ONLY
3150 pte = vtopte(pv->pv_va);
3152 pte = pmap_pte_quick(pmap, pv->pv_va);
3154 tpte = *pte ? xpmap_mtop(*pte) : 0;
3157 printf("TPTE at %p IS ZERO @ VA %08x\n",
3163 * We cannot remove wired pages from a process' mapping at this time
3166 npv = TAILQ_NEXT(pv, pv_plist);
3170 m = PHYS_TO_VM_PAGE(tpte);
3171 KASSERT(m->phys_addr == (tpte & PG_FRAME),
3172 ("vm_page_t %p phys_addr mismatch %016jx %016jx",
3173 m, (uintmax_t)m->phys_addr, (uintmax_t)tpte));
3175 KASSERT(m < &vm_page_array[vm_page_array_size],
3176 ("pmap_remove_pages: bad tpte %#jx", (uintmax_t)tpte));
3178 pmap->pm_stats.resident_count--;
3181 PT_SET_VA_MA(pte, 0, FALSE);
3186 * Update the vm_page_t clean and reference bits.
3192 npv = TAILQ_NEXT(pv, pv_plist);
3193 TAILQ_REMOVE(&pmap->pm_pvlist, pv, pv_plist);
3195 m->md.pv_list_count--;
3196 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
3197 if (TAILQ_EMPTY(&m->md.pv_list))
3198 vm_page_flag_clear(m, PG_WRITEABLE);
3200 pmap_unuse_pt(pmap, pv->pv_va, &free);
3205 pmap_invalidate_all(pmap);
3206 pmap_free_zero_pages(free);
3207 vm_page_unlock_queues();
3214 * Return whether or not the specified physical page was modified
3215 * in any physical maps.
3218 pmap_is_modified(vm_page_t m)
3225 if (m->flags & PG_FICTITIOUS)
3229 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
3230 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
3231 PMAP_LOCK(pv->pv_pmap);
3232 pte = pmap_pte_quick(pv->pv_pmap, pv->pv_va);
3233 rv = (*pte & PG_M) != 0;
3234 PMAP_UNLOCK(pv->pv_pmap);
3243 * pmap_is_prefaultable:
3245 * Return whether or not the specified virtual address is elgible
3249 pmap_is_prefaultable(pmap_t pmap, vm_offset_t addr)
3257 * disable prefaulting to start off
3262 if (*pmap_pde(pmap, addr)) {
3272 pmap_map_readonly(pmap_t pmap, vm_offset_t va, int len)
3274 int i, npages = round_page(len) >> PAGE_SHIFT;
3275 for (i = 0; i < npages; i++) {
3277 pte = pmap_pte(pmap, (vm_offset_t)(va + i*PAGE_SIZE));
3278 pte_store(pte, xpmap_mtop(*pte & ~(PG_RW|PG_M)));
3279 PMAP_MARK_PRIV(xpmap_mtop(*pte));
3280 pmap_pte_release(pte);
3285 pmap_map_readwrite(pmap_t pmap, vm_offset_t va, int len)
3287 int i, npages = round_page(len) >> PAGE_SHIFT;
3288 for (i = 0; i < npages; i++) {
3290 pte = pmap_pte(pmap, (vm_offset_t)(va + i*PAGE_SIZE));
3291 PMAP_MARK_UNPRIV(xpmap_mtop(*pte));
3292 pte_store(pte, xpmap_mtop(*pte) | (PG_RW|PG_M));
3293 pmap_pte_release(pte);
3298 * Clear the given bit in each of the given page's ptes. The bit is
3299 * expressed as a 32-bit mask. Consequently, if the pte is 64 bits in
3300 * size, only a bit within the least significant 32 can be cleared.
3302 static __inline void
3303 pmap_clear_ptes(vm_page_t m, int bit)
3305 register pv_entry_t pv;
3306 pt_entry_t pbits, *pte;
3308 if ((m->flags & PG_FICTITIOUS) ||
3309 (bit == PG_RW && (m->flags & PG_WRITEABLE) == 0))
3313 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
3315 * Loop over all current mappings setting/clearing as appropos If
3316 * setting RO do we need to clear the VAC?
3318 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
3319 PMAP_LOCK(pv->pv_pmap);
3320 pte = pmap_pte_quick(pv->pv_pmap, pv->pv_va);
3326 * Regardless of whether a pte is 32 or 64 bits
3327 * in size, PG_RW and PG_M are among the least
3328 * significant 32 bits.
3331 PT_SET_VA_MA(pte, (pbits & ~(PG_RW|PG_M)), TRUE);
3332 if (*pte != (pbits & ~(PG_RW|PG_M)))
3335 if (!atomic_cmpset_int((u_int *)pte, pbits,
3336 pbits & ~(PG_RW | PG_M)))
3344 PT_SET_VA_MA(pte, pbits & ~bit, TRUE);
3346 atomic_clear_int((u_int *)pte, bit);
3349 pmap_invalidate_page(pv->pv_pmap, pv->pv_va);
3351 PMAP_UNLOCK(pv->pv_pmap);
3354 vm_page_flag_clear(m, PG_WRITEABLE);
3359 * pmap_page_protect:
3361 * Lower the permission for all mappings to a given page.
3364 pmap_page_protect(vm_page_t m, vm_prot_t prot)
3366 if ((prot & VM_PROT_WRITE) == 0) {
3367 if (prot & (VM_PROT_READ | VM_PROT_EXECUTE)) {
3368 pmap_clear_ptes(m, PG_RW);
3376 * pmap_ts_referenced:
3378 * Return a count of reference bits for a page, clearing those bits.
3379 * It is not necessary for every reference bit to be cleared, but it
3380 * is necessary that 0 only be returned when there are truly no
3381 * reference bits set.
3383 * XXX: The exact number of bits to check and clear is a matter that
3384 * should be tested and standardized at some point in the future for
3385 * optimal aging of shared pages.
3388 pmap_ts_referenced(vm_page_t m)
3390 register pv_entry_t pv, pvf, pvn;
3395 if (m->flags & PG_FICTITIOUS)
3399 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
3400 if ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) {
3405 pvn = TAILQ_NEXT(pv, pv_list);
3407 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
3409 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list);
3411 PMAP_LOCK(pv->pv_pmap);
3412 pte = pmap_pte_quick(pv->pv_pmap, pv->pv_va);
3414 if (pte && ((v = *pte) & PG_A) != 0) {
3416 PT_SET_VA_MA(pte, *pte & ~PG_A, FALSE);
3418 atomic_clear_int((u_int *)pte, PG_A);
3420 pmap_invalidate_page(pv->pv_pmap, pv->pv_va);
3424 PMAP_UNLOCK(pv->pv_pmap);
3428 PMAP_UNLOCK(pv->pv_pmap);
3429 } while ((pv = pvn) != NULL && pv != pvf);
3438 * Clear the modify bits on the specified physical page.
3441 pmap_clear_modify(vm_page_t m)
3443 pmap_clear_ptes(m, PG_M);
3447 * pmap_clear_reference:
3449 * Clear the reference bit on the specified physical page.
3452 pmap_clear_reference(vm_page_t m)
3454 pmap_clear_ptes(m, PG_A);
3458 * Miscellaneous support routines follow
3462 * Map a set of physical memory pages into the kernel virtual
3463 * address space. Return a pointer to where it is mapped. This
3464 * routine is intended to be used for mapping device memory,
3468 pmap_mapdev_attr(vm_paddr_t pa, vm_size_t size, int mode)
3470 vm_offset_t va, tmpva, offset;
3472 offset = pa & PAGE_MASK;
3473 size = roundup(offset + size, PAGE_SIZE);
3476 if (pa < KERNLOAD && pa + size <= KERNLOAD)
3479 va = kmem_alloc_nofault(kernel_map, size);
3481 panic("pmap_mapdev: Couldn't alloc kernel virtual memory");
3483 for (tmpva = va; size > 0; ) {
3484 pmap_kenter_attr(tmpva, pa, mode);
3489 pmap_invalidate_range(kernel_pmap, va, tmpva);
3490 pmap_invalidate_cache();
3491 return ((void *)(va + offset));
3495 pmap_mapdev(vm_paddr_t pa, vm_size_t size)
3498 return (pmap_mapdev_attr(pa, size, PAT_UNCACHEABLE));
3502 pmap_mapbios(vm_paddr_t pa, vm_size_t size)
3505 return (pmap_mapdev_attr(pa, size, PAT_WRITE_BACK));
3509 pmap_unmapdev(va, size)
3513 vm_offset_t base, offset, tmpva;
3515 if (va >= KERNBASE && va + size <= KERNBASE + KERNLOAD)
3517 base = va & PG_FRAME;
3518 offset = va & PAGE_MASK;
3519 size = roundup(offset + size, PAGE_SIZE);
3521 for (tmpva = base; tmpva < (base + size); tmpva += PAGE_SIZE)
3522 pmap_kremove(tmpva);
3523 pmap_invalidate_range(kernel_pmap, va, tmpva);
3525 kmem_free(kernel_map, base, size);
3529 pmap_change_attr(va, size, mode)
3534 vm_offset_t base, offset, tmpva;
3536 vm_paddr_t opte, npte;
3539 base = va & PG_FRAME;
3540 offset = va & PAGE_MASK;
3541 size = roundup(offset + size, PAGE_SIZE);
3543 /* Only supported on kernel virtual addresses. */
3544 if (base <= VM_MAXUSER_ADDRESS)
3547 /* 4MB pages and pages that aren't mapped aren't supported. */
3548 for (tmpva = base; tmpva < (base + size); tmpva += PAGE_SIZE) {
3549 pde = pmap_pde(kernel_pmap, tmpva);
3560 * Ok, all the pages exist and are 4k, so run through them updating
3563 for (tmpva = base; size > 0; ) {
3564 pte = vtopte(tmpva);
3567 * The cache mode bits are all in the low 32-bits of the
3568 * PTE, so we can just spin on updating the low 32-bits.
3572 npte = opte & ~(PG_PTE_PAT | PG_NC_PCD | PG_NC_PWT);
3573 npte |= pmap_cache_bits(mode, 0);
3575 PT_SET_VA_MA(pte, npte, TRUE);
3579 while (npte != opte && (*pte != npte));
3581 while (npte != opte &&
3582 !atomic_cmpset_int((u_int *)pte, opte, npte));
3589 * Flush CPU caches to make sure any data isn't cached that shouldn't
3592 pmap_invalidate_range(kernel_pmap, base, tmpva);
3593 pmap_invalidate_cache();
3598 * perform the pmap work for mincore
3601 pmap_mincore(pmap, addr)
3605 pt_entry_t *ptep, pte;
3610 ptep = pmap_pte(pmap, addr);
3611 pte = (ptep != NULL) ? PT_GET(ptep) : 0;
3612 pmap_pte_release(ptep);
3618 val = MINCORE_INCORE;
3619 if ((pte & PG_MANAGED) == 0)
3622 pa = pte & PG_FRAME;
3624 m = PHYS_TO_VM_PAGE(pa);
3630 val |= MINCORE_MODIFIED|MINCORE_MODIFIED_OTHER;
3633 * Modified by someone else
3635 vm_page_lock_queues();
3636 if (m->dirty || pmap_is_modified(m))
3637 val |= MINCORE_MODIFIED_OTHER;
3638 vm_page_unlock_queues();
3644 val |= MINCORE_REFERENCED|MINCORE_REFERENCED_OTHER;
3647 * Referenced by someone else
3649 vm_page_lock_queues();
3650 if ((m->flags & PG_REFERENCED) ||
3651 pmap_ts_referenced(m)) {
3652 val |= MINCORE_REFERENCED_OTHER;
3653 vm_page_flag_set(m, PG_REFERENCED);
3655 vm_page_unlock_queues();
3662 pmap_activate(struct thread *td)
3664 pmap_t pmap, oldpmap;
3668 pmap = vmspace_pmap(td->td_proc->p_vmspace);
3669 oldpmap = PCPU_GET(curpmap);
3671 atomic_clear_int(&oldpmap->pm_active, PCPU_GET(cpumask));
3672 atomic_set_int(&pmap->pm_active, PCPU_GET(cpumask));
3674 oldpmap->pm_active &= ~1;
3675 pmap->pm_active |= 1;
3678 cr3 = vtophys(pmap->pm_pdpt);
3680 cr3 = vtophys(pmap->pm_pdir);
3683 * pmap_activate is for the current thread on the current cpu
3685 td->td_pcb->pcb_cr3 = cr3;
3688 PCPU_SET(curpmap, pmap);
3693 pmap_addr_hint(vm_object_t obj, vm_offset_t addr, vm_size_t size)
3696 if ((obj == NULL) || (size < NBPDR) || (obj->type != OBJT_DEVICE)) {
3700 addr = (addr + PDRMASK) & ~PDRMASK;
3705 #if defined(PMAP_DEBUG)
3706 pmap_pid_dump(int pid)
3713 sx_slock(&allproc_lock);
3714 FOREACH_PROC_IN_SYSTEM(p) {
3715 if (p->p_pid != pid)
3721 pmap = vmspace_pmap(p->p_vmspace);
3722 for (i = 0; i < NPDEPTD; i++) {
3725 vm_offset_t base = i << PDRSHIFT;
3727 pde = &pmap->pm_pdir[i];
3728 if (pde && pmap_pde_v(pde)) {
3729 for (j = 0; j < NPTEPG; j++) {
3730 vm_offset_t va = base + (j << PAGE_SHIFT);
3731 if (va >= (vm_offset_t) VM_MIN_KERNEL_ADDRESS) {
3736 sx_sunlock(&allproc_lock);
3739 pte = pmap_pte(pmap, va);
3740 if (pte && pmap_pte_v(pte)) {
3744 m = PHYS_TO_VM_PAGE(pa);
3745 printf("va: 0x%x, pt: 0x%x, h: %d, w: %d, f: 0x%x",
3746 va, pa, m->hold_count, m->wire_count, m->flags);
3761 sx_sunlock(&allproc_lock);
3768 static void pads(pmap_t pm);
3769 void pmap_pvdump(vm_paddr_t pa);
3771 /* print address space of pmap*/
3779 if (pm == kernel_pmap)
3781 for (i = 0; i < NPDEPTD; i++)
3783 for (j = 0; j < NPTEPG; j++) {
3784 va = (i << PDRSHIFT) + (j << PAGE_SHIFT);
3785 if (pm == kernel_pmap && va < KERNBASE)
3787 if (pm != kernel_pmap && va > UPT_MAX_ADDRESS)
3789 ptep = pmap_pte(pm, va);
3790 if (pmap_pte_v(ptep))
3791 printf("%x:%x ", va, *ptep);
3797 pmap_pvdump(vm_paddr_t pa)
3802 printf("pa %x", pa);
3803 m = PHYS_TO_VM_PAGE(pa);
3804 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
3805 printf(" -> pmap %p, va %x", (void *)pv->pv_pmap, pv->pv_va);