1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/i2c/i2c-mt65xx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MediaTek I2C controller
10 This driver interfaces with the native I2C controller present in
11 various MediaTek SoCs.
14 - $ref: /schemas/i2c/i2c-controller.yaml#
17 - Qii Wang <qii.wang@mediatek.com>
22 - const: mediatek,mt2712-i2c
23 - const: mediatek,mt6577-i2c
24 - const: mediatek,mt6589-i2c
25 - const: mediatek,mt7622-i2c
26 - const: mediatek,mt7981-i2c
27 - const: mediatek,mt7986-i2c
28 - const: mediatek,mt8168-i2c
29 - const: mediatek,mt8173-i2c
30 - const: mediatek,mt8183-i2c
31 - const: mediatek,mt8186-i2c
32 - const: mediatek,mt8188-i2c
33 - const: mediatek,mt8192-i2c
38 - const: mediatek,mt2712-i2c
44 - const: mediatek,mt6577-i2c
48 - const: mediatek,mt8168-i2c
52 - const: mediatek,mt8173-i2c
56 - const: mediatek,mt8192-i2c
60 - description: Physical base address
61 - description: DMA base address
69 - description: Main clock for I2C bus
70 - description: Clock for I2C via DMA
71 - description: Bus arbitrator clock
72 - description: Clock for I2C from PMIC
83 $ref: /schemas/types.yaml#/definitions/uint32
84 description: Frequency divider of clock source in I2C module
89 SCL frequency to use (in Hz). If omitted, 100kHz is used.
92 description: Platform controls I2C from PMIC side
95 mediatek,use-push-pull:
96 description: Use push-pull mode I/O config
100 description: Phandle to the regulator providing power to SCL/SDA
110 unevaluatedProperties: false
114 #include <dt-bindings/interrupt-controller/arm-gic.h>
115 #include <dt-bindings/interrupt-controller/irq.h>
118 compatible = "mediatek,mt6577-i2c";
119 reg = <0x1100d000 0x70>, <0x11000300 0x80>;
120 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_LOW>;
121 clocks = <&i2c0_ck>, <&ap_dma_ck>;
122 clock-names = "main", "dma";
124 clock-frequency = <400000>;
127 #address-cells = <1>;