Bindings/net/qca,ar803x.yaml

   1 # SPDX-License-Identifier: GPL-2.0+
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/net/qca,ar803x.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Qualcomm Atheros AR803x PHY
   8
   9 maintainers:
  10   - Andrew Lunn <andrew@lunn.ch>
  11   - Florian Fainelli <f.fainelli@gmail.com>
  12   - Heiner Kallweit <hkallweit1@gmail.com>
  13
  14 description: |
  15   Bindings for Qualcomm Atheros AR803x PHYs
  16
  17 allOf:
  18   - $ref: ethernet-phy.yaml#
  19
  20 properties:
  21   qca,clk-out-frequency:
  22     description: Clock output frequency in Hertz.
  23     $ref: /schemas/types.yaml#/definitions/uint32
  24     enum: [25000000, 50000000, 62500000, 125000000]
  25
  26   qca,clk-out-strength:
  27     description: Clock output driver strength.
  28     $ref: /schemas/types.yaml#/definitions/uint32
  29     enum: [0, 1, 2]
  30
  31   qca,keep-pll-enabled:
  32     description: |
  33       If set, keep the PLL enabled even if there is no link. Useful if you
  34       want to use the clock output without an ethernet link.
  35
  36       Only supported on the AR8031.
  37     type: boolean
  38
  39   vddio-supply:
  40     description: |
  41       RGMII I/O voltage regulator (see regulator/regulator.yaml).
  42
  43       The PHY supports RGMII I/O voltages of 1.5V, 1.8V and 2.5V. You can
  44       either connect this to the vddio-regulator (1.5V / 1.8V) or the
  45       vddh-regulator (2.5V).
  46
  47       Only supported on the AR8031.
  48
  49   vddio-regulator:
  50     type: object
  51     description:
  52       Initial data for the VDDIO regulator. Set this to 1.5V or 1.8V.
  53     $ref: /schemas/regulator/regulator.yaml
  54
  55   vddh-regulator:
  56     type: object
  57     description:
  58       Dummy subnode to model the external connection of the PHY VDDH
  59       regulator to VDDIO.
  60     $ref: /schemas/regulator/regulator.yaml
  61
  62 examples:
  63   - |
  64     #include <dt-bindings/net/qca-ar803x.h>
  65
  66     ethernet {
  67         #address-cells = <1>;
  68         #size-cells = <0>;
  69
  70         phy-mode = "rgmii-id";
  71
  72         ethernet-phy@0 {
  73             reg = <0>;
  74
  75             qca,clk-out-frequency = <125000000>;
  76             qca,clk-out-strength = <AR803X_STRENGTH_FULL>;
  77
  78             vddio-supply = <&vddio>;
  79
  80             vddio: vddio-regulator {
  81                 regulator-min-microvolt = <1800000>;
  82                 regulator-max-microvolt = <1800000>;
  83             };
  84         };
  85     };
  86   - |
  87     #include <dt-bindings/net/qca-ar803x.h>
  88
  89     ethernet {
  90         #address-cells = <1>;
  91         #size-cells = <0>;
  92
  93         phy-mode = "rgmii-id";
  94
  95         ethernet-phy@0 {
  96             reg = <0>;
  97
  98             qca,clk-out-frequency = <50000000>;
  99             qca,keep-pll-enabled;
 100
 101             vddio-supply = <&vddh>;
 102
 103             vddh: vddh-regulator {
 104             };
 105         };
 106     };