Bindings/pci/brcm,stb-pcie.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/pci/brcm,stb-pcie.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Brcmstb PCIe Host Controller Device Tree Bindings
   8
   9 maintainers:
  10   - Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
  11
  12 allOf:
  13   - $ref: /schemas/pci/pci-bus.yaml#
  14
  15 properties:
  16   compatible:
  17     const: brcm,bcm2711-pcie # The Raspberry Pi 4
  18
  19   reg:
  20     maxItems: 1
  21
  22   interrupts:
  23     minItems: 1
  24     maxItems: 2
  25     items:
  26       - description: PCIe host controller
  27       - description: builtin MSI controller
  28
  29   interrupt-names:
  30     minItems: 1
  31     maxItems: 2
  32     items:
  33       - const: pcie
  34       - const: msi
  35
  36   ranges:
  37     maxItems: 1
  38
  39   dma-ranges:
  40     maxItems: 1
  41
  42   clocks:
  43     maxItems: 1
  44
  45   clock-names:
  46     items:
  47       - const: sw_pcie
  48
  49   msi-controller:
  50     description: Identifies the node as an MSI controller.
  51
  52   msi-parent:
  53     description: MSI controller the device is capable of using.
  54
  55   brcm,enable-ssc:
  56     description: Indicates usage of spread-spectrum clocking.
  57     type: boolean
  58
  59   aspm-no-l0s: true
  60
  61 required:
  62   - reg
  63   - dma-ranges
  64   - "#interrupt-cells"
  65   - interrupts
  66   - interrupt-names
  67   - interrupt-map-mask
  68   - interrupt-map
  69   - msi-controller
  70
  71 unevaluatedProperties: false
  72
  73 examples:
  74   - |
  75     #include <dt-bindings/interrupt-controller/irq.h>
  76     #include <dt-bindings/interrupt-controller/arm-gic.h>
  77
  78     scb {
  79             #address-cells = <2>;
  80             #size-cells = <1>;
  81             pcie0: pcie@7d500000 {
  82                     compatible = "brcm,bcm2711-pcie";
  83                     reg = <0x0 0x7d500000 0x9310>;
  84                     device_type = "pci";
  85                     #address-cells = <3>;
  86                     #size-cells = <2>;
  87                     #interrupt-cells = <1>;
  88                     interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
  89                                  <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
  90                     interrupt-names = "pcie", "msi";
  91                     interrupt-map-mask = <0x0 0x0 0x0 0x7>;
  92                     interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
  93                     msi-parent = <&pcie0>;
  94                     msi-controller;
  95                     ranges = <0x02000000 0x0 0xf8000000 0x6 0x00000000 0x0 0x04000000>;
  96                     dma-ranges = <0x02000000 0x0 0x00000000 0x0 0x00000000 0x0 0x80000000>;
  97                     brcm,enable-ssc;
  98             };
  99     };