1 Qualcomm PMIC GPIO block
3 This binding describes the GPIO block(s) found in the 8xxx series of
9 Definition: must be one of:
27 And must contain either "qcom,spmi-gpio" or "qcom,ssbi-gpio"
28 if the device is on an spmi bus or an ssbi bus respectively
32 Value type: <prop-encoded-array>
33 Definition: Register base of the GPIO block and length.
37 Value type: <prop-encoded-array>
38 Definition: Must contain an array of encoded interrupt specifiers for
44 Definition: Mark the device node as a GPIO controller
49 Definition: Must be 2;
50 the first cell will be used to define gpio number and the
51 second denotes the flags for this gpio
53 Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for
54 a general description of GPIO and interrupt bindings.
56 Please refer to pinctrl-bindings.txt in this directory for details of the
57 common pinctrl bindings used by client devices, including the meaning of the
58 phrase "pin configuration node".
60 The pin configuration nodes act as a container for an arbitrary number of
61 subnodes. Each of these subnodes represents some desired configuration for a
62 pin or a list of pins. This configuration can include the
63 mux function to select on those pin(s), and various pin configuration
64 parameters, as listed below.
69 The name of each subnode is not important; all subnodes should be enumerated
70 and processed purely based on their content.
72 Each subnode only affects those parameters that are explicitly listed. In
73 other words, a subnode that lists a mux function but no pin configuration
74 parameters implies no information about any pin configuration parameters.
75 Similarly, a pin subnode that describes a pullup parameter implies no
76 information about e.g. the mux function.
78 The following generic properties as defined in pinctrl-bindings.txt are valid
79 to specify in a pin configuration subnode:
83 Value type: <string-array>
84 Definition: List of gpio pins affected by the properties specified in
85 this subnode. Valid pins are:
86 gpio1-gpio4 for pm8005
87 gpio1-gpio6 for pm8018
88 gpio1-gpio12 for pm8038
89 gpio1-gpio40 for pm8058
90 gpio1-gpio4 for pm8916
91 gpio1-gpio38 for pm8917
92 gpio1-gpio44 for pm8921
93 gpio1-gpio36 for pm8941
94 gpio1-gpio22 for pm8994
95 gpio1-gpio26 for pm8998
96 gpio1-gpio22 for pma8084
97 gpio1-gpio10 for pmi8994
98 gpio1-gpio12 for pms405 (holes on gpio1, gpio9 and gpio10)
99 gpio1-gpio10 for pm8150 (holes on gpio2, gpio5, gpio7
101 gpio1-gpio12 for pm8150b (holes on gpio3, gpio4, gpio7)
102 gpio1-gpio12 for pm8150l (hole on gpio7)
107 Definition: Specify the alternative function to be configured for the
108 specified pins. Valid values are:
117 And following values are supported by LV/MV GPIO subtypes:
124 Definition: The specified pins should be configured as no pull.
129 Definition: The specified pins should be configured as pull down.
134 Definition: The specified pins should be configured as pull up.
136 - qcom,pull-up-strength:
139 Definition: Specifies the strength to use for pull up, if selected.
140 Valid values are; as defined in
141 <dt-bindings/pinctrl/qcom,pmic-gpio.h>:
142 1: 30uA (PMIC_GPIO_PULL_UP_30)
143 2: 1.5uA (PMIC_GPIO_PULL_UP_1P5)
144 3: 31.5uA (PMIC_GPIO_PULL_UP_31P5)
145 4: 1.5uA + 30uA boost (PMIC_GPIO_PULL_UP_1P5_30)
146 If this property is omitted 30uA strength will be used if
149 - bias-high-impedance:
152 Definition: The specified pins will put in high-Z mode and disabled.
157 Definition: The specified pins are put in input mode.
162 Definition: The specified pins are configured in output mode, driven
168 Definition: The specified pins are configured in output mode, driven
174 Definition: Selects the power source for the specified pins. Valid
175 power sources are defined per chip in
176 <dt-bindings/pinctrl/qcom,pmic-gpio.h>
178 - qcom,drive-strength:
181 Definition: Selects the drive strength for the specified pins. Value
183 0: no (PMIC_GPIO_STRENGTH_NO)
184 1: high (PMIC_GPIO_STRENGTH_HIGH) 0.9mA @ 1.8V - 1.9mA @ 2.6V
185 2: medium (PMIC_GPIO_STRENGTH_MED) 0.6mA @ 1.8V - 1.25mA @ 2.6V
186 3: low (PMIC_GPIO_STRENGTH_LOW) 0.15mA @ 1.8V - 0.3mA @ 2.6V
187 as defined in <dt-bindings/pinctrl/qcom,pmic-gpio.h>
192 Definition: The specified pins are configured in push-pull mode.
197 Definition: The specified pins are configured in open-drain mode.
202 Definition: The specified pins are configured in open-source mode.
207 Definition: The specified pins are configured in analog-pass-through mode.
212 Definition: Selects ATEST rail to route to GPIO when it's configured
213 in analog-pass-through mode.
214 Valid values are 1-4 corresponding to ATEST1 to ATEST4.
219 Definition: Selects DTEST rail to route to GPIO when it's configured
221 Valid values are 1-4 corresponding to DTEST1 to DTEST4.
225 pm8921_gpio: gpio@150 {
226 compatible = "qcom,pm8921-gpio", "qcom,ssbi-gpio";
228 interrupts = <192 1>, <193 1>, <194 1>,
229 <195 1>, <196 1>, <197 1>,
230 <198 1>, <199 1>, <200 1>,
231 <201 1>, <202 1>, <203 1>,
232 <204 1>, <205 1>, <206 1>,
233 <207 1>, <208 1>, <209 1>,
234 <210 1>, <211 1>, <212 1>,
235 <213 1>, <214 1>, <215 1>,
236 <216 1>, <217 1>, <218 1>,
237 <219 1>, <220 1>, <221 1>,
238 <222 1>, <223 1>, <224 1>,
239 <225 1>, <226 1>, <227 1>,
240 <228 1>, <229 1>, <230 1>,
241 <231 1>, <232 1>, <233 1>,
247 pm8921_gpio_keys: gpio-keys {
249 pins = "gpio20", "gpio21";
255 qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
256 power-source = <PM8921_GPIO_S4>;