Bindings/serial/renesas,scif.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: "http://devicetree.org/schemas/serial/renesas,scif.yaml#"
   5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
   6
   7 title: Renesas Serial Communication Interface with FIFO (SCIF)
   8
   9 maintainers:
  10   - Geert Uytterhoeven <geert+renesas@glider.be>
  11
  12 allOf:
  13   - $ref: serial.yaml#
  14
  15 properties:
  16   compatible:
  17     oneOf:
  18       - items:
  19           - enum:
  20               - renesas,scif-r7s72100     # RZ/A1H
  21           - const: renesas,scif           # generic SCIF compatible UART
  22
  23       - items:
  24           - enum:
  25               - renesas,scif-r7s9210      # RZ/A2
  26
  27       - items:
  28           - enum:
  29               - renesas,scif-r8a7778      # R-Car M1
  30               - renesas,scif-r8a7779      # R-Car H1
  31           - const: renesas,rcar-gen1-scif # R-Car Gen1
  32           - const: renesas,scif           # generic SCIF compatible UART
  33
  34       - items:
  35           - enum:
  36               - renesas,scif-r8a7742      # RZ/G1H
  37               - renesas,scif-r8a7743      # RZ/G1M
  38               - renesas,scif-r8a7744      # RZ/G1N
  39               - renesas,scif-r8a7745      # RZ/G1E
  40               - renesas,scif-r8a77470     # RZ/G1C
  41               - renesas,scif-r8a7790      # R-Car H2
  42               - renesas,scif-r8a7791      # R-Car M2-W
  43               - renesas,scif-r8a7792      # R-Car V2H
  44               - renesas,scif-r8a7793      # R-Car M2-N
  45               - renesas,scif-r8a7794      # R-Car E2
  46           - const: renesas,rcar-gen2-scif # R-Car Gen2 and RZ/G1
  47           - const: renesas,scif           # generic SCIF compatible UART
  48
  49       - items:
  50           - enum:
  51               - renesas,scif-r8a774a1     # RZ/G2M
  52               - renesas,scif-r8a774b1     # RZ/G2N
  53               - renesas,scif-r8a774c0     # RZ/G2E
  54               - renesas,scif-r8a774e1     # RZ/G2H
  55               - renesas,scif-r8a7795      # R-Car H3
  56               - renesas,scif-r8a7796      # R-Car M3-W
  57               - renesas,scif-r8a77961     # R-Car M3-W+
  58               - renesas,scif-r8a77965     # R-Car M3-N
  59               - renesas,scif-r8a77970     # R-Car V3M
  60               - renesas,scif-r8a77980     # R-Car V3H
  61               - renesas,scif-r8a77990     # R-Car E3
  62               - renesas,scif-r8a77995     # R-Car D3
  63           - const: renesas,rcar-gen3-scif # R-Car Gen3 and RZ/G2
  64           - const: renesas,scif           # generic SCIF compatible UART
  65
  66       - items:
  67           - enum:
  68               - renesas,scif-r8a779a0     # R-Car V3U
  69               - renesas,scif-r8a779f0     # R-Car S4-8
  70               - renesas,scif-r8a779g0     # R-Car V4H
  71           - const: renesas,rcar-gen4-scif # R-Car Gen4
  72           - const: renesas,scif           # generic SCIF compatible UART
  73
  74       - items:
  75           - enum:
  76               - renesas,scif-r9a07g044      # RZ/G2{L,LC}
  77
  78       - items:
  79           - enum:
  80               - renesas,scif-r9a07g043      # RZ/G2UL and RZ/Five
  81               - renesas,scif-r9a07g054      # RZ/V2L
  82           - const: renesas,scif-r9a07g044   # RZ/G2{L,LC} fallback
  83
  84   reg:
  85     maxItems: 1
  86
  87   interrupts:
  88     oneOf:
  89       - items:
  90           - description: A combined interrupt
  91       - items:
  92           - description: Error interrupt
  93           - description: Receive buffer full interrupt
  94           - description: Transmit buffer empty interrupt
  95           - description: Transmit End interrupt
  96       - items:
  97           - description: Error interrupt
  98           - description: Receive buffer full interrupt
  99           - description: Transmit buffer empty interrupt
 100           - description: Break interrupt
 101           - description: Data Ready interrupt
 102           - description: Transmit End interrupt
 103
 104   interrupt-names:
 105     oneOf:
 106       - items:
 107           - const: eri
 108           - const: rxi
 109           - const: txi
 110           - const: tei
 111       - items:
 112           - const: eri
 113           - const: rxi
 114           - const: txi
 115           - const: bri
 116           - const: dri
 117           - const: tei
 118
 119   clocks:
 120     minItems: 1
 121     maxItems: 4
 122
 123   clock-names:
 124     minItems: 1
 125     maxItems: 4
 126     items:
 127       enum:
 128         - fck # UART functional clock
 129         - sck # optional external clock input
 130         - brg_int # optional internal clock source for BRG frequency divider
 131         - scif_clk # optional external clock source for BRG frequency divider
 132
 133   power-domains:
 134     maxItems: 1
 135
 136   resets:
 137     maxItems: 1
 138
 139   dmas:
 140     minItems: 2
 141     maxItems: 4
 142     description:
 143       Must contain a list of pairs of references to DMA specifiers, one for
 144       transmission, and one for reception.
 145
 146   dma-names:
 147     minItems: 2
 148     maxItems: 4
 149     items:
 150       enum:
 151         - tx
 152         - rx
 153
 154 required:
 155   - compatible
 156   - reg
 157   - interrupts
 158   - clocks
 159   - clock-names
 160   - power-domains
 161
 162 if:
 163   properties:
 164     compatible:
 165       contains:
 166         enum:
 167           - renesas,rcar-gen2-scif
 168           - renesas,rcar-gen3-scif
 169           - renesas,rcar-gen4-scif
 170           - renesas,scif-r9a07g044
 171 then:
 172   required:
 173     - resets
 174
 175 unevaluatedProperties: false
 176
 177 examples:
 178   - |
 179     #include <dt-bindings/clock/r8a7791-cpg-mssr.h>
 180     #include <dt-bindings/interrupt-controller/arm-gic.h>
 181     #include <dt-bindings/power/r8a7791-sysc.h>
 182     aliases {
 183             serial0 = &scif0;
 184     };
 185
 186     scif0: serial@e6e60000 {
 187             compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif",
 188                          "renesas,scif";
 189             reg = <0xe6e60000 64>;
 190             interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
 191             clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
 192                      <&scif_clk>;
 193             clock-names = "fck", "brg_int", "scif_clk";
 194             dmas = <&dmac0 0x29>, <&dmac0 0x2a>, <&dmac1 0x29>, <&dmac1 0x2a>;
 195             dma-names = "tx", "rx", "tx", "rx";
 196             power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
 197             resets = <&cpg 721>;
 198     };