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1 # SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 # Copyright 2019 Linaro Ltd.
3 %YAML 1.2
4 ---
5 $id: http://devicetree.org/schemas/thermal/qcom-tsens.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
7
8 title: QCOM SoC Temperature Sensor (TSENS)
9
10 maintainers:
11   - Amit Kucheria <amitk@kernel.org>
12
13 description: |
14   QCOM SoCs have TSENS IP to allow temperature measurement. There are currently
15   three distinct major versions of the IP that is supported by a single driver.
16   The IP versions are named v0.1, v1 and v2 in the driver, where v0.1 captures
17   everything before v1 when there was no versioning information.
18
19 properties:
20   compatible:
21     oneOf:
22       - description: msm8960 TSENS based
23         items:
24           - enum:
25               - qcom,ipq8064-tsens
26               - qcom,msm8960-tsens
27
28       - description: v0.1 of TSENS
29         items:
30           - enum:
31               - qcom,mdm9607-tsens
32               - qcom,msm8916-tsens
33               - qcom,msm8939-tsens
34               - qcom,msm8974-tsens
35           - const: qcom,tsens-v0_1
36
37       - description: v1 of TSENS
38         items:
39           - enum:
40               - qcom,msm8956-tsens
41               - qcom,msm8976-tsens
42               - qcom,qcs404-tsens
43           - const: qcom,tsens-v1
44
45       - description: v2 of TSENS
46         items:
47           - enum:
48               - qcom,msm8953-tsens
49               - qcom,msm8996-tsens
50               - qcom,msm8998-tsens
51               - qcom,sc7180-tsens
52               - qcom,sc7280-tsens
53               - qcom,sc8180x-tsens
54               - qcom,sc8280xp-tsens
55               - qcom,sdm630-tsens
56               - qcom,sdm845-tsens
57               - qcom,sm6115-tsens
58               - qcom,sm6350-tsens
59               - qcom,sm8150-tsens
60               - qcom,sm8250-tsens
61               - qcom,sm8350-tsens
62               - qcom,sm8450-tsens
63               - qcom,sm8550-tsens
64           - const: qcom,tsens-v2
65
66       - description: v2 of TSENS with combined interrupt
67         enum:
68           - qcom,ipq8074-tsens
69
70   reg:
71     items:
72       - description: TM registers
73       - description: SROT registers
74
75   interrupts:
76     minItems: 1
77     maxItems: 2
78
79   interrupt-names:
80     minItems: 1
81     maxItems: 2
82
83   nvmem-cells:
84     oneOf:
85       - minItems: 1
86         maxItems: 2
87         description:
88           Reference to an nvmem node for the calibration data
89       - minItems: 5
90         maxItems: 35
91         description: |
92           Reference to nvmem cells for the calibration mode, two calibration
93           bases and two cells per each sensor
94         # special case for msm8974 / apq8084
95       - maxItems: 51
96         description: |
97           Reference to nvmem cells for the calibration mode, two calibration
98           bases and two cells per each sensor, main and backup copies, plus use_backup cell
99
100   nvmem-cell-names:
101     oneOf:
102       - minItems: 1
103         items:
104           - const: calib
105           - enum:
106               - calib_backup
107               - calib_sel
108       - minItems: 5
109         items:
110           - const: mode
111           - const: base1
112           - const: base2
113           - pattern: '^s[0-9]+_p1$'
114           - pattern: '^s[0-9]+_p2$'
115           - pattern: '^s[0-9]+_p1$'
116           - pattern: '^s[0-9]+_p2$'
117           - pattern: '^s[0-9]+_p1$'
118           - pattern: '^s[0-9]+_p2$'
119           - pattern: '^s[0-9]+_p1$'
120           - pattern: '^s[0-9]+_p2$'
121           - pattern: '^s[0-9]+_p1$'
122           - pattern: '^s[0-9]+_p2$'
123           - pattern: '^s[0-9]+_p1$'
124           - pattern: '^s[0-9]+_p2$'
125           - pattern: '^s[0-9]+_p1$'
126           - pattern: '^s[0-9]+_p2$'
127           - pattern: '^s[0-9]+_p1$'
128           - pattern: '^s[0-9]+_p2$'
129           - pattern: '^s[0-9]+_p1$'
130           - pattern: '^s[0-9]+_p2$'
131           - pattern: '^s[0-9]+_p1$'
132           - pattern: '^s[0-9]+_p2$'
133           - pattern: '^s[0-9]+_p1$'
134           - pattern: '^s[0-9]+_p2$'
135           - pattern: '^s[0-9]+_p1$'
136           - pattern: '^s[0-9]+_p2$'
137           - pattern: '^s[0-9]+_p1$'
138           - pattern: '^s[0-9]+_p2$'
139           - pattern: '^s[0-9]+_p1$'
140           - pattern: '^s[0-9]+_p2$'
141           - pattern: '^s[0-9]+_p1$'
142           - pattern: '^s[0-9]+_p2$'
143           - pattern: '^s[0-9]+_p1$'
144           - pattern: '^s[0-9]+_p2$'
145         # special case for msm8974 / apq8084
146       - items:
147           - const: mode
148           - const: base1
149           - const: base2
150           - const: use_backup
151           - const: mode_backup
152           - const: base1_backup
153           - const: base2_backup
154           - const: s0_p1
155           - const: s0_p2
156           - const: s1_p1
157           - const: s1_p2
158           - const: s2_p1
159           - const: s2_p2
160           - const: s3_p1
161           - const: s3_p2
162           - const: s4_p1
163           - const: s4_p2
164           - const: s5_p1
165           - const: s5_p2
166           - const: s6_p1
167           - const: s6_p2
168           - const: s7_p1
169           - const: s7_p2
170           - const: s8_p1
171           - const: s8_p2
172           - const: s9_p1
173           - const: s9_p2
174           - const: s10_p1
175           - const: s10_p2
176           - const: s0_p1_backup
177           - const: s0_p2_backup
178           - const: s1_p1_backup
179           - const: s1_p2_backup
180           - const: s2_p1_backup
181           - const: s2_p2_backup
182           - const: s3_p1_backup
183           - const: s3_p2_backup
184           - const: s4_p1_backup
185           - const: s4_p2_backup
186           - const: s5_p1_backup
187           - const: s5_p2_backup
188           - const: s6_p1_backup
189           - const: s6_p2_backup
190           - const: s7_p1_backup
191           - const: s7_p2_backup
192           - const: s8_p1_backup
193           - const: s8_p2_backup
194           - const: s9_p1_backup
195           - const: s9_p2_backup
196           - const: s10_p1_backup
197           - const: s10_p2_backup
198
199   "#qcom,sensors":
200     description:
201       Number of sensors enabled on this platform
202     $ref: /schemas/types.yaml#/definitions/uint32
203     minimum: 1
204     maximum: 16
205
206   "#thermal-sensor-cells":
207     const: 1
208     description:
209       Number of cells required to uniquely identify the thermal sensors. Since
210       we have multiple sensors this is set to 1
211
212 required:
213   - compatible
214   - interrupts
215   - interrupt-names
216   - "#thermal-sensor-cells"
217   - "#qcom,sensors"
218
219 allOf:
220   - if:
221       properties:
222         compatible:
223           contains:
224             enum:
225               - qcom,ipq8064-tsens
226               - qcom,mdm9607-tsens
227               - qcom,msm8916-tsens
228               - qcom,msm8960-tsens
229               - qcom,msm8974-tsens
230               - qcom,msm8976-tsens
231               - qcom,qcs404-tsens
232               - qcom,tsens-v0_1
233               - qcom,tsens-v1
234     then:
235       properties:
236         interrupts:
237           items:
238             - description: Combined interrupt if upper or lower threshold crossed
239         interrupt-names:
240           items:
241             - const: uplow
242
243   - if:
244       properties:
245         compatible:
246           contains:
247             enum:
248               - qcom,msm8953-tsens
249               - qcom,msm8996-tsens
250               - qcom,msm8998-tsens
251               - qcom,sc7180-tsens
252               - qcom,sc7280-tsens
253               - qcom,sc8180x-tsens
254               - qcom,sc8280xp-tsens
255               - qcom,sdm630-tsens
256               - qcom,sdm845-tsens
257               - qcom,sm6350-tsens
258               - qcom,sm8150-tsens
259               - qcom,sm8250-tsens
260               - qcom,sm8350-tsens
261               - qcom,sm8450-tsens
262               - qcom,tsens-v2
263     then:
264       properties:
265         interrupts:
266           items:
267             - description: Combined interrupt if upper or lower threshold crossed
268             - description: Interrupt if critical threshold crossed
269         interrupt-names:
270           items:
271             - const: uplow
272             - const: critical
273
274   - if:
275       properties:
276         compatible:
277           contains:
278             enum:
279               - qcom,ipq8074-tsens
280     then:
281       properties:
282         interrupts:
283           items:
284             - description: Combined interrupt if upper, lower or critical thresholds crossed
285         interrupt-names:
286           items:
287             - const: combined
288
289   - if:
290       properties:
291         compatible:
292           contains:
293             enum:
294               - qcom,ipq8074-tsens
295               - qcom,tsens-v0_1
296               - qcom,tsens-v1
297               - qcom,tsens-v2
298
299     then:
300       required:
301         - reg
302
303 additionalProperties: false
304
305 examples:
306   - |
307     #include <dt-bindings/interrupt-controller/arm-gic.h>
308     // Example msm9860 based SoC (ipq8064):
309     gcc: clock-controller {
310
311            /* ... */
312
313            tsens: thermal-sensor {
314                 compatible = "qcom,ipq8064-tsens";
315
316                  nvmem-cells = <&tsens_calib>, <&tsens_calib_backup>;
317                  nvmem-cell-names = "calib", "calib_backup";
318                  interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
319                  interrupt-names = "uplow";
320
321                  #qcom,sensors = <11>;
322                  #thermal-sensor-cells = <1>;
323           };
324     };
325
326   - |
327     #include <dt-bindings/interrupt-controller/arm-gic.h>
328     // Example 1 (new calbiration data: for pre v1 IP):
329     thermal-sensor@4a9000 {
330         compatible = "qcom,msm8916-tsens", "qcom,tsens-v0_1";
331         reg = <0x4a9000 0x1000>, /* TM */
332               <0x4a8000 0x1000>; /* SROT */
333
334         nvmem-cells = <&tsens_mode>,
335                       <&tsens_base1>, <&tsens_base2>,
336                       <&tsens_s0_p1>, <&tsens_s0_p2>,
337                       <&tsens_s1_p1>, <&tsens_s1_p2>,
338                       <&tsens_s2_p1>, <&tsens_s2_p2>,
339                       <&tsens_s4_p1>, <&tsens_s4_p2>,
340                       <&tsens_s5_p1>, <&tsens_s5_p2>;
341         nvmem-cell-names = "mode",
342                            "base1", "base2",
343                            "s0_p1", "s0_p2",
344                            "s1_p1", "s1_p2",
345                            "s2_p1", "s2_p2",
346                            "s4_p1", "s4_p2",
347                            "s5_p1", "s5_p2";
348
349         interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
350         interrupt-names = "uplow";
351
352         #qcom,sensors = <5>;
353         #thermal-sensor-cells = <1>;
354     };
355
356   - |
357     #include <dt-bindings/interrupt-controller/arm-gic.h>
358     // Example 1 (legacy: for pre v1 IP):
359     tsens1: thermal-sensor@4a9000 {
360            compatible = "qcom,msm8916-tsens", "qcom,tsens-v0_1";
361            reg = <0x4a9000 0x1000>, /* TM */
362                  <0x4a8000 0x1000>; /* SROT */
363
364            nvmem-cells = <&tsens_caldata>, <&tsens_calsel>;
365            nvmem-cell-names = "calib", "calib_sel";
366
367            interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
368            interrupt-names = "uplow";
369
370            #qcom,sensors = <5>;
371            #thermal-sensor-cells = <1>;
372     };
373
374   - |
375     #include <dt-bindings/interrupt-controller/arm-gic.h>
376     // Example 2 (for any platform containing v1 of the TSENS IP):
377     tsens2: thermal-sensor@4a9000 {
378           compatible = "qcom,qcs404-tsens", "qcom,tsens-v1";
379           reg = <0x004a9000 0x1000>, /* TM */
380                 <0x004a8000 0x1000>; /* SROT */
381
382           nvmem-cells = <&tsens_caldata>;
383           nvmem-cell-names = "calib";
384
385           interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>;
386           interrupt-names = "uplow";
387
388           #qcom,sensors = <10>;
389           #thermal-sensor-cells = <1>;
390     };
391
392   - |
393     #include <dt-bindings/interrupt-controller/arm-gic.h>
394     // Example 3 (for any platform containing v2 of the TSENS IP):
395     tsens3: thermal-sensor@c263000 {
396            compatible = "qcom,sdm845-tsens", "qcom,tsens-v2";
397            reg = <0xc263000 0x1ff>,
398                  <0xc222000 0x1ff>;
399
400            interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>,
401                         <GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH>;
402            interrupt-names = "uplow", "critical";
403
404            #qcom,sensors = <13>;
405            #thermal-sensor-cells = <1>;
406     };
407
408   - |
409     #include <dt-bindings/interrupt-controller/arm-gic.h>
410     // Example 4 (for any IPQ8074 based SoC-s):
411     tsens4: thermal-sensor@4a9000 {
412            compatible = "qcom,ipq8074-tsens";
413            reg = <0x4a9000 0x1000>,
414                  <0x4a8000 0x1000>;
415
416            interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
417            interrupt-names = "combined";
418
419            #qcom,sensors = <16>;
420            #thermal-sensor-cells = <1>;
421     };
422 ...