Bindings/timer/renesas,cmt.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/timer/renesas,cmt.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Renesas Compare Match Timer (CMT)
   8
   9 maintainers:
  10   - Geert Uytterhoeven <geert+renesas@glider.be>
  11   - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
  12
  13 description:
  14   The CMT is a multi-channel 16/32/48-bit timer/counter with configurable clock
  15   inputs and programmable compare match.
  16
  17   Channels share hardware resources but their counter and compare match values
  18   are independent. A particular CMT instance can implement only a subset of the
  19   channels supported by the CMT model. Channel indices represent the hardware
  20   position of the channel in the CMT and don't match the channel numbers in the
  21   datasheets.
  22
  23 properties:
  24   compatible:
  25     oneOf:
  26       - items:
  27           - enum:
  28               - renesas,r8a7740-cmt0      # 32-bit CMT0 on R-Mobile A1
  29               - renesas,r8a7740-cmt1      # 48-bit CMT1 on R-Mobile A1
  30               - renesas,r8a7740-cmt2      # 32-bit CMT2 on R-Mobile A1
  31               - renesas,r8a7740-cmt3      # 32-bit CMT3 on R-Mobile A1
  32               - renesas,r8a7740-cmt4      # 32-bit CMT4 on R-Mobile A1
  33               - renesas,sh73a0-cmt0       # 32-bit CMT0 on SH-Mobile AG5
  34               - renesas,sh73a0-cmt1       # 48-bit CMT1 on SH-Mobile AG5
  35               - renesas,sh73a0-cmt2       # 32-bit CMT2 on SH-Mobile AG5
  36               - renesas,sh73a0-cmt3       # 32-bit CMT3 on SH-Mobile AG5
  37               - renesas,sh73a0-cmt4       # 32-bit CMT4 on SH-Mobile AG5
  38
  39       - items:
  40           - enum:
  41               - renesas,r8a73a4-cmt0      # 32-bit CMT0 on R-Mobile APE6
  42               - renesas,r8a7743-cmt0      # 32-bit CMT0 on RZ/G1M
  43               - renesas,r8a7744-cmt0      # 32-bit CMT0 on RZ/G1N
  44               - renesas,r8a7745-cmt0      # 32-bit CMT0 on RZ/G1E
  45               - renesas,r8a77470-cmt0     # 32-bit CMT0 on RZ/G1C
  46               - renesas,r8a7790-cmt0      # 32-bit CMT0 on R-Car H2
  47               - renesas,r8a7791-cmt0      # 32-bit CMT0 on R-Car M2-W
  48               - renesas,r8a7792-cmt0      # 32-bit CMT0 on R-Car V2H
  49               - renesas,r8a7793-cmt0      # 32-bit CMT0 on R-Car M2-N
  50               - renesas,r8a7794-cmt0      # 32-bit CMT0 on R-Car E2
  51           - const: renesas,rcar-gen2-cmt0 # 32-bit CMT0 on R-Mobile APE6, R-Car Gen2 and RZ/G1
  52
  53       - items:
  54           - enum:
  55               - renesas,r8a73a4-cmt1      # 48-bit CMT1 on R-Mobile APE6
  56               - renesas,r8a7743-cmt1      # 48-bit CMT1 on RZ/G1M
  57               - renesas,r8a7744-cmt1      # 48-bit CMT1 on RZ/G1N
  58               - renesas,r8a7745-cmt1      # 48-bit CMT1 on RZ/G1E
  59               - renesas,r8a77470-cmt1     # 48-bit CMT1 on RZ/G1C
  60               - renesas,r8a7790-cmt1      # 48-bit CMT1 on R-Car H2
  61               - renesas,r8a7791-cmt1      # 48-bit CMT1 on R-Car M2-W
  62               - renesas,r8a7792-cmt1      # 48-bit CMT1 on R-Car V2H
  63               - renesas,r8a7793-cmt1      # 48-bit CMT1 on R-Car M2-N
  64               - renesas,r8a7794-cmt1      # 48-bit CMT1 on R-Car E2
  65           - const: renesas,rcar-gen2-cmt1 # 48-bit CMT1 on R-Mobile APE6, R-Car Gen2 and RZ/G1
  66
  67       - items:
  68           - enum:
  69               - renesas,r8a774a1-cmt0     # 32-bit CMT0 on RZ/G2M
  70               - renesas,r8a774b1-cmt0     # 32-bit CMT0 on RZ/G2N
  71               - renesas,r8a774c0-cmt0     # 32-bit CMT0 on RZ/G2E
  72               - renesas,r8a7795-cmt0      # 32-bit CMT0 on R-Car H3
  73               - renesas,r8a7796-cmt0      # 32-bit CMT0 on R-Car M3-W
  74               - renesas,r8a77965-cmt0     # 32-bit CMT0 on R-Car M3-N
  75               - renesas,r8a77970-cmt0     # 32-bit CMT0 on R-Car V3M
  76               - renesas,r8a77980-cmt0     # 32-bit CMT0 on R-Car V3H
  77               - renesas,r8a77990-cmt0     # 32-bit CMT0 on R-Car E3
  78               - renesas,r8a77995-cmt0     # 32-bit CMT0 on R-Car D3
  79           - const: renesas,rcar-gen3-cmt0 # 32-bit CMT0 on R-Car Gen3 and RZ/G2
  80
  81       - items:
  82           - enum:
  83               - renesas,r8a774a1-cmt1     # 48-bit CMT on RZ/G2M
  84               - renesas,r8a774b1-cmt1     # 48-bit CMT on RZ/G2N
  85               - renesas,r8a774c0-cmt1     # 48-bit CMT on RZ/G2E
  86               - renesas,r8a7795-cmt1      # 48-bit CMT on R-Car H3
  87               - renesas,r8a7796-cmt1      # 48-bit CMT on R-Car M3-W
  88               - renesas,r8a77965-cmt1     # 48-bit CMT on R-Car M3-N
  89               - renesas,r8a77970-cmt1     # 48-bit CMT on R-Car V3M
  90               - renesas,r8a77980-cmt1     # 48-bit CMT on R-Car V3H
  91               - renesas,r8a77990-cmt1     # 48-bit CMT on R-Car E3
  92               - renesas,r8a77995-cmt1     # 48-bit CMT on R-Car D3
  93           - const: renesas,rcar-gen3-cmt1 # 48-bit CMT on R-Car Gen3 and RZ/G2
  94
  95   reg:
  96     maxItems: 1
  97
  98   interrupts:
  99     minItems: 1
 100     maxItems: 8
 101
 102   clocks:
 103     maxItems: 1
 104
 105   clock-names:
 106     const: fck
 107
 108   power-domains:
 109     maxItems: 1
 110
 111   resets:
 112     maxItems: 1
 113
 114 required:
 115   - compatible
 116   - reg
 117   - interrupts
 118   - clocks
 119   - clock-names
 120   - power-domains
 121
 122 allOf:
 123   - if:
 124       properties:
 125         compatible:
 126           contains:
 127             enum:
 128               - renesas,rcar-gen2-cmt0
 129               - renesas,rcar-gen3-cmt0
 130     then:
 131       properties:
 132         interrupts:
 133           minItems: 2
 134           maxItems: 2
 135
 136   - if:
 137       properties:
 138         compatible:
 139           contains:
 140             enum:
 141               - renesas,rcar-gen2-cmt1
 142               - renesas,rcar-gen3-cmt1
 143     then:
 144       properties:
 145         interrupts:
 146           minItems: 8
 147           maxItems: 8
 148
 149 additionalProperties: false
 150
 151 examples:
 152   - |
 153     #include <dt-bindings/clock/r8a7790-cpg-mssr.h>
 154     #include <dt-bindings/interrupt-controller/arm-gic.h>
 155     #include <dt-bindings/power/r8a7790-sysc.h>
 156     cmt0: timer@ffca0000 {
 157             compatible = "renesas,r8a7790-cmt0", "renesas,rcar-gen2-cmt0";
 158             reg = <0xffca0000 0x1004>;
 159             interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
 160                          <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
 161             clocks = <&cpg CPG_MOD 124>;
 162             clock-names = "fck";
 163             power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 164             resets = <&cpg 124>;
 165     };
 166
 167     cmt1: timer@e6130000 {
 168             compatible = "renesas,r8a7790-cmt1", "renesas,rcar-gen2-cmt1";
 169             reg = <0xe6130000 0x1004>;
 170             interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
 171                          <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
 172                          <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
 173                          <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
 174                          <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
 175                          <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
 176                          <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
 177                          <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
 178             clocks = <&cpg CPG_MOD 329>;
 179             clock-names = "fck";
 180             power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 181             resets = <&cpg 329>;
 182     };