2 * Copyright (c) 2017 Thomas Pornin <pornin@bolet.org>
4 * Permission is hereby granted, free of charge, to any person obtaining
5 * a copy of this software and associated documentation files (the
6 * "Software"), to deal in the Software without restriction, including
7 * without limitation the rights to use, copy, modify, merge, publish,
8 * distribute, sublicense, and/or sell copies of the Software, and to
9 * permit persons to whom the Software is furnished to do so, subject to
10 * the following conditions:
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
25 #define BR_ENABLE_INTRINSICS 1
29 * This code contains the AES key schedule implementation using the
37 br_aes_x86ni_supported(void)
40 * Bit mask for features in ECX:
41 * 19 SSE4.1 (used for _mm_insert_epi32(), for AES-CTR)
44 return br_cpuid(0, 0, 0x02080000, 0);
51 expand_step128(__m128i k, __m128i k2)
53 k = _mm_xor_si128(k, _mm_slli_si128(k, 4));
54 k = _mm_xor_si128(k, _mm_slli_si128(k, 4));
55 k = _mm_xor_si128(k, _mm_slli_si128(k, 4));
56 k2 = _mm_shuffle_epi32(k2, 0xFF);
57 return _mm_xor_si128(k, k2);
62 expand_step192(__m128i *t1, __m128i *t2, __m128i *t3)
66 *t2 = _mm_shuffle_epi32(*t2, 0x55);
67 t4 = _mm_slli_si128(*t1, 0x4);
68 *t1 = _mm_xor_si128(*t1, t4);
69 t4 = _mm_slli_si128(t4, 0x4);
70 *t1 = _mm_xor_si128(*t1, t4);
71 t4 = _mm_slli_si128(t4, 0x4);
72 *t1 = _mm_xor_si128(*t1, t4);
73 *t1 = _mm_xor_si128(*t1, *t2);
74 *t2 = _mm_shuffle_epi32(*t1, 0xFF);
75 t4 = _mm_slli_si128(*t3, 0x4);
76 *t3 = _mm_xor_si128(*t3, t4);
77 *t3 = _mm_xor_si128(*t3, *t2);
82 expand_step256_1(__m128i *t1, __m128i *t2)
86 *t2 = _mm_shuffle_epi32(*t2, 0xFF);
87 t4 = _mm_slli_si128(*t1, 0x4);
88 *t1 = _mm_xor_si128(*t1, t4);
89 t4 = _mm_slli_si128(t4, 0x4);
90 *t1 = _mm_xor_si128(*t1, t4);
91 t4 = _mm_slli_si128(t4, 0x4);
92 *t1 = _mm_xor_si128(*t1, t4);
93 *t1 = _mm_xor_si128(*t1, *t2);
98 expand_step256_2(__m128i *t1, __m128i *t3)
102 t4 = _mm_aeskeygenassist_si128(*t1, 0x0);
103 t2 = _mm_shuffle_epi32(t4, 0xAA);
104 t4 = _mm_slli_si128(*t3, 0x4);
105 *t3 = _mm_xor_si128(*t3, t4);
106 t4 = _mm_slli_si128(t4, 0x4);
107 *t3 = _mm_xor_si128(*t3, t4);
108 t4 = _mm_slli_si128(t4, 0x4);
109 *t3 = _mm_xor_si128(*t3, t4);
110 *t3 = _mm_xor_si128(*t3, t2);
114 * Perform key schedule for AES, encryption direction. Subkeys are written
115 * in sk[], and the number of rounds is returned. Key length MUST be 16,
118 BR_TARGET("sse2,aes")
120 x86ni_keysched(__m128i *sk, const void *key, size_t len)
122 const unsigned char *kb;
124 #define KEXP128(k, i, rcon) do { \
125 k = expand_step128(k, _mm_aeskeygenassist_si128(k, rcon)); \
129 #define KEXP192(i, rcon1, rcon2) do { \
132 t2 = _mm_aeskeygenassist_si128(t3, rcon1); \
133 expand_step192(&t1, &t2, &t3); \
134 sk[(i) + 1] = _mm_castpd_si128(_mm_shuffle_pd( \
135 _mm_castsi128_pd(sk[(i) + 1]), \
136 _mm_castsi128_pd(t1), 0)); \
137 sk[(i) + 2] = _mm_castpd_si128(_mm_shuffle_pd( \
138 _mm_castsi128_pd(t1), \
139 _mm_castsi128_pd(t3), 1)); \
140 t2 = _mm_aeskeygenassist_si128(t3, rcon2); \
141 expand_step192(&t1, &t2, &t3); \
144 #define KEXP256(i, rcon) do { \
146 t2 = _mm_aeskeygenassist_si128(t3, rcon); \
147 expand_step256_1(&t1, &t2); \
149 expand_step256_2(&t1, &t3); \
157 t1 = _mm_loadu_si128((const void *)kb);
159 KEXP128(t1, 1, 0x01);
160 KEXP128(t1, 2, 0x02);
161 KEXP128(t1, 3, 0x04);
162 KEXP128(t1, 4, 0x08);
163 KEXP128(t1, 5, 0x10);
164 KEXP128(t1, 6, 0x20);
165 KEXP128(t1, 7, 0x40);
166 KEXP128(t1, 8, 0x80);
167 KEXP128(t1, 9, 0x1B);
168 KEXP128(t1, 10, 0x36);
172 t1 = _mm_loadu_si128((const void *)kb);
173 t3 = _mm_loadu_si128((const void *)(kb + 8));
174 t3 = _mm_shuffle_epi32(t3, 0x4E);
175 KEXP192(0, 0x01, 0x02);
176 KEXP192(3, 0x04, 0x08);
177 KEXP192(6, 0x10, 0x20);
178 KEXP192(9, 0x40, 0x80);
183 t1 = _mm_loadu_si128((const void *)kb);
184 t3 = _mm_loadu_si128((const void *)(kb + 16));
193 t2 = _mm_aeskeygenassist_si128(t3, 0x40);
194 expand_step256_1(&t1, &t2);
208 BR_TARGET("sse2,aes")
210 br_aes_x86ni_keysched_enc(unsigned char *skni, const void *key, size_t len)
215 num_rounds = x86ni_keysched(sk, key, len);
216 memcpy(skni, sk, (num_rounds + 1) << 4);
221 BR_TARGET("sse2,aes")
223 br_aes_x86ni_keysched_dec(unsigned char *skni, const void *key, size_t len)
226 unsigned u, num_rounds;
228 num_rounds = x86ni_keysched(sk, key, len);
229 _mm_storeu_si128((void *)skni, sk[num_rounds]);
230 for (u = 1; u < num_rounds; u ++) {
231 _mm_storeu_si128((void *)(skni + (u << 4)),
232 _mm_aesimc_si128(sk[num_rounds - u]));
234 _mm_storeu_si128((void *)(skni + (num_rounds << 4)), sk[0]);