1 /* spu.c -- Assembler for the IBM Synergistic Processing Unit (SPU)
3 Copyright 2006, 2007 Free Software Foundation, Inc.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
23 #include "safe-ctype.h"
25 #include "dwarf2dbg.h"
27 const struct spu_opcode spu_opcodes[] = {
28 #define APUOP(TAG,MACFORMAT,OPCODE,MNEMONIC,ASMFORMAT,DEP,PIPE) \
29 { MACFORMAT, (OPCODE) << (32-11), MNEMONIC, ASMFORMAT },
30 #define APUOPFB(TAG,MACFORMAT,OPCODE,FB,MNEMONIC,ASMFORMAT,DEP,PIPE) \
31 { MACFORMAT, ((OPCODE) << (32-11)) | ((FB) << (32-18)), MNEMONIC, ASMFORMAT },
32 #include "opcode/spu-insns.h"
37 static const int spu_num_opcodes =
38 sizeof (spu_opcodes) / sizeof (spu_opcodes[0]);
45 expressionS exp[MAX_RELOCS];
46 int reloc_arg[MAX_RELOCS];
51 static const char *get_imm (const char *param, struct spu_insn *insn, int arg);
52 static const char *get_reg (const char *param, struct spu_insn *insn, int arg,
54 static int calcop (struct spu_opcode *format, const char *param,
55 struct spu_insn *insn);
56 static void spu_cons (int);
59 static struct hash_control *op_hash = NULL;
61 /* These bits should be turned off in the first address of every segment */
64 /* These chars start a comment anywhere in a source file (except inside
66 const char comment_chars[] = "#";
68 /* These chars only start a comment at the beginning of a line. */
69 const char line_comment_chars[] = "#";
71 /* gods own line continuation char */
72 const char line_separator_chars[] = ";";
74 /* Chars that can be used to separate mant from exp in floating point nums */
75 const char EXP_CHARS[] = "eE";
77 /* Chars that mean this number is a floating point constant */
79 /* or 0H1.234E-12 (see exp chars above) */
80 const char FLT_CHARS[] = "dDfF";
82 const pseudo_typeS md_pseudo_table[] =
84 {"align", s_align_ptwo, 4},
85 {"bss", s_lcomm_bytes, 1},
87 {"dfloat", float_cons, 'd'},
88 {"ffloat", float_cons, 'f'},
89 {"global", s_globl, 0},
92 {"long", spu_cons, 4},
93 {"quad", spu_cons, 8},
94 {"string", stringer, 1},
95 {"word", spu_cons, 4},
96 /* Force set to be treated as an instruction. */
99 /* Likewise for eqv. */
102 {"file", (void (*) PARAMS ((int))) dwarf2_directive_file, 0 },
103 {"loc", dwarf2_directive_loc, 0},
110 const char *retval = NULL;
113 /* initialize hash table */
115 op_hash = hash_new ();
117 /* loop until you see the end of the list */
119 for (i = 0; i < spu_num_opcodes; i++)
121 /* hash each mnemonic and record its position */
123 retval = hash_insert (op_hash, spu_opcodes[i].mnemonic, (PTR)&spu_opcodes[i]);
125 if (retval != NULL && strcmp (retval, "exists") != 0)
126 as_fatal (_("Can't hash instruction '%s':%s"),
127 spu_opcodes[i].mnemonic, retval);
131 const char *md_shortopts = "";
132 struct option md_longopts[] = {
133 #define OPTION_APUASM (OPTION_MD_BASE)
134 {"apuasm", no_argument, NULL, OPTION_APUASM},
135 #define OPTION_DD2 (OPTION_MD_BASE+1)
136 {"mdd2.0", no_argument, NULL, OPTION_DD2},
137 #define OPTION_DD1 (OPTION_MD_BASE+2)
138 {"mdd1.0", no_argument, NULL, OPTION_DD1},
139 #define OPTION_DD3 (OPTION_MD_BASE+3)
140 {"mdd3.0", no_argument, NULL, OPTION_DD3},
141 { NULL, no_argument, NULL, 0 }
143 size_t md_longopts_size = sizeof (md_longopts);
145 /* When set (by -apuasm) our assembler emulates the behaviour of apuasm.
146 * e.g. don't add bias to float conversion and don't right shift
147 * immediate values. */
148 static int emulate_apuasm;
150 /* Use the dd2.0 instructions set. The only differences are some new
151 * register names and the orx insn */
152 static int use_dd2 = 1;
155 md_parse_option (int c, char *arg ATTRIBUTE_UNUSED)
178 md_show_usage (FILE *stream)
182 --apuasm emulate behaviour of apuasm\n"),
193 bfd_reloc_code_real_type reloc;
196 static struct arg_encode arg_encode[A_MAX] = {
197 { 7, 0, 0, 0, 127, 0, -1, 0 }, /* A_T */
198 { 7, 7, 0, 0, 127, 0, -1, 0 }, /* A_A */
199 { 7, 14, 0, 0, 127, 0, -1, 0 }, /* A_B */
200 { 7, 21, 0, 0, 127, 0, -1, 0 }, /* A_C */
201 { 7, 7, 0, 0, 127, 0, -1, 0 }, /* A_S */
202 { 7, 7, 0, 0, 127, 0, -1, 0 }, /* A_H */
203 { 0, 0, 0, 0, -1, 0, -1, 0 }, /* A_P */
204 { 7, 14, 0, 0, -1, 0, -1, BFD_RELOC_SPU_IMM7 }, /* A_S3 */
205 { 7, 14, 0, -32, 31, -31, 0, BFD_RELOC_SPU_IMM7 }, /* A_S6 */
206 { 7, 14, 0, 0, -1, 0, -1, BFD_RELOC_SPU_IMM7 }, /* A_S7N */
207 { 7, 14, 0, -64, 63, -63, 0, BFD_RELOC_SPU_IMM7 }, /* A_S7 */
208 { 8, 14, 0, 0, 127, 0, -1, BFD_RELOC_SPU_IMM8 }, /* A_U7A */
209 { 8, 14, 0, 0, 127, 0, -1, BFD_RELOC_SPU_IMM8 }, /* A_U7B */
210 { 10, 14, 0, -512, 511, -128, 255, BFD_RELOC_SPU_IMM10 }, /* A_S10B */
211 { 10, 14, 0, -512, 511, 0, -1, BFD_RELOC_SPU_IMM10 }, /* A_S10 */
212 { 2, 23, 9, -1024, 1023, 0, -1, BFD_RELOC_SPU_PCREL9a }, /* A_S11 */
213 { 2, 14, 9, -1024, 1023, 0, -1, BFD_RELOC_SPU_PCREL9b }, /* A_S11I */
214 { 10, 14, 4, -8192, 8191, 0, -1, BFD_RELOC_SPU_IMM10W }, /* A_S14 */
215 { 16, 7, 0, -32768, 32767, 0, -1, BFD_RELOC_SPU_IMM16 }, /* A_S16 */
216 { 16, 7, 2, -131072, 262143, 0, -1, BFD_RELOC_SPU_IMM16W }, /* A_S18 */
217 { 16, 7, 2, -262144, 262143, 0, -1, BFD_RELOC_SPU_PCREL16 }, /* A_R18 */
218 { 7, 14, 0, 0, -1, 0, -1, BFD_RELOC_SPU_IMM7 }, /* A_U3 */
219 { 7, 14, 0, 0, 127, 0, 31, BFD_RELOC_SPU_IMM7 }, /* A_U5 */
220 { 7, 14, 0, 0, 127, 0, 63, BFD_RELOC_SPU_IMM7 }, /* A_U6 */
221 { 7, 14, 0, 0, -1, 0, -1, BFD_RELOC_SPU_IMM7 }, /* A_U7 */
222 { 14, 0, 0, 0, 16383, 0, -1, 0 }, /* A_U14 */
223 { 16, 7, 0, -32768, 65535, 0, -1, BFD_RELOC_SPU_IMM16 }, /* A_X16 */
224 { 18, 7, 0, 0, 262143, 0, -1, BFD_RELOC_SPU_IMM18 }, /* A_U18 */
227 /* Some flags for handling errors. This is very hackish and added after
229 static int syntax_error_arg;
230 static const char *syntax_error_param;
231 static int syntax_reg;
234 insn_fmt_string (struct spu_opcode *format)
240 len += sprintf (&buf[len], "%s\t", format->mnemonic);
241 for (i = 1; i <= format->arg[0]; i++)
243 int arg = format->arg[i];
245 if (i > 1 && arg != A_P && format->arg[i-1] != A_P)
250 exp = i == syntax_error_arg ? "REG" : "reg";
252 exp = i == syntax_error_arg ? "IMM" : "imm";
253 len += sprintf (&buf[len], "%s", exp);
254 if (i > 1 && format->arg[i-1] == A_P)
262 md_assemble (char *op)
264 char *param, *thisfrag;
266 struct spu_opcode *format;
267 struct spu_insn insn;
272 /* skip over instruction to find parameters */
274 for (param = op; *param != 0 && !ISSPACE (*param); param++)
279 if (c != 0 && c != '\n')
282 /* try to find the instruction in the hash table */
284 if ((format = (struct spu_opcode *) hash_find (op_hash, op)) == NULL)
286 as_bad (_("Invalid mnemonic '%s'"), op);
290 if (!use_dd2 && strcmp (format->mnemonic, "orx") == 0)
292 as_bad (_("'%s' is only available in DD2.0 or higher."), op);
298 /* try parsing this instruction into insn */
299 for (i = 0; i < MAX_RELOCS; i++)
301 insn.exp[i].X_add_symbol = 0;
302 insn.exp[i].X_op_symbol = 0;
303 insn.exp[i].X_add_number = 0;
304 insn.exp[i].X_op = O_illegal;
305 insn.reloc_arg[i] = -1;
308 insn.opcode = format->opcode;
309 insn.tag = (enum spu_insns) (format - spu_opcodes);
311 syntax_error_arg = 0;
312 syntax_error_param = 0;
314 if (calcop (format, param, &insn))
317 /* if it doesn't parse try the next instruction */
318 if (!strcmp (format[0].mnemonic, format[1].mnemonic))
322 int parg = format[0].arg[syntax_error_arg-1];
324 as_fatal (_("Error in argument %d. Expecting: \"%s\""),
325 syntax_error_arg - (parg == A_P),
326 insn_fmt_string (format));
332 && ! (insn.tag == M_RDCH
333 || insn.tag == M_RCHCNT
334 || insn.tag == M_WRCH))
335 as_warn (_("Mixing register syntax, with and without '$'."));
336 if (syntax_error_param)
338 const char *d = syntax_error_param;
341 as_warn (_("Treating '%-*s' as a symbol."), (int)(syntax_error_param - d), d);
344 /* grow the current frag and plop in the opcode */
346 thisfrag = frag_more (4);
347 md_number_to_chars (thisfrag, insn.opcode, 4);
349 /* if this instruction requires labels mark it for later */
351 for (i = 0; i < MAX_RELOCS; i++)
352 if (insn.reloc_arg[i] >= 0)
355 bfd_reloc_code_real_type reloc = arg_encode[insn.reloc_arg[i]].reloc;
358 if (reloc == BFD_RELOC_SPU_PCREL9a
359 || reloc == BFD_RELOC_SPU_PCREL9b
360 || reloc == BFD_RELOC_SPU_PCREL16)
362 if (insn.flag[i] == 1)
363 reloc = BFD_RELOC_SPU_HI16;
364 else if (insn.flag[i] == 2)
365 reloc = BFD_RELOC_SPU_LO16;
366 fixP = fix_new_exp (frag_now,
367 thisfrag - frag_now->fr_literal,
372 fixP->tc_fix_data.arg_format = insn.reloc_arg[i];
373 fixP->tc_fix_data.insn_tag = insn.tag;
375 dwarf2_emit_insn (4);
379 calcop (struct spu_opcode *format, const char *param, struct spu_insn *insn)
385 for (i = 1; i <= format->arg[0]; i++)
387 arg = format->arg[i];
388 syntax_error_arg = i;
390 while (ISSPACE (*param))
392 if (*param == 0 || *param == ',')
395 param = get_reg (param, insn, arg, 1);
397 param = get_imm (param, insn, arg);
408 while (ISSPACE (*param))
411 if (arg != A_P && paren)
417 else if (i < format->arg[0]
418 && format->arg[i] != A_P
419 && format->arg[i+1] != A_P)
428 while (ISSPACE (*param))
430 return !paren && (*param == 0 || *param == '\n');
439 #define REG_NAME(NO,NM) { NO, sizeof (NM) - 1, NM }
441 static struct reg_name reg_name[] = {
442 REG_NAME (0, "lr"), /* link register */
443 REG_NAME (1, "sp"), /* stack pointer */
444 REG_NAME (0, "rp"), /* link register */
445 REG_NAME (127, "fp"), /* frame pointer */
448 static struct reg_name sp_reg_name[] = {
451 static struct reg_name ch_reg_name[] = {
452 REG_NAME ( 0, "SPU_RdEventStat"),
453 REG_NAME ( 1, "SPU_WrEventMask"),
454 REG_NAME ( 2, "SPU_WrEventAck"),
455 REG_NAME ( 3, "SPU_RdSigNotify1"),
456 REG_NAME ( 4, "SPU_RdSigNotify2"),
457 REG_NAME ( 7, "SPU_WrDec"),
458 REG_NAME ( 8, "SPU_RdDec"),
459 REG_NAME ( 11, "SPU_RdEventMask"), /* DD2.0 only */
460 REG_NAME ( 13, "SPU_RdMachStat"),
461 REG_NAME ( 14, "SPU_WrSRR0"),
462 REG_NAME ( 15, "SPU_RdSRR0"),
463 REG_NAME ( 28, "SPU_WrOutMbox"),
464 REG_NAME ( 29, "SPU_RdInMbox"),
465 REG_NAME ( 30, "SPU_WrOutIntrMbox"),
466 REG_NAME ( 9, "MFC_WrMSSyncReq"),
467 REG_NAME ( 12, "MFC_RdTagMask"), /* DD2.0 only */
468 REG_NAME ( 16, "MFC_LSA"),
469 REG_NAME ( 17, "MFC_EAH"),
470 REG_NAME ( 18, "MFC_EAL"),
471 REG_NAME ( 19, "MFC_Size"),
472 REG_NAME ( 20, "MFC_TagID"),
473 REG_NAME ( 21, "MFC_Cmd"),
474 REG_NAME ( 22, "MFC_WrTagMask"),
475 REG_NAME ( 23, "MFC_WrTagUpdate"),
476 REG_NAME ( 24, "MFC_RdTagStat"),
477 REG_NAME ( 25, "MFC_RdListStallStat"),
478 REG_NAME ( 26, "MFC_WrListStallAck"),
479 REG_NAME ( 27, "MFC_RdAtomicStat"),
484 get_reg (const char *param, struct spu_insn *insn, int arg, int accept_expr)
495 if (arg == A_H) /* Channel */
497 if ((param[0] == 'c' || param[0] == 'C')
498 && (param[1] == 'h' || param[1] == 'H')
499 && ISDIGIT (param[2]))
502 else if (arg == A_S) /* Special purpose register */
504 if ((param[0] == 's' || param[0] == 'S')
505 && (param[1] == 'p' || param[1] == 'P')
506 && ISDIGIT (param[2]))
510 if (ISDIGIT (*param))
513 while (ISDIGIT (*param))
514 regno = regno * 10 + *param++ - '0';
519 unsigned int i, n, l = 0;
521 if (arg == A_H) /* Channel */
524 n = sizeof (ch_reg_name) / sizeof (*ch_reg_name);
526 else if (arg == A_S) /* Special purpose register */
529 n = sizeof (sp_reg_name) / sizeof (*sp_reg_name);
534 n = sizeof (reg_name) / sizeof (*reg_name);
537 for (i = 0; i < n; i++)
539 && 0 == strncasecmp (param, rn[i].name, rn[i].length))
551 as_bad (_("'SPU_RdEventMask' (channel 11) is only available in DD2.0 or higher."));
552 else if (regno == 12)
553 as_bad (_("'MFC_RdTagMask' (channel 12) is only available in DD2.0 or higher."));
558 insn->opcode |= regno << arg_encode[arg].pos;
559 if ((!saw_prefix && syntax_reg == 1)
560 || (saw_prefix && syntax_reg == 2))
562 syntax_reg |= saw_prefix ? 1 : 2;
570 save_ptr = input_line_pointer;
571 input_line_pointer = (char *)param;
573 param = input_line_pointer;
574 input_line_pointer = save_ptr;
575 if (ex.X_op == O_register || ex.X_op == O_constant)
577 insn->opcode |= ex.X_add_number << arg_encode[arg].pos;
585 get_imm (const char *param, struct spu_insn *insn, int arg)
589 int low = 0, high = 0;
590 int reloc_i = insn->reloc_arg[0] >= 0 ? 1 : 0;
592 if (strncasecmp (param, "%lo(", 4) == 0)
596 as_warn (_("Using old style, %%lo(expr), please change to PPC style, expr@l."));
598 else if (strncasecmp (param, "%hi(", 4) == 0)
602 as_warn (_("Using old style, %%hi(expr), please change to PPC style, expr@h."));
604 else if (strncasecmp (param, "%pic(", 5) == 0)
606 /* Currently we expect %pic(expr) == expr, so do nothing here.
607 i.e. for code loaded at address 0 $toc will be 0. */
613 /* Symbols can start with $, but if this symbol matches a register
614 name, it's probably a mistake. The only way to avoid this
615 warning is to rename the symbol. */
616 struct spu_insn tmp_insn;
617 const char *np = get_reg (param, &tmp_insn, arg, 0);
620 syntax_error_param = np;
623 save_ptr = input_line_pointer;
624 input_line_pointer = (char *) param;
625 expression (&insn->exp[reloc_i]);
626 param = input_line_pointer;
627 input_line_pointer = save_ptr;
629 /* Similar to ppc_elf_suffix in tc-ppc.c. We have so few cases to
630 handle we do it inlined here. */
631 if (param[0] == '@' && !ISALNUM (param[2]) && param[2] != '@')
633 if (param[1] == 'h' || param[1] == 'H')
638 else if (param[1] == 'l' || param[1] == 'L')
645 if (insn->exp[reloc_i].X_op == O_constant)
647 val = insn->exp[reloc_i].X_add_number;
651 /* Convert the value to a format we expect. */
652 val <<= arg_encode[arg].rshift;
655 else if (arg == A_U7B)
664 /* Warn about out of range expressions. */
666 int hi = arg_encode[arg].hi;
667 int lo = arg_encode[arg].lo;
668 int whi = arg_encode[arg].whi;
669 int wlo = arg_encode[arg].wlo;
671 if (hi > lo && (val < lo || val > hi))
672 as_fatal (_("Constant expression %d out of range, [%d, %d]."),
674 else if (whi > wlo && (val < wlo || val > whi))
675 as_warn (_("Constant expression %d out of range, [%d, %d]."),
681 else if (arg == A_U7B)
684 /* Branch hints have a split encoding. Do the bottom part. */
685 if (arg == A_S11 || arg == A_S11I)
686 insn->opcode |= ((val >> 2) & 0x7f);
688 insn->opcode |= (((val >> arg_encode[arg].rshift)
689 & ((1 << arg_encode[arg].size) - 1))
690 << arg_encode[arg].pos);
691 insn->reloc_arg[reloc_i] = -1;
692 insn->flag[reloc_i] = 0;
696 insn->reloc_arg[reloc_i] = arg;
698 insn->flag[reloc_i] = 1;
700 insn->flag[reloc_i] = 2;
706 #define MAX_LITTLENUMS 6
708 /* Turn a string in input_line_pointer into a floating point constant of type
709 type, and store the appropriate bytes in *litP. The number of LITTLENUMS
710 emitted is stored in *sizeP . An error message is returned, or NULL on OK.
713 md_atof (int type, char *litP, int *sizeP)
716 LITTLENUM_TYPE words[MAX_LITTLENUMS];
717 LITTLENUM_TYPE *wordP;
748 return _("Bad call to MD_ATOF()");
750 t = atof_ieee (input_line_pointer, type, words);
752 input_line_pointer = t;
754 *sizeP = prec * sizeof (LITTLENUM_TYPE);
755 for (wordP = words; prec--;)
757 md_number_to_chars (litP, (long) (*wordP++), sizeof (LITTLENUM_TYPE));
758 litP += sizeof (LITTLENUM_TYPE);
763 #ifndef WORKING_DOT_WORD
764 int md_short_jump_size = 4;
767 md_create_short_jump (char *ptr,
768 addressT from_addr ATTRIBUTE_UNUSED,
769 addressT to_addr ATTRIBUTE_UNUSED,
773 ptr[0] = (char) 0xc0;
778 ptr - frag->fr_literal,
783 BFD_RELOC_SPU_PCREL16);
786 int md_long_jump_size = 4;
789 md_create_long_jump (char *ptr,
790 addressT from_addr ATTRIBUTE_UNUSED,
791 addressT to_addr ATTRIBUTE_UNUSED,
795 ptr[0] = (char) 0xc0;
800 ptr - frag->fr_literal,
805 BFD_RELOC_SPU_PCREL16);
809 /* Support @ppu on symbols referenced in .int/.long/.word/.quad. */
811 spu_cons (int nbytes)
815 if (is_it_end_of_statement ())
817 demand_empty_rest_of_line ();
823 deferred_expression (&exp);
824 if ((exp.X_op == O_symbol
825 || exp.X_op == O_constant)
826 && strncasecmp (input_line_pointer, "@ppu", 4) == 0)
828 char *p = frag_more (nbytes);
829 enum bfd_reloc_code_real reloc;
831 /* Check for identifier@suffix+constant. */
832 input_line_pointer += 4;
833 if (*input_line_pointer == '-' || *input_line_pointer == '+')
837 expression (&new_exp);
838 if (new_exp.X_op == O_constant)
839 exp.X_add_number += new_exp.X_add_number;
842 reloc = nbytes == 4 ? BFD_RELOC_SPU_PPU32 : BFD_RELOC_SPU_PPU64;
843 fix_new_exp (frag_now, p - frag_now->fr_literal, nbytes,
847 emit_expr (&exp, nbytes);
849 while (*input_line_pointer++ == ',');
851 /* Put terminator back into stream. */
852 input_line_pointer--;
853 demand_empty_rest_of_line ();
857 md_estimate_size_before_relax (fragS *fragP ATTRIBUTE_UNUSED,
858 segT segment_type ATTRIBUTE_UNUSED)
860 as_fatal (_("Relaxation should never occur"));
864 /* If while processing a fixup, a reloc really needs to be created,
865 then it is done here. */
868 tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
871 reloc = (arelent *) xmalloc (sizeof (arelent));
872 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
874 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
875 else if (fixp->fx_subsy)
876 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_subsy);
879 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
880 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
881 if (reloc->howto == (reloc_howto_type *) NULL)
883 as_bad_where (fixp->fx_file, fixp->fx_line,
884 _("reloc %d not supported by object file format"),
885 (int) fixp->fx_r_type);
888 reloc->addend = fixp->fx_addnumber;
892 /* Round up a section's size to the appropriate boundary. */
895 md_section_align (segT seg, valueT size)
897 int align = bfd_get_section_alignment (stdoutput, seg);
898 valueT mask = ((valueT) 1 << align) - 1;
900 return (size + mask) & ~mask;
903 /* Where a PC relative offset is calculated from. On the spu they
904 are calculated from the beginning of the branch instruction. */
907 md_pcrel_from (fixS *fixp)
909 return fixp->fx_frag->fr_address + fixp->fx_where;
912 /* Fill in rs_align_code fragments. */
915 spu_handle_align (fragS *fragp)
917 static const unsigned char nop_pattern[8] = {
918 0x40, 0x20, 0x00, 0x00, /* even nop */
919 0x00, 0x20, 0x00, 0x00, /* odd nop */
925 if (fragp->fr_type != rs_align_code)
928 bytes = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix;
929 p = fragp->fr_literal + fragp->fr_fix;
937 fragp->fr_fix += fix;
941 memcpy (p, &nop_pattern[4], 4);
947 memcpy (p, nop_pattern, 8);
952 md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
956 char *place = fixP->fx_where + fixP->fx_frag->fr_literal;
958 if (fixP->fx_subsy != (symbolS *) NULL)
960 /* We can't actually support subtracting a symbol. */
961 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
964 if (fixP->fx_addsy != NULL)
968 /* Hack around bfd_install_relocation brain damage. */
969 val += fixP->fx_frag->fr_address + fixP->fx_where;
971 switch (fixP->fx_r_type)
974 fixP->fx_r_type = BFD_RELOC_32_PCREL;
977 case BFD_RELOC_SPU_PCREL16:
978 case BFD_RELOC_SPU_PCREL9a:
979 case BFD_RELOC_SPU_PCREL9b:
980 case BFD_RELOC_32_PCREL:
984 as_bad_where (fixP->fx_file, fixP->fx_line,
985 _("expression too complex"));
991 fixP->fx_addnumber = val;
993 if (fixP->fx_r_type == BFD_RELOC_SPU_PPU32
994 || fixP->fx_r_type == BFD_RELOC_SPU_PPU64)
997 if (fixP->fx_addsy == NULL && fixP->fx_pcrel == 0)
1001 if (fixP->tc_fix_data.arg_format > A_P)
1003 int hi = arg_encode[fixP->tc_fix_data.arg_format].hi;
1004 int lo = arg_encode[fixP->tc_fix_data.arg_format].lo;
1005 if (hi > lo && ((offsetT) val < lo || (offsetT) val > hi))
1006 as_bad_where (fixP->fx_file, fixP->fx_line,
1007 "Relocation doesn't fit. (relocation value = 0x%lx)",
1011 switch (fixP->fx_r_type)
1014 md_number_to_chars (place, val, 1);
1018 md_number_to_chars (place, val, 2);
1022 md_number_to_chars (place, val, 4);
1026 md_number_to_chars (place, val, 8);
1029 case BFD_RELOC_SPU_IMM7:
1030 res = (val & 0x7f) << 14;
1033 case BFD_RELOC_SPU_IMM8:
1034 res = (val & 0xff) << 14;
1037 case BFD_RELOC_SPU_IMM10:
1038 res = (val & 0x3ff) << 14;
1041 case BFD_RELOC_SPU_IMM10W:
1042 res = (val & 0x3ff0) << 10;
1045 case BFD_RELOC_SPU_IMM16:
1046 res = (val & 0xffff) << 7;
1049 case BFD_RELOC_SPU_IMM16W:
1050 res = (val & 0x3fffc) << 5;
1053 case BFD_RELOC_SPU_IMM18:
1054 res = (val & 0x3ffff) << 7;
1057 case BFD_RELOC_SPU_PCREL9a:
1058 res = ((val & 0x1fc) >> 2) | ((val & 0x600) << 14);
1061 case BFD_RELOC_SPU_PCREL9b:
1062 res = ((val & 0x1fc) >> 2) | ((val & 0x600) << 5);
1065 case BFD_RELOC_SPU_PCREL16:
1066 res = (val & 0x3fffc) << 5;
1070 as_bad_where (fixP->fx_file, fixP->fx_line,
1071 _("reloc %d not supported by object file format"),
1072 (int) fixP->fx_r_type);
1077 place[0] |= (res >> 24) & 0xff;
1078 place[1] |= (res >> 16) & 0xff;
1079 place[2] |= (res >> 8) & 0xff;
1080 place[3] |= (res) & 0xff;