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Merge clang 7.0.1 and several follow-up changes
[FreeBSD/FreeBSD.git] / contrib / compiler-rt / lib / builtins / hexagon / divdi3.S
1 //===----------------------Hexagon builtin routine ------------------------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is dual licensed under the MIT and the University of Illinois Open
6 // Source Licenses. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9
10         .macro FUNCTION_BEGIN name
11         .text
12         .p2align 5
13         .globl \name
14         .type  \name, @function
15 \name:
16         .endm
17
18         .macro FUNCTION_END name
19         .size  \name, . - \name
20         .endm
21
22
23 FUNCTION_BEGIN __hexagon_divdi3
24         {
25                 p2 = tstbit(r1,#31)
26                 p3 = tstbit(r3,#31)
27         }
28         {
29                 r1:0 = abs(r1:0)
30                 r3:2 = abs(r3:2)
31         }
32         {
33                 r6 = cl0(r1:0)              // count leading 0's of dividend (numerator)
34                 r7 = cl0(r3:2)              // count leading 0's of divisor (denominator)
35                 r5:4 = r3:2                 // divisor moved into working registers
36                 r3:2 = r1:0                 // dividend is the initial remainder, r3:2 contains remainder
37         }
38         {
39                 p3 = xor(p2,p3)
40                 r10 = sub(r7,r6)            // left shift count for bit & divisor
41                 r1:0 = #0                   // initialize quotient to 0
42                 r15:14 = #1                 // initialize bit to 1
43         }
44         {
45                 r11 = add(r10,#1)           // loop count is 1 more than shift count
46                 r13:12 = lsl(r5:4,r10)      // shift divisor msb into same bit position as dividend msb
47                 r15:14 = lsl(r15:14,r10)    // shift the bit left by same amount as divisor
48         }
49         {
50                 p0 = cmp.gtu(r5:4,r3:2)     // check if divisor > dividend
51                 loop0(1f,r11)               // register loop
52         }
53         {
54                 if (p0) jump .hexagon_divdi3_return          // if divisor > dividend, we're done, so return
55         }
56         .falign
57 1:
58         {
59                 p0 = cmp.gtu(r13:12,r3:2)   // set predicate reg if shifted divisor > current remainder
60         }
61         {
62                 r7:6 = sub(r3:2, r13:12)    // subtract shifted divisor from current remainder
63                 r9:8 = add(r1:0, r15:14)    // save current quotient to temp (r9:8)
64         }
65         {
66                 r1:0 = vmux(p0, r1:0, r9:8) // choose either current quotient or new quotient (r9:8)
67                 r3:2 = vmux(p0, r3:2, r7:6) // choose either current remainder or new remainder (r7:6)
68         }
69         {
70                 r15:14 = lsr(r15:14, #1)    // shift bit right by 1 for next iteration
71                 r13:12 = lsr(r13:12, #1)    // shift "shifted divisor" right by 1 for next iteration
72         }:endloop0
73
74 .hexagon_divdi3_return:
75         {
76                 r3:2 = neg(r1:0)
77         }
78         {
79                 r1:0 = vmux(p3,r3:2,r1:0)
80                 jumpr r31
81         }
82 FUNCTION_END __hexagon_divdi3
83
84   .globl __qdsp_divdi3
85   .set   __qdsp_divdi3, __hexagon_divdi3