1 /* Definitions of target machine for GNU compiler, for DEC Alpha.
2 Copyright (C) 1992, 1993, 1994, 1995 Free Software Foundation, Inc.
3 Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
23 /* Names to predefine in the preprocessor for this target machine. */
25 #define CPP_PREDEFINES "\
26 -Dunix -D__osf__ -D__alpha -D__alpha__ -D_LONGLONG -DSYSTYPE_BSD \
27 -D_SYSTYPE_BSD -Asystem(unix) -Asystem(xpg4) -Acpu(alpha) -Amachine(alpha)"
29 /* Write out the correct language type definition for the header files.
30 Unless we have assembler language, write out the symbols for C. */
32 %{!.S: -D__LANGUAGE_C__ -D__LANGUAGE_C %{!ansi:-DLANGUAGE_C}} \
33 %{.S: -D__LANGUAGE_ASSEMBLY__ -D__LANGUAGE_ASSEMBLY %{!ansi:-DLANGUAGE_ASSEMBLY}} \
34 %{.cc: -D__LANGUAGE_C_PLUS_PLUS__ -D__LANGUAGE_C_PLUS_PLUS -D__cplusplus} \
35 %{.cxx: -D__LANGUAGE_C_PLUS_PLUS__ -D__LANGUAGE_C_PLUS_PLUS -D__cplusplus} \
36 %{.C: -D__LANGUAGE_C_PLUS_PLUS__ -D__LANGUAGE_C_PLUS_PLUS -D__cplusplus} \
37 %{.m: -D__LANGUAGE_OBJECTIVE_C__ -D__LANGUAGE_OBJECTIVE_C}"
39 /* Set the spec to use for signed char. The default tests the above macro
40 but DEC's compiler can't handle the conditional in a "constant"
43 #define SIGNED_CHAR_SPEC "%{funsigned-char:-D__CHAR_UNSIGNED__}"
45 /* Under OSF/1, -p and -pg require -lprof1. */
47 #define LIB_SPEC "%{p:-lprof1} %{pg:-lprof1} %{a:-lprof2} -lc"
49 /* Pass "-G 8" to ld because Alpha's CC does. Pass -O3 if we are
50 optimizing, -O1 if we are not. Pass -shared, -non_shared or
51 -call_shared as appropriate. Also pass -pg. */
53 "-G 8 %{O*:-O3} %{!O*:-O1} %{static:-non_shared} \
54 %{!static:%{shared:-shared} %{!shared:-call_shared}} %{pg} %{taso} \
57 #define WORD_SWITCH_TAKES_ARG(STR) \
58 (!strcmp (STR, "rpath") || !strcmp (STR, "include") \
59 || !strcmp (STR, "imacros") || !strcmp (STR, "aux-info") \
60 || !strcmp (STR, "idirafter") || !strcmp (STR, "iprefix") \
61 || !strcmp (STR, "iwithprefix") || !strcmp (STR, "iwithprefixbefore") \
62 || !strcmp (STR, "isystem"))
64 #define STARTFILE_SPEC \
65 "%{!shared:%{pg:gcrt0.o%s}%{!pg:%{p:mcrt0.o%s}%{!p:crt0.o%s}}}"
67 /* Print subsidiary information on the compiler version in use. */
68 #define TARGET_VERSION
70 /* Default this to not be compiling for Windows/NT. */
75 /* Define the location for the startup file on OSF/1 for Alpha. */
77 #define MD_STARTFILE_PREFIX "/usr/lib/cmplrs/cc/"
79 /* Run-time compilation parameters selecting different hardware subsets. */
81 extern int target_flags;
83 /* This means that floating-point support exists in the target implementation
84 of the Alpha architecture. This is usually the default. */
86 #define TARGET_FP (target_flags & 1)
88 /* This means that floating-point registers are allowed to be used. Note
89 that Alpha implementations without FP operations are required to
90 provide the FP registers. */
92 #define TARGET_FPREGS (target_flags & 2)
94 /* This means that gas is used to process the assembler file. */
97 #define TARGET_GAS (target_flags & MASK_GAS)
99 /* Macro to define tables used to set the flags.
100 This is a list in braces of pairs in braces,
101 each pair being { "NAME", VALUE }
102 where VALUE is the bits to set or minus the bits to clear.
103 An empty string NAME is used to identify the default VALUE. */
105 #define TARGET_SWITCHES \
106 { {"no-soft-float", 1}, \
107 {"soft-float", -1}, \
109 {"no-fp-regs", -3}, \
110 {"alpha-as", -MASK_GAS}, \
112 {"", TARGET_DEFAULT | TARGET_CPU_DEFAULT} }
114 #define TARGET_DEFAULT 3
116 #ifndef TARGET_CPU_DEFAULT
117 #define TARGET_CPU_DEFAULT 0
120 /* Define this macro to change register usage conditional on target flags.
122 On the Alpha, we use this to disable the floating-point registers when
125 #define CONDITIONAL_REGISTER_USAGE \
126 if (! TARGET_FPREGS) \
127 for (i = 32; i < 63; i++) \
128 fixed_regs[i] = call_used_regs[i] = 1;
130 /* Show we can debug even without a frame pointer. */
131 #define CAN_DEBUG_WITHOUT_FP
133 /* target machine storage layout */
135 /* Define to enable software floating point emulation. */
136 #define REAL_ARITHMETIC
138 /* Define the size of `int'. The default is the same as the word size. */
139 #define INT_TYPE_SIZE 32
141 /* Define the size of `long long'. The default is the twice the word size. */
142 #define LONG_LONG_TYPE_SIZE 64
144 /* The two floating-point formats we support are S-floating, which is
145 4 bytes, and T-floating, which is 8 bytes. `float' is S and `double'
146 and `long double' are T. */
148 #define FLOAT_TYPE_SIZE 32
149 #define DOUBLE_TYPE_SIZE 64
150 #define LONG_DOUBLE_TYPE_SIZE 64
152 #define WCHAR_TYPE "short unsigned int"
153 #define WCHAR_TYPE_SIZE 16
155 /* Define this macro if it is advisable to hold scalars in registers
156 in a wider mode than that declared by the program. In such cases,
157 the value is constrained to be within the bounds of the declared
158 type, but kept valid in the wider mode. The signedness of the
159 extension may differ from that of the type.
161 For Alpha, we always store objects in a full register. 32-bit objects
162 are always sign-extended, but smaller objects retain their signedness. */
164 #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \
165 if (GET_MODE_CLASS (MODE) == MODE_INT \
166 && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \
168 if ((MODE) == SImode) \
173 /* Define this if function arguments should also be promoted using the above
176 #define PROMOTE_FUNCTION_ARGS
178 /* Likewise, if the function return value is promoted. */
180 #define PROMOTE_FUNCTION_RETURN
182 /* Define this if most significant bit is lowest numbered
183 in instructions that operate on numbered bit-fields.
185 There are no such instructions on the Alpha, but the documentation
187 #define BITS_BIG_ENDIAN 0
189 /* Define this if most significant byte of a word is the lowest numbered.
190 This is false on the Alpha. */
191 #define BYTES_BIG_ENDIAN 0
193 /* Define this if most significant word of a multiword number is lowest
196 For Alpha we can decide arbitrarily since there are no machine instructions
197 for them. Might as well be consistent with bytes. */
198 #define WORDS_BIG_ENDIAN 0
200 /* number of bits in an addressable storage unit */
201 #define BITS_PER_UNIT 8
203 /* Width in bits of a "word", which is the contents of a machine register.
204 Note that this is not necessarily the width of data type `int';
205 if using 16-bit ints on a 68000, this would still be 32.
206 But on a machine with 16-bit registers, this would be 16. */
207 #define BITS_PER_WORD 64
209 /* Width of a word, in units (bytes). */
210 #define UNITS_PER_WORD 8
212 /* Width in bits of a pointer.
213 See also the macro `Pmode' defined below. */
214 #define POINTER_SIZE 64
216 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
217 #define PARM_BOUNDARY 64
219 /* Boundary (in *bits*) on which stack pointer should be aligned. */
220 #define STACK_BOUNDARY 64
222 /* Allocation boundary (in *bits*) for the code of a function. */
223 #define FUNCTION_BOUNDARY 64
225 /* Alignment of field after `int : 0' in a structure. */
226 #define EMPTY_FIELD_BOUNDARY 64
228 /* Every structure's size must be a multiple of this. */
229 #define STRUCTURE_SIZE_BOUNDARY 8
231 /* A bitfield declared as `int' forces `int' alignment for the struct. */
232 #define PCC_BITFIELD_TYPE_MATTERS 1
234 /* Align loop starts for optimal branching.
236 ??? Kludge this and the next macro for the moment by not doing anything if
237 we don't optimize and also if we are writing ECOFF symbols to work around
238 a bug in DEC's assembler. */
240 #define ASM_OUTPUT_LOOP_ALIGN(FILE) \
241 if (optimize > 0 && write_symbols != SDB_DEBUG) \
242 ASM_OUTPUT_ALIGN (FILE, 5)
244 /* This is how to align an instruction for optimal branching.
245 On Alpha we'll get better performance by aligning on a quadword
248 #define ASM_OUTPUT_ALIGN_CODE(FILE) \
249 if (optimize > 0 && write_symbols != SDB_DEBUG) \
250 ASM_OUTPUT_ALIGN ((FILE), 4)
252 /* No data type wants to be aligned rounder than this. */
253 #define BIGGEST_ALIGNMENT 64
255 /* Make strings word-aligned so strcpy from constants will be faster. */
256 #define CONSTANT_ALIGNMENT(EXP, ALIGN) \
257 (TREE_CODE (EXP) == STRING_CST \
258 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
260 /* Make arrays of chars word-aligned for the same reasons. */
261 #define DATA_ALIGNMENT(TYPE, ALIGN) \
262 (TREE_CODE (TYPE) == ARRAY_TYPE \
263 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
264 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
266 /* Set this non-zero if move instructions will actually fail to work
267 when given unaligned data.
269 Since we get an error message when we do one, call them invalid. */
271 #define STRICT_ALIGNMENT 1
273 /* Set this non-zero if unaligned move instructions are extremely slow.
275 On the Alpha, they trap. */
277 #define SLOW_UNALIGNED_ACCESS 1
279 /* Standard register usage. */
281 /* Number of actual hardware registers.
282 The hardware registers are assigned numbers for the compiler
283 from 0 to just below FIRST_PSEUDO_REGISTER.
284 All registers that the compiler knows about must be given numbers,
285 even those that are not normally considered general registers.
287 We define all 32 integer registers, even though $31 is always zero,
288 and all 32 floating-point registers, even though $f31 is also
289 always zero. We do not bother defining the FP status register and
290 there are no other registers.
292 Since $31 is always zero, we will use register number 31 as the
293 argument pointer. It will never appear in the generated code
294 because we will always be eliminating it in favor of the stack
295 pointer or hardware frame pointer.
297 Likewise, we use $f31 for the frame pointer, which will always
298 be eliminated in favor of the hardware frame pointer or the
301 #define FIRST_PSEUDO_REGISTER 64
303 /* 1 for registers that have pervasive standard uses
304 and are not available for the register allocator. */
306 #define FIXED_REGISTERS \
307 {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
308 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, \
309 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
310 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1 }
312 /* 1 for registers not available across function calls.
313 These must include the FIXED_REGISTERS and also any
314 registers that can be used without being saved.
315 The latter must include the registers where values are returned
316 and the register where structure-value addresses are passed.
317 Aside from that, you can include as many other registers as you like. */
318 #define CALL_USED_REGISTERS \
319 {1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, \
320 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, \
321 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, \
322 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }
324 /* List the order in which to allocate registers. Each register must be
325 listed once, even those in FIXED_REGISTERS.
327 We allocate in the following order:
328 $f1 (nonsaved floating-point register)
331 $f21-$f16 (likewise, but input args)
332 $f0 (nonsaved, but return value)
333 $f2-$f9 (saved floating-point registers)
334 $1-$8 (nonsaved integer registers)
337 $0 (likewise, but return value)
338 $21-$16 (likewise, but input args)
339 $27 (procedure value in OSF, nonsaved in NT)
340 $9-$14 (saved integer registers)
344 $30, $31, $f31 (stack pointer and always zero/ap & fp) */
346 #define REG_ALLOC_ORDER \
348 42, 43, 44, 45, 46, 47, \
349 54, 55, 56, 57, 58, 59, 60, 61, 62, \
350 53, 52, 51, 50, 49, 48, \
352 34, 35, 36, 37, 38, 39, 40, 41, \
353 1, 2, 3, 4, 5, 6, 7, 8, \
357 21, 20, 19, 18, 17, 16, \
359 9, 10, 11, 12, 13, 14, \
365 /* Return number of consecutive hard regs needed starting at reg REGNO
366 to hold something of mode MODE.
367 This is ordinarily the length in words of a value of mode MODE
368 but can be less for certain modes in special long registers. */
370 #define HARD_REGNO_NREGS(REGNO, MODE) \
371 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
373 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
374 On Alpha, the integer registers can hold any mode. The floating-point
375 registers can hold 32-bit and 64-bit integers as well, but not 16-bit
376 or 8-bit values. If we only allowed the larger integers into FP registers,
377 we'd have to say that QImode and SImode aren't tiable, which is a
378 pain. So say all registers can hold everything and see how that works. */
380 #define HARD_REGNO_MODE_OK(REGNO, MODE) 1
382 /* Value is 1 if it is a good idea to tie two pseudo registers
383 when one has mode MODE1 and one has mode MODE2.
384 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
385 for any hard reg, then this must be 0 for correct output. */
387 #define MODES_TIEABLE_P(MODE1, MODE2) 1
389 /* Specify the registers used for certain standard purposes.
390 The values of these macros are register numbers. */
392 /* Alpha pc isn't overloaded on a register that the compiler knows about. */
393 /* #define PC_REGNUM */
395 /* Register to use for pushing function arguments. */
396 #define STACK_POINTER_REGNUM 30
398 /* Base register for access to local variables of the function. */
399 #define HARD_FRAME_POINTER_REGNUM 15
401 /* Value should be nonzero if functions must have frame pointers.
402 Zero means the frame pointer need not be set up (and parms
403 may be accessed via the stack pointer) in functions that seem suitable.
404 This is computed in `reload', in reload1.c. */
405 #define FRAME_POINTER_REQUIRED 0
407 /* Base register for access to arguments of the function. */
408 #define ARG_POINTER_REGNUM 31
410 /* Base register for access to local variables of function. */
411 #define FRAME_POINTER_REGNUM 63
413 /* Register in which static-chain is passed to a function.
415 For the Alpha, this is based on an example; the calling sequence
416 doesn't seem to specify this. */
417 #define STATIC_CHAIN_REGNUM 1
419 /* Register in which address to store a structure value
420 arrives in the function. On the Alpha, the address is passed
421 as a hidden argument. */
422 #define STRUCT_VALUE 0
424 /* Define the classes of registers for register constraints in the
425 machine description. Also define ranges of constants.
427 One of the classes must always be named ALL_REGS and include all hard regs.
428 If there is more than one class, another class must be named NO_REGS
429 and contain no registers.
431 The name GENERAL_REGS must be the name of a class (or an alias for
432 another name such as ALL_REGS). This is the class of registers
433 that is allowed by "g" or "r" in a register constraint.
434 Also, registers outside this class are allocated only when
435 instructions express preferences for them.
437 The classes must be numbered in nondecreasing order; that is,
438 a larger-numbered class must never be contained completely
439 in a smaller-numbered class.
441 For any two classes, it is very desirable that there be another
442 class that represents their union. */
444 enum reg_class { NO_REGS, GENERAL_REGS, FLOAT_REGS, ALL_REGS,
447 #define N_REG_CLASSES (int) LIM_REG_CLASSES
449 /* Give names of register classes as strings for dump file. */
451 #define REG_CLASS_NAMES \
452 {"NO_REGS", "GENERAL_REGS", "FLOAT_REGS", "ALL_REGS" }
454 /* Define which registers fit in which classes.
455 This is an initializer for a vector of HARD_REG_SET
456 of length N_REG_CLASSES. */
458 #define REG_CLASS_CONTENTS \
459 { {0, 0}, {~0, 0x80000000}, {0, 0x7fffffff}, {~0, ~0} }
461 /* The same information, inverted:
462 Return the class number of the smallest class containing
463 reg number REGNO. This could be a conditional expression
464 or could index an array. */
466 #define REGNO_REG_CLASS(REGNO) \
467 ((REGNO) >= 32 && (REGNO) <= 62 ? FLOAT_REGS : GENERAL_REGS)
469 /* The class value for index registers, and the one for base regs. */
470 #define INDEX_REG_CLASS NO_REGS
471 #define BASE_REG_CLASS GENERAL_REGS
473 /* Get reg_class from a letter such as appears in the machine description. */
475 #define REG_CLASS_FROM_LETTER(C) \
476 ((C) == 'f' ? FLOAT_REGS : NO_REGS)
478 /* Define this macro to change register usage conditional on target flags. */
479 /* #define CONDITIONAL_REGISTER_USAGE */
481 /* The letters I, J, K, L, M, N, O, and P in a register constraint string
482 can be used to stand for particular ranges of immediate operands.
483 This macro defines what the ranges are.
484 C is the letter, and VALUE is a constant value.
485 Return 1 if VALUE is in the range specified by C.
488 `I' is used for the range of constants most insns can contain.
489 `J' is the constant zero.
490 `K' is used for the constant in an LDA insn.
491 `L' is used for the constant in a LDAH insn.
492 `M' is used for the constants that can be AND'ed with using a ZAP insn.
493 `N' is used for complemented 8-bit constants.
494 `O' is used for negated 8-bit constants.
495 `P' is used for the constants 1, 2 and 3. */
497 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
498 ((C) == 'I' ? (unsigned HOST_WIDE_INT) (VALUE) < 0x100 \
499 : (C) == 'J' ? (VALUE) == 0 \
500 : (C) == 'K' ? (unsigned HOST_WIDE_INT) ((VALUE) + 0x8000) < 0x10000 \
501 : (C) == 'L' ? (((VALUE) & 0xffff) == 0 \
502 && (((VALUE)) >> 31 == -1 || (VALUE) >> 31 == 0) \
503 && ((HOST_BITS_PER_WIDE_INT == 64 \
504 || (unsigned) (VALUE) != 0x80000000U))) \
505 : (C) == 'M' ? zap_mask (VALUE) \
506 : (C) == 'N' ? (unsigned HOST_WIDE_INT) (~ (VALUE)) < 0x100 \
507 : (C) == 'O' ? (unsigned HOST_WIDE_INT) (- (VALUE)) < 0x100 \
508 : (C) == 'P' ? (VALUE) == 1 || (VALUE) == 2 || (VALUE) == 3 \
511 /* Similar, but for floating or large integer constants, and defining letters
512 G and H. Here VALUE is the CONST_DOUBLE rtx itself.
514 For Alpha, `G' is the floating-point constant zero. `H' is a CONST_DOUBLE
515 that is the operand of a ZAP insn. */
517 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
518 ((C) == 'G' ? (GET_MODE_CLASS (GET_MODE (VALUE)) == MODE_FLOAT \
519 && (VALUE) == CONST0_RTX (GET_MODE (VALUE))) \
520 : (C) == 'H' ? (GET_MODE (VALUE) == VOIDmode \
521 && zap_mask (CONST_DOUBLE_LOW (VALUE)) \
522 && zap_mask (CONST_DOUBLE_HIGH (VALUE))) \
525 /* Optional extra constraints for this machine.
527 For the Alpha, `Q' means that this is a memory operand but not a
528 reference to an unaligned location.
529 `R' is a SYMBOL_REF that has SYMBOL_REF_FLAG set or is the current
532 #define EXTRA_CONSTRAINT(OP, C) \
533 ((C) == 'Q' ? GET_CODE (OP) == MEM && GET_CODE (XEXP (OP, 0)) != AND \
534 : (C) == 'R' ? current_file_function_operand (OP, Pmode) \
537 /* Given an rtx X being reloaded into a reg required to be
538 in class CLASS, return the class of reg to actually use.
539 In general this is just CLASS; but on some machines
540 in some cases it is preferable to use a more restrictive class.
542 On the Alpha, all constants except zero go into a floating-point
543 register via memory. */
545 #define PREFERRED_RELOAD_CLASS(X, CLASS) \
546 (CONSTANT_P (X) && (X) != const0_rtx && (X) != CONST0_RTX (GET_MODE (X)) \
547 ? ((CLASS) == FLOAT_REGS ? NO_REGS : GENERAL_REGS) \
550 /* Loading and storing HImode or QImode values to and from memory
551 usually requires a scratch register. The exceptions are loading
552 QImode and HImode from an aligned address to a general register.
553 We also cannot load an unaligned address or a paradoxical SUBREG into an
556 #define SECONDARY_INPUT_RELOAD_CLASS(CLASS,MODE,IN) \
557 (((GET_CODE (IN) == MEM \
558 || (GET_CODE (IN) == REG && REGNO (IN) >= FIRST_PSEUDO_REGISTER) \
559 || (GET_CODE (IN) == SUBREG \
560 && (GET_CODE (SUBREG_REG (IN)) == MEM \
561 || (GET_CODE (SUBREG_REG (IN)) == REG \
562 && REGNO (SUBREG_REG (IN)) >= FIRST_PSEUDO_REGISTER)))) \
563 && (((CLASS) == FLOAT_REGS \
564 && ((MODE) == SImode || (MODE) == HImode || (MODE) == QImode)) \
565 || (((MODE) == QImode || (MODE) == HImode) \
566 && unaligned_memory_operand (IN, MODE)))) \
568 : ((CLASS) == FLOAT_REGS && GET_CODE (IN) == MEM \
569 && GET_CODE (XEXP (IN, 0)) == AND) ? GENERAL_REGS \
570 : ((CLASS) == FLOAT_REGS && GET_CODE (IN) == SUBREG \
571 && (GET_MODE_SIZE (GET_MODE (IN)) \
572 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (IN))))) ? GENERAL_REGS \
575 #define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS,MODE,OUT) \
576 (((GET_CODE (OUT) == MEM \
577 || (GET_CODE (OUT) == REG && REGNO (OUT) >= FIRST_PSEUDO_REGISTER) \
578 || (GET_CODE (OUT) == SUBREG \
579 && (GET_CODE (SUBREG_REG (OUT)) == MEM \
580 || (GET_CODE (SUBREG_REG (OUT)) == REG \
581 && REGNO (SUBREG_REG (OUT)) >= FIRST_PSEUDO_REGISTER)))) \
582 && (((MODE) == HImode || (MODE) == QImode \
583 || ((MODE) == SImode && (CLASS) == FLOAT_REGS)))) \
585 : ((CLASS) == FLOAT_REGS && GET_CODE (OUT) == MEM \
586 && GET_CODE (XEXP (OUT, 0)) == AND) ? GENERAL_REGS \
587 : ((CLASS) == FLOAT_REGS && GET_CODE (OUT) == SUBREG \
588 && (GET_MODE_SIZE (GET_MODE (OUT)) \
589 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (OUT))))) ? GENERAL_REGS \
592 /* If we are copying between general and FP registers, we need a memory
595 #define SECONDARY_MEMORY_NEEDED(CLASS1,CLASS2,MODE) ((CLASS1) != (CLASS2))
597 /* Specify the mode to be used for memory when a secondary memory
598 location is needed. If MODE is floating-point, use it. Otherwise,
599 widen to a word like the default. This is needed because we always
600 store integers in FP registers in quadword format. This whole
601 area is very tricky! */
602 #define SECONDARY_MEMORY_NEEDED_MODE(MODE) \
603 (GET_MODE_CLASS (MODE) == MODE_FLOAT ? (MODE) \
604 : GET_MODE_SIZE (MODE) >= 4 ? (MODE) \
605 : mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (MODE), 0))
607 /* Return the maximum number of consecutive registers
608 needed to represent mode MODE in a register of class CLASS. */
610 #define CLASS_MAX_NREGS(CLASS, MODE) \
611 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
613 /* If defined, gives a class of registers that cannot be used as the
614 operand of a SUBREG that changes the size of the object. */
616 #define CLASS_CANNOT_CHANGE_SIZE FLOAT_REGS
618 /* Define the cost of moving between registers of various classes. Moving
619 between FLOAT_REGS and anything else except float regs is expensive.
620 In fact, we make it quite expensive because we really don't want to
621 do these moves unless it is clearly worth it. Optimizations may
622 reduce the impact of not being able to allocate a pseudo to a
625 #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
626 (((CLASS1) == FLOAT_REGS) == ((CLASS2) == FLOAT_REGS) ? 2 : 20)
628 /* A C expressions returning the cost of moving data of MODE from a register to
631 On the Alpha, bump this up a bit. */
633 #define MEMORY_MOVE_COST(MODE) 6
635 /* Provide the cost of a branch. Exact meaning under development. */
636 #define BRANCH_COST 5
638 /* Adjust the cost of dependencies. */
640 #define ADJUST_COST(INSN,LINK,DEP,COST) \
641 (COST) = alpha_adjust_cost (INSN, LINK, DEP, COST)
643 /* Stack layout; function entry, exit and calling. */
645 /* Define this if pushing a word on the stack
646 makes the stack pointer a smaller address. */
647 #define STACK_GROWS_DOWNWARD
649 /* Define this if the nominal address of the stack frame
650 is at the high-address end of the local variables;
651 that is, each additional local variable allocated
652 goes at a more negative offset in the frame. */
653 /* #define FRAME_GROWS_DOWNWARD */
655 /* Offset within stack frame to start allocating local variables at.
656 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
657 first local allocated. Otherwise, it is the offset to the BEGINNING
658 of the first local allocated. */
660 #define STARTING_FRAME_OFFSET 0
662 /* If we generate an insn to push BYTES bytes,
663 this says how many the stack pointer really advances by.
664 On Alpha, don't define this because there are no push insns. */
665 /* #define PUSH_ROUNDING(BYTES) */
667 /* Define this if the maximum size of all the outgoing args is to be
668 accumulated and pushed during the prologue. The amount can be
669 found in the variable current_function_outgoing_args_size. */
670 #define ACCUMULATE_OUTGOING_ARGS
672 /* Offset of first parameter from the argument pointer register value. */
674 #define FIRST_PARM_OFFSET(FNDECL) 0
676 /* Definitions for register eliminations.
678 We have two registers that can be eliminated on the Alpha. First, the
679 frame pointer register can often be eliminated in favor of the stack
680 pointer register. Secondly, the argument pointer register can always be
681 eliminated; it is replaced with either the stack or frame pointer. */
683 /* This is an array of structures. Each structure initializes one pair
684 of eliminable registers. The "from" register number is given first,
685 followed by "to". Eliminations of the same "from" register are listed
686 in order of preference. */
688 #define ELIMINABLE_REGS \
689 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
690 { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \
691 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
692 { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}}
694 /* Given FROM and TO register numbers, say whether this elimination is allowed.
695 Frame pointer elimination is automatically handled.
697 All eliminations are valid since the cases where FP can't be
698 eliminated are already handled. */
700 #define CAN_ELIMINATE(FROM, TO) 1
702 /* Round up to a multiple of 16 bytes. */
703 #define ALPHA_ROUND(X) (((X) + 15) & ~ 15)
705 /* Define the offset between two registers, one to be eliminated, and the other
706 its replacement, at the start of a routine. */
707 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
708 { if ((FROM) == FRAME_POINTER_REGNUM) \
709 (OFFSET) = (ALPHA_ROUND (current_function_outgoing_args_size) \
710 + alpha_sa_size ()); \
711 else if ((FROM) == ARG_POINTER_REGNUM) \
712 (OFFSET) = (ALPHA_ROUND (current_function_outgoing_args_size) \
714 + (ALPHA_ROUND (get_frame_size () \
715 + current_function_pretend_args_size) \
716 - current_function_pretend_args_size)); \
719 /* Define this if stack space is still allocated for a parameter passed
721 /* #define REG_PARM_STACK_SPACE */
723 /* Value is the number of bytes of arguments automatically
724 popped when returning from a subroutine call.
725 FUNDECL is the declaration node of the function (as a tree),
726 FUNTYPE is the data type of the function (as a tree),
727 or for a library call it is an identifier node for the subroutine name.
728 SIZE is the number of bytes of arguments passed on the stack. */
730 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
732 /* Define how to find the value returned by a function.
733 VALTYPE is the data type of the value (as a tree).
734 If the precise function being called is known, FUNC is its FUNCTION_DECL;
735 otherwise, FUNC is 0.
737 On Alpha the value is found in $0 for integer functions and
738 $f0 for floating-point functions. */
740 #define FUNCTION_VALUE(VALTYPE, FUNC) \
742 (INTEGRAL_MODE_P (TYPE_MODE (VALTYPE)) \
743 && TYPE_PRECISION (VALTYPE) < BITS_PER_WORD) \
744 ? word_mode : TYPE_MODE (VALTYPE), \
745 TARGET_FPREGS && TREE_CODE (VALTYPE) == REAL_TYPE ? 32 : 0)
747 /* Define how to find the value returned by a library function
748 assuming the value has mode MODE. */
750 #define LIBCALL_VALUE(MODE) \
751 gen_rtx (REG, MODE, \
752 TARGET_FPREGS && GET_MODE_CLASS (MODE) == MODE_FLOAT ? 32 : 0)
754 /* The definition of this macro implies that there are cases where
755 a scalar value cannot be returned in registers.
757 For the Alpha, any structure or union type is returned in memory, as
758 are integers whose size is larger than 64 bits. */
760 #define RETURN_IN_MEMORY(TYPE) \
761 (TYPE_MODE (TYPE) == BLKmode \
762 || (TREE_CODE (TYPE) == INTEGER_TYPE && TYPE_PRECISION (TYPE) > 64))
764 /* 1 if N is a possible register number for a function value
765 as seen by the caller. */
767 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 0 || (N) == 32)
769 /* 1 if N is a possible register number for function argument passing.
770 On Alpha, these are $16-$21 and $f16-$f21. */
772 #define FUNCTION_ARG_REGNO_P(N) \
773 (((N) >= 16 && (N) <= 21) || ((N) >= 16 + 32 && (N) <= 21 + 32))
775 /* Define a data type for recording info about an argument list
776 during the scan of that argument list. This data type should
777 hold all necessary information about the function itself
778 and about the args processed so far, enough to enable macros
779 such as FUNCTION_ARG to determine where the next arg should go.
781 On Alpha, this is a single integer, which is a number of words
782 of arguments scanned so far.
783 Thus 6 or more means all following args should go on the stack. */
785 #define CUMULATIVE_ARGS int
787 /* Initialize a variable CUM of type CUMULATIVE_ARGS
788 for a call to a function whose data type is FNTYPE.
789 For a library call, FNTYPE is 0. */
791 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) (CUM) = 0
793 /* Define intermediate macro to compute the size (in registers) of an argument
796 #define ALPHA_ARG_SIZE(MODE, TYPE, NAMED) \
798 ? (GET_MODE_SIZE (MODE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD \
799 : (int_size_in_bytes (TYPE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)
801 /* Update the data in CUM to advance over an argument
802 of mode MODE and data type TYPE.
803 (TYPE is null for libcalls where that information may not be available.) */
805 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
806 if (MUST_PASS_IN_STACK (MODE, TYPE)) \
809 (CUM) += ALPHA_ARG_SIZE (MODE, TYPE, NAMED)
811 /* Determine where to put an argument to a function.
812 Value is zero to push the argument on the stack,
813 or a hard register in which to store the argument.
815 MODE is the argument's machine mode.
816 TYPE is the data type of the argument (as a tree).
817 This is null for libcalls where that information may
819 CUM is a variable of type CUMULATIVE_ARGS which gives info about
820 the preceding args and about the function being called.
821 NAMED is nonzero if this argument is a named parameter
822 (otherwise it is an extra parameter matching an ellipsis).
824 On Alpha the first 6 words of args are normally in registers
825 and the rest are pushed. */
827 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
828 ((CUM) < 6 && ! MUST_PASS_IN_STACK (MODE, TYPE) \
829 ? gen_rtx(REG, (MODE), \
830 (CUM) + 16 + ((TARGET_FPREGS \
831 && (GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT \
832 || GET_MODE_CLASS (MODE) == MODE_FLOAT)) \
836 /* Specify the padding direction of arguments.
838 On the Alpha, we must pad upwards in order to be able to pass args in
841 #define FUNCTION_ARG_PADDING(MODE, TYPE) upward
843 /* For an arg passed partly in registers and partly in memory,
844 this is the number of registers used.
845 For args passed entirely in registers or entirely in memory, zero. */
847 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
848 ((CUM) < 6 && 6 < (CUM) + ALPHA_ARG_SIZE (MODE, TYPE, NAMED) \
851 /* Perform any needed actions needed for a function that is receiving a
852 variable number of arguments.
856 MODE and TYPE are the mode and type of the current parameter.
858 PRETEND_SIZE is a variable that should be set to the amount of stack
859 that must be pushed by the prolog to pretend that our caller pushed
862 Normally, this macro will push all remaining incoming registers on the
863 stack and set PRETEND_SIZE to the length of the registers pushed.
865 On the Alpha, we allocate space for all 12 arg registers, but only
866 push those that are remaining.
868 However, if NO registers need to be saved, don't allocate any space.
869 This is not only because we won't need the space, but because AP includes
870 the current_pretend_args_size and we don't want to mess up any
871 ap-relative addresses already made.
873 If we are not to use the floating-point registers, save the integer
874 registers where we would put the floating-point registers. This is
875 not the most efficient way to implement varargs with just one register
876 class, but it isn't worth doing anything more efficient in this rare
880 #define SETUP_INCOMING_VARARGS(CUM,MODE,TYPE,PRETEND_SIZE,NO_RTL) \
885 move_block_from_reg \
887 gen_rtx (MEM, BLKmode, \
888 plus_constant (virtual_incoming_args_rtx, \
889 ((CUM) + 6)* UNITS_PER_WORD)), \
890 6 - (CUM), (6 - (CUM)) * UNITS_PER_WORD); \
891 move_block_from_reg \
892 (16 + (TARGET_FPREGS ? 32 : 0) + CUM, \
893 gen_rtx (MEM, BLKmode, \
894 plus_constant (virtual_incoming_args_rtx, \
895 (CUM) * UNITS_PER_WORD)), \
896 6 - (CUM), (6 - (CUM)) * UNITS_PER_WORD); \
898 PRETEND_SIZE = 12 * UNITS_PER_WORD; \
902 /* Try to output insns to set TARGET equal to the constant C if it can be
903 done in less than N insns. Do all computations in MODE. Returns the place
904 where the output has been placed if it can be done and the insns have been
905 emitted. If it would take more than N insns, zero is returned and no
906 insns and emitted. */
907 extern struct rtx_def *alpha_emit_set_const ();
909 /* Generate necessary RTL for __builtin_saveregs().
910 ARGLIST is the argument list; see expr.c. */
911 extern struct rtx_def *alpha_builtin_saveregs ();
912 #define EXPAND_BUILTIN_SAVEREGS(ARGLIST) alpha_builtin_saveregs (ARGLIST)
914 /* Define the information needed to generate branch and scc insns. This is
915 stored from the compare operation. Note that we can't use "rtx" here
916 since it hasn't been defined! */
918 extern struct rtx_def *alpha_compare_op0, *alpha_compare_op1;
919 extern int alpha_compare_fp_p;
921 /* This macro produces the initial definition of a function name. On the
922 Alpha, we need to save the function name for the prologue and epilogue. */
924 extern char *alpha_function_name;
926 #define ASM_DECLARE_FUNCTION_NAME(FILE,NAME,DECL) \
928 alpha_function_name = NAME; \
931 /* This macro generates the assembly code for function entry.
932 FILE is a stdio stream to output the code to.
933 SIZE is an int: how many units of temporary storage to allocate.
934 Refer to the array `regs_ever_live' to determine which registers
935 to save; `regs_ever_live[I]' is nonzero if register number I
936 is ever used in the function. This macro is responsible for
937 knowing which registers should not be saved even if used. */
939 #define FUNCTION_PROLOGUE(FILE, SIZE) output_prolog (FILE, SIZE)
941 /* Output assembler code to FILE to increment profiler label # LABELNO
942 for profiling a function entry. Under OSF/1, profiling is enabled
943 by simply passing -pg to the assembler and linker. */
945 #define FUNCTION_PROFILER(FILE, LABELNO)
947 /* Output assembler code to FILE to initialize this source file's
948 basic block profiling info, if that has not already been done.
949 This assumes that __bb_init_func doesn't garble a1-a5. */
951 #define FUNCTION_BLOCK_PROFILER(FILE, LABELNO) \
953 ASM_OUTPUT_REG_PUSH (FILE, 16); \
954 fputs ("\tlda $16,$PBX32\n", (FILE)); \
955 fputs ("\tldq $26,0($16)\n", (FILE)); \
956 fputs ("\tbne $26,1f\n", (FILE)); \
957 fputs ("\tlda $27,__bb_init_func\n", (FILE)); \
958 fputs ("\tjsr $26,($27),__bb_init_func\n", (FILE)); \
959 fputs ("\tldgp $29,0($26)\n", (FILE)); \
960 fputs ("1:\n", (FILE)); \
961 ASM_OUTPUT_REG_POP (FILE, 16); \
964 /* Output assembler code to FILE to increment the entry-count for
965 the BLOCKNO'th basic block in this source file. */
967 #define BLOCK_PROFILER(FILE, BLOCKNO) \
969 int blockn = (BLOCKNO); \
970 fputs ("\tsubq $30,16,$30\n", (FILE)); \
971 fputs ("\tstq $26,0($30)\n", (FILE)); \
972 fputs ("\tstq $27,8($30)\n", (FILE)); \
973 fputs ("\tlda $26,$PBX34\n", (FILE)); \
974 fprintf ((FILE), "\tldq $27,%d($26)\n", 8*blockn); \
975 fputs ("\taddq $27,1,$27\n", (FILE)); \
976 fprintf ((FILE), "\tstq $27,%d($26)\n", 8*blockn); \
977 fputs ("\tldq $26,0($30)\n", (FILE)); \
978 fputs ("\tldq $27,8($30)\n", (FILE)); \
979 fputs ("\taddq $30,16,$30\n", (FILE)); \
983 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
984 the stack pointer does not matter. The value is tested only in
985 functions that have frame pointers.
986 No definition is equivalent to always zero. */
988 #define EXIT_IGNORE_STACK 1
990 /* This macro generates the assembly code for function exit,
991 on machines that need it. If FUNCTION_EPILOGUE is not defined
992 then individual return instructions are generated for each
993 return statement. Args are same as for FUNCTION_PROLOGUE.
995 The function epilogue should not depend on the current stack pointer!
996 It should use the frame pointer only. This is mandatory because
997 of alloca; we also take advantage of it to omit stack adjustments
1000 #define FUNCTION_EPILOGUE(FILE, SIZE) output_epilog (FILE, SIZE)
1003 /* Output assembler code for a block containing the constant parts
1004 of a trampoline, leaving space for the variable parts.
1006 The trampoline should set the static chain pointer to value placed
1007 into the trampoline and should branch to the specified routine.
1008 Note that $27 has been set to the address of the trampoline, so we can
1009 use it for addressability of the two data items. Trampolines are always
1010 aligned to FUNCTION_BOUNDARY, which is 64 bits. */
1012 #define TRAMPOLINE_TEMPLATE(FILE) \
1014 fprintf (FILE, "\tldq $1,24($27)\n"); \
1015 fprintf (FILE, "\tldq $27,16($27)\n"); \
1016 fprintf (FILE, "\tjmp $31,($27),0\n"); \
1017 fprintf (FILE, "\tnop\n"); \
1018 fprintf (FILE, "\t.quad 0,0\n"); \
1021 /* Section in which to place the trampoline. On Alpha, instructions
1022 may only be placed in a text segment. */
1024 #define TRAMPOLINE_SECTION text_section
1026 /* Length in units of the trampoline for entering a nested function. */
1028 #define TRAMPOLINE_SIZE 32
1030 /* Emit RTL insns to initialize the variable parts of a trampoline.
1031 FNADDR is an RTX for the address of the function's pure code.
1032 CXT is an RTX for the static chain value for the function. We assume
1033 here that a function will be called many more times than its address
1034 is taken (e.g., it might be passed to qsort), so we take the trouble
1035 to initialize the "hint" field in the JMP insn. Note that the hint
1036 field is PC (new) + 4 * bits 13:0. */
1038 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
1040 rtx _temp, _temp1, _addr; \
1042 _addr = memory_address (Pmode, plus_constant ((TRAMP), 16)); \
1043 emit_move_insn (gen_rtx (MEM, Pmode, _addr), (FNADDR)); \
1044 _addr = memory_address (Pmode, plus_constant ((TRAMP), 24)); \
1045 emit_move_insn (gen_rtx (MEM, Pmode, _addr), (CXT)); \
1047 _temp = force_operand (plus_constant ((TRAMP), 12), NULL_RTX); \
1048 _temp = expand_binop (DImode, sub_optab, (FNADDR), _temp, _temp, 1, \
1050 _temp = expand_shift (RSHIFT_EXPR, Pmode, _temp, \
1051 build_int_2 (2, 0), NULL_RTX, 1); \
1052 _temp = expand_and (gen_lowpart (SImode, _temp), \
1053 GEN_INT (0x3fff), 0); \
1055 _addr = memory_address (SImode, plus_constant ((TRAMP), 8)); \
1056 _temp1 = force_reg (SImode, gen_rtx (MEM, SImode, _addr)); \
1057 _temp1 = expand_and (_temp1, GEN_INT (0xffffc000), NULL_RTX); \
1058 _temp1 = expand_binop (SImode, ior_optab, _temp1, _temp, _temp1, 1, \
1061 emit_move_insn (gen_rtx (MEM, SImode, _addr), _temp1); \
1063 emit_library_call (gen_rtx (SYMBOL_REF, Pmode, \
1064 "__enable_execute_stack"), \
1065 0, VOIDmode, 1,_addr, Pmode); \
1067 emit_insn (gen_rtx (UNSPEC_VOLATILE, VOIDmode, \
1068 gen_rtvec (1, const0_rtx), 0)); \
1071 /* Attempt to turn on access permissions for the stack. */
1073 #define TRANSFER_FROM_TRAMPOLINE \
1076 __enable_execute_stack (addr) \
1079 long size = getpagesize (); \
1080 long mask = ~(size-1); \
1081 char *page = (char *) (((long) addr) & mask); \
1082 char *end = (char *) ((((long) (addr + TRAMPOLINE_SIZE)) & mask) + size); \
1084 /* 7 is PROT_READ | PROT_WRITE | PROT_EXEC */ \
1085 if (mprotect (page, end - page, 7) < 0) \
1086 perror ("mprotect of trampoline code"); \
1089 /* A C expression whose value is RTL representing the value of the return
1090 address for the frame COUNT steps up from the current frame.
1091 FRAMEADDR is the frame pointer of the COUNT frame, or the frame pointer of
1092 the COUNT-1 frame if RETURN_ADDR_IN_PREVIOUS_FRAME} is defined.
1094 This definition for Alpha is broken, but is put in at the request of
1097 #define RETURN_ADDR_RTX(COUNT, FRAME) \
1098 ((COUNT == 0 && alpha_sa_size () == 0 && 0 /* not right. */) \
1099 ? gen_rtx (REG, Pmode, 26) \
1100 : gen_rtx (MEM, Pmode, \
1101 memory_address (Pmode, FRAME)))
1103 /* Addressing modes, and classification of registers for them. */
1105 /* #define HAVE_POST_INCREMENT */
1106 /* #define HAVE_POST_DECREMENT */
1108 /* #define HAVE_PRE_DECREMENT */
1109 /* #define HAVE_PRE_INCREMENT */
1111 /* Macros to check register numbers against specific register classes. */
1113 /* These assume that REGNO is a hard or pseudo reg number.
1114 They give nonzero only if REGNO is a hard reg of the suitable class
1115 or a pseudo reg currently allocated to a suitable hard reg.
1116 Since they use reg_renumber, they are safe only once reg_renumber
1117 has been allocated, which happens in local-alloc.c. */
1119 #define REGNO_OK_FOR_INDEX_P(REGNO) 0
1120 #define REGNO_OK_FOR_BASE_P(REGNO) \
1121 ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32 \
1122 || (REGNO) == 63 || reg_renumber[REGNO] == 63)
1124 /* Maximum number of registers that can appear in a valid memory address. */
1125 #define MAX_REGS_PER_ADDRESS 1
1127 /* Recognize any constant value that is a valid address. For the Alpha,
1128 there are only constants none since we want to use LDA to load any
1129 symbolic addresses into registers. */
1131 #define CONSTANT_ADDRESS_P(X) \
1132 (GET_CODE (X) == CONST_INT \
1133 && (unsigned HOST_WIDE_INT) (INTVAL (X) + 0x8000) < 0x10000)
1135 /* Include all constant integers and constant doubles, but not
1136 floating-point, except for floating-point zero. */
1138 #define LEGITIMATE_CONSTANT_P(X) \
1139 (GET_MODE_CLASS (GET_MODE (X)) != MODE_FLOAT \
1140 || (X) == CONST0_RTX (GET_MODE (X)))
1142 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1143 and check its validity for a certain class.
1144 We have two alternate definitions for each of them.
1145 The usual definition accepts all pseudo regs; the other rejects
1146 them unless they have been allocated suitable hard regs.
1147 The symbol REG_OK_STRICT causes the latter definition to be used.
1149 Most source files want to accept pseudo regs in the hope that
1150 they will get allocated to the class that the insn wants them to be in.
1151 Source files for reload pass need to be strict.
1152 After reload, it makes no difference, since pseudo regs have
1153 been eliminated by then. */
1155 #ifndef REG_OK_STRICT
1157 /* Nonzero if X is a hard reg that can be used as an index
1158 or if it is a pseudo reg. */
1159 #define REG_OK_FOR_INDEX_P(X) 0
1160 /* Nonzero if X is a hard reg that can be used as a base reg
1161 or if it is a pseudo reg. */
1162 #define REG_OK_FOR_BASE_P(X) \
1163 (REGNO (X) < 32 || REGNO (X) == 63 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
1167 /* Nonzero if X is a hard reg that can be used as an index. */
1168 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1169 /* Nonzero if X is a hard reg that can be used as a base reg. */
1170 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1174 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1175 that is a valid memory address for an instruction.
1176 The MODE argument is the machine mode for the MEM expression
1177 that wants to use this address.
1179 For Alpha, we have either a constant address or the sum of a register
1180 and a constant address, or just a register. For DImode, any of those
1181 forms can be surrounded with an AND that clear the low-order three bits;
1182 this is an "unaligned" access.
1184 First define the basic valid address. */
1186 #define GO_IF_LEGITIMATE_SIMPLE_ADDRESS(MODE, X, ADDR) \
1187 { if (REG_P (X) && REG_OK_FOR_BASE_P (X)) \
1189 if (CONSTANT_ADDRESS_P (X)) \
1191 if (GET_CODE (X) == PLUS \
1192 && REG_P (XEXP (X, 0)) \
1193 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1194 && CONSTANT_ADDRESS_P (XEXP (X, 1))) \
1198 /* Now accept the simple address, or, for DImode only, an AND of a simple
1199 address that turns off the low three bits. */
1201 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1202 { GO_IF_LEGITIMATE_SIMPLE_ADDRESS (MODE, X, ADDR); \
1203 if ((MODE) == DImode \
1204 && GET_CODE (X) == AND \
1205 && GET_CODE (XEXP (X, 1)) == CONST_INT \
1206 && INTVAL (XEXP (X, 1)) == -8) \
1207 GO_IF_LEGITIMATE_SIMPLE_ADDRESS (MODE, XEXP (X, 0), ADDR); \
1210 /* Try machine-dependent ways of modifying an illegitimate address
1211 to be legitimate. If we find one, return the new, valid address.
1212 This macro is used in only one place: `memory_address' in explow.c.
1214 OLDX is the address as it was before break_out_memory_refs was called.
1215 In some cases it is useful to look at this to decide what needs to be done.
1217 MODE and WIN are passed so that this macro can use
1218 GO_IF_LEGITIMATE_ADDRESS.
1220 It is always safe for this macro to do nothing. It exists to recognize
1221 opportunities to optimize the output.
1223 For the Alpha, there are three cases we handle:
1225 (1) If the address is (plus reg const_int) and the CONST_INT is not a
1226 valid offset, compute the high part of the constant and add it to the
1227 register. Then our address is (plus temp low-part-const).
1228 (2) If the address is (const (plus FOO const_int)), find the low-order
1229 part of the CONST_INT. Then load FOO plus any high-order part of the
1230 CONST_INT into a register. Our address is (plus reg low-part-const).
1231 This is done to reduce the number of GOT entries.
1232 (3) If we have a (plus reg const), emit the load as in (2), then add
1233 the two registers, and finally generate (plus reg low-part-const) as
1236 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
1237 { if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == REG \
1238 && GET_CODE (XEXP (X, 1)) == CONST_INT \
1239 && ! CONSTANT_ADDRESS_P (XEXP (X, 1))) \
1241 HOST_WIDE_INT val = INTVAL (XEXP (X, 1)); \
1242 HOST_WIDE_INT lowpart = (val & 0xffff) - 2 * (val & 0x8000); \
1243 HOST_WIDE_INT highpart = val - lowpart; \
1244 rtx high = GEN_INT (highpart); \
1245 rtx temp = expand_binop (Pmode, add_optab, XEXP (x, 0), \
1246 high, NULL_RTX, 1, OPTAB_LIB_WIDEN); \
1248 (X) = plus_constant (temp, lowpart); \
1251 else if (GET_CODE (X) == CONST \
1252 && GET_CODE (XEXP (X, 0)) == PLUS \
1253 && GET_CODE (XEXP (XEXP (X, 0), 1)) == CONST_INT) \
1255 HOST_WIDE_INT val = INTVAL (XEXP (XEXP (X, 0), 1)); \
1256 HOST_WIDE_INT lowpart = (val & 0xffff) - 2 * (val & 0x8000); \
1257 HOST_WIDE_INT highpart = val - lowpart; \
1258 rtx high = XEXP (XEXP (X, 0), 0); \
1261 high = plus_constant (high, highpart); \
1263 (X) = plus_constant (force_reg (Pmode, high), lowpart); \
1266 else if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == REG \
1267 && GET_CODE (XEXP (X, 1)) == CONST \
1268 && GET_CODE (XEXP (XEXP (X, 1), 0)) == PLUS \
1269 && GET_CODE (XEXP (XEXP (XEXP (X, 1), 0), 1)) == CONST_INT) \
1271 HOST_WIDE_INT val = INTVAL (XEXP (XEXP (XEXP (X, 1), 0), 1)); \
1272 HOST_WIDE_INT lowpart = (val & 0xffff) - 2 * (val & 0x8000); \
1273 HOST_WIDE_INT highpart = val - lowpart; \
1274 rtx high = XEXP (XEXP (XEXP (X, 1), 0), 0); \
1277 high = plus_constant (high, highpart); \
1279 high = expand_binop (Pmode, add_optab, XEXP (X, 0), \
1280 force_reg (Pmode, high), \
1281 high, 1, OPTAB_LIB_WIDEN); \
1282 (X) = plus_constant (high, lowpart); \
1287 /* Go to LABEL if ADDR (a legitimate address expression)
1288 has an effect that depends on the machine mode it is used for.
1289 On the Alpha this is true only for the unaligned modes. We can
1290 simplify this test since we know that the address must be valid. */
1292 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1293 { if (GET_CODE (ADDR) == AND) goto LABEL; }
1295 /* Compute the cost of an address. For the Alpha, all valid addresses are
1298 #define ADDRESS_COST(X) 0
1300 /* Define this if some processing needs to be done immediately before
1301 emitting code for an insn. */
1303 /* #define FINAL_PRESCAN_INSN(INSN,OPERANDS,NOPERANDS) */
1305 /* Specify the machine mode that this machine uses
1306 for the index in the tablejump instruction. */
1307 #define CASE_VECTOR_MODE SImode
1309 /* Define this if the tablejump instruction expects the table
1310 to contain offsets from the address of the table.
1311 Do not define this if the table should contain absolute addresses.
1312 On the Alpha, the table is really GP-relative, not relative to the PC
1313 of the table, but we pretend that it is PC-relative; this should be OK,
1314 but we should try to find some better way sometime. */
1315 #define CASE_VECTOR_PC_RELATIVE
1317 /* Specify the tree operation to be used to convert reals to integers. */
1318 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1320 /* This is the kind of divide that is easiest to do in the general case. */
1321 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1323 /* Define this as 1 if `char' should by default be signed; else as 0. */
1324 #define DEFAULT_SIGNED_CHAR 1
1326 /* This flag, if defined, says the same insns that convert to a signed fixnum
1327 also convert validly to an unsigned one.
1329 We actually lie a bit here as overflow conditions are different. But
1330 they aren't being checked anyway. */
1332 #define FIXUNS_TRUNC_LIKE_FIX_TRUNC
1334 /* Max number of bytes we can move to or from memory
1335 in one reasonably fast instruction. */
1339 /* Largest number of bytes of an object that can be placed in a register.
1340 On the Alpha we have plenty of registers, so use TImode. */
1341 #define MAX_FIXED_MODE_SIZE GET_MODE_BITSIZE (TImode)
1343 /* Nonzero if access to memory by bytes is no faster than for words.
1344 Also non-zero if doing byte operations (specifically shifts) in registers
1347 On the Alpha, we want to not use the byte operation and instead use
1348 masking operations to access fields; these will save instructions. */
1350 #define SLOW_BYTE_ACCESS 1
1352 /* Define if operations between registers always perform the operation
1353 on the full register even if a narrower mode is specified. */
1354 #define WORD_REGISTER_OPERATIONS
1356 /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
1357 will either zero-extend or sign-extend. The value of this macro should
1358 be the code that says which one of the two operations is implicitly
1359 done, NIL if none. */
1360 #define LOAD_EXTEND_OP(MODE) SIGN_EXTEND
1362 /* Define if loading short immediate values into registers sign extends. */
1363 #define SHORT_IMMEDIATES_SIGN_EXTEND
1365 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1366 is done just by pretending it is already truncated. */
1367 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1369 /* We assume that the store-condition-codes instructions store 0 for false
1370 and some other value for true. This is the value stored for true. */
1372 #define STORE_FLAG_VALUE 1
1374 /* Define the value returned by a floating-point comparison instruction. */
1376 #define FLOAT_STORE_FLAG_VALUE 0.5
1378 /* Canonicalize a comparison from one we don't have to one we do have. */
1380 #define CANONICALIZE_COMPARISON(CODE,OP0,OP1) \
1382 if (((CODE) == GE || (CODE) == GT || (CODE) == GEU || (CODE) == GTU) \
1383 && (GET_CODE (OP1) == REG || (OP1) == const0_rtx)) \
1388 (CODE) = swap_condition (CODE); \
1390 if (((CODE) == LT || (CODE) == LTU) \
1391 && GET_CODE (OP1) == CONST_INT && INTVAL (OP1) == 256) \
1393 (CODE) = (CODE) == LT ? LE : LEU; \
1394 (OP1) = GEN_INT (255); \
1398 /* Specify the machine mode that pointers have.
1399 After generation of rtl, the compiler makes no further distinction
1400 between pointers and any other objects of this machine mode. */
1401 #define Pmode DImode
1403 /* Mode of a function address in a call instruction (for indexing purposes). */
1405 #define FUNCTION_MODE Pmode
1407 /* Define this if addresses of constant functions
1408 shouldn't be put through pseudo regs where they can be cse'd.
1409 Desirable on machines where ordinary constants are expensive
1410 but a CALL with constant address is cheap.
1412 We define this on the Alpha so that gen_call and gen_call_value
1413 get to see the SYMBOL_REF (for the hint field of the jsr). It will
1414 then copy it into a register, thus actually letting the address be
1417 #define NO_FUNCTION_CSE
1419 /* Define this to be nonzero if shift instructions ignore all but the low-order
1421 #define SHIFT_COUNT_TRUNCATED 1
1423 /* Use atexit for static constructors/destructors, instead of defining
1424 our own exit function. */
1427 /* Compute the cost of computing a constant rtl expression RTX
1428 whose rtx-code is CODE. The body of this macro is a portion
1429 of a switch statement. If the code is computed here,
1430 return it with a return statement. Otherwise, break from the switch.
1432 If this is an 8-bit constant, return zero since it can be used
1433 nearly anywhere with no cost. If it is a valid operand for an
1434 ADD or AND, likewise return 0 if we know it will be used in that
1435 context. Otherwise, return 2 since it might be used there later.
1436 All other constants take at least two insns. */
1438 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1440 if (INTVAL (RTX) >= 0 && INTVAL (RTX) < 256) \
1442 case CONST_DOUBLE: \
1443 if (((OUTER_CODE) == PLUS && add_operand (RTX, VOIDmode)) \
1444 || ((OUTER_CODE) == AND && and_operand (RTX, VOIDmode))) \
1446 else if (add_operand (RTX, VOIDmode) || and_operand (RTX, VOIDmode)) \
1449 return COSTS_N_INSNS (2); \
1453 return COSTS_N_INSNS (3);
1455 /* Provide the costs of a rtl expression. This is in the body of a
1458 #define RTX_COSTS(X,CODE,OUTER_CODE) \
1459 case PLUS: case MINUS: \
1460 if (FLOAT_MODE_P (GET_MODE (X))) \
1461 return COSTS_N_INSNS (6); \
1462 else if (GET_CODE (XEXP (X, 0)) == MULT \
1463 && const48_operand (XEXP (XEXP (X, 0), 1), VOIDmode)) \
1464 return (2 + rtx_cost (XEXP (XEXP (X, 0), 0), OUTER_CODE) \
1465 + rtx_cost (XEXP (X, 1), OUTER_CODE)); \
1468 if (FLOAT_MODE_P (GET_MODE (X))) \
1469 return COSTS_N_INSNS (6); \
1470 return COSTS_N_INSNS (23); \
1472 if (GET_CODE (XEXP (X, 1)) == CONST_INT \
1473 && INTVAL (XEXP (X, 1)) <= 3) \
1475 /* ... fall through ... */ \
1476 case ASHIFTRT: case LSHIFTRT: case IF_THEN_ELSE: \
1477 return COSTS_N_INSNS (2); \
1478 case DIV: case UDIV: case MOD: case UMOD: \
1479 if (GET_MODE (X) == SFmode) \
1480 return COSTS_N_INSNS (34); \
1481 else if (GET_MODE (X) == DFmode) \
1482 return COSTS_N_INSNS (63); \
1484 return COSTS_N_INSNS (70); \
1486 return COSTS_N_INSNS (3); \
1487 case FLOAT: case UNSIGNED_FLOAT: case FIX: case UNSIGNED_FIX: \
1488 case FLOAT_EXTEND: case FLOAT_TRUNCATE: \
1489 return COSTS_N_INSNS (6); \
1490 case NEG: case ABS: \
1491 if (FLOAT_MODE_P (GET_MODE (X))) \
1492 return COSTS_N_INSNS (6); \
1495 /* Control the assembler format that we output. */
1497 /* Output at beginning of assembler file. */
1499 #define ASM_FILE_START(FILE) \
1501 alpha_write_verstamp (FILE); \
1502 fprintf (FILE, "\t.set noreorder\n"); \
1503 fprintf (FILE, "\t.set volatile\n"); \
1504 fprintf (FILE, "\t.set noat\n"); \
1505 ASM_OUTPUT_SOURCE_FILENAME (FILE, main_input_filename); \
1508 /* Output to assembler file text saying following lines
1509 may contain character constants, extra white space, comments, etc. */
1511 #define ASM_APP_ON ""
1513 /* Output to assembler file text saying following lines
1514 no longer contain unusual constructs. */
1516 #define ASM_APP_OFF ""
1518 #define TEXT_SECTION_ASM_OP ".text"
1520 /* Output before read-only data. */
1522 #define READONLY_DATA_SECTION_ASM_OP ".rdata"
1524 /* Output before writable data. */
1526 #define DATA_SECTION_ASM_OP ".data"
1528 /* Define an extra section for read-only data, a routine to enter it, and
1529 indicate that it is for read-only data.
1531 The first time we enter the readonly data section for a file, we write
1532 eight bytes of zero. This works around a bug in DEC's assembler in
1533 some versions of OSF/1 V3.x. */
1535 #define EXTRA_SECTIONS readonly_data
1537 #define EXTRA_SECTION_FUNCTIONS \
1539 literal_section () \
1541 if (in_section != readonly_data) \
1543 static int firsttime = 1; \
1545 fprintf (asm_out_file, "%s\n", READONLY_DATA_SECTION_ASM_OP); \
1549 ASM_OUTPUT_DOUBLE_INT (asm_out_file, const0_rtx); \
1552 in_section = readonly_data; \
1556 #define READONLY_DATA_SECTION literal_section
1558 /* If we are referencing a function that is static, make the SYMBOL_REF
1559 special. We use this to see indicate we can branch to this function
1560 without setting PV or restoring GP. */
1562 #define ENCODE_SECTION_INFO(DECL) \
1563 if (TREE_CODE (DECL) == FUNCTION_DECL && ! TREE_PUBLIC (DECL)) \
1564 SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0)) = 1;
1566 /* How to refer to registers in assembler output.
1567 This sequence is indexed by compiler's hard-register-number (see above). */
1569 #define REGISTER_NAMES \
1570 {"$0", "$1", "$2", "$3", "$4", "$5", "$6", "$7", "$8", \
1571 "$9", "$10", "$11", "$12", "$13", "$14", "$15", \
1572 "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23", \
1573 "$24", "$25", "$26", "$27", "$28", "$29", "$30", "AP", \
1574 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", "$f8", \
1575 "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", \
1576 "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",\
1577 "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "FP"}
1579 /* How to renumber registers for dbx and gdb. */
1581 #define DBX_REGISTER_NUMBER(REGNO) (REGNO)
1583 /* This is how to output the definition of a user-level label named NAME,
1584 such as the label on a static function or variable NAME. */
1586 #define ASM_OUTPUT_LABEL(FILE,NAME) \
1587 do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
1589 /* This is how to output a command to make the user-level label named NAME
1590 defined for reference from other files. */
1592 #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
1593 do { fputs ("\t.globl ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0)
1595 /* This is how to output a reference to a user-level label named NAME.
1596 `assemble_name' uses this. */
1598 #define ASM_OUTPUT_LABELREF(FILE,NAME) \
1599 fprintf (FILE, "%s", NAME)
1601 /* This is how to output an internal numbered label where
1602 PREFIX is the class of label and NUM is the number within the class. */
1604 #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1605 if ((PREFIX)[0] == 'L') \
1606 fprintf (FILE, "$%s%d:\n", & (PREFIX)[1], NUM + 32); \
1608 fprintf (FILE, "%s%d:\n", PREFIX, NUM);
1610 /* This is how to output a label for a jump table. Arguments are the same as
1611 for ASM_OUTPUT_INTERNAL_LABEL, except the insn for the jump table is
1614 #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLEINSN) \
1615 { ASM_OUTPUT_ALIGN (FILE, 2); ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM); }
1617 /* This is how to store into the string LABEL
1618 the symbol_ref name of an internal numbered label where
1619 PREFIX is the class of label and NUM is the number within the class.
1620 This is suitable for output with `assemble_name'. */
1622 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1623 if ((PREFIX)[0] == 'L') \
1624 sprintf (LABEL, "*$%s%d", & (PREFIX)[1], NUM + 32); \
1626 sprintf (LABEL, "*%s%d", PREFIX, NUM)
1628 /* This is how to output an assembler line defining a `double' constant. */
1630 #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1632 if (REAL_VALUE_ISINF (VALUE) \
1633 || REAL_VALUE_ISNAN (VALUE) \
1634 || REAL_VALUE_MINUS_ZERO (VALUE)) \
1637 REAL_VALUE_TO_TARGET_DOUBLE ((VALUE), t); \
1638 fprintf (FILE, "\t.quad 0x%lx%08lx\n", \
1639 t[1] & 0xffffffff, t[0] & 0xffffffff); \
1644 REAL_VALUE_TO_DECIMAL (VALUE, "%.20e", str); \
1645 fprintf (FILE, "\t.t_floating %s\n", str); \
1649 /* This is how to output an assembler line defining a `float' constant. */
1651 #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1653 if (REAL_VALUE_ISINF (VALUE) \
1654 || REAL_VALUE_ISNAN (VALUE) \
1655 || REAL_VALUE_MINUS_ZERO (VALUE)) \
1658 REAL_VALUE_TO_TARGET_SINGLE ((VALUE), t); \
1659 fprintf (FILE, "\t.long 0x%lx\n", t & 0xffffffff); \
1664 REAL_VALUE_TO_DECIMAL ((VALUE), "%.20e", str); \
1665 fprintf (FILE, "\t.s_floating %s\n", str); \
1669 /* This is how to output an assembler line defining an `int' constant. */
1671 #define ASM_OUTPUT_INT(FILE,VALUE) \
1672 ( fprintf (FILE, "\t.long "), \
1673 output_addr_const (FILE, (VALUE)), \
1674 fprintf (FILE, "\n"))
1676 /* This is how to output an assembler line defining a `long' constant. */
1678 #define ASM_OUTPUT_DOUBLE_INT(FILE,VALUE) \
1679 ( fprintf (FILE, "\t.quad "), \
1680 output_addr_const (FILE, (VALUE)), \
1681 fprintf (FILE, "\n"))
1683 /* Likewise for `char' and `short' constants. */
1685 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1686 fprintf (FILE, "\t.word %d\n", \
1687 (GET_CODE (VALUE) == CONST_INT \
1688 ? INTVAL (VALUE) & 0xffff : (abort (), 0)))
1690 #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1691 fprintf (FILE, "\t.byte %d\n", \
1692 (GET_CODE (VALUE) == CONST_INT \
1693 ? INTVAL (VALUE) & 0xff : (abort (), 0)))
1695 /* We use the default ASCII-output routine, except that we don't write more
1696 than 50 characters since the assembler doesn't support very long lines. */
1698 #define ASM_OUTPUT_ASCII(MYFILE, MYSTRING, MYLENGTH) \
1700 FILE *_hide_asm_out_file = (MYFILE); \
1701 unsigned char *_hide_p = (unsigned char *) (MYSTRING); \
1702 int _hide_thissize = (MYLENGTH); \
1703 int _size_so_far = 0; \
1705 FILE *asm_out_file = _hide_asm_out_file; \
1706 unsigned char *p = _hide_p; \
1707 int thissize = _hide_thissize; \
1709 fprintf (asm_out_file, "\t.ascii \""); \
1711 for (i = 0; i < thissize; i++) \
1713 register int c = p[i]; \
1715 if (_size_so_far ++ > 50 && i < thissize - 4) \
1716 _size_so_far = 0, fprintf (asm_out_file, "\"\n\t.ascii \""); \
1718 if (c == '\"' || c == '\\') \
1719 putc ('\\', asm_out_file); \
1720 if (c >= ' ' && c < 0177) \
1721 putc (c, asm_out_file); \
1724 fprintf (asm_out_file, "\\%o", c); \
1725 /* After an octal-escape, if a digit follows, \
1726 terminate one string constant and start another. \
1727 The Vax assembler fails to stop reading the escape \
1728 after three digits, so this is the only way we \
1729 can get it to parse the data properly. */ \
1730 if (i < thissize - 1 \
1731 && p[i + 1] >= '0' && p[i + 1] <= '9') \
1732 _size_so_far = 0, fprintf (asm_out_file, "\"\n\t.ascii \""); \
1735 fprintf (asm_out_file, "\"\n"); \
1740 /* This is how to output an insn to push a register on the stack.
1741 It need not be very fast code. */
1743 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
1744 fprintf (FILE, "\tsubq $30,8,$30\n\tst%s $%s%d,0($30)\n", \
1745 (REGNO) > 32 ? "t" : "q", (REGNO) > 32 ? "f" : "", \
1748 /* This is how to output an insn to pop a register from the stack.
1749 It need not be very fast code. */
1751 #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
1752 fprintf (FILE, "\tld%s $%s%d,0($30)\n\taddq $30,8,$30\n", \
1753 (REGNO) > 32 ? "t" : "q", (REGNO) > 32 ? "f" : "", \
1756 /* This is how to output an assembler line for a numeric constant byte. */
1758 #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1759 fprintf (FILE, "\t.byte 0x%x\n", (VALUE) & 0xff)
1761 /* This is how to output an element of a case-vector that is absolute.
1762 (Alpha does not use such vectors, but we must define this macro anyway.) */
1764 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) abort ()
1766 /* This is how to output an element of a case-vector that is relative. */
1769 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
1770 fprintf (FILE, "\t.long $%d\n", (VALUE) + 32)
1772 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
1773 fprintf (FILE, "\t.gprel32 $%d\n", (VALUE) + 32)
1776 /* This is how to output an assembler line
1777 that says to advance the location counter
1778 to a multiple of 2**LOG bytes. */
1780 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1782 fprintf (FILE, "\t.align %d\n", LOG);
1784 /* This is how to advance the location counter by SIZE bytes. */
1786 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1787 fprintf (FILE, "\t.space %d\n", (SIZE))
1789 /* This says how to output an assembler line
1790 to define a global common symbol. */
1792 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1793 ( fputs ("\t.comm ", (FILE)), \
1794 assemble_name ((FILE), (NAME)), \
1795 fprintf ((FILE), ",%d\n", (SIZE)))
1797 /* This says how to output an assembler line
1798 to define a local common symbol. */
1800 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE,ROUNDED) \
1801 ( fputs ("\t.lcomm ", (FILE)), \
1802 assemble_name ((FILE), (NAME)), \
1803 fprintf ((FILE), ",%d\n", (SIZE)))
1805 /* Store in OUTPUT a string (made with alloca) containing
1806 an assembler-name for a local static variable named NAME.
1807 LABELNO is an integer which is different for each call. */
1809 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1810 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1811 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
1813 /* Define the parentheses used to group arithmetic operations
1814 in assembler code. */
1816 #define ASM_OPEN_PAREN "("
1817 #define ASM_CLOSE_PAREN ")"
1819 /* Define results of standard character escape sequences. */
1820 #define TARGET_BELL 007
1821 #define TARGET_BS 010
1822 #define TARGET_TAB 011
1823 #define TARGET_NEWLINE 012
1824 #define TARGET_VT 013
1825 #define TARGET_FF 014
1826 #define TARGET_CR 015
1828 /* Print operand X (an rtx) in assembler syntax to file FILE.
1829 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1830 For `%' followed by punctuation, CODE is the punctuation and X is null. */
1832 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
1834 /* Determine which codes are valid without a following integer. These must
1835 not be alphabetic. */
1837 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) 0
1839 /* Print a memory address as an operand to reference that memory location. */
1841 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1842 { rtx addr = (ADDR); \
1844 HOST_WIDE_INT offset = 0; \
1846 if (GET_CODE (addr) == AND) \
1847 addr = XEXP (addr, 0); \
1849 if (GET_CODE (addr) == REG) \
1850 basereg = REGNO (addr); \
1851 else if (GET_CODE (addr) == CONST_INT) \
1852 offset = INTVAL (addr); \
1853 else if (GET_CODE (addr) == PLUS \
1854 && GET_CODE (XEXP (addr, 0)) == REG \
1855 && GET_CODE (XEXP (addr, 1)) == CONST_INT) \
1856 basereg = REGNO (XEXP (addr, 0)), offset = INTVAL (XEXP (addr, 1)); \
1860 fprintf (FILE, "%d($%d)", offset, basereg); \
1862 /* Define the codes that are matched by predicates in alpha.c. */
1864 #define PREDICATE_CODES \
1865 {"reg_or_0_operand", {SUBREG, REG, CONST_INT}}, \
1866 {"reg_or_6bit_operand", {SUBREG, REG, CONST_INT}}, \
1867 {"reg_or_8bit_operand", {SUBREG, REG, CONST_INT}}, \
1868 {"cint8_operand", {CONST_INT}}, \
1869 {"reg_or_cint_operand", {SUBREG, REG, CONST_INT}}, \
1870 {"add_operand", {SUBREG, REG, CONST_INT}}, \
1871 {"sext_add_operand", {SUBREG, REG, CONST_INT}}, \
1872 {"const48_operand", {CONST_INT}}, \
1873 {"and_operand", {SUBREG, REG, CONST_INT}}, \
1874 {"or_operand", {SUBREG, REG, CONST_INT}}, \
1875 {"mode_mask_operand", {CONST_INT}}, \
1876 {"mul8_operand", {CONST_INT}}, \
1877 {"mode_width_operand", {CONST_INT}}, \
1878 {"reg_or_fp0_operand", {SUBREG, REG, CONST_DOUBLE}}, \
1879 {"alpha_comparison_operator", {EQ, LE, LT, LEU, LTU}}, \
1880 {"signed_comparison_operator", {EQ, NE, LE, LT, GE, GT}}, \
1881 {"divmod_operator", {DIV, MOD, UDIV, UMOD}}, \
1882 {"fp0_operand", {CONST_DOUBLE}}, \
1883 {"current_file_function_operand", {SYMBOL_REF}}, \
1884 {"call_operand", {REG, SYMBOL_REF}}, \
1885 {"input_operand", {SUBREG, REG, MEM, CONST_INT, CONST_DOUBLE, \
1886 SYMBOL_REF, CONST, LABEL_REF}}, \
1887 {"some_operand", {SUBREG, REG, MEM, CONST_INT, CONST_DOUBLE, \
1888 SYMBOL_REF, CONST, LABEL_REF}}, \
1889 {"aligned_memory_operand", {MEM}}, \
1890 {"unaligned_memory_operand", {MEM}}, \
1891 {"any_memory_operand", {MEM}},
1893 /* Tell collect that the object format is ECOFF. */
1894 #define OBJECT_FORMAT_COFF
1895 #define EXTENDED_COFF
1897 /* If we use NM, pass -g to it so it only lists globals. */
1898 #define NM_FLAGS "-pg"
1900 /* Definitions for debugging. */
1902 #define SDB_DEBUGGING_INFO /* generate info for mips-tfile */
1903 #define DBX_DEBUGGING_INFO /* generate embedded stabs */
1904 #define MIPS_DEBUGGING_INFO /* MIPS specific debugging info */
1906 #ifndef PREFERRED_DEBUGGING_TYPE /* assume SDB_DEBUGGING_INFO */
1907 #define PREFERRED_DEBUGGING_TYPE \
1908 ((len > 1 && !strncmp (str, "ggdb", len)) ? DBX_DEBUG : SDB_DEBUG)
1912 /* Correct the offset of automatic variables and arguments. Note that
1913 the Alpha debug format wants all automatic variables and arguments
1914 to be in terms of two different offsets from the virtual frame pointer,
1915 which is the stack pointer before any adjustment in the function.
1916 The offset for the argument pointer is fixed for the native compiler,
1917 it is either zero (for the no arguments case) or large enough to hold
1918 all argument registers.
1919 The offset for the auto pointer is the fourth argument to the .frame
1920 directive (local_offset).
1921 To stay compatible with the native tools we use the same offsets
1922 from the virtual frame pointer and adjust the debugger arg/auto offsets
1923 accordingly. These debugger offsets are set up in output_prolog. */
1925 extern long alpha_arg_offset;
1926 extern long alpha_auto_offset;
1927 #define DEBUGGER_AUTO_OFFSET(X) \
1928 ((GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0) + alpha_auto_offset)
1929 #define DEBUGGER_ARG_OFFSET(OFFSET, X) (OFFSET + alpha_arg_offset)
1932 #define ASM_OUTPUT_SOURCE_LINE(STREAM, LINE) \
1933 alpha_output_lineno (STREAM, LINE)
1934 extern void alpha_output_lineno ();
1936 #define ASM_OUTPUT_SOURCE_FILENAME(STREAM, NAME) \
1937 alpha_output_filename (STREAM, NAME)
1938 extern void alpha_output_filename ();
1941 /* mips-tfile.c limits us to strings of one page. */
1942 #define DBX_CONTIN_LENGTH 4000
1944 /* By default, turn on GDB extensions. */
1945 #define DEFAULT_GDB_EXTENSIONS 1
1947 /* If we are smuggling stabs through the ALPHA ECOFF object
1948 format, put a comment in front of the .stab<x> operation so
1949 that the ALPHA assembler does not choke. The mips-tfile program
1950 will correctly put the stab into the object file. */
1952 #define ASM_STABS_OP ((TARGET_GAS) ? ".stabs" : " #.stabs")
1953 #define ASM_STABN_OP ((TARGET_GAS) ? ".stabn" : " #.stabn")
1954 #define ASM_STABD_OP ((TARGET_GAS) ? ".stabd" : " #.stabd")
1956 /* Forward references to tags are allowed. */
1957 #define SDB_ALLOW_FORWARD_REFERENCES
1959 /* Unknown tags are also allowed. */
1960 #define SDB_ALLOW_UNKNOWN_REFERENCES
1962 #define PUT_SDB_DEF(a) \
1964 fprintf (asm_out_file, "\t%s.def\t", \
1965 (TARGET_GAS) ? "" : "#"); \
1966 ASM_OUTPUT_LABELREF (asm_out_file, a); \
1967 fputc (';', asm_out_file); \
1970 #define PUT_SDB_PLAIN_DEF(a) \
1972 fprintf (asm_out_file, "\t%s.def\t.%s;", \
1973 (TARGET_GAS) ? "" : "#", (a)); \
1976 #define PUT_SDB_TYPE(a) \
1978 fprintf (asm_out_file, "\t.type\t0x%x;", (a)); \
1981 /* For block start and end, we create labels, so that
1982 later we can figure out where the correct offset is.
1983 The normal .ent/.end serve well enough for functions,
1984 so those are just commented out. */
1986 extern int sdb_label_count; /* block start/end next label # */
1988 #define PUT_SDB_BLOCK_START(LINE) \
1990 fprintf (asm_out_file, \
1991 "$Lb%d:\n\t%s.begin\t$Lb%d\t%d\n", \
1993 (TARGET_GAS) ? "" : "#", \
1996 sdb_label_count++; \
1999 #define PUT_SDB_BLOCK_END(LINE) \
2001 fprintf (asm_out_file, \
2002 "$Le%d:\n\t%s.bend\t$Le%d\t%d\n", \
2004 (TARGET_GAS) ? "" : "#", \
2007 sdb_label_count++; \
2010 #define PUT_SDB_FUNCTION_START(LINE)
2012 #define PUT_SDB_FUNCTION_END(LINE)
2014 #define PUT_SDB_EPILOGUE_END(NAME)
2016 /* No point in running CPP on our assembler output. */
2017 #if ((TARGET_DEFAULT | TARGET_CPU_DEFAULT) & MASK_GAS) != 0
2018 /* Don't pass -g to GNU as, because some versions don't accept this option. */
2019 #define ASM_SPEC "%{malpha-as:-g} -nocpp %{pg}"
2021 /* In OSF/1 v3.2c, the assembler by default does not output file names which
2022 causes mips-tfile to fail. Passing -g to the assembler fixes this problem.
2023 ??? Stricly speaking, we only need -g if the user specifies -g. Passing
2024 it always means that we get slightly larger than necessary object files
2025 if the user does not specify -g. If we don't pass -g, then mips-tfile
2026 will need to be fixed to work in this case. */
2027 #define ASM_SPEC "%{!mgas:-g} -nocpp %{pg}"
2030 /* Specify to run a post-processor, mips-tfile after the assembler
2031 has run to stuff the ecoff debug information into the object file.
2032 This is needed because the Alpha assembler provides no way
2033 of specifying such information in the assembly file. */
2035 #if ((TARGET_DEFAULT | TARGET_CPU_DEFAULT) & MASK_GAS) != 0
2037 #define ASM_FINAL_SPEC "\
2038 %{malpha-as: %{!mno-mips-tfile: \
2039 \n mips-tfile %{v*: -v} \
2041 %{!K: %{save-temps: -I %b.o~}} \
2042 %{c:%W{o*}%{!o*:-o %b.o}}%{!c:-o %U.o} \
2043 %{.s:%i} %{!.s:%g.s}}}"
2046 #define ASM_FINAL_SPEC "\
2047 %{!mgas: %{!mno-mips-tfile: \
2048 \n mips-tfile %{v*: -v} \
2050 %{!K: %{save-temps: -I %b.o~}} \
2051 %{c:%W{o*}%{!o*:-o %b.o}}%{!c:-o %U.o} \
2052 %{.s:%i} %{!.s:%g.s}}}"
2056 /* Macros for mips-tfile.c to encapsulate stabs in ECOFF, and for
2057 mips-tdump.c to print them out.
2059 These must match the corresponding definitions in gdb/mipsread.c.
2060 Unfortunately, gcc and gdb do not currently share any directories. */
2062 #define CODE_MASK 0x8F300
2063 #define MIPS_IS_STAB(sym) (((sym)->index & 0xFFF00) == CODE_MASK)
2064 #define MIPS_MARK_STAB(code) ((code)+CODE_MASK)
2065 #define MIPS_UNMARK_STAB(code) ((code)-CODE_MASK)
2067 /* Override some mips-tfile definitions. */
2069 #define SHASH_SIZE 511
2070 #define THASH_SIZE 55
2072 /* Align ecoff symbol tables to avoid OSF1/1.3 nm complaints. */
2074 #define ALIGN_SYMTABLE_OFFSET(OFFSET) (((OFFSET) + 7) & ~7)
2076 /* The system headers under OSF/1 are C++-aware. */
2077 #define NO_IMPLICIT_EXTERN_C
2079 /* Also define __LANGUAGE_C__ when running fix-header. */
2080 #define FIXPROTO_INIT(CPPFILE) cpp_define (CPPFILE, "__LANGUAGE_C__")
2082 /* The linker will stick __main into the .init section. */
2083 #define HAS_INIT_SECTION
2084 #define LD_INIT_SWITCH "-init"
2085 #define LD_FINI_SWITCH "-fini"
2087 /* We do want to link in libgcc when building shared libraries under OSF/1. */
2088 #define LIBGCC_SPEC "-lgcc"
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