2 * Copyright (C) 2005 Free Software Foundation, Inc.
4 * This file is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2, or (at your option) any
9 * In addition to the permissions in the GNU General Public License, the
10 * Free Software Foundation gives you unlimited permission to link the
11 * compiled version of this file with other programs, and to distribute
12 * those programs without any restriction coming from the use of this
13 * file. (The General Public License restrictions do apply in other
14 * respects; for example, they cover modification of the file, and
15 * distribution when not linked into another program.)
17 * This file is distributed in the hope that it will be useful, but
18 * WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20 * General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 51 Franklin Street, Fifth Floor,
25 * Boston, MA 02110-1301, USA.
27 * As a special exception, if you link this library with files
28 * compiled with GCC to produce an executable, this does not cause
29 * the resulting executable to be covered by the GNU General Public License.
30 * This exception does not however invalidate any other reasons why
31 * the executable file might be covered by the GNU General Public License.
34 #define MXCSR_DAZ (1 << 6) /* Enable denormals are zero mode */
35 #define MXCSR_FTZ (1 << 15) /* Enable flush to zero mode */
37 #define FXSAVE (1 << 24)
40 static void __attribute__((constructor))
42 /* The i386 ABI only requires 4-byte stack alignment, so this is necessary
43 to make sure the fxsave struct gets correct alignment.
44 See PR27537 and PR28621. */
45 __attribute__ ((force_align_arg_pointer))
50 /* All 64-bit targets have SSE and DAZ; only check them explicitly
52 unsigned int eax, ebx, ecx, edx;
54 /* See if we can use cpuid. */
55 asm volatile ("pushfl; pushfl; popl %0; movl %0,%1; xorl %2,%0;"
56 "pushl %0; popfl; pushfl; popl %0; popfl"
57 : "=&r" (eax), "=&r" (ebx)
60 if (((eax ^ ebx) & 0x00200000) == 0)
63 /* Check the highest input value for eax. */
64 asm volatile ("xchgl %%ebx, %1; cpuid; xchgl %%ebx, %1"
65 : "=a" (eax), "=r" (ebx), "=c" (ecx), "=d" (edx)
71 asm volatile ("xchgl %%ebx, %1; cpuid; xchgl %%ebx, %1"
72 : "=a" (eax), "=r" (ebx), "=c" (ecx), "=d" (edx)
77 unsigned int mxcsr = __builtin_ia32_stmxcsr ();
83 /* Check if DAZ is available. */
86 unsigned short int cwd;
87 unsigned short int swd;
88 unsigned short int twd;
89 unsigned short int fop;
96 long int st_space[32];
97 long int xmm_space[32];
99 } __attribute__ ((aligned (16))) fxsave;
101 __builtin_memset (&fxsave, 0, sizeof (fxsave));
103 asm volatile ("fxsave %0" : "=m" (fxsave) : "m" (fxsave));
105 if (fxsave.mxcsr_mask & MXCSR_DAZ)
109 __builtin_ia32_ldmxcsr (mxcsr);
112 unsigned int mxcsr = __builtin_ia32_stmxcsr ();
113 mxcsr |= MXCSR_DAZ | MXCSR_FTZ;
114 __builtin_ia32_ldmxcsr (mxcsr);