1 /* Definitions of target machine GNU compiler. IA-64 version.
2 Copyright (C) 2002, 2003 Free Software Foundation, Inc.
3 Contributed by James E. Wilson <wilson@cygnus.com> and
4 David Mosberger <davidm@hpl.hp.com>.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
13 GCC is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING. If not, write to
20 the Free Software Foundation, 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
23 /* IA64 requires both XF and TF modes.
24 XFmode is __float80 is IEEE extended; TFmode is __float128
27 IEEE extended is 128 bits wide, except in ILP32 mode, but we
28 have to say it's 12 bytes so that the bitsize and wider_mode
29 tables are correctly set up. We correct its size below. */
31 FLOAT_MODE (XF, 12, ieee_extended_intel_128_format);
32 FLOAT_MODE (TF, 16, ieee_quad_format);
34 /* The above produces:
36 mode ILP32 size/align LP64 size/align
42 mode ILP32 size/align LP64 size/align
48 mode ILP32 size/align LP64 size/align
52 We fix this up here. */
54 ADJUST_BYTESIZE (XF, (TARGET_ILP32 && !TARGET_HPUX) ? 12 : 16);
55 ADJUST_ALIGNMENT (XF, (TARGET_ILP32 && !TARGET_HPUX) ? 4 : 16);
57 ADJUST_ALIGNMENT (TF, (TARGET_ILP32 && TARGET_HPUX) ? 8 : 16);
59 /* 256-bit integer mode is needed for STACK_SAVEAREA_MODE. */
62 /* Add any extra modes needed to represent the condition code.
64 CCImode is used to mark a single predicate register instead
65 of a register pair. This is currently only used in reg_raw_mode
66 so that flow doesn't do something stupid. */