1 ;; Constraint definitions for MIPS.
2 ;; Copyright (C) 2006 Free Software Foundation, Inc.
4 ;; This file is part of GCC.
6 ;; GCC is free software; you can redistribute it and/or modify
7 ;; it under the terms of the GNU General Public License as published by
8 ;; the Free Software Foundation; either version 2, or (at your option)
11 ;; GCC is distributed in the hope that it will be useful,
12 ;; but WITHOUT ANY WARRANTY; without even the implied warranty of
13 ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 ;; GNU General Public License for more details.
16 ;; You should have received a copy of the GNU General Public License
17 ;; along with GCC; see the file COPYING. If not, write to
18 ;; the Free Software Foundation, 51 Franklin Street, Fifth Floor,
19 ;; Boston, MA 02110-1301, USA.
21 ;; Register constraints
23 (define_register_constraint "d" "BASE_REG_CLASS"
24 "An address register. This is equivalent to @code{r} unless
25 generating MIPS16 code.")
27 (define_register_constraint "t" "T_REG"
30 (define_register_constraint "f" "TARGET_HARD_FLOAT ? FP_REGS : NO_REGS"
31 "A floating-point register (if available).")
33 (define_register_constraint "h" "HI_REG"
34 "The @code{hi} register.")
36 (define_register_constraint "l" "LO_REG"
37 "The @code{lo} register.")
39 (define_register_constraint "x" "MD_REGS"
40 "The @code{hi} and @code{lo} registers.")
42 (define_register_constraint "b" "ALL_REGS"
45 (define_register_constraint "c" "TARGET_ABICALLS ? PIC_FN_ADDR_REG
46 : TARGET_MIPS16 ? M16_NA_REGS
48 "A register suitable for use in an indirect jump. This will always be
49 @code{$25} for @option{-mabicalls}.")
51 (define_register_constraint "e" "LEA_REGS"
54 (define_register_constraint "j" "PIC_FN_ADDR_REG"
57 (define_register_constraint "v" "V1_REG"
60 (define_register_constraint "y" "GR_REGS"
61 "Equivalent to @code{r}; retained for backwards compatibility.")
63 (define_register_constraint "z" "ST_REGS"
64 "A floating-point condition code register.")
66 (define_register_constraint "A" "DSP_ACC_REGS"
69 (define_register_constraint "a" "ACC_REGS"
72 (define_register_constraint "B" "COP0_REGS"
75 (define_register_constraint "C" "COP2_REGS"
78 (define_register_constraint "D" "COP3_REGS"
81 ;; Integer constraints
83 (define_constraint "I"
84 "A signed 16-bit constant (for arithmetic instructions)."
85 (and (match_code "const_int")
86 (match_test "SMALL_OPERAND (ival)")))
88 (define_constraint "J"
90 (and (match_code "const_int")
91 (match_test "ival == 0")))
93 (define_constraint "K"
94 "An unsigned 16-bit constant (for logic instructions)."
95 (and (match_code "const_int")
96 (match_test "SMALL_OPERAND_UNSIGNED (ival)")))
98 (define_constraint "L"
99 "A signed 32-bit constant in which the lower 16 bits are zero.
100 Such constants can be loaded using @code{lui}."
101 (and (match_code "const_int")
102 (match_test "LUI_OPERAND (ival)")))
104 (define_constraint "M"
105 "A constant that cannot be loaded using @code{lui}, @code{addiu}
107 (and (match_code "const_int")
108 (match_test "!SMALL_OPERAND (ival)")
109 (match_test "!SMALL_OPERAND_UNSIGNED (ival)")
110 (match_test "!LUI_OPERAND (ival)")))
112 (define_constraint "N"
113 "A constant in the range -65535 to -1 (inclusive)."
114 (and (match_code "const_int")
115 (match_test "ival >= -0xffff && ival < 0")))
117 (define_constraint "O"
118 "A signed 15-bit constant."
119 (and (match_code "const_int")
120 (match_test "ival >= -0x4000 && ival < 0x4000")))
122 (define_constraint "P"
123 "A constant in the range 1 to 65535 (inclusive)."
124 (and (match_code "const_int")
125 (match_test "ival > 0 && ival < 0x10000")))
127 ;; Floating-point constraints
129 (define_constraint "G"
130 "Floating-point zero."
131 (and (match_code "const_double")
132 (match_test "op == CONST0_RTX (mode)")))
134 ;; General constraints
136 (define_constraint "Q"
138 (match_operand 0 "const_arith_operand"))
140 (define_memory_constraint "R"
141 "An address that can be used in a non-macro load or store."
142 (and (match_code "mem")
143 (match_test "mips_fetch_insns (op) == 1")))
145 (define_constraint "S"
147 A constant call address."
148 (and (match_operand 0 "call_insn_operand")
149 (match_test "CONSTANT_P (op)")))
151 (define_constraint "T"
153 A constant @code{move_operand} that cannot be safely loaded into @code{$25}
155 (and (match_operand 0 "move_operand")
156 (match_test "CONSTANT_P (op)")
157 (match_test "mips_dangerous_for_la25_p (op)")))
159 (define_constraint "U"
161 A constant @code{move_operand} that can be safely loaded into @code{$25}
163 (and (match_operand 0 "move_operand")
164 (match_test "CONSTANT_P (op)")
165 (match_test "!mips_dangerous_for_la25_p (op)")))
167 (define_memory_constraint "W"
169 A memory address based on a member of @code{BASE_REG_CLASS}. This is
170 true for all non-mips16 references (although it can sometimes be implicit
171 if @samp{!TARGET_EXPLICIT_RELOCS}). For MIPS16, it excludes stack and
172 constant-pool references."
173 (and (match_code "mem")
174 (match_operand 0 "memory_operand")
175 (ior (match_test "!TARGET_MIPS16")
176 (and (not (match_operand 0 "stack_operand"))
177 (not (match_test "CONSTANT_P (XEXP (op, 0))"))))))
179 (define_constraint "YG"
182 (and (match_code "const_vector")
183 (match_test "op == CONST0_RTX (mode)")))
185 (define_constraint "YA"
187 An unsigned 6-bit constant."
188 (and (match_code "const_int")
189 (match_test "UIMM6_OPERAND (ival)")))
191 (define_constraint "YB"
193 A signed 10-bit constant."
194 (and (match_code "const_int")
195 (match_test "IMM10_OPERAND (ival)")))