1 ; Options for the rs6000 port of the compiler
3 ; Copyright (C) 2005 Free Software Foundation, Inc.
4 ; Contributed by Aldy Hernandez <aldy@quesejoda.com>.
6 ; This file is part of GCC.
8 ; GCC is free software; you can redistribute it and/or modify it under
9 ; the terms of the GNU General Public License as published by the Free
10 ; Software Foundation; either version 2, or (at your option) any later
13 ; GCC is distributed in the hope that it will be useful, but WITHOUT
14 ; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 ; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
16 ; License for more details.
18 ; You should have received a copy of the GNU General Public License
19 ; along with GCC; see the file COPYING. If not, write to the Free
20 ; Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
24 Target Report RejectNegative Mask(POWER)
25 Use POWER instruction set
28 Target Report RejectNegative
29 Do not use POWER instruction set
32 Target Report Mask(POWER2)
33 Use POWER2 instruction set
36 Target Report RejectNegative Mask(POWERPC)
37 Use PowerPC instruction set
40 Target Report RejectNegative
41 Do not use PowerPC instruction set
44 Target Report Mask(POWERPC64)
45 Use PowerPC-64 instruction set
48 Target Report Mask(PPC_GPOPT)
49 Use PowerPC General Purpose group optional instructions
52 Target Report Mask(PPC_GFXOPT)
53 Use PowerPC Graphics group optional instructions
56 Target Report Mask(MFCRF)
57 Use PowerPC V2.01 single field mfcr instruction
60 Target Report Mask(POPCNTB)
61 Use PowerPC V2.02 popcntb instruction
64 Target Report Mask(FPRND)
65 Use PowerPC V2.02 floating point rounding instructions
68 Target Report Mask(ALTIVEC)
69 Use AltiVec instructions
72 Target Report Mask(MULHW)
73 Use 4xx half-word multiply instructions
76 Target Report Mask(DLMZB)
77 Use 4xx string-search dlmzb instruction
80 Target Report Mask(MULTIPLE)
81 Generate load/store multiple instructions
84 Target Report Mask(STRING)
85 Generate string instructions for block moves
88 Target Report RejectNegative Mask(NEW_MNEMONICS)
89 Use new mnemonics for PowerPC architecture
92 Target Report RejectNegative InverseMask(NEW_MNEMONICS)
93 Use old mnemonics for PowerPC architecture
96 Target Report RejectNegative Mask(SOFT_FLOAT)
97 Do not use hardware floating point
100 Target Report RejectNegative InverseMask(SOFT_FLOAT, HARD_FLOAT)
101 Use hardware floating point
104 Target Report RejectNegative Mask(NO_UPDATE)
105 Do not generate load/store with update instructions
108 Target Report RejectNegative InverseMask(NO_UPDATE, UPDATE)
109 Generate load/store with update instructions
112 Target Report RejectNegative Mask(NO_FUSED_MADD)
113 Do not generate fused multiply/add instructions
116 Target Report RejectNegative InverseMask(NO_FUSED_MADD, FUSED_MADD)
117 Generate fused multiply/add instructions
120 Target Report Var(TARGET_SCHED_PROLOG) Init(1)
121 Schedule the start and end of the procedure
124 Target Undocumented Var(TARGET_SCHED_PROLOG) VarExists
127 Target Report RejectNegative Var(aix_struct_return)
128 Return all structures in memory (AIX default)
131 Target Report RejectNegative Var(aix_struct_return,0) VarExists
132 Return small structures in registers (SVR4 default)
135 Target Report Var(TARGET_XL_COMPAT)
136 Conform more closely to IBM XLC semantics
139 Target Report Var(swdiv)
140 Generate software floating point divide for better throughput
143 Target Report RejectNegative Var(TARGET_NO_FP_IN_TOC)
144 Do not place floating point constants in TOC
147 Target Report RejectNegative Var(TARGET_NO_FP_IN_TOC,0)
148 Place floating point constants in TOC
151 Target RejectNegative Var(TARGET_NO_SUM_IN_TOC)
152 Do not place symbol+offset constants in TOC
155 Target RejectNegative Var(TARGET_NO_SUM_IN_TOC,0) VarExists
156 Place symbol+offset constants in TOC
158 ; Output only one TOC entry per module. Normally linking fails if
159 ; there are more than 16K unique variables/constants in an executable. With
160 ; this option, linking fails only if there are more than 16K modules, or
161 ; if there are more than 16K unique variables/constant in a single module.
163 ; This is at the cost of having 2 extra loads and one extra store per
164 ; function, and one less allocable register.
166 Target Report Mask(MINIMAL_TOC)
167 Use only one TOC entry per procedure
171 Put everything in the regular TOC
174 Target Report Var(TARGET_ALTIVEC_VRSAVE)
175 Generate VRSAVE instructions when generating AltiVec code
178 Target RejectNegative Joined
179 -mvrsave=yes/no Deprecated option. Use -mvrsave/-mno-vrsave instead
182 Target Var(rs6000_isel)
183 Generate isel instructions
186 Target RejectNegative Joined
187 -misel=yes/no Deprecated option. Use -misel/-mno-isel instead
190 Target Var(rs6000_spe)
191 Generate SPE SIMD instructions on E500
194 Target RejectNegative Joined
195 -mspe=yes/no Deprecated option. Use -mspe/-mno-spe instead
198 Target RejectNegative Joined
199 -mdebug= Enable debug output
202 Target RejectNegative Joined
203 -mabi= Specify ABI to use
206 Target RejectNegative Joined
207 -mcpu= Use features of and schedule code for given CPU
210 Target RejectNegative Joined
211 -mtune= Schedule code for given CPU
214 Target RejectNegative Joined
215 -mtraceback= Select full, part, or no traceback table
218 Target Report Var(rs6000_default_long_calls)
219 Avoid all range limits on call instructions
222 Target Var(rs6000_warn_altivec_long) Init(1)
223 Warn about deprecated 'vector long ...' AltiVec type usage
226 Target RejectNegative Joined
227 -mfloat-gprs= Select GPR floating point method
230 Target RejectNegative Joined UInteger
231 -mlong-double-<n> Specify size of long double (64 or 128 bits)
234 Target RejectNegative Joined
235 Determine which dependences between insns are considered costly
238 Target RejectNegative Joined
239 Specify which post scheduling nop insertion scheme to apply
242 Target RejectNegative Joined
243 Specify alignment of structure fields default/natural
245 mprioritize-restricted-insns=
246 Target RejectNegative Joined UInteger Var(rs6000_sched_restricted_insns_priority)
247 Specify scheduling priority for dispatch slot restricted insns