1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains the functions `gen_rtx', `gen_reg_rtx'
26 and `gen_label_rtx' that are the usual ways of creating rtl
27 expressions for most purposes.
29 It also has the functions for creating insns and linking
30 them in the doubly-linked chain.
32 The patterns of the insns are created by machine-dependent
33 routines in insn-emit.c, which is generated automatically from
34 the machine description. These routines use `gen_rtx' to make
35 the individual rtx's of the pattern; what is machine dependent
36 is the kind of rtx's they make and what arguments they use. */
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
55 #include "basic-block.h"
58 #include "langhooks.h"
60 /* Commonly used modes. */
62 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
63 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
64 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
65 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
68 /* This is *not* reset after each function. It gives each CODE_LABEL
69 in the entire compilation a unique label number. */
71 static int label_num = 1;
73 /* Highest label number in current function.
74 Zero means use the value of label_num instead.
75 This is nonzero only when belatedly compiling an inline function. */
77 static int last_label_num;
79 /* Value label_num had when set_new_first_and_last_label_number was called.
80 If label_num has not changed since then, last_label_num is valid. */
82 static int base_label_num;
84 /* Nonzero means do not generate NOTEs for source line numbers. */
86 static int no_line_numbers;
88 /* Commonly used rtx's, so that we only need space for one copy.
89 These are initialized once for the entire compilation.
90 All of these except perhaps the floating-point CONST_DOUBLEs
91 are unique; no other rtx-object will be equal to any of these. */
93 rtx global_rtl[GR_MAX];
95 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
96 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
97 record a copy of const[012]_rtx. */
99 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
103 REAL_VALUE_TYPE dconst0;
104 REAL_VALUE_TYPE dconst1;
105 REAL_VALUE_TYPE dconst2;
106 REAL_VALUE_TYPE dconstm1;
108 /* All references to the following fixed hard registers go through
109 these unique rtl objects. On machines where the frame-pointer and
110 arg-pointer are the same register, they use the same unique object.
112 After register allocation, other rtl objects which used to be pseudo-regs
113 may be clobbered to refer to the frame-pointer register.
114 But references that were originally to the frame-pointer can be
115 distinguished from the others because they contain frame_pointer_rtx.
117 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
118 tricky: until register elimination has taken place hard_frame_pointer_rtx
119 should be used if it is being set, and frame_pointer_rtx otherwise. After
120 register elimination hard_frame_pointer_rtx should always be used.
121 On machines where the two registers are same (most) then these are the
124 In an inline procedure, the stack and frame pointer rtxs may not be
125 used for anything else. */
126 rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
127 rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
128 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
129 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
130 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
132 /* This is used to implement __builtin_return_address for some machines.
133 See for instance the MIPS port. */
134 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
136 /* We make one copy of (const_int C) where C is in
137 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
138 to save space during the compilation and simplify comparisons of
141 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
143 /* A hash table storing CONST_INTs whose absolute value is greater
144 than MAX_SAVED_CONST_INT. */
146 static htab_t const_int_htab;
148 /* A hash table storing memory attribute structures. */
149 static htab_t mem_attrs_htab;
151 /* start_sequence and gen_sequence can make a lot of rtx expressions which are
152 shortly thrown away. We use two mechanisms to prevent this waste:
154 For sizes up to 5 elements, we keep a SEQUENCE and its associated
155 rtvec for use by gen_sequence. One entry for each size is
156 sufficient because most cases are calls to gen_sequence followed by
157 immediately emitting the SEQUENCE. Reuse is safe since emitting a
158 sequence is destructive on the insn in it anyway and hence can't be
161 We do not bother to save this cached data over nested function calls.
162 Instead, we just reinitialize them. */
164 #define SEQUENCE_RESULT_SIZE 5
166 static rtx sequence_result[SEQUENCE_RESULT_SIZE];
168 /* During RTL generation, we also keep a list of free INSN rtl codes. */
169 static rtx free_insn;
171 #define first_insn (cfun->emit->x_first_insn)
172 #define last_insn (cfun->emit->x_last_insn)
173 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
174 #define last_linenum (cfun->emit->x_last_linenum)
175 #define last_filename (cfun->emit->x_last_filename)
176 #define first_label_num (cfun->emit->x_first_label_num)
178 static rtx make_jump_insn_raw PARAMS ((rtx));
179 static rtx make_call_insn_raw PARAMS ((rtx));
180 static rtx find_line_note PARAMS ((rtx));
181 static void mark_sequence_stack PARAMS ((struct sequence_stack *));
182 static rtx change_address_1 PARAMS ((rtx, enum machine_mode, rtx,
184 static void unshare_all_rtl_1 PARAMS ((rtx));
185 static void unshare_all_decls PARAMS ((tree));
186 static void reset_used_decls PARAMS ((tree));
187 static void mark_label_nuses PARAMS ((rtx));
188 static hashval_t const_int_htab_hash PARAMS ((const void *));
189 static int const_int_htab_eq PARAMS ((const void *,
191 static hashval_t mem_attrs_htab_hash PARAMS ((const void *));
192 static int mem_attrs_htab_eq PARAMS ((const void *,
194 static void mem_attrs_mark PARAMS ((const void *));
195 static mem_attrs *get_mem_attrs PARAMS ((HOST_WIDE_INT, tree, rtx,
198 static tree component_ref_for_mem_expr PARAMS ((tree));
199 static rtx gen_const_vector_0 PARAMS ((enum machine_mode));
201 /* Probability of the conditional branch currently proceeded by try_split.
202 Set to -1 otherwise. */
203 int split_branch_probability = -1;
205 /* Returns a hash code for X (which is a really a CONST_INT). */
208 const_int_htab_hash (x)
211 return (hashval_t) INTVAL ((const struct rtx_def *) x);
214 /* Returns non-zero if the value represented by X (which is really a
215 CONST_INT) is the same as that given by Y (which is really a
219 const_int_htab_eq (x, y)
223 return (INTVAL ((const struct rtx_def *) x) == *((const HOST_WIDE_INT *) y));
226 /* Returns a hash code for X (which is a really a mem_attrs *). */
229 mem_attrs_htab_hash (x)
232 mem_attrs *p = (mem_attrs *) x;
234 return (p->alias ^ (p->align * 1000)
235 ^ ((p->offset ? INTVAL (p->offset) : 0) * 50000)
236 ^ ((p->size ? INTVAL (p->size) : 0) * 2500000)
240 /* Returns non-zero if the value represented by X (which is really a
241 mem_attrs *) is the same as that given by Y (which is also really a
245 mem_attrs_htab_eq (x, y)
249 mem_attrs *p = (mem_attrs *) x;
250 mem_attrs *q = (mem_attrs *) y;
252 return (p->alias == q->alias && p->expr == q->expr && p->offset == q->offset
253 && p->size == q->size && p->align == q->align);
256 /* This routine is called when we determine that we need a mem_attrs entry.
257 It marks the associated decl and RTL as being used, if present. */
263 mem_attrs *p = (mem_attrs *) x;
266 ggc_mark_tree (p->expr);
269 ggc_mark_rtx (p->offset);
272 ggc_mark_rtx (p->size);
275 /* Allocate a new mem_attrs structure and insert it into the hash table if
276 one identical to it is not already in the table. We are doing this for
280 get_mem_attrs (alias, expr, offset, size, align, mode)
286 enum machine_mode mode;
291 /* If everything is the default, we can just return zero. */
292 if (alias == 0 && expr == 0 && offset == 0
294 || (mode != BLKmode && GET_MODE_SIZE (mode) == INTVAL (size)))
295 && (align == BITS_PER_UNIT
297 && mode != BLKmode && align == GET_MODE_ALIGNMENT (mode))))
302 attrs.offset = offset;
306 slot = htab_find_slot (mem_attrs_htab, &attrs, INSERT);
309 *slot = ggc_alloc (sizeof (mem_attrs));
310 memcpy (*slot, &attrs, sizeof (mem_attrs));
316 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
317 don't attempt to share with the various global pieces of rtl (such as
318 frame_pointer_rtx). */
321 gen_raw_REG (mode, regno)
322 enum machine_mode mode;
325 rtx x = gen_rtx_raw_REG (mode, regno);
326 ORIGINAL_REGNO (x) = regno;
330 /* There are some RTL codes that require special attention; the generation
331 functions do the raw handling. If you add to this list, modify
332 special_rtx in gengenrtl.c as well. */
335 gen_rtx_CONST_INT (mode, arg)
336 enum machine_mode mode ATTRIBUTE_UNUSED;
341 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
342 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
344 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
345 if (const_true_rtx && arg == STORE_FLAG_VALUE)
346 return const_true_rtx;
349 /* Look up the CONST_INT in the hash table. */
350 slot = htab_find_slot_with_hash (const_int_htab, &arg,
351 (hashval_t) arg, INSERT);
353 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
358 /* CONST_DOUBLEs needs special handling because their length is known
362 gen_rtx_CONST_DOUBLE (mode, arg0, arg1)
363 enum machine_mode mode;
364 HOST_WIDE_INT arg0, arg1;
366 rtx r = rtx_alloc (CONST_DOUBLE);
370 X0EXP (r, 0) = NULL_RTX;
374 for (i = GET_RTX_LENGTH (CONST_DOUBLE) - 1; i > 2; --i)
381 gen_rtx_REG (mode, regno)
382 enum machine_mode mode;
385 /* In case the MD file explicitly references the frame pointer, have
386 all such references point to the same frame pointer. This is
387 used during frame pointer elimination to distinguish the explicit
388 references to these registers from pseudos that happened to be
391 If we have eliminated the frame pointer or arg pointer, we will
392 be using it as a normal register, for example as a spill
393 register. In such cases, we might be accessing it in a mode that
394 is not Pmode and therefore cannot use the pre-allocated rtx.
396 Also don't do this when we are making new REGs in reload, since
397 we don't want to get confused with the real pointers. */
399 if (mode == Pmode && !reload_in_progress)
401 if (regno == FRAME_POINTER_REGNUM)
402 return frame_pointer_rtx;
403 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
404 if (regno == HARD_FRAME_POINTER_REGNUM)
405 return hard_frame_pointer_rtx;
407 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
408 if (regno == ARG_POINTER_REGNUM)
409 return arg_pointer_rtx;
411 #ifdef RETURN_ADDRESS_POINTER_REGNUM
412 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
413 return return_address_pointer_rtx;
415 if (regno == PIC_OFFSET_TABLE_REGNUM
416 && fixed_regs[PIC_OFFSET_TABLE_REGNUM])
417 return pic_offset_table_rtx;
418 if (regno == STACK_POINTER_REGNUM)
419 return stack_pointer_rtx;
422 return gen_raw_REG (mode, regno);
426 gen_rtx_MEM (mode, addr)
427 enum machine_mode mode;
430 rtx rt = gen_rtx_raw_MEM (mode, addr);
432 /* This field is not cleared by the mere allocation of the rtx, so
440 gen_rtx_SUBREG (mode, reg, offset)
441 enum machine_mode mode;
445 /* This is the most common failure type.
446 Catch it early so we can see who does it. */
447 if ((offset % GET_MODE_SIZE (mode)) != 0)
450 /* This check isn't usable right now because combine will
451 throw arbitrary crap like a CALL into a SUBREG in
452 gen_lowpart_for_combine so we must just eat it. */
454 /* Check for this too. */
455 if (offset >= GET_MODE_SIZE (GET_MODE (reg)))
458 return gen_rtx_fmt_ei (SUBREG, mode, reg, offset);
461 /* Generate a SUBREG representing the least-significant part of REG if MODE
462 is smaller than mode of REG, otherwise paradoxical SUBREG. */
465 gen_lowpart_SUBREG (mode, reg)
466 enum machine_mode mode;
469 enum machine_mode inmode;
471 inmode = GET_MODE (reg);
472 if (inmode == VOIDmode)
474 return gen_rtx_SUBREG (mode, reg,
475 subreg_lowpart_offset (mode, inmode));
478 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
480 ** This routine generates an RTX of the size specified by
481 ** <code>, which is an RTX code. The RTX structure is initialized
482 ** from the arguments <element1> through <elementn>, which are
483 ** interpreted according to the specific RTX type's format. The
484 ** special machine mode associated with the rtx (if any) is specified
487 ** gen_rtx can be invoked in a way which resembles the lisp-like
488 ** rtx it will generate. For example, the following rtx structure:
490 ** (plus:QI (mem:QI (reg:SI 1))
491 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
493 ** ...would be generated by the following C code:
495 ** gen_rtx (PLUS, QImode,
496 ** gen_rtx (MEM, QImode,
497 ** gen_rtx (REG, SImode, 1)),
498 ** gen_rtx (MEM, QImode,
499 ** gen_rtx (PLUS, SImode,
500 ** gen_rtx (REG, SImode, 2),
501 ** gen_rtx (REG, SImode, 3)))),
506 gen_rtx VPARAMS ((enum rtx_code code, enum machine_mode mode, ...))
508 int i; /* Array indices... */
509 const char *fmt; /* Current rtx's format... */
510 rtx rt_val; /* RTX to return to caller... */
513 VA_FIXEDARG (p, enum rtx_code, code);
514 VA_FIXEDARG (p, enum machine_mode, mode);
519 rt_val = gen_rtx_CONST_INT (mode, va_arg (p, HOST_WIDE_INT));
524 HOST_WIDE_INT arg0 = va_arg (p, HOST_WIDE_INT);
525 HOST_WIDE_INT arg1 = va_arg (p, HOST_WIDE_INT);
527 rt_val = gen_rtx_CONST_DOUBLE (mode, arg0, arg1);
532 rt_val = gen_rtx_REG (mode, va_arg (p, int));
536 rt_val = gen_rtx_MEM (mode, va_arg (p, rtx));
540 rt_val = rtx_alloc (code); /* Allocate the storage space. */
541 rt_val->mode = mode; /* Store the machine mode... */
543 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
544 for (i = 0; i < GET_RTX_LENGTH (code); i++)
548 case '0': /* Unused field. */
551 case 'i': /* An integer? */
552 XINT (rt_val, i) = va_arg (p, int);
555 case 'w': /* A wide integer? */
556 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
559 case 's': /* A string? */
560 XSTR (rt_val, i) = va_arg (p, char *);
563 case 'e': /* An expression? */
564 case 'u': /* An insn? Same except when printing. */
565 XEXP (rt_val, i) = va_arg (p, rtx);
568 case 'E': /* An RTX vector? */
569 XVEC (rt_val, i) = va_arg (p, rtvec);
572 case 'b': /* A bitmap? */
573 XBITMAP (rt_val, i) = va_arg (p, bitmap);
576 case 't': /* A tree? */
577 XTREE (rt_val, i) = va_arg (p, tree);
591 /* gen_rtvec (n, [rt1, ..., rtn])
593 ** This routine creates an rtvec and stores within it the
594 ** pointers to rtx's which are its arguments.
599 gen_rtvec VPARAMS ((int n, ...))
605 VA_FIXEDARG (p, int, n);
608 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
610 vector = (rtx *) alloca (n * sizeof (rtx));
612 for (i = 0; i < n; i++)
613 vector[i] = va_arg (p, rtx);
615 /* The definition of VA_* in K&R C causes `n' to go out of scope. */
619 return gen_rtvec_v (save_n, vector);
623 gen_rtvec_v (n, argp)
631 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
633 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
635 for (i = 0; i < n; i++)
636 rt_val->elem[i] = *argp++;
641 /* Generate a REG rtx for a new pseudo register of mode MODE.
642 This pseudo is assigned the next sequential register number. */
646 enum machine_mode mode;
648 struct function *f = cfun;
651 /* Don't let anything called after initial flow analysis create new
656 if (generating_concat_p
657 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
658 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
660 /* For complex modes, don't make a single pseudo.
661 Instead, make a CONCAT of two pseudos.
662 This allows noncontiguous allocation of the real and imaginary parts,
663 which makes much better code. Besides, allocating DCmode
664 pseudos overstrains reload on some machines like the 386. */
665 rtx realpart, imagpart;
666 int size = GET_MODE_UNIT_SIZE (mode);
667 enum machine_mode partmode
668 = mode_for_size (size * BITS_PER_UNIT,
669 (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
670 ? MODE_FLOAT : MODE_INT),
673 realpart = gen_reg_rtx (partmode);
674 imagpart = gen_reg_rtx (partmode);
675 return gen_rtx_CONCAT (mode, realpart, imagpart);
678 /* Make sure regno_pointer_align, regno_decl, and regno_reg_rtx are large
679 enough to have an element for this pseudo reg number. */
681 if (reg_rtx_no == f->emit->regno_pointer_align_length)
683 int old_size = f->emit->regno_pointer_align_length;
688 new = xrealloc (f->emit->regno_pointer_align, old_size * 2);
689 memset (new + old_size, 0, old_size);
690 f->emit->regno_pointer_align = (unsigned char *) new;
692 new1 = (rtx *) xrealloc (f->emit->x_regno_reg_rtx,
693 old_size * 2 * sizeof (rtx));
694 memset (new1 + old_size, 0, old_size * sizeof (rtx));
695 regno_reg_rtx = new1;
697 new2 = (tree *) xrealloc (f->emit->regno_decl,
698 old_size * 2 * sizeof (tree));
699 memset (new2 + old_size, 0, old_size * sizeof (tree));
700 f->emit->regno_decl = new2;
702 f->emit->regno_pointer_align_length = old_size * 2;
705 val = gen_raw_REG (mode, reg_rtx_no);
706 regno_reg_rtx[reg_rtx_no++] = val;
710 /* Identify REG (which may be a CONCAT) as a user register. */
716 if (GET_CODE (reg) == CONCAT)
718 REG_USERVAR_P (XEXP (reg, 0)) = 1;
719 REG_USERVAR_P (XEXP (reg, 1)) = 1;
721 else if (GET_CODE (reg) == REG)
722 REG_USERVAR_P (reg) = 1;
727 /* Identify REG as a probable pointer register and show its alignment
728 as ALIGN, if nonzero. */
731 mark_reg_pointer (reg, align)
735 if (! REG_POINTER (reg))
737 REG_POINTER (reg) = 1;
740 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
742 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
743 /* We can no-longer be sure just how aligned this pointer is */
744 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
747 /* Return 1 plus largest pseudo reg number used in the current function. */
755 /* Return 1 + the largest label number used so far in the current function. */
760 if (last_label_num && label_num == base_label_num)
761 return last_label_num;
765 /* Return first label number used in this function (if any were used). */
768 get_first_label_num ()
770 return first_label_num;
773 /* Return the final regno of X, which is a SUBREG of a hard
776 subreg_hard_regno (x, check_mode)
780 enum machine_mode mode = GET_MODE (x);
781 unsigned int byte_offset, base_regno, final_regno;
782 rtx reg = SUBREG_REG (x);
784 /* This is where we attempt to catch illegal subregs
785 created by the compiler. */
786 if (GET_CODE (x) != SUBREG
787 || GET_CODE (reg) != REG)
789 base_regno = REGNO (reg);
790 if (base_regno >= FIRST_PSEUDO_REGISTER)
792 if (check_mode && ! HARD_REGNO_MODE_OK (base_regno, GET_MODE (reg)))
795 /* Catch non-congruent offsets too. */
796 byte_offset = SUBREG_BYTE (x);
797 if ((byte_offset % GET_MODE_SIZE (mode)) != 0)
800 final_regno = subreg_regno (x);
805 /* Return a value representing some low-order bits of X, where the number
806 of low-order bits is given by MODE. Note that no conversion is done
807 between floating-point and fixed-point values, rather, the bit
808 representation is returned.
810 This function handles the cases in common between gen_lowpart, below,
811 and two variants in cse.c and combine.c. These are the cases that can
812 be safely handled at all points in the compilation.
814 If this is not a case we can handle, return 0. */
817 gen_lowpart_common (mode, x)
818 enum machine_mode mode;
821 int msize = GET_MODE_SIZE (mode);
822 int xsize = GET_MODE_SIZE (GET_MODE (x));
825 if (GET_MODE (x) == mode)
828 /* MODE must occupy no more words than the mode of X. */
829 if (GET_MODE (x) != VOIDmode
830 && ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
831 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)))
834 offset = subreg_lowpart_offset (mode, GET_MODE (x));
836 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
837 && (GET_MODE_CLASS (mode) == MODE_INT
838 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
840 /* If we are getting the low-order part of something that has been
841 sign- or zero-extended, we can either just use the object being
842 extended or make a narrower extension. If we want an even smaller
843 piece than the size of the object being extended, call ourselves
846 This case is used mostly by combine and cse. */
848 if (GET_MODE (XEXP (x, 0)) == mode)
850 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
851 return gen_lowpart_common (mode, XEXP (x, 0));
852 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
853 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
855 else if (GET_CODE (x) == SUBREG || GET_CODE (x) == REG
856 || GET_CODE (x) == CONCAT)
857 return simplify_gen_subreg (mode, x, GET_MODE (x), offset);
858 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
859 from the low-order part of the constant. */
860 else if ((GET_MODE_CLASS (mode) == MODE_INT
861 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
862 && GET_MODE (x) == VOIDmode
863 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
865 /* If MODE is twice the host word size, X is already the desired
866 representation. Otherwise, if MODE is wider than a word, we can't
867 do this. If MODE is exactly a word, return just one CONST_INT. */
869 if (GET_MODE_BITSIZE (mode) >= 2 * HOST_BITS_PER_WIDE_INT)
871 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
873 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT)
874 return (GET_CODE (x) == CONST_INT ? x
875 : GEN_INT (CONST_DOUBLE_LOW (x)));
878 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
879 HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
880 : CONST_DOUBLE_LOW (x));
882 /* Sign extend to HOST_WIDE_INT. */
883 val = trunc_int_for_mode (val, mode);
885 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
890 #ifndef REAL_ARITHMETIC
891 /* If X is an integral constant but we want it in floating-point, it
892 must be the case that we have a union of an integer and a floating-point
893 value. If the machine-parameters allow it, simulate that union here
894 and return the result. The two-word and single-word cases are
897 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
898 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
899 || flag_pretend_float)
900 && GET_MODE_CLASS (mode) == MODE_FLOAT
901 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
902 && GET_CODE (x) == CONST_INT
903 && sizeof (float) * HOST_BITS_PER_CHAR == HOST_BITS_PER_WIDE_INT)
905 union {HOST_WIDE_INT i; float d; } u;
908 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
910 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
911 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
912 || flag_pretend_float)
913 && GET_MODE_CLASS (mode) == MODE_FLOAT
914 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
915 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
916 && GET_MODE (x) == VOIDmode
917 && (sizeof (double) * HOST_BITS_PER_CHAR
918 == 2 * HOST_BITS_PER_WIDE_INT))
920 union {HOST_WIDE_INT i[2]; double d; } u;
921 HOST_WIDE_INT low, high;
923 if (GET_CODE (x) == CONST_INT)
924 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
926 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
927 #ifdef HOST_WORDS_BIG_ENDIAN
928 u.i[0] = high, u.i[1] = low;
930 u.i[0] = low, u.i[1] = high;
932 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
935 /* Similarly, if this is converting a floating-point value into a
936 single-word integer. Only do this is the host and target parameters are
939 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
940 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
941 || flag_pretend_float)
942 && (GET_MODE_CLASS (mode) == MODE_INT
943 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
944 && GET_CODE (x) == CONST_DOUBLE
945 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
946 && GET_MODE_BITSIZE (mode) == BITS_PER_WORD)
947 return constant_subword (x, (offset / UNITS_PER_WORD), GET_MODE (x));
949 /* Similarly, if this is converting a floating-point value into a
950 two-word integer, we can do this one word at a time and make an
951 integer. Only do this is the host and target parameters are
954 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
955 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
956 || flag_pretend_float)
957 && (GET_MODE_CLASS (mode) == MODE_INT
958 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
959 && GET_CODE (x) == CONST_DOUBLE
960 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
961 && GET_MODE_BITSIZE (mode) == 2 * BITS_PER_WORD)
963 rtx lowpart, highpart;
965 lowpart = constant_subword (x,
966 (offset / UNITS_PER_WORD) + WORDS_BIG_ENDIAN,
968 highpart = constant_subword (x,
969 (offset / UNITS_PER_WORD) + (! WORDS_BIG_ENDIAN),
971 if (lowpart && GET_CODE (lowpart) == CONST_INT
972 && highpart && GET_CODE (highpart) == CONST_INT)
973 return immed_double_const (INTVAL (lowpart), INTVAL (highpart), mode);
975 #else /* ifndef REAL_ARITHMETIC */
977 /* When we have a FP emulator, we can handle all conversions between
978 FP and integer operands. This simplifies reload because it
979 doesn't have to deal with constructs like (subreg:DI
980 (const_double:SF ...)) or (subreg:DF (const_int ...)). */
981 /* Single-precision floats are always 32-bits and double-precision
982 floats are always 64-bits. */
984 else if (GET_MODE_CLASS (mode) == MODE_FLOAT
985 && GET_MODE_BITSIZE (mode) == 32
986 && GET_CODE (x) == CONST_INT)
992 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
993 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
995 else if (GET_MODE_CLASS (mode) == MODE_FLOAT
996 && GET_MODE_BITSIZE (mode) == 64
997 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
998 && GET_MODE (x) == VOIDmode)
1002 HOST_WIDE_INT low, high;
1004 if (GET_CODE (x) == CONST_INT)
1007 high = low >> (HOST_BITS_PER_WIDE_INT - 1);
1011 low = CONST_DOUBLE_LOW (x);
1012 high = CONST_DOUBLE_HIGH (x);
1015 #if HOST_BITS_PER_WIDE_INT == 32
1016 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
1018 if (WORDS_BIG_ENDIAN)
1019 i[0] = high, i[1] = low;
1021 i[0] = low, i[1] = high;
1026 r = REAL_VALUE_FROM_TARGET_DOUBLE (i);
1027 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
1029 else if ((GET_MODE_CLASS (mode) == MODE_INT
1030 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
1031 && GET_CODE (x) == CONST_DOUBLE
1032 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
1035 long i[4]; /* Only the low 32 bits of each 'long' are used. */
1036 int endian = WORDS_BIG_ENDIAN ? 1 : 0;
1038 /* Convert 'r' into an array of four 32-bit words in target word
1040 REAL_VALUE_FROM_CONST_DOUBLE (r, x);
1041 switch (GET_MODE_BITSIZE (GET_MODE (x)))
1044 REAL_VALUE_TO_TARGET_SINGLE (r, i[3 * endian]);
1047 i[3 - 3 * endian] = 0;
1050 REAL_VALUE_TO_TARGET_DOUBLE (r, i + 2 * endian);
1051 i[2 - 2 * endian] = 0;
1052 i[3 - 2 * endian] = 0;
1055 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i + endian);
1056 i[3 - 3 * endian] = 0;
1059 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i);
1064 /* Now, pack the 32-bit elements of the array into a CONST_DOUBLE
1066 #if HOST_BITS_PER_WIDE_INT == 32
1067 return immed_double_const (i[3 * endian], i[1 + endian], mode);
1069 if (HOST_BITS_PER_WIDE_INT != 64)
1072 return immed_double_const ((((unsigned long) i[3 * endian])
1073 | ((HOST_WIDE_INT) i[1 + endian] << 32)),
1074 (((unsigned long) i[2 - endian])
1075 | ((HOST_WIDE_INT) i[3 - 3 * endian] << 32)),
1079 #endif /* ifndef REAL_ARITHMETIC */
1081 /* Otherwise, we can't do this. */
1085 /* Return the real part (which has mode MODE) of a complex value X.
1086 This always comes at the low address in memory. */
1089 gen_realpart (mode, x)
1090 enum machine_mode mode;
1093 if (WORDS_BIG_ENDIAN
1094 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1096 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1098 ("can't access real part of complex value in hard register");
1099 else if (WORDS_BIG_ENDIAN)
1100 return gen_highpart (mode, x);
1102 return gen_lowpart (mode, x);
1105 /* Return the imaginary part (which has mode MODE) of a complex value X.
1106 This always comes at the high address in memory. */
1109 gen_imagpart (mode, x)
1110 enum machine_mode mode;
1113 if (WORDS_BIG_ENDIAN)
1114 return gen_lowpart (mode, x);
1115 else if (! WORDS_BIG_ENDIAN
1116 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1118 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1120 ("can't access imaginary part of complex value in hard register");
1122 return gen_highpart (mode, x);
1125 /* Return 1 iff X, assumed to be a SUBREG,
1126 refers to the real part of the complex value in its containing reg.
1127 Complex values are always stored with the real part in the first word,
1128 regardless of WORDS_BIG_ENDIAN. */
1131 subreg_realpart_p (x)
1134 if (GET_CODE (x) != SUBREG)
1137 return ((unsigned int) SUBREG_BYTE (x)
1138 < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x))));
1141 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1142 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1143 least-significant part of X.
1144 MODE specifies how big a part of X to return;
1145 it usually should not be larger than a word.
1146 If X is a MEM whose address is a QUEUED, the value may be so also. */
1149 gen_lowpart (mode, x)
1150 enum machine_mode mode;
1153 rtx result = gen_lowpart_common (mode, x);
1157 else if (GET_CODE (x) == REG)
1159 /* Must be a hard reg that's not valid in MODE. */
1160 result = gen_lowpart_common (mode, copy_to_reg (x));
1165 else if (GET_CODE (x) == MEM)
1167 /* The only additional case we can do is MEM. */
1169 if (WORDS_BIG_ENDIAN)
1170 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
1171 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1173 if (BYTES_BIG_ENDIAN)
1174 /* Adjust the address so that the address-after-the-data
1176 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
1177 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
1179 return adjust_address (x, mode, offset);
1181 else if (GET_CODE (x) == ADDRESSOF)
1182 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
1187 /* Like `gen_lowpart', but refer to the most significant part.
1188 This is used to access the imaginary part of a complex number. */
1191 gen_highpart (mode, x)
1192 enum machine_mode mode;
1195 unsigned int msize = GET_MODE_SIZE (mode);
1198 /* This case loses if X is a subreg. To catch bugs early,
1199 complain if an invalid MODE is used even in other cases. */
1200 if (msize > UNITS_PER_WORD
1201 && msize != GET_MODE_UNIT_SIZE (GET_MODE (x)))
1204 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1205 subreg_highpart_offset (mode, GET_MODE (x)));
1207 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1208 the target if we have a MEM. gen_highpart must return a valid operand,
1209 emitting code if necessary to do so. */
1210 if (result != NULL_RTX && GET_CODE (result) == MEM)
1211 result = validize_mem (result);
1218 /* Like gen_highpart_mode, but accept mode of EXP operand in case EXP can
1219 be VOIDmode constant. */
1221 gen_highpart_mode (outermode, innermode, exp)
1222 enum machine_mode outermode, innermode;
1225 if (GET_MODE (exp) != VOIDmode)
1227 if (GET_MODE (exp) != innermode)
1229 return gen_highpart (outermode, exp);
1231 return simplify_gen_subreg (outermode, exp, innermode,
1232 subreg_highpart_offset (outermode, innermode));
1234 /* Return offset in bytes to get OUTERMODE low part
1235 of the value in mode INNERMODE stored in memory in target format. */
1238 subreg_lowpart_offset (outermode, innermode)
1239 enum machine_mode outermode, innermode;
1241 unsigned int offset = 0;
1242 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1246 if (WORDS_BIG_ENDIAN)
1247 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1248 if (BYTES_BIG_ENDIAN)
1249 offset += difference % UNITS_PER_WORD;
1255 /* Return offset in bytes to get OUTERMODE high part
1256 of the value in mode INNERMODE stored in memory in target format. */
1258 subreg_highpart_offset (outermode, innermode)
1259 enum machine_mode outermode, innermode;
1261 unsigned int offset = 0;
1262 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1264 if (GET_MODE_SIZE (innermode) < GET_MODE_SIZE (outermode))
1269 if (! WORDS_BIG_ENDIAN)
1270 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1271 if (! BYTES_BIG_ENDIAN)
1272 offset += difference % UNITS_PER_WORD;
1278 /* Return 1 iff X, assumed to be a SUBREG,
1279 refers to the least significant part of its containing reg.
1280 If X is not a SUBREG, always return 1 (it is its own low part!). */
1283 subreg_lowpart_p (x)
1286 if (GET_CODE (x) != SUBREG)
1288 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1291 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1292 == SUBREG_BYTE (x));
1296 /* Helper routine for all the constant cases of operand_subword.
1297 Some places invoke this directly. */
1300 constant_subword (op, offset, mode)
1303 enum machine_mode mode;
1305 int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD;
1308 /* If OP is already an integer word, return it. */
1309 if (GET_MODE_CLASS (mode) == MODE_INT
1310 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
1313 #ifdef REAL_ARITHMETIC
1314 /* The output is some bits, the width of the target machine's word.
1315 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1317 if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1318 && GET_MODE_CLASS (mode) == MODE_FLOAT
1319 && GET_MODE_BITSIZE (mode) == 64
1320 && GET_CODE (op) == CONST_DOUBLE)
1325 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1326 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
1328 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1329 which the words are written depends on the word endianness.
1330 ??? This is a potential portability problem and should
1331 be fixed at some point.
1333 We must exercise caution with the sign bit. By definition there
1334 are 32 significant bits in K; there may be more in a HOST_WIDE_INT.
1335 Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT.
1336 So we explicitly mask and sign-extend as necessary. */
1337 if (BITS_PER_WORD == 32)
1340 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1341 return GEN_INT (val);
1343 #if HOST_BITS_PER_WIDE_INT >= 64
1344 else if (BITS_PER_WORD >= 64 && offset == 0)
1346 val = k[! WORDS_BIG_ENDIAN];
1347 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1348 val |= (HOST_WIDE_INT) k[WORDS_BIG_ENDIAN] & 0xffffffff;
1349 return GEN_INT (val);
1352 else if (BITS_PER_WORD == 16)
1354 val = k[offset >> 1];
1355 if ((offset & 1) == ! WORDS_BIG_ENDIAN)
1357 val = ((val & 0xffff) ^ 0x8000) - 0x8000;
1358 return GEN_INT (val);
1363 else if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1364 && GET_MODE_CLASS (mode) == MODE_FLOAT
1365 && GET_MODE_BITSIZE (mode) > 64
1366 && GET_CODE (op) == CONST_DOUBLE)
1371 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1372 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k);
1374 if (BITS_PER_WORD == 32)
1377 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1378 return GEN_INT (val);
1380 #if HOST_BITS_PER_WIDE_INT >= 64
1381 else if (BITS_PER_WORD >= 64 && offset <= 1)
1383 val = k[offset * 2 + ! WORDS_BIG_ENDIAN];
1384 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1385 val |= (HOST_WIDE_INT) k[offset * 2 + WORDS_BIG_ENDIAN] & 0xffffffff;
1386 return GEN_INT (val);
1392 #else /* no REAL_ARITHMETIC */
1393 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1394 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1395 || flag_pretend_float)
1396 && GET_MODE_CLASS (mode) == MODE_FLOAT
1397 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
1398 && GET_CODE (op) == CONST_DOUBLE)
1400 /* The constant is stored in the host's word-ordering,
1401 but we want to access it in the target's word-ordering. Some
1402 compilers don't like a conditional inside macro args, so we have two
1403 copies of the return. */
1404 #ifdef HOST_WORDS_BIG_ENDIAN
1405 return GEN_INT (offset == WORDS_BIG_ENDIAN
1406 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1408 return GEN_INT (offset != WORDS_BIG_ENDIAN
1409 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1412 #endif /* no REAL_ARITHMETIC */
1414 /* Single word float is a little harder, since single- and double-word
1415 values often do not have the same high-order bits. We have already
1416 verified that we want the only defined word of the single-word value. */
1417 #ifdef REAL_ARITHMETIC
1418 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1419 && GET_MODE_BITSIZE (mode) == 32
1420 && GET_CODE (op) == CONST_DOUBLE)
1425 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1426 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
1428 /* Sign extend from known 32-bit value to HOST_WIDE_INT. */
1430 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1432 if (BITS_PER_WORD == 16)
1434 if ((offset & 1) == ! WORDS_BIG_ENDIAN)
1436 val = ((val & 0xffff) ^ 0x8000) - 0x8000;
1439 return GEN_INT (val);
1442 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1443 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1444 || flag_pretend_float)
1445 && sizeof (float) * 8 == HOST_BITS_PER_WIDE_INT
1446 && GET_MODE_CLASS (mode) == MODE_FLOAT
1447 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1448 && GET_CODE (op) == CONST_DOUBLE)
1451 union {float f; HOST_WIDE_INT i; } u;
1453 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1456 return GEN_INT (u.i);
1458 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1459 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1460 || flag_pretend_float)
1461 && sizeof (double) * 8 == HOST_BITS_PER_WIDE_INT
1462 && GET_MODE_CLASS (mode) == MODE_FLOAT
1463 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1464 && GET_CODE (op) == CONST_DOUBLE)
1467 union {double d; HOST_WIDE_INT i; } u;
1469 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1472 return GEN_INT (u.i);
1474 #endif /* no REAL_ARITHMETIC */
1476 /* The only remaining cases that we can handle are integers.
1477 Convert to proper endianness now since these cases need it.
1478 At this point, offset == 0 means the low-order word.
1480 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1481 in general. However, if OP is (const_int 0), we can just return
1484 if (op == const0_rtx)
1487 if (GET_MODE_CLASS (mode) != MODE_INT
1488 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE)
1489 || BITS_PER_WORD > HOST_BITS_PER_WIDE_INT)
1492 if (WORDS_BIG_ENDIAN)
1493 offset = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - offset;
1495 /* Find out which word on the host machine this value is in and get
1496 it from the constant. */
1497 val = (offset / size_ratio == 0
1498 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
1499 : (GET_CODE (op) == CONST_INT
1500 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
1502 /* Get the value we want into the low bits of val. */
1503 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT)
1504 val = ((val >> ((offset % size_ratio) * BITS_PER_WORD)));
1506 val = trunc_int_for_mode (val, word_mode);
1508 return GEN_INT (val);
1511 /* Return subword OFFSET of operand OP.
1512 The word number, OFFSET, is interpreted as the word number starting
1513 at the low-order address. OFFSET 0 is the low-order word if not
1514 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1516 If we cannot extract the required word, we return zero. Otherwise,
1517 an rtx corresponding to the requested word will be returned.
1519 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1520 reload has completed, a valid address will always be returned. After
1521 reload, if a valid address cannot be returned, we return zero.
1523 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1524 it is the responsibility of the caller.
1526 MODE is the mode of OP in case it is a CONST_INT.
1528 ??? This is still rather broken for some cases. The problem for the
1529 moment is that all callers of this thing provide no 'goal mode' to
1530 tell us to work with. This exists because all callers were written
1531 in a word based SUBREG world.
1532 Now use of this function can be deprecated by simplify_subreg in most
1537 operand_subword (op, offset, validate_address, mode)
1539 unsigned int offset;
1540 int validate_address;
1541 enum machine_mode mode;
1543 if (mode == VOIDmode)
1544 mode = GET_MODE (op);
1546 if (mode == VOIDmode)
1549 /* If OP is narrower than a word, fail. */
1551 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1554 /* If we want a word outside OP, return zero. */
1556 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1559 /* Form a new MEM at the requested address. */
1560 if (GET_CODE (op) == MEM)
1562 rtx new = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1564 if (! validate_address)
1567 else if (reload_completed)
1569 if (! strict_memory_address_p (word_mode, XEXP (new, 0)))
1573 return replace_equiv_address (new, XEXP (new, 0));
1576 /* Rest can be handled by simplify_subreg. */
1577 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1580 /* Similar to `operand_subword', but never return 0. If we can't extract
1581 the required subword, put OP into a register and try again. If that fails,
1582 abort. We always validate the address in this case.
1584 MODE is the mode of OP, in case it is CONST_INT. */
1587 operand_subword_force (op, offset, mode)
1589 unsigned int offset;
1590 enum machine_mode mode;
1592 rtx result = operand_subword (op, offset, 1, mode);
1597 if (mode != BLKmode && mode != VOIDmode)
1599 /* If this is a register which can not be accessed by words, copy it
1600 to a pseudo register. */
1601 if (GET_CODE (op) == REG)
1602 op = copy_to_reg (op);
1604 op = force_reg (mode, op);
1607 result = operand_subword (op, offset, 1, mode);
1614 /* Given a compare instruction, swap the operands.
1615 A test instruction is changed into a compare of 0 against the operand. */
1618 reverse_comparison (insn)
1621 rtx body = PATTERN (insn);
1624 if (GET_CODE (body) == SET)
1625 comp = SET_SRC (body);
1627 comp = SET_SRC (XVECEXP (body, 0, 0));
1629 if (GET_CODE (comp) == COMPARE)
1631 rtx op0 = XEXP (comp, 0);
1632 rtx op1 = XEXP (comp, 1);
1633 XEXP (comp, 0) = op1;
1634 XEXP (comp, 1) = op0;
1638 rtx new = gen_rtx_COMPARE (VOIDmode,
1639 CONST0_RTX (GET_MODE (comp)), comp);
1640 if (GET_CODE (body) == SET)
1641 SET_SRC (body) = new;
1643 SET_SRC (XVECEXP (body, 0, 0)) = new;
1647 /* Within a MEM_EXPR, we care about either (1) a component ref of a decl,
1648 or (2) a component ref of something variable. Represent the later with
1649 a NULL expression. */
1652 component_ref_for_mem_expr (ref)
1655 tree inner = TREE_OPERAND (ref, 0);
1657 if (TREE_CODE (inner) == COMPONENT_REF)
1658 inner = component_ref_for_mem_expr (inner);
1661 tree placeholder_ptr = 0;
1663 /* Now remove any conversions: they don't change what the underlying
1664 object is. Likewise for SAVE_EXPR. Also handle PLACEHOLDER_EXPR. */
1665 while (TREE_CODE (inner) == NOP_EXPR || TREE_CODE (inner) == CONVERT_EXPR
1666 || TREE_CODE (inner) == NON_LVALUE_EXPR
1667 || TREE_CODE (inner) == VIEW_CONVERT_EXPR
1668 || TREE_CODE (inner) == SAVE_EXPR
1669 || TREE_CODE (inner) == PLACEHOLDER_EXPR)
1670 if (TREE_CODE (inner) == PLACEHOLDER_EXPR)
1671 inner = find_placeholder (inner, &placeholder_ptr);
1673 inner = TREE_OPERAND (inner, 0);
1675 if (! DECL_P (inner))
1679 if (inner == TREE_OPERAND (ref, 0))
1682 return build (COMPONENT_REF, TREE_TYPE (ref), inner,
1683 TREE_OPERAND (ref, 1));
1686 /* Given REF, a MEM, and T, either the type of X or the expression
1687 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1688 if we are making a new object of this type. */
1691 set_mem_attributes (ref, t, objectp)
1696 HOST_WIDE_INT alias = MEM_ALIAS_SET (ref);
1697 tree expr = MEM_EXPR (ref);
1698 rtx offset = MEM_OFFSET (ref);
1699 rtx size = MEM_SIZE (ref);
1700 unsigned int align = MEM_ALIGN (ref);
1703 /* It can happen that type_for_mode was given a mode for which there
1704 is no language-level type. In which case it returns NULL, which
1709 type = TYPE_P (t) ? t : TREE_TYPE (t);
1711 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1712 wrong answer, as it assumes that DECL_RTL already has the right alias
1713 info. Callers should not set DECL_RTL until after the call to
1714 set_mem_attributes. */
1715 if (DECL_P (t) && ref == DECL_RTL_IF_SET (t))
1718 /* Get the alias set from the expression or type (perhaps using a
1719 front-end routine) and use it. */
1720 alias = get_alias_set (t);
1722 MEM_VOLATILE_P (ref) = TYPE_VOLATILE (type);
1723 MEM_IN_STRUCT_P (ref) = AGGREGATE_TYPE_P (type);
1724 RTX_UNCHANGING_P (ref)
1725 |= ((lang_hooks.honor_readonly
1726 && (TYPE_READONLY (type) || TREE_READONLY (t)))
1727 || (! TYPE_P (t) && TREE_CONSTANT (t)));
1729 /* If we are making an object of this type, or if this is a DECL, we know
1730 that it is a scalar if the type is not an aggregate. */
1731 if ((objectp || DECL_P (t)) && ! AGGREGATE_TYPE_P (type))
1732 MEM_SCALAR_P (ref) = 1;
1734 /* We can set the alignment from the type if we are making an object,
1735 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1736 if (objectp || TREE_CODE (t) == INDIRECT_REF || TYPE_ALIGN_OK (type))
1737 align = MAX (align, TYPE_ALIGN (type));
1739 /* If the size is known, we can set that. */
1740 if (TYPE_SIZE_UNIT (type) && host_integerp (TYPE_SIZE_UNIT (type), 1))
1741 size = GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type), 1));
1743 /* If T is not a type, we may be able to deduce some more information about
1747 maybe_set_unchanging (ref, t);
1748 if (TREE_THIS_VOLATILE (t))
1749 MEM_VOLATILE_P (ref) = 1;
1751 /* Now remove any conversions: they don't change what the underlying
1752 object is. Likewise for SAVE_EXPR. */
1753 while (TREE_CODE (t) == NOP_EXPR || TREE_CODE (t) == CONVERT_EXPR
1754 || TREE_CODE (t) == NON_LVALUE_EXPR
1755 || TREE_CODE (t) == VIEW_CONVERT_EXPR
1756 || TREE_CODE (t) == SAVE_EXPR)
1757 t = TREE_OPERAND (t, 0);
1759 /* If this expression can't be addressed (e.g., it contains a reference
1760 to a non-addressable field), show we don't change its alias set. */
1761 if (! can_address_p (t))
1762 MEM_KEEP_ALIAS_SET_P (ref) = 1;
1764 /* If this is a decl, set the attributes of the MEM from it. */
1768 offset = const0_rtx;
1769 size = (DECL_SIZE_UNIT (t)
1770 && host_integerp (DECL_SIZE_UNIT (t), 1)
1771 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t), 1)) : 0);
1772 align = DECL_ALIGN (t);
1775 /* If this is a constant, we know the alignment. */
1776 else if (TREE_CODE_CLASS (TREE_CODE (t)) == 'c')
1778 align = TYPE_ALIGN (type);
1779 #ifdef CONSTANT_ALIGNMENT
1780 align = CONSTANT_ALIGNMENT (t, align);
1784 /* If this is a field reference and not a bit-field, record it. */
1785 /* ??? There is some information that can be gleened from bit-fields,
1786 such as the word offset in the structure that might be modified.
1787 But skip it for now. */
1788 else if (TREE_CODE (t) == COMPONENT_REF
1789 && ! DECL_BIT_FIELD (TREE_OPERAND (t, 1)))
1791 expr = component_ref_for_mem_expr (t);
1792 offset = const0_rtx;
1793 /* ??? Any reason the field size would be different than
1794 the size we got from the type? */
1797 /* If this is an array reference, look for an outer field reference. */
1798 else if (TREE_CODE (t) == ARRAY_REF)
1800 tree off_tree = size_zero_node;
1805 = fold (build (PLUS_EXPR, sizetype,
1806 fold (build (MULT_EXPR, sizetype,
1807 TREE_OPERAND (t, 1),
1808 TYPE_SIZE_UNIT (TREE_TYPE (t)))),
1810 t = TREE_OPERAND (t, 0);
1812 while (TREE_CODE (t) == ARRAY_REF);
1814 if (TREE_CODE (t) == COMPONENT_REF)
1816 expr = component_ref_for_mem_expr (t);
1817 if (host_integerp (off_tree, 1))
1818 offset = GEN_INT (tree_low_cst (off_tree, 1));
1819 /* ??? Any reason the field size would be different than
1820 the size we got from the type? */
1825 /* Now set the attributes we computed above. */
1827 = get_mem_attrs (alias, expr, offset, size, align, GET_MODE (ref));
1829 /* If this is already known to be a scalar or aggregate, we are done. */
1830 if (MEM_IN_STRUCT_P (ref) || MEM_SCALAR_P (ref))
1833 /* If it is a reference into an aggregate, this is part of an aggregate.
1834 Otherwise we don't know. */
1835 else if (TREE_CODE (t) == COMPONENT_REF || TREE_CODE (t) == ARRAY_REF
1836 || TREE_CODE (t) == ARRAY_RANGE_REF
1837 || TREE_CODE (t) == BIT_FIELD_REF)
1838 MEM_IN_STRUCT_P (ref) = 1;
1841 /* Set the alias set of MEM to SET. */
1844 set_mem_alias_set (mem, set)
1848 #ifdef ENABLE_CHECKING
1849 /* If the new and old alias sets don't conflict, something is wrong. */
1850 if (!alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)))
1854 MEM_ATTRS (mem) = get_mem_attrs (set, MEM_EXPR (mem), MEM_OFFSET (mem),
1855 MEM_SIZE (mem), MEM_ALIGN (mem),
1859 /* Set the alignment of MEM to ALIGN bits. */
1862 set_mem_align (mem, align)
1866 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1867 MEM_OFFSET (mem), MEM_SIZE (mem), align,
1871 /* Set the expr for MEM to EXPR. */
1874 set_mem_expr (mem, expr)
1879 = get_mem_attrs (MEM_ALIAS_SET (mem), expr, MEM_OFFSET (mem),
1880 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
1883 /* Set the offset of MEM to OFFSET. */
1886 set_mem_offset (mem, offset)
1889 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1890 offset, MEM_SIZE (mem), MEM_ALIGN (mem),
1894 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1895 and its address changed to ADDR. (VOIDmode means don't change the mode.
1896 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1897 returned memory location is required to be valid. The memory
1898 attributes are not changed. */
1901 change_address_1 (memref, mode, addr, validate)
1903 enum machine_mode mode;
1909 if (GET_CODE (memref) != MEM)
1911 if (mode == VOIDmode)
1912 mode = GET_MODE (memref);
1914 addr = XEXP (memref, 0);
1918 if (reload_in_progress || reload_completed)
1920 if (! memory_address_p (mode, addr))
1924 addr = memory_address (mode, addr);
1927 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1930 new = gen_rtx_MEM (mode, addr);
1931 MEM_COPY_ATTRIBUTES (new, memref);
1935 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1936 way we are changing MEMREF, so we only preserve the alias set. */
1939 change_address (memref, mode, addr)
1941 enum machine_mode mode;
1944 rtx new = change_address_1 (memref, mode, addr, 1);
1945 enum machine_mode mmode = GET_MODE (new);
1948 = get_mem_attrs (MEM_ALIAS_SET (memref), 0, 0,
1949 mmode == BLKmode ? 0 : GEN_INT (GET_MODE_SIZE (mmode)),
1950 (mmode == BLKmode ? BITS_PER_UNIT
1951 : GET_MODE_ALIGNMENT (mmode)),
1957 /* Return a memory reference like MEMREF, but with its mode changed
1958 to MODE and its address offset by OFFSET bytes. If VALIDATE is
1959 nonzero, the memory address is forced to be valid.
1960 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
1961 and caller is responsible for adjusting MEMREF base register. */
1964 adjust_address_1 (memref, mode, offset, validate, adjust)
1966 enum machine_mode mode;
1967 HOST_WIDE_INT offset;
1968 int validate, adjust;
1970 rtx addr = XEXP (memref, 0);
1972 rtx memoffset = MEM_OFFSET (memref);
1974 unsigned int memalign = MEM_ALIGN (memref);
1976 /* ??? Prefer to create garbage instead of creating shared rtl.
1977 This may happen even if offset is non-zero -- consider
1978 (plus (plus reg reg) const_int) -- so do this always. */
1979 addr = copy_rtx (addr);
1983 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
1984 object, we can merge it into the LO_SUM. */
1985 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
1987 && (unsigned HOST_WIDE_INT) offset
1988 < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
1989 addr = gen_rtx_LO_SUM (Pmode, XEXP (addr, 0),
1990 plus_constant (XEXP (addr, 1), offset));
1992 addr = plus_constant (addr, offset);
1995 new = change_address_1 (memref, mode, addr, validate);
1997 /* Compute the new values of the memory attributes due to this adjustment.
1998 We add the offsets and update the alignment. */
2000 memoffset = GEN_INT (offset + INTVAL (memoffset));
2002 /* Compute the new alignment by taking the MIN of the alignment and the
2003 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
2008 (unsigned HOST_WIDE_INT) (offset & -offset) * BITS_PER_UNIT);
2010 /* We can compute the size in a number of ways. */
2011 if (GET_MODE (new) != BLKmode)
2012 size = GEN_INT (GET_MODE_SIZE (GET_MODE (new)));
2013 else if (MEM_SIZE (memref))
2014 size = plus_constant (MEM_SIZE (memref), -offset);
2016 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref),
2017 memoffset, size, memalign, GET_MODE (new));
2019 /* At some point, we should validate that this offset is within the object,
2020 if all the appropriate values are known. */
2024 /* Return a memory reference like MEMREF, but with its mode changed
2025 to MODE and its address changed to ADDR, which is assumed to be
2026 MEMREF offseted by OFFSET bytes. If VALIDATE is
2027 nonzero, the memory address is forced to be valid. */
2030 adjust_automodify_address_1 (memref, mode, addr, offset, validate)
2032 enum machine_mode mode;
2034 HOST_WIDE_INT offset;
2037 memref = change_address_1 (memref, VOIDmode, addr, validate);
2038 return adjust_address_1 (memref, mode, offset, validate, 0);
2041 /* Return a memory reference like MEMREF, but whose address is changed by
2042 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2043 known to be in OFFSET (possibly 1). */
2046 offset_address (memref, offset, pow2)
2051 rtx new, addr = XEXP (memref, 0);
2053 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
2055 /* At this point we don't know _why_ the address is invalid. It
2056 could have secondary memory refereces, multiplies or anything.
2058 However, if we did go and rearrange things, we can wind up not
2059 being able to recognize the magic around pic_offset_table_rtx.
2060 This stuff is fragile, and is yet another example of why it is
2061 bad to expose PIC machinery too early. */
2062 if (! memory_address_p (GET_MODE (memref), new)
2063 && GET_CODE (addr) == PLUS
2064 && XEXP (addr, 0) == pic_offset_table_rtx)
2066 addr = force_reg (GET_MODE (addr), addr);
2067 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
2070 update_temp_slot_address (XEXP (memref, 0), new);
2071 new = change_address_1 (memref, VOIDmode, new, 1);
2073 /* Update the alignment to reflect the offset. Reset the offset, which
2076 = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref), 0, 0,
2077 MIN (MEM_ALIGN (memref),
2078 (unsigned HOST_WIDE_INT) pow2 * BITS_PER_UNIT),
2083 /* Return a memory reference like MEMREF, but with its address changed to
2084 ADDR. The caller is asserting that the actual piece of memory pointed
2085 to is the same, just the form of the address is being changed, such as
2086 by putting something into a register. */
2089 replace_equiv_address (memref, addr)
2093 /* change_address_1 copies the memory attribute structure without change
2094 and that's exactly what we want here. */
2095 update_temp_slot_address (XEXP (memref, 0), addr);
2096 return change_address_1 (memref, VOIDmode, addr, 1);
2099 /* Likewise, but the reference is not required to be valid. */
2102 replace_equiv_address_nv (memref, addr)
2106 return change_address_1 (memref, VOIDmode, addr, 0);
2109 /* Return a memory reference like MEMREF, but with its mode widened to
2110 MODE and offset by OFFSET. This would be used by targets that e.g.
2111 cannot issue QImode memory operations and have to use SImode memory
2112 operations plus masking logic. */
2115 widen_memory_access (memref, mode, offset)
2117 enum machine_mode mode;
2118 HOST_WIDE_INT offset;
2120 rtx new = adjust_address_1 (memref, mode, offset, 1, 1);
2121 tree expr = MEM_EXPR (new);
2122 rtx memoffset = MEM_OFFSET (new);
2123 unsigned int size = GET_MODE_SIZE (mode);
2125 /* If we don't know what offset we were at within the expression, then
2126 we can't know if we've overstepped the bounds. */
2132 if (TREE_CODE (expr) == COMPONENT_REF)
2134 tree field = TREE_OPERAND (expr, 1);
2136 if (! DECL_SIZE_UNIT (field))
2142 /* Is the field at least as large as the access? If so, ok,
2143 otherwise strip back to the containing structure. */
2144 if (TREE_CODE (DECL_SIZE_UNIT (field)) == INTEGER_CST
2145 && compare_tree_int (DECL_SIZE_UNIT (field), size) >= 0
2146 && INTVAL (memoffset) >= 0)
2149 if (! host_integerp (DECL_FIELD_OFFSET (field), 1))
2155 expr = TREE_OPERAND (expr, 0);
2156 memoffset = (GEN_INT (INTVAL (memoffset)
2157 + tree_low_cst (DECL_FIELD_OFFSET (field), 1)
2158 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 1)
2161 /* Similarly for the decl. */
2162 else if (DECL_P (expr)
2163 && DECL_SIZE_UNIT (expr)
2164 && compare_tree_int (DECL_SIZE_UNIT (expr), size) >= 0
2165 && (! memoffset || INTVAL (memoffset) >= 0))
2169 /* The widened memory access overflows the expression, which means
2170 that it could alias another expression. Zap it. */
2177 memoffset = NULL_RTX;
2179 /* The widened memory may alias other stuff, so zap the alias set. */
2180 /* ??? Maybe use get_alias_set on any remaining expression. */
2182 MEM_ATTRS (new) = get_mem_attrs (0, expr, memoffset, GEN_INT (size),
2183 MEM_ALIGN (new), mode);
2188 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2195 label = gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX,
2196 NULL_RTX, label_num++, NULL, NULL);
2198 LABEL_NUSES (label) = 0;
2199 LABEL_ALTERNATE_NAME (label) = NULL;
2203 /* For procedure integration. */
2205 /* Install new pointers to the first and last insns in the chain.
2206 Also, set cur_insn_uid to one higher than the last in use.
2207 Used for an inline-procedure after copying the insn chain. */
2210 set_new_first_and_last_insn (first, last)
2219 for (insn = first; insn; insn = NEXT_INSN (insn))
2220 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2225 /* Set the range of label numbers found in the current function.
2226 This is used when belatedly compiling an inline function. */
2229 set_new_first_and_last_label_num (first, last)
2232 base_label_num = label_num;
2233 first_label_num = first;
2234 last_label_num = last;
2237 /* Set the last label number found in the current function.
2238 This is used when belatedly compiling an inline function. */
2241 set_new_last_label_num (last)
2244 base_label_num = label_num;
2245 last_label_num = last;
2248 /* Restore all variables describing the current status from the structure *P.
2249 This is used after a nested function. */
2252 restore_emit_status (p)
2253 struct function *p ATTRIBUTE_UNUSED;
2256 clear_emit_caches ();
2259 /* Clear out all parts of the state in F that can safely be discarded
2260 after the function has been compiled, to let garbage collection
2261 reclaim the memory. */
2264 free_emit_status (f)
2267 free (f->emit->x_regno_reg_rtx);
2268 free (f->emit->regno_pointer_align);
2269 free (f->emit->regno_decl);
2274 /* Go through all the RTL insn bodies and copy any invalid shared
2275 structure. This routine should only be called once. */
2278 unshare_all_rtl (fndecl, insn)
2284 /* Make sure that virtual parameters are not shared. */
2285 for (decl = DECL_ARGUMENTS (fndecl); decl; decl = TREE_CHAIN (decl))
2286 SET_DECL_RTL (decl, copy_rtx_if_shared (DECL_RTL (decl)));
2288 /* Make sure that virtual stack slots are not shared. */
2289 unshare_all_decls (DECL_INITIAL (fndecl));
2291 /* Unshare just about everything else. */
2292 unshare_all_rtl_1 (insn);
2294 /* Make sure the addresses of stack slots found outside the insn chain
2295 (such as, in DECL_RTL of a variable) are not shared
2296 with the insn chain.
2298 This special care is necessary when the stack slot MEM does not
2299 actually appear in the insn chain. If it does appear, its address
2300 is unshared from all else at that point. */
2301 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
2304 /* Go through all the RTL insn bodies and copy any invalid shared
2305 structure, again. This is a fairly expensive thing to do so it
2306 should be done sparingly. */
2309 unshare_all_rtl_again (insn)
2315 for (p = insn; p; p = NEXT_INSN (p))
2318 reset_used_flags (PATTERN (p));
2319 reset_used_flags (REG_NOTES (p));
2320 reset_used_flags (LOG_LINKS (p));
2323 /* Make sure that virtual stack slots are not shared. */
2324 reset_used_decls (DECL_INITIAL (cfun->decl));
2326 /* Make sure that virtual parameters are not shared. */
2327 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
2328 reset_used_flags (DECL_RTL (decl));
2330 reset_used_flags (stack_slot_list);
2332 unshare_all_rtl (cfun->decl, insn);
2335 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2336 Assumes the mark bits are cleared at entry. */
2339 unshare_all_rtl_1 (insn)
2342 for (; insn; insn = NEXT_INSN (insn))
2345 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
2346 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
2347 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
2351 /* Go through all virtual stack slots of a function and copy any
2352 shared structure. */
2354 unshare_all_decls (blk)
2359 /* Copy shared decls. */
2360 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2361 if (DECL_RTL_SET_P (t))
2362 SET_DECL_RTL (t, copy_rtx_if_shared (DECL_RTL (t)));
2364 /* Now process sub-blocks. */
2365 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2366 unshare_all_decls (t);
2369 /* Go through all virtual stack slots of a function and mark them as
2372 reset_used_decls (blk)
2378 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2379 if (DECL_RTL_SET_P (t))
2380 reset_used_flags (DECL_RTL (t));
2382 /* Now process sub-blocks. */
2383 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2384 reset_used_decls (t);
2387 /* Similar to `copy_rtx' except that if MAY_SHARE is present, it is
2388 placed in the result directly, rather than being copied. MAY_SHARE is
2389 either a MEM of an EXPR_LIST of MEMs. */
2392 copy_most_rtx (orig, may_share)
2399 const char *format_ptr;
2401 if (orig == may_share
2402 || (GET_CODE (may_share) == EXPR_LIST
2403 && in_expr_list_p (may_share, orig)))
2406 code = GET_CODE (orig);
2424 copy = rtx_alloc (code);
2425 PUT_MODE (copy, GET_MODE (orig));
2426 copy->in_struct = orig->in_struct;
2427 copy->volatil = orig->volatil;
2428 copy->unchanging = orig->unchanging;
2429 copy->integrated = orig->integrated;
2430 copy->frame_related = orig->frame_related;
2432 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
2434 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
2436 switch (*format_ptr++)
2439 XEXP (copy, i) = XEXP (orig, i);
2440 if (XEXP (orig, i) != NULL && XEXP (orig, i) != may_share)
2441 XEXP (copy, i) = copy_most_rtx (XEXP (orig, i), may_share);
2445 XEXP (copy, i) = XEXP (orig, i);
2450 XVEC (copy, i) = XVEC (orig, i);
2451 if (XVEC (orig, i) != NULL)
2453 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
2454 for (j = 0; j < XVECLEN (copy, i); j++)
2455 XVECEXP (copy, i, j)
2456 = copy_most_rtx (XVECEXP (orig, i, j), may_share);
2461 XWINT (copy, i) = XWINT (orig, i);
2466 XINT (copy, i) = XINT (orig, i);
2470 XTREE (copy, i) = XTREE (orig, i);
2475 XSTR (copy, i) = XSTR (orig, i);
2479 /* Copy this through the wide int field; that's safest. */
2480 X0WINT (copy, i) = X0WINT (orig, i);
2490 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2491 Recursively does the same for subexpressions. */
2494 copy_rtx_if_shared (orig)
2500 const char *format_ptr;
2506 code = GET_CODE (x);
2508 /* These types may be freely shared. */
2522 /* SCRATCH must be shared because they represent distinct values. */
2526 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2527 a LABEL_REF, it isn't sharable. */
2528 if (GET_CODE (XEXP (x, 0)) == PLUS
2529 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
2530 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
2539 /* The chain of insns is not being copied. */
2543 /* A MEM is allowed to be shared if its address is constant.
2545 We used to allow sharing of MEMs which referenced
2546 virtual_stack_vars_rtx or virtual_incoming_args_rtx, but
2547 that can lose. instantiate_virtual_regs will not unshare
2548 the MEMs, and combine may change the structure of the address
2549 because it looks safe and profitable in one context, but
2550 in some other context it creates unrecognizable RTL. */
2551 if (CONSTANT_ADDRESS_P (XEXP (x, 0)))
2560 /* This rtx may not be shared. If it has already been seen,
2561 replace it with a copy of itself. */
2567 copy = rtx_alloc (code);
2569 (sizeof (*copy) - sizeof (copy->fld)
2570 + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code)));
2576 /* Now scan the subexpressions recursively.
2577 We can store any replaced subexpressions directly into X
2578 since we know X is not shared! Any vectors in X
2579 must be copied if X was copied. */
2581 format_ptr = GET_RTX_FORMAT (code);
2583 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2585 switch (*format_ptr++)
2588 XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
2592 if (XVEC (x, i) != NULL)
2595 int len = XVECLEN (x, i);
2597 if (copied && len > 0)
2598 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
2599 for (j = 0; j < len; j++)
2600 XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j));
2608 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2609 to look for shared sub-parts. */
2612 reset_used_flags (x)
2617 const char *format_ptr;
2622 code = GET_CODE (x);
2624 /* These types may be freely shared so we needn't do any resetting
2646 /* The chain of insns is not being copied. */
2655 format_ptr = GET_RTX_FORMAT (code);
2656 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2658 switch (*format_ptr++)
2661 reset_used_flags (XEXP (x, i));
2665 for (j = 0; j < XVECLEN (x, i); j++)
2666 reset_used_flags (XVECEXP (x, i, j));
2672 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2673 Return X or the rtx for the pseudo reg the value of X was copied into.
2674 OTHER must be valid as a SET_DEST. */
2677 make_safe_from (x, other)
2681 switch (GET_CODE (other))
2684 other = SUBREG_REG (other);
2686 case STRICT_LOW_PART:
2689 other = XEXP (other, 0);
2695 if ((GET_CODE (other) == MEM
2697 && GET_CODE (x) != REG
2698 && GET_CODE (x) != SUBREG)
2699 || (GET_CODE (other) == REG
2700 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2701 || reg_mentioned_p (other, x))))
2703 rtx temp = gen_reg_rtx (GET_MODE (x));
2704 emit_move_insn (temp, x);
2710 /* Emission of insns (adding them to the doubly-linked list). */
2712 /* Return the first insn of the current sequence or current function. */
2720 /* Return the last insn emitted in current sequence or current function. */
2728 /* Specify a new insn as the last in the chain. */
2731 set_last_insn (insn)
2734 if (NEXT_INSN (insn) != 0)
2739 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2742 get_last_insn_anywhere ()
2744 struct sequence_stack *stack;
2747 for (stack = seq_stack; stack; stack = stack->next)
2748 if (stack->last != 0)
2753 /* Return a number larger than any instruction's uid in this function. */
2758 return cur_insn_uid;
2761 /* Renumber instructions so that no instruction UIDs are wasted. */
2764 renumber_insns (stream)
2769 /* If we're not supposed to renumber instructions, don't. */
2770 if (!flag_renumber_insns)
2773 /* If there aren't that many instructions, then it's not really
2774 worth renumbering them. */
2775 if (flag_renumber_insns == 1 && get_max_uid () < 25000)
2780 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
2783 fprintf (stream, "Renumbering insn %d to %d\n",
2784 INSN_UID (insn), cur_insn_uid);
2785 INSN_UID (insn) = cur_insn_uid++;
2789 /* Return the next insn. If it is a SEQUENCE, return the first insn
2798 insn = NEXT_INSN (insn);
2799 if (insn && GET_CODE (insn) == INSN
2800 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2801 insn = XVECEXP (PATTERN (insn), 0, 0);
2807 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2811 previous_insn (insn)
2816 insn = PREV_INSN (insn);
2817 if (insn && GET_CODE (insn) == INSN
2818 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2819 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
2825 /* Return the next insn after INSN that is not a NOTE. This routine does not
2826 look inside SEQUENCEs. */
2829 next_nonnote_insn (insn)
2834 insn = NEXT_INSN (insn);
2835 if (insn == 0 || GET_CODE (insn) != NOTE)
2842 /* Return the previous insn before INSN that is not a NOTE. This routine does
2843 not look inside SEQUENCEs. */
2846 prev_nonnote_insn (insn)
2851 insn = PREV_INSN (insn);
2852 if (insn == 0 || GET_CODE (insn) != NOTE)
2859 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2860 or 0, if there is none. This routine does not look inside
2864 next_real_insn (insn)
2869 insn = NEXT_INSN (insn);
2870 if (insn == 0 || GET_CODE (insn) == INSN
2871 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
2878 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2879 or 0, if there is none. This routine does not look inside
2883 prev_real_insn (insn)
2888 insn = PREV_INSN (insn);
2889 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
2890 || GET_CODE (insn) == JUMP_INSN)
2897 /* Find the next insn after INSN that really does something. This routine
2898 does not look inside SEQUENCEs. Until reload has completed, this is the
2899 same as next_real_insn. */
2902 active_insn_p (insn)
2905 return (GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
2906 || (GET_CODE (insn) == INSN
2907 && (! reload_completed
2908 || (GET_CODE (PATTERN (insn)) != USE
2909 && GET_CODE (PATTERN (insn)) != CLOBBER))));
2913 next_active_insn (insn)
2918 insn = NEXT_INSN (insn);
2919 if (insn == 0 || active_insn_p (insn))
2926 /* Find the last insn before INSN that really does something. This routine
2927 does not look inside SEQUENCEs. Until reload has completed, this is the
2928 same as prev_real_insn. */
2931 prev_active_insn (insn)
2936 insn = PREV_INSN (insn);
2937 if (insn == 0 || active_insn_p (insn))
2944 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2952 insn = NEXT_INSN (insn);
2953 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2960 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
2968 insn = PREV_INSN (insn);
2969 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2977 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
2978 and REG_CC_USER notes so we can find it. */
2981 link_cc0_insns (insn)
2984 rtx user = next_nonnote_insn (insn);
2986 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
2987 user = XVECEXP (PATTERN (user), 0, 0);
2989 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn,
2991 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
2994 /* Return the next insn that uses CC0 after INSN, which is assumed to
2995 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
2996 applied to the result of this function should yield INSN).
2998 Normally, this is simply the next insn. However, if a REG_CC_USER note
2999 is present, it contains the insn that uses CC0.
3001 Return 0 if we can't find the insn. */
3004 next_cc0_user (insn)
3007 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
3010 return XEXP (note, 0);
3012 insn = next_nonnote_insn (insn);
3013 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
3014 insn = XVECEXP (PATTERN (insn), 0, 0);
3016 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
3022 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3023 note, it is the previous insn. */
3026 prev_cc0_setter (insn)
3029 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
3032 return XEXP (note, 0);
3034 insn = prev_nonnote_insn (insn);
3035 if (! sets_cc0_p (PATTERN (insn)))
3042 /* Increment the label uses for all labels present in rtx. */
3052 code = GET_CODE (x);
3053 if (code == LABEL_REF)
3054 LABEL_NUSES (XEXP (x, 0))++;
3056 fmt = GET_RTX_FORMAT (code);
3057 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3060 mark_label_nuses (XEXP (x, i));
3061 else if (fmt[i] == 'E')
3062 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3063 mark_label_nuses (XVECEXP (x, i, j));
3068 /* Try splitting insns that can be split for better scheduling.
3069 PAT is the pattern which might split.
3070 TRIAL is the insn providing PAT.
3071 LAST is non-zero if we should return the last insn of the sequence produced.
3073 If this routine succeeds in splitting, it returns the first or last
3074 replacement insn depending on the value of LAST. Otherwise, it
3075 returns TRIAL. If the insn to be returned can be split, it will be. */
3078 try_split (pat, trial, last)
3082 rtx before = PREV_INSN (trial);
3083 rtx after = NEXT_INSN (trial);
3084 int has_barrier = 0;
3089 if (any_condjump_p (trial)
3090 && (note = find_reg_note (trial, REG_BR_PROB, 0)))
3091 split_branch_probability = INTVAL (XEXP (note, 0));
3092 probability = split_branch_probability;
3094 seq = split_insns (pat, trial);
3096 split_branch_probability = -1;
3098 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3099 We may need to handle this specially. */
3100 if (after && GET_CODE (after) == BARRIER)
3103 after = NEXT_INSN (after);
3108 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
3109 The latter case will normally arise only when being done so that
3110 it, in turn, will be split (SFmode on the 29k is an example). */
3111 if (GET_CODE (seq) == SEQUENCE)
3115 /* Avoid infinite loop if any insn of the result matches
3116 the original pattern. */
3117 for (i = 0; i < XVECLEN (seq, 0); i++)
3118 if (GET_CODE (XVECEXP (seq, 0, i)) == INSN
3119 && rtx_equal_p (PATTERN (XVECEXP (seq, 0, i)), pat))
3123 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
3124 if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN)
3126 rtx insn = XVECEXP (seq, 0, i);
3127 mark_jump_label (PATTERN (insn),
3128 XVECEXP (seq, 0, i), 0);
3130 if (probability != -1
3131 && any_condjump_p (insn)
3132 && !find_reg_note (insn, REG_BR_PROB, 0))
3134 /* We can preserve the REG_BR_PROB notes only if exactly
3135 one jump is created, otherwise the machine description
3136 is responsible for this step using
3137 split_branch_probability variable. */
3141 = gen_rtx_EXPR_LIST (REG_BR_PROB,
3142 GEN_INT (probability),
3147 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3148 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3149 if (GET_CODE (trial) == CALL_INSN)
3150 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
3151 if (GET_CODE (XVECEXP (seq, 0, i)) == CALL_INSN)
3152 CALL_INSN_FUNCTION_USAGE (XVECEXP (seq, 0, i))
3153 = CALL_INSN_FUNCTION_USAGE (trial);
3155 /* Copy notes, particularly those related to the CFG. */
3156 for (note = REG_NOTES (trial); note ; note = XEXP (note, 1))
3158 switch (REG_NOTE_KIND (note))
3161 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
3163 rtx insn = XVECEXP (seq, 0, i);
3164 if (GET_CODE (insn) == CALL_INSN
3165 || (flag_non_call_exceptions
3166 && may_trap_p (PATTERN (insn))))
3168 = gen_rtx_EXPR_LIST (REG_EH_REGION,
3176 case REG_ALWAYS_RETURN:
3177 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
3179 rtx insn = XVECEXP (seq, 0, i);
3180 if (GET_CODE (insn) == CALL_INSN)
3182 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3188 case REG_NON_LOCAL_GOTO:
3189 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
3191 rtx insn = XVECEXP (seq, 0, i);
3192 if (GET_CODE (insn) == JUMP_INSN)
3194 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3205 /* If there are LABELS inside the split insns increment the
3206 usage count so we don't delete the label. */
3207 if (GET_CODE (trial) == INSN)
3208 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
3209 if (GET_CODE (XVECEXP (seq, 0, i)) == INSN)
3210 mark_label_nuses (PATTERN (XVECEXP (seq, 0, i)));
3212 tem = emit_insn_after (seq, trial);
3214 delete_related_insns (trial);
3216 emit_barrier_after (tem);
3218 /* Recursively call try_split for each new insn created; by the
3219 time control returns here that insn will be fully split, so
3220 set LAST and continue from the insn after the one returned.
3221 We can't use next_active_insn here since AFTER may be a note.
3222 Ignore deleted insns, which can be occur if not optimizing. */
3223 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
3224 if (! INSN_DELETED_P (tem) && INSN_P (tem))
3225 tem = try_split (PATTERN (tem), tem, 1);
3227 /* Avoid infinite loop if the result matches the original pattern. */
3228 else if (rtx_equal_p (seq, pat))
3232 PATTERN (trial) = seq;
3233 INSN_CODE (trial) = -1;
3234 try_split (seq, trial, last);
3237 /* Return either the first or the last insn, depending on which was
3240 ? (after ? PREV_INSN (after) : last_insn)
3241 : NEXT_INSN (before);
3247 /* Make and return an INSN rtx, initializing all its slots.
3248 Store PATTERN in the pattern slots. */
3251 make_insn_raw (pattern)
3256 insn = rtx_alloc (INSN);
3258 INSN_UID (insn) = cur_insn_uid++;
3259 PATTERN (insn) = pattern;
3260 INSN_CODE (insn) = -1;
3261 LOG_LINKS (insn) = NULL;
3262 REG_NOTES (insn) = NULL;
3264 #ifdef ENABLE_RTL_CHECKING
3267 && (returnjump_p (insn)
3268 || (GET_CODE (insn) == SET
3269 && SET_DEST (insn) == pc_rtx)))
3271 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
3279 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
3282 make_jump_insn_raw (pattern)
3287 insn = rtx_alloc (JUMP_INSN);
3288 INSN_UID (insn) = cur_insn_uid++;
3290 PATTERN (insn) = pattern;
3291 INSN_CODE (insn) = -1;
3292 LOG_LINKS (insn) = NULL;
3293 REG_NOTES (insn) = NULL;
3294 JUMP_LABEL (insn) = NULL;
3299 /* Like `make_insn' but make a CALL_INSN instead of an insn. */
3302 make_call_insn_raw (pattern)
3307 insn = rtx_alloc (CALL_INSN);
3308 INSN_UID (insn) = cur_insn_uid++;
3310 PATTERN (insn) = pattern;
3311 INSN_CODE (insn) = -1;
3312 LOG_LINKS (insn) = NULL;
3313 REG_NOTES (insn) = NULL;
3314 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
3319 /* Add INSN to the end of the doubly-linked list.
3320 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3326 PREV_INSN (insn) = last_insn;
3327 NEXT_INSN (insn) = 0;
3329 if (NULL != last_insn)
3330 NEXT_INSN (last_insn) = insn;
3332 if (NULL == first_insn)
3338 /* Add INSN into the doubly-linked list after insn AFTER. This and
3339 the next should be the only functions called to insert an insn once
3340 delay slots have been filled since only they know how to update a
3344 add_insn_after (insn, after)
3347 rtx next = NEXT_INSN (after);
3350 if (optimize && INSN_DELETED_P (after))
3353 NEXT_INSN (insn) = next;
3354 PREV_INSN (insn) = after;
3358 PREV_INSN (next) = insn;
3359 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3360 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
3362 else if (last_insn == after)
3366 struct sequence_stack *stack = seq_stack;
3367 /* Scan all pending sequences too. */
3368 for (; stack; stack = stack->next)
3369 if (after == stack->last)
3379 if (basic_block_for_insn
3380 && (unsigned int) INSN_UID (after) < basic_block_for_insn->num_elements
3381 && (bb = BLOCK_FOR_INSN (after)))
3383 set_block_for_insn (insn, bb);
3384 /* Should not happen as first in the BB is always
3385 either NOTE or LABEL. */
3386 if (bb->end == after
3387 /* Avoid clobbering of structure when creating new BB. */
3388 && GET_CODE (insn) != BARRIER
3389 && (GET_CODE (insn) != NOTE
3390 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3394 NEXT_INSN (after) = insn;
3395 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
3397 rtx sequence = PATTERN (after);
3398 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3402 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3403 the previous should be the only functions called to insert an insn once
3404 delay slots have been filled since only they know how to update a
3408 add_insn_before (insn, before)
3411 rtx prev = PREV_INSN (before);
3414 if (optimize && INSN_DELETED_P (before))
3417 PREV_INSN (insn) = prev;
3418 NEXT_INSN (insn) = before;
3422 NEXT_INSN (prev) = insn;
3423 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3425 rtx sequence = PATTERN (prev);
3426 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3429 else if (first_insn == before)
3433 struct sequence_stack *stack = seq_stack;
3434 /* Scan all pending sequences too. */
3435 for (; stack; stack = stack->next)
3436 if (before == stack->first)
3438 stack->first = insn;
3446 if (basic_block_for_insn
3447 && (unsigned int) INSN_UID (before) < basic_block_for_insn->num_elements
3448 && (bb = BLOCK_FOR_INSN (before)))
3450 set_block_for_insn (insn, bb);
3451 /* Should not happen as first in the BB is always
3452 either NOTE or LABEl. */
3453 if (bb->head == insn
3454 /* Avoid clobbering of structure when creating new BB. */
3455 && GET_CODE (insn) != BARRIER
3456 && (GET_CODE (insn) != NOTE
3457 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3461 PREV_INSN (before) = insn;
3462 if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE)
3463 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
3466 /* Remove an insn from its doubly-linked list. This function knows how
3467 to handle sequences. */
3472 rtx next = NEXT_INSN (insn);
3473 rtx prev = PREV_INSN (insn);
3478 NEXT_INSN (prev) = next;
3479 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3481 rtx sequence = PATTERN (prev);
3482 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
3485 else if (first_insn == insn)
3489 struct sequence_stack *stack = seq_stack;
3490 /* Scan all pending sequences too. */
3491 for (; stack; stack = stack->next)
3492 if (insn == stack->first)
3494 stack->first = next;
3504 PREV_INSN (next) = prev;
3505 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3506 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
3508 else if (last_insn == insn)
3512 struct sequence_stack *stack = seq_stack;
3513 /* Scan all pending sequences too. */
3514 for (; stack; stack = stack->next)
3515 if (insn == stack->last)
3524 if (basic_block_for_insn
3525 && (unsigned int) INSN_UID (insn) < basic_block_for_insn->num_elements
3526 && (bb = BLOCK_FOR_INSN (insn)))
3528 if (bb->head == insn)
3530 /* Never ever delete the basic block note without deleting whole
3532 if (GET_CODE (insn) == NOTE)
3536 if (bb->end == insn)
3541 /* Delete all insns made since FROM.
3542 FROM becomes the new last instruction. */
3545 delete_insns_since (from)
3551 NEXT_INSN (from) = 0;
3555 /* This function is deprecated, please use sequences instead.
3557 Move a consecutive bunch of insns to a different place in the chain.
3558 The insns to be moved are those between FROM and TO.
3559 They are moved to a new position after the insn AFTER.
3560 AFTER must not be FROM or TO or any insn in between.
3562 This function does not know about SEQUENCEs and hence should not be
3563 called after delay-slot filling has been done. */
3566 reorder_insns_nobb (from, to, after)
3567 rtx from, to, after;
3569 /* Splice this bunch out of where it is now. */
3570 if (PREV_INSN (from))
3571 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
3573 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
3574 if (last_insn == to)
3575 last_insn = PREV_INSN (from);
3576 if (first_insn == from)
3577 first_insn = NEXT_INSN (to);
3579 /* Make the new neighbors point to it and it to them. */
3580 if (NEXT_INSN (after))
3581 PREV_INSN (NEXT_INSN (after)) = to;
3583 NEXT_INSN (to) = NEXT_INSN (after);
3584 PREV_INSN (from) = after;
3585 NEXT_INSN (after) = from;
3586 if (after == last_insn)
3590 /* Same as function above, but take care to update BB boundaries. */
3592 reorder_insns (from, to, after)
3593 rtx from, to, after;
3595 rtx prev = PREV_INSN (from);
3596 basic_block bb, bb2;
3598 reorder_insns_nobb (from, to, after);
3600 if (basic_block_for_insn
3601 && (unsigned int) INSN_UID (after) < basic_block_for_insn->num_elements
3602 && (bb = BLOCK_FOR_INSN (after)))
3606 if (basic_block_for_insn
3607 && ((unsigned int) INSN_UID (from)
3608 < basic_block_for_insn->num_elements)
3609 && (bb2 = BLOCK_FOR_INSN (from)))
3615 if (bb->end == after)
3618 for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
3619 set_block_for_insn (x, bb);
3623 /* Return the line note insn preceding INSN. */
3626 find_line_note (insn)
3629 if (no_line_numbers)
3632 for (; insn; insn = PREV_INSN (insn))
3633 if (GET_CODE (insn) == NOTE
3634 && NOTE_LINE_NUMBER (insn) >= 0)
3640 /* Like reorder_insns, but inserts line notes to preserve the line numbers
3641 of the moved insns when debugging. This may insert a note between AFTER
3642 and FROM, and another one after TO. */
3645 reorder_insns_with_line_notes (from, to, after)
3646 rtx from, to, after;
3648 rtx from_line = find_line_note (from);
3649 rtx after_line = find_line_note (after);
3651 reorder_insns (from, to, after);
3653 if (from_line == after_line)
3657 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
3658 NOTE_LINE_NUMBER (from_line),
3661 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
3662 NOTE_LINE_NUMBER (after_line),
3666 /* Remove unnecessary notes from the instruction stream. */
3669 remove_unnecessary_notes ()
3671 rtx block_stack = NULL_RTX;
3672 rtx eh_stack = NULL_RTX;
3677 /* We must not remove the first instruction in the function because
3678 the compiler depends on the first instruction being a note. */
3679 for (insn = NEXT_INSN (get_insns ()); insn; insn = next)
3681 /* Remember what's next. */
3682 next = NEXT_INSN (insn);
3684 /* We're only interested in notes. */
3685 if (GET_CODE (insn) != NOTE)
3688 switch (NOTE_LINE_NUMBER (insn))
3690 case NOTE_INSN_DELETED:
3691 case NOTE_INSN_LOOP_END_TOP_COND:
3695 case NOTE_INSN_EH_REGION_BEG:
3696 eh_stack = alloc_INSN_LIST (insn, eh_stack);
3699 case NOTE_INSN_EH_REGION_END:
3700 /* Too many end notes. */
3701 if (eh_stack == NULL_RTX)
3703 /* Mismatched nesting. */
3704 if (NOTE_EH_HANDLER (XEXP (eh_stack, 0)) != NOTE_EH_HANDLER (insn))
3707 eh_stack = XEXP (eh_stack, 1);
3708 free_INSN_LIST_node (tmp);
3711 case NOTE_INSN_BLOCK_BEG:
3712 /* By now, all notes indicating lexical blocks should have
3713 NOTE_BLOCK filled in. */
3714 if (NOTE_BLOCK (insn) == NULL_TREE)
3716 block_stack = alloc_INSN_LIST (insn, block_stack);
3719 case NOTE_INSN_BLOCK_END:
3720 /* Too many end notes. */
3721 if (block_stack == NULL_RTX)
3723 /* Mismatched nesting. */
3724 if (NOTE_BLOCK (XEXP (block_stack, 0)) != NOTE_BLOCK (insn))
3727 block_stack = XEXP (block_stack, 1);
3728 free_INSN_LIST_node (tmp);
3730 /* Scan back to see if there are any non-note instructions
3731 between INSN and the beginning of this block. If not,
3732 then there is no PC range in the generated code that will
3733 actually be in this block, so there's no point in
3734 remembering the existence of the block. */
3735 for (tmp = PREV_INSN (insn); tmp ; tmp = PREV_INSN (tmp))
3737 /* This block contains a real instruction. Note that we
3738 don't include labels; if the only thing in the block
3739 is a label, then there are still no PC values that
3740 lie within the block. */
3744 /* We're only interested in NOTEs. */
3745 if (GET_CODE (tmp) != NOTE)
3748 if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_BEG)
3750 /* We just verified that this BLOCK matches us with
3751 the block_stack check above. Never delete the
3752 BLOCK for the outermost scope of the function; we
3753 can refer to names from that scope even if the
3754 block notes are messed up. */
3755 if (! is_body_block (NOTE_BLOCK (insn))
3756 && (*debug_hooks->ignore_block) (NOTE_BLOCK (insn)))
3763 else if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_END)
3764 /* There's a nested block. We need to leave the
3765 current block in place since otherwise the debugger
3766 wouldn't be able to show symbols from our block in
3767 the nested block. */
3773 /* Too many begin notes. */
3774 if (block_stack || eh_stack)
3779 /* Emit an insn of given code and pattern
3780 at a specified place within the doubly-linked list. */
3782 /* Make an instruction with body PATTERN
3783 and output it before the instruction BEFORE. */
3786 emit_insn_before (pattern, before)
3787 rtx pattern, before;
3791 if (GET_CODE (pattern) == SEQUENCE)
3795 for (i = 0; i < XVECLEN (pattern, 0); i++)
3797 insn = XVECEXP (pattern, 0, i);
3798 add_insn_before (insn, before);
3803 insn = make_insn_raw (pattern);
3804 add_insn_before (insn, before);
3810 /* Make an instruction with body PATTERN and code JUMP_INSN
3811 and output it before the instruction BEFORE. */
3814 emit_jump_insn_before (pattern, before)
3815 rtx pattern, before;
3819 if (GET_CODE (pattern) == SEQUENCE)
3820 insn = emit_insn_before (pattern, before);
3823 insn = make_jump_insn_raw (pattern);
3824 add_insn_before (insn, before);
3830 /* Make an instruction with body PATTERN and code CALL_INSN
3831 and output it before the instruction BEFORE. */
3834 emit_call_insn_before (pattern, before)
3835 rtx pattern, before;
3839 if (GET_CODE (pattern) == SEQUENCE)
3840 insn = emit_insn_before (pattern, before);
3843 insn = make_call_insn_raw (pattern);
3844 add_insn_before (insn, before);
3845 PUT_CODE (insn, CALL_INSN);
3851 /* Make an insn of code BARRIER
3852 and output it before the insn BEFORE. */
3855 emit_barrier_before (before)
3858 rtx insn = rtx_alloc (BARRIER);
3860 INSN_UID (insn) = cur_insn_uid++;
3862 add_insn_before (insn, before);
3866 /* Emit the label LABEL before the insn BEFORE. */
3869 emit_label_before (label, before)
3872 /* This can be called twice for the same label as a result of the
3873 confusion that follows a syntax error! So make it harmless. */
3874 if (INSN_UID (label) == 0)
3876 INSN_UID (label) = cur_insn_uid++;
3877 add_insn_before (label, before);
3883 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
3886 emit_note_before (subtype, before)
3890 rtx note = rtx_alloc (NOTE);
3891 INSN_UID (note) = cur_insn_uid++;
3892 NOTE_SOURCE_FILE (note) = 0;
3893 NOTE_LINE_NUMBER (note) = subtype;
3895 add_insn_before (note, before);
3899 /* Make an insn of code INSN with body PATTERN
3900 and output it after the insn AFTER. */
3903 emit_insn_after (pattern, after)
3908 if (GET_CODE (pattern) == SEQUENCE)
3912 for (i = 0; i < XVECLEN (pattern, 0); i++)
3914 insn = XVECEXP (pattern, 0, i);
3915 add_insn_after (insn, after);
3921 insn = make_insn_raw (pattern);
3922 add_insn_after (insn, after);
3928 /* Similar to emit_insn_after, except that line notes are to be inserted so
3929 as to act as if this insn were at FROM. */
3932 emit_insn_after_with_line_notes (pattern, after, from)
3933 rtx pattern, after, from;
3935 rtx from_line = find_line_note (from);
3936 rtx after_line = find_line_note (after);
3937 rtx insn = emit_insn_after (pattern, after);
3940 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
3941 NOTE_LINE_NUMBER (from_line),
3945 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
3946 NOTE_LINE_NUMBER (after_line),
3950 /* Make an insn of code JUMP_INSN with body PATTERN
3951 and output it after the insn AFTER. */
3954 emit_jump_insn_after (pattern, after)
3959 if (GET_CODE (pattern) == SEQUENCE)
3960 insn = emit_insn_after (pattern, after);
3963 insn = make_jump_insn_raw (pattern);
3964 add_insn_after (insn, after);
3970 /* Make an insn of code BARRIER
3971 and output it after the insn AFTER. */
3974 emit_barrier_after (after)
3977 rtx insn = rtx_alloc (BARRIER);
3979 INSN_UID (insn) = cur_insn_uid++;
3981 add_insn_after (insn, after);
3985 /* Emit the label LABEL after the insn AFTER. */
3988 emit_label_after (label, after)
3991 /* This can be called twice for the same label
3992 as a result of the confusion that follows a syntax error!
3993 So make it harmless. */
3994 if (INSN_UID (label) == 0)
3996 INSN_UID (label) = cur_insn_uid++;
3997 add_insn_after (label, after);
4003 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4006 emit_note_after (subtype, after)
4010 rtx note = rtx_alloc (NOTE);
4011 INSN_UID (note) = cur_insn_uid++;
4012 NOTE_SOURCE_FILE (note) = 0;
4013 NOTE_LINE_NUMBER (note) = subtype;
4014 add_insn_after (note, after);
4018 /* Emit a line note for FILE and LINE after the insn AFTER. */
4021 emit_line_note_after (file, line, after)
4028 if (no_line_numbers && line > 0)
4034 note = rtx_alloc (NOTE);
4035 INSN_UID (note) = cur_insn_uid++;
4036 NOTE_SOURCE_FILE (note) = file;
4037 NOTE_LINE_NUMBER (note) = line;
4038 add_insn_after (note, after);
4042 /* Make an insn of code INSN with pattern PATTERN
4043 and add it to the end of the doubly-linked list.
4044 If PATTERN is a SEQUENCE, take the elements of it
4045 and emit an insn for each element.
4047 Returns the last insn emitted. */
4053 rtx insn = last_insn;
4055 if (GET_CODE (pattern) == SEQUENCE)
4059 for (i = 0; i < XVECLEN (pattern, 0); i++)
4061 insn = XVECEXP (pattern, 0, i);
4067 insn = make_insn_raw (pattern);
4074 /* Emit the insns in a chain starting with INSN.
4075 Return the last insn emitted. */
4085 rtx next = NEXT_INSN (insn);
4094 /* Emit the insns in a chain starting with INSN and place them in front of
4095 the insn BEFORE. Return the last insn emitted. */
4098 emit_insns_before (insn, before)
4106 rtx next = NEXT_INSN (insn);
4107 add_insn_before (insn, before);
4115 /* Emit the insns in a chain starting with FIRST and place them in back of
4116 the insn AFTER. Return the last insn emitted. */
4119 emit_insns_after (first, after)
4133 if (basic_block_for_insn
4134 && (unsigned int) INSN_UID (after) < basic_block_for_insn->num_elements
4135 && (bb = BLOCK_FOR_INSN (after)))
4137 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4138 set_block_for_insn (last, bb);
4139 set_block_for_insn (last, bb);
4140 if (bb->end == after)
4144 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4147 after_after = NEXT_INSN (after);
4149 NEXT_INSN (after) = first;
4150 PREV_INSN (first) = after;
4151 NEXT_INSN (last) = after_after;
4153 PREV_INSN (after_after) = last;
4155 if (after == last_insn)
4160 /* Make an insn of code JUMP_INSN with pattern PATTERN
4161 and add it to the end of the doubly-linked list. */
4164 emit_jump_insn (pattern)
4167 if (GET_CODE (pattern) == SEQUENCE)
4168 return emit_insn (pattern);
4171 rtx insn = make_jump_insn_raw (pattern);
4177 /* Make an insn of code CALL_INSN with pattern PATTERN
4178 and add it to the end of the doubly-linked list. */
4181 emit_call_insn (pattern)
4184 if (GET_CODE (pattern) == SEQUENCE)
4185 return emit_insn (pattern);
4188 rtx insn = make_call_insn_raw (pattern);
4190 PUT_CODE (insn, CALL_INSN);
4195 /* Add the label LABEL to the end of the doubly-linked list. */
4201 /* This can be called twice for the same label
4202 as a result of the confusion that follows a syntax error!
4203 So make it harmless. */
4204 if (INSN_UID (label) == 0)
4206 INSN_UID (label) = cur_insn_uid++;
4212 /* Make an insn of code BARRIER
4213 and add it to the end of the doubly-linked list. */
4218 rtx barrier = rtx_alloc (BARRIER);
4219 INSN_UID (barrier) = cur_insn_uid++;
4224 /* Make an insn of code NOTE
4225 with data-fields specified by FILE and LINE
4226 and add it to the end of the doubly-linked list,
4227 but only if line-numbers are desired for debugging info. */
4230 emit_line_note (file, line)
4234 set_file_and_line_for_stmt (file, line);
4237 if (no_line_numbers)
4241 return emit_note (file, line);
4244 /* Make an insn of code NOTE
4245 with data-fields specified by FILE and LINE
4246 and add it to the end of the doubly-linked list.
4247 If it is a line-number NOTE, omit it if it matches the previous one. */
4250 emit_note (file, line)
4258 if (file && last_filename && !strcmp (file, last_filename)
4259 && line == last_linenum)
4261 last_filename = file;
4262 last_linenum = line;
4265 if (no_line_numbers && line > 0)
4271 note = rtx_alloc (NOTE);
4272 INSN_UID (note) = cur_insn_uid++;
4273 NOTE_SOURCE_FILE (note) = file;
4274 NOTE_LINE_NUMBER (note) = line;
4279 /* Emit a NOTE, and don't omit it even if LINE is the previous note. */
4282 emit_line_note_force (file, line)
4287 return emit_line_note (file, line);
4290 /* Cause next statement to emit a line note even if the line number
4291 has not changed. This is used at the beginning of a function. */
4294 force_next_line_note ()
4299 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4300 note of this type already exists, remove it first. */
4303 set_unique_reg_note (insn, kind, datum)
4308 rtx note = find_reg_note (insn, kind, NULL_RTX);
4314 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4315 has multiple sets (some callers assume single_set
4316 means the insn only has one set, when in fact it
4317 means the insn only has one * useful * set). */
4318 if (GET_CODE (PATTERN (insn)) == PARALLEL && multiple_sets (insn))
4325 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4326 It serves no useful purpose and breaks eliminate_regs. */
4327 if (GET_CODE (datum) == ASM_OPERANDS)
4337 XEXP (note, 0) = datum;
4341 REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn));
4342 return REG_NOTES (insn);
4345 /* Return an indication of which type of insn should have X as a body.
4346 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
4352 if (GET_CODE (x) == CODE_LABEL)
4354 if (GET_CODE (x) == CALL)
4356 if (GET_CODE (x) == RETURN)
4358 if (GET_CODE (x) == SET)
4360 if (SET_DEST (x) == pc_rtx)
4362 else if (GET_CODE (SET_SRC (x)) == CALL)
4367 if (GET_CODE (x) == PARALLEL)
4370 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
4371 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
4373 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4374 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
4376 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4377 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
4383 /* Emit the rtl pattern X as an appropriate kind of insn.
4384 If X is a label, it is simply added into the insn chain. */
4390 enum rtx_code code = classify_insn (x);
4392 if (code == CODE_LABEL)
4393 return emit_label (x);
4394 else if (code == INSN)
4395 return emit_insn (x);
4396 else if (code == JUMP_INSN)
4398 rtx insn = emit_jump_insn (x);
4399 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
4400 return emit_barrier ();
4403 else if (code == CALL_INSN)
4404 return emit_call_insn (x);
4409 /* Begin emitting insns to a sequence which can be packaged in an
4410 RTL_EXPR. If this sequence will contain something that might cause
4411 the compiler to pop arguments to function calls (because those
4412 pops have previously been deferred; see INHIBIT_DEFER_POP for more
4413 details), use do_pending_stack_adjust before calling this function.
4414 That will ensure that the deferred pops are not accidentally
4415 emitted in the middle of this sequence. */
4420 struct sequence_stack *tem;
4422 tem = (struct sequence_stack *) xmalloc (sizeof (struct sequence_stack));
4424 tem->next = seq_stack;
4425 tem->first = first_insn;
4426 tem->last = last_insn;
4427 tem->sequence_rtl_expr = seq_rtl_expr;
4435 /* Similarly, but indicate that this sequence will be placed in T, an
4436 RTL_EXPR. See the documentation for start_sequence for more
4437 information about how to use this function. */
4440 start_sequence_for_rtl_expr (t)
4448 /* Set up the insn chain starting with FIRST as the current sequence,
4449 saving the previously current one. See the documentation for
4450 start_sequence for more information about how to use this function. */
4453 push_to_sequence (first)
4460 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
4466 /* Set up the insn chain from a chain stort in FIRST to LAST. */
4469 push_to_full_sequence (first, last)
4475 /* We really should have the end of the insn chain here. */
4476 if (last && NEXT_INSN (last))
4480 /* Set up the outer-level insn chain
4481 as the current sequence, saving the previously current one. */
4484 push_topmost_sequence ()
4486 struct sequence_stack *stack, *top = NULL;
4490 for (stack = seq_stack; stack; stack = stack->next)
4493 first_insn = top->first;
4494 last_insn = top->last;
4495 seq_rtl_expr = top->sequence_rtl_expr;
4498 /* After emitting to the outer-level insn chain, update the outer-level
4499 insn chain, and restore the previous saved state. */
4502 pop_topmost_sequence ()
4504 struct sequence_stack *stack, *top = NULL;
4506 for (stack = seq_stack; stack; stack = stack->next)
4509 top->first = first_insn;
4510 top->last = last_insn;
4511 /* ??? Why don't we save seq_rtl_expr here? */
4516 /* After emitting to a sequence, restore previous saved state.
4518 To get the contents of the sequence just made, you must call
4519 `gen_sequence' *before* calling here.
4521 If the compiler might have deferred popping arguments while
4522 generating this sequence, and this sequence will not be immediately
4523 inserted into the instruction stream, use do_pending_stack_adjust
4524 before calling gen_sequence. That will ensure that the deferred
4525 pops are inserted into this sequence, and not into some random
4526 location in the instruction stream. See INHIBIT_DEFER_POP for more
4527 information about deferred popping of arguments. */
4532 struct sequence_stack *tem = seq_stack;
4534 first_insn = tem->first;
4535 last_insn = tem->last;
4536 seq_rtl_expr = tem->sequence_rtl_expr;
4537 seq_stack = tem->next;
4542 /* This works like end_sequence, but records the old sequence in FIRST
4546 end_full_sequence (first, last)
4549 *first = first_insn;
4554 /* Return 1 if currently emitting into a sequence. */
4559 return seq_stack != 0;
4562 /* Generate a SEQUENCE rtx containing the insns already emitted
4563 to the current sequence.
4565 This is how the gen_... function from a DEFINE_EXPAND
4566 constructs the SEQUENCE that it returns. */
4576 /* Count the insns in the chain. */
4578 for (tem = first_insn; tem; tem = NEXT_INSN (tem))
4581 /* If only one insn, return it rather than a SEQUENCE.
4582 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
4583 the case of an empty list.)
4584 We only return the pattern of an insn if its code is INSN and it
4585 has no notes. This ensures that no information gets lost. */
4587 && ! RTX_FRAME_RELATED_P (first_insn)
4588 && GET_CODE (first_insn) == INSN
4589 /* Don't throw away any reg notes. */
4590 && REG_NOTES (first_insn) == 0)
4591 return PATTERN (first_insn);
4593 result = gen_rtx_SEQUENCE (VOIDmode, rtvec_alloc (len));
4595 for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++)
4596 XVECEXP (result, 0, i) = tem;
4601 /* Put the various virtual registers into REGNO_REG_RTX. */
4604 init_virtual_regs (es)
4605 struct emit_status *es;
4607 rtx *ptr = es->x_regno_reg_rtx;
4608 ptr[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
4609 ptr[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
4610 ptr[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
4611 ptr[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
4612 ptr[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
4616 clear_emit_caches ()
4620 /* Clear the start_sequence/gen_sequence cache. */
4621 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
4622 sequence_result[i] = 0;
4626 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
4627 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
4628 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
4629 static int copy_insn_n_scratches;
4631 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4632 copied an ASM_OPERANDS.
4633 In that case, it is the original input-operand vector. */
4634 static rtvec orig_asm_operands_vector;
4636 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4637 copied an ASM_OPERANDS.
4638 In that case, it is the copied input-operand vector. */
4639 static rtvec copy_asm_operands_vector;
4641 /* Likewise for the constraints vector. */
4642 static rtvec orig_asm_constraints_vector;
4643 static rtvec copy_asm_constraints_vector;
4645 /* Recursively create a new copy of an rtx for copy_insn.
4646 This function differs from copy_rtx in that it handles SCRATCHes and
4647 ASM_OPERANDs properly.
4648 Normally, this function is not used directly; use copy_insn as front end.
4649 However, you could first copy an insn pattern with copy_insn and then use
4650 this function afterwards to properly copy any REG_NOTEs containing
4660 const char *format_ptr;
4662 code = GET_CODE (orig);
4679 for (i = 0; i < copy_insn_n_scratches; i++)
4680 if (copy_insn_scratch_in[i] == orig)
4681 return copy_insn_scratch_out[i];
4685 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
4686 a LABEL_REF, it isn't sharable. */
4687 if (GET_CODE (XEXP (orig, 0)) == PLUS
4688 && GET_CODE (XEXP (XEXP (orig, 0), 0)) == SYMBOL_REF
4689 && GET_CODE (XEXP (XEXP (orig, 0), 1)) == CONST_INT)
4693 /* A MEM with a constant address is not sharable. The problem is that
4694 the constant address may need to be reloaded. If the mem is shared,
4695 then reloading one copy of this mem will cause all copies to appear
4696 to have been reloaded. */
4702 copy = rtx_alloc (code);
4704 /* Copy the various flags, and other information. We assume that
4705 all fields need copying, and then clear the fields that should
4706 not be copied. That is the sensible default behavior, and forces
4707 us to explicitly document why we are *not* copying a flag. */
4708 memcpy (copy, orig, sizeof (struct rtx_def) - sizeof (rtunion));
4710 /* We do not copy the USED flag, which is used as a mark bit during
4711 walks over the RTL. */
4714 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
4715 if (GET_RTX_CLASS (code) == 'i')
4719 copy->frame_related = 0;
4722 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
4724 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
4726 copy->fld[i] = orig->fld[i];
4727 switch (*format_ptr++)
4730 if (XEXP (orig, i) != NULL)
4731 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
4736 if (XVEC (orig, i) == orig_asm_constraints_vector)
4737 XVEC (copy, i) = copy_asm_constraints_vector;
4738 else if (XVEC (orig, i) == orig_asm_operands_vector)
4739 XVEC (copy, i) = copy_asm_operands_vector;
4740 else if (XVEC (orig, i) != NULL)
4742 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
4743 for (j = 0; j < XVECLEN (copy, i); j++)
4744 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
4755 /* These are left unchanged. */
4763 if (code == SCRATCH)
4765 i = copy_insn_n_scratches++;
4766 if (i >= MAX_RECOG_OPERANDS)
4768 copy_insn_scratch_in[i] = orig;
4769 copy_insn_scratch_out[i] = copy;
4771 else if (code == ASM_OPERANDS)
4773 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
4774 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
4775 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
4776 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
4782 /* Create a new copy of an rtx.
4783 This function differs from copy_rtx in that it handles SCRATCHes and
4784 ASM_OPERANDs properly.
4785 INSN doesn't really have to be a full INSN; it could be just the
4791 copy_insn_n_scratches = 0;
4792 orig_asm_operands_vector = 0;
4793 orig_asm_constraints_vector = 0;
4794 copy_asm_operands_vector = 0;
4795 copy_asm_constraints_vector = 0;
4796 return copy_insn_1 (insn);
4799 /* Initialize data structures and variables in this file
4800 before generating rtl for each function. */
4805 struct function *f = cfun;
4807 f->emit = (struct emit_status *) xmalloc (sizeof (struct emit_status));
4810 seq_rtl_expr = NULL;
4812 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
4815 first_label_num = label_num;
4819 clear_emit_caches ();
4821 /* Init the tables that describe all the pseudo regs. */
4823 f->emit->regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
4825 f->emit->regno_pointer_align
4826 = (unsigned char *) xcalloc (f->emit->regno_pointer_align_length,
4827 sizeof (unsigned char));
4830 = (rtx *) xcalloc (f->emit->regno_pointer_align_length, sizeof (rtx));
4833 = (tree *) xcalloc (f->emit->regno_pointer_align_length, sizeof (tree));
4835 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
4836 init_virtual_regs (f->emit);
4838 /* Indicate that the virtual registers and stack locations are
4840 REG_POINTER (stack_pointer_rtx) = 1;
4841 REG_POINTER (frame_pointer_rtx) = 1;
4842 REG_POINTER (hard_frame_pointer_rtx) = 1;
4843 REG_POINTER (arg_pointer_rtx) = 1;
4845 REG_POINTER (virtual_incoming_args_rtx) = 1;
4846 REG_POINTER (virtual_stack_vars_rtx) = 1;
4847 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
4848 REG_POINTER (virtual_outgoing_args_rtx) = 1;
4849 REG_POINTER (virtual_cfa_rtx) = 1;
4851 #ifdef STACK_BOUNDARY
4852 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
4853 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
4854 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
4855 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
4857 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
4858 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
4859 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
4860 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
4861 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
4864 #ifdef INIT_EXPANDERS
4869 /* Mark SS for GC. */
4872 mark_sequence_stack (ss)
4873 struct sequence_stack *ss;
4877 ggc_mark_rtx (ss->first);
4878 ggc_mark_tree (ss->sequence_rtl_expr);
4883 /* Mark ES for GC. */
4886 mark_emit_status (es)
4887 struct emit_status *es;
4896 for (i = es->regno_pointer_align_length, r = es->x_regno_reg_rtx,
4898 i > 0; --i, ++r, ++t)
4904 mark_sequence_stack (es->sequence_stack);
4905 ggc_mark_tree (es->sequence_rtl_expr);
4906 ggc_mark_rtx (es->x_first_insn);
4909 /* Generate the constant 0. */
4912 gen_const_vector_0 (mode)
4913 enum machine_mode mode;
4918 enum machine_mode inner;
4920 units = GET_MODE_NUNITS (mode);
4921 inner = GET_MODE_INNER (mode);
4923 v = rtvec_alloc (units);
4925 /* We need to call this function after we to set CONST0_RTX first. */
4926 if (!CONST0_RTX (inner))
4929 for (i = 0; i < units; ++i)
4930 RTVEC_ELT (v, i) = CONST0_RTX (inner);
4932 tem = gen_rtx_CONST_VECTOR (mode, v);
4936 /* Create some permanent unique rtl objects shared between all functions.
4937 LINE_NUMBERS is nonzero if line numbers are to be generated. */
4940 init_emit_once (line_numbers)
4944 enum machine_mode mode;
4945 enum machine_mode double_mode;
4947 /* Initialize the CONST_INT and memory attribute hash tables. */
4948 const_int_htab = htab_create (37, const_int_htab_hash,
4949 const_int_htab_eq, NULL);
4950 ggc_add_deletable_htab (const_int_htab, 0, 0);
4952 mem_attrs_htab = htab_create (37, mem_attrs_htab_hash,
4953 mem_attrs_htab_eq, NULL);
4954 ggc_add_deletable_htab (mem_attrs_htab, 0, mem_attrs_mark);
4956 no_line_numbers = ! line_numbers;
4958 /* Compute the word and byte modes. */
4960 byte_mode = VOIDmode;
4961 word_mode = VOIDmode;
4962 double_mode = VOIDmode;
4964 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
4965 mode = GET_MODE_WIDER_MODE (mode))
4967 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
4968 && byte_mode == VOIDmode)
4971 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
4972 && word_mode == VOIDmode)
4976 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
4977 mode = GET_MODE_WIDER_MODE (mode))
4979 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
4980 && double_mode == VOIDmode)
4984 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
4986 /* Assign register numbers to the globally defined register rtx.
4987 This must be done at runtime because the register number field
4988 is in a union and some compilers can't initialize unions. */
4990 pc_rtx = gen_rtx (PC, VOIDmode);
4991 cc0_rtx = gen_rtx (CC0, VOIDmode);
4992 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
4993 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
4994 if (hard_frame_pointer_rtx == 0)
4995 hard_frame_pointer_rtx = gen_raw_REG (Pmode,
4996 HARD_FRAME_POINTER_REGNUM);
4997 if (arg_pointer_rtx == 0)
4998 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
4999 virtual_incoming_args_rtx =
5000 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
5001 virtual_stack_vars_rtx =
5002 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
5003 virtual_stack_dynamic_rtx =
5004 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
5005 virtual_outgoing_args_rtx =
5006 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
5007 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
5009 /* These rtx must be roots if GC is enabled. */
5010 ggc_add_rtx_root (global_rtl, GR_MAX);
5012 #ifdef INIT_EXPANDERS
5013 /* This is to initialize {init|mark|free}_machine_status before the first
5014 call to push_function_context_to. This is needed by the Chill front
5015 end which calls push_function_context_to before the first call to
5016 init_function_start. */
5020 /* Create the unique rtx's for certain rtx codes and operand values. */
5022 /* Don't use gen_rtx here since gen_rtx in this case
5023 tries to use these variables. */
5024 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
5025 const_int_rtx[i + MAX_SAVED_CONST_INT] =
5026 gen_rtx_raw_CONST_INT (VOIDmode, i);
5027 ggc_add_rtx_root (const_int_rtx, 2 * MAX_SAVED_CONST_INT + 1);
5029 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
5030 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
5031 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
5033 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
5035 dconst0 = REAL_VALUE_ATOF ("0", double_mode);
5036 dconst1 = REAL_VALUE_ATOF ("1", double_mode);
5037 dconst2 = REAL_VALUE_ATOF ("2", double_mode);
5038 dconstm1 = REAL_VALUE_ATOF ("-1", double_mode);
5040 for (i = 0; i <= 2; i++)
5042 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
5043 mode = GET_MODE_WIDER_MODE (mode))
5045 rtx tem = rtx_alloc (CONST_DOUBLE);
5046 union real_extract u;
5048 /* Zero any holes in a structure. */
5049 memset ((char *) &u, 0, sizeof u);
5050 u.d = i == 0 ? dconst0 : i == 1 ? dconst1 : dconst2;
5052 /* Avoid trailing garbage in the rtx. */
5053 if (sizeof (u) < sizeof (HOST_WIDE_INT))
5054 CONST_DOUBLE_LOW (tem) = 0;
5055 if (sizeof (u) < 2 * sizeof (HOST_WIDE_INT))
5056 CONST_DOUBLE_HIGH (tem) = 0;
5058 memcpy (&CONST_DOUBLE_LOW (tem), &u, sizeof u);
5059 CONST_DOUBLE_CHAIN (tem) = NULL_RTX;
5060 PUT_MODE (tem, mode);
5062 const_tiny_rtx[i][(int) mode] = tem;
5065 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
5067 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
5068 mode = GET_MODE_WIDER_MODE (mode))
5069 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5071 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
5073 mode = GET_MODE_WIDER_MODE (mode))
5074 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5077 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
5079 mode = GET_MODE_WIDER_MODE (mode))
5080 const_tiny_rtx[0][(int) mode] = gen_const_vector_0 (mode);
5082 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
5084 mode = GET_MODE_WIDER_MODE (mode))
5085 const_tiny_rtx[0][(int) mode] = gen_const_vector_0 (mode);
5087 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
5088 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
5089 const_tiny_rtx[0][i] = const0_rtx;
5091 const_tiny_rtx[0][(int) BImode] = const0_rtx;
5092 if (STORE_FLAG_VALUE == 1)
5093 const_tiny_rtx[1][(int) BImode] = const1_rtx;
5095 /* For bounded pointers, `&const_tiny_rtx[0][0]' is not the same as
5096 `(rtx *) const_tiny_rtx'. The former has bounds that only cover
5097 `const_tiny_rtx[0]', whereas the latter has bounds that cover all. */
5098 ggc_add_rtx_root ((rtx *) const_tiny_rtx, sizeof const_tiny_rtx / sizeof (rtx));
5099 ggc_add_rtx_root (&const_true_rtx, 1);
5101 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5102 return_address_pointer_rtx
5103 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
5107 struct_value_rtx = STRUCT_VALUE;
5109 struct_value_rtx = gen_rtx_REG (Pmode, STRUCT_VALUE_REGNUM);
5112 #ifdef STRUCT_VALUE_INCOMING
5113 struct_value_incoming_rtx = STRUCT_VALUE_INCOMING;
5115 #ifdef STRUCT_VALUE_INCOMING_REGNUM
5116 struct_value_incoming_rtx
5117 = gen_rtx_REG (Pmode, STRUCT_VALUE_INCOMING_REGNUM);
5119 struct_value_incoming_rtx = struct_value_rtx;
5123 #ifdef STATIC_CHAIN_REGNUM
5124 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
5126 #ifdef STATIC_CHAIN_INCOMING_REGNUM
5127 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
5128 static_chain_incoming_rtx
5129 = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
5132 static_chain_incoming_rtx = static_chain_rtx;
5136 static_chain_rtx = STATIC_CHAIN;
5138 #ifdef STATIC_CHAIN_INCOMING
5139 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
5141 static_chain_incoming_rtx = static_chain_rtx;
5145 if (PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
5146 pic_offset_table_rtx = gen_raw_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
5148 ggc_add_rtx_root (&pic_offset_table_rtx, 1);
5149 ggc_add_rtx_root (&struct_value_rtx, 1);
5150 ggc_add_rtx_root (&struct_value_incoming_rtx, 1);
5151 ggc_add_rtx_root (&static_chain_rtx, 1);
5152 ggc_add_rtx_root (&static_chain_incoming_rtx, 1);
5153 ggc_add_rtx_root (&return_address_pointer_rtx, 1);
5156 /* Query and clear/ restore no_line_numbers. This is used by the
5157 switch / case handling in stmt.c to give proper line numbers in
5158 warnings about unreachable code. */
5161 force_line_numbers ()
5163 int old = no_line_numbers;
5165 no_line_numbers = 0;
5167 force_next_line_note ();
5172 restore_line_number_status (old_value)
5175 no_line_numbers = old_value;