1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains the functions `gen_rtx', `gen_reg_rtx'
26 and `gen_label_rtx' that are the usual ways of creating rtl
27 expressions for most purposes.
29 It also has the functions for creating insns and linking
30 them in the doubly-linked chain.
32 The patterns of the insns are created by machine-dependent
33 routines in insn-emit.c, which is generated automatically from
34 the machine description. These routines use `gen_rtx' to make
35 the individual rtx's of the pattern; what is machine dependent
36 is the kind of rtx's they make and what arguments they use. */
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
54 #include "basic-block.h"
57 #include "langhooks.h"
59 /* Commonly used modes. */
61 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
62 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
63 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
64 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
67 /* This is *not* reset after each function. It gives each CODE_LABEL
68 in the entire compilation a unique label number. */
70 static int label_num = 1;
72 /* Highest label number in current function.
73 Zero means use the value of label_num instead.
74 This is nonzero only when belatedly compiling an inline function. */
76 static int last_label_num;
78 /* Value label_num had when set_new_first_and_last_label_number was called.
79 If label_num has not changed since then, last_label_num is valid. */
81 static int base_label_num;
83 /* Nonzero means do not generate NOTEs for source line numbers. */
85 static int no_line_numbers;
87 /* Commonly used rtx's, so that we only need space for one copy.
88 These are initialized once for the entire compilation.
89 All of these are unique; no other rtx-object will be equal to any
92 rtx global_rtl[GR_MAX];
94 /* Commonly used RTL for hard registers. These objects are not necessarily
95 unique, so we allocate them separately from global_rtl. They are
96 initialized once per compilation unit, then copied into regno_reg_rtx
97 at the beginning of each function. */
98 static GTY(()) rtx static_regno_reg_rtx[FIRST_PSEUDO_REGISTER];
100 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
101 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
102 record a copy of const[012]_rtx. */
104 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
108 REAL_VALUE_TYPE dconst0;
109 REAL_VALUE_TYPE dconst1;
110 REAL_VALUE_TYPE dconst2;
111 REAL_VALUE_TYPE dconstm1;
113 /* All references to the following fixed hard registers go through
114 these unique rtl objects. On machines where the frame-pointer and
115 arg-pointer are the same register, they use the same unique object.
117 After register allocation, other rtl objects which used to be pseudo-regs
118 may be clobbered to refer to the frame-pointer register.
119 But references that were originally to the frame-pointer can be
120 distinguished from the others because they contain frame_pointer_rtx.
122 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
123 tricky: until register elimination has taken place hard_frame_pointer_rtx
124 should be used if it is being set, and frame_pointer_rtx otherwise. After
125 register elimination hard_frame_pointer_rtx should always be used.
126 On machines where the two registers are same (most) then these are the
129 In an inline procedure, the stack and frame pointer rtxs may not be
130 used for anything else. */
131 rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
132 rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
133 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
134 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
135 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
137 /* This is used to implement __builtin_return_address for some machines.
138 See for instance the MIPS port. */
139 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
141 /* We make one copy of (const_int C) where C is in
142 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
143 to save space during the compilation and simplify comparisons of
146 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
148 /* A hash table storing CONST_INTs whose absolute value is greater
149 than MAX_SAVED_CONST_INT. */
151 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
152 htab_t const_int_htab;
154 /* A hash table storing memory attribute structures. */
155 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs)))
156 htab_t mem_attrs_htab;
158 /* A hash table storing all CONST_DOUBLEs. */
159 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
160 htab_t const_double_htab;
162 #define first_insn (cfun->emit->x_first_insn)
163 #define last_insn (cfun->emit->x_last_insn)
164 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
165 #define last_linenum (cfun->emit->x_last_linenum)
166 #define last_filename (cfun->emit->x_last_filename)
167 #define first_label_num (cfun->emit->x_first_label_num)
169 static rtx make_jump_insn_raw PARAMS ((rtx));
170 static rtx make_call_insn_raw PARAMS ((rtx));
171 static rtx find_line_note PARAMS ((rtx));
172 static rtx change_address_1 PARAMS ((rtx, enum machine_mode, rtx,
174 static void unshare_all_rtl_1 PARAMS ((rtx));
175 static void unshare_all_decls PARAMS ((tree));
176 static void reset_used_decls PARAMS ((tree));
177 static void mark_label_nuses PARAMS ((rtx));
178 static hashval_t const_int_htab_hash PARAMS ((const void *));
179 static int const_int_htab_eq PARAMS ((const void *,
181 static hashval_t const_double_htab_hash PARAMS ((const void *));
182 static int const_double_htab_eq PARAMS ((const void *,
184 static rtx lookup_const_double PARAMS ((rtx));
185 static hashval_t mem_attrs_htab_hash PARAMS ((const void *));
186 static int mem_attrs_htab_eq PARAMS ((const void *,
188 static mem_attrs *get_mem_attrs PARAMS ((HOST_WIDE_INT, tree, rtx,
191 static tree component_ref_for_mem_expr PARAMS ((tree));
192 static rtx gen_const_vector_0 PARAMS ((enum machine_mode));
194 /* Probability of the conditional branch currently proceeded by try_split.
195 Set to -1 otherwise. */
196 int split_branch_probability = -1;
198 /* Returns a hash code for X (which is a really a CONST_INT). */
201 const_int_htab_hash (x)
204 return (hashval_t) INTVAL ((struct rtx_def *) x);
207 /* Returns nonzero if the value represented by X (which is really a
208 CONST_INT) is the same as that given by Y (which is really a
212 const_int_htab_eq (x, y)
216 return (INTVAL ((rtx) x) == *((const HOST_WIDE_INT *) y));
219 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
221 const_double_htab_hash (x)
227 if (GET_MODE (value) == VOIDmode)
228 h = CONST_DOUBLE_LOW (value) ^ CONST_DOUBLE_HIGH (value);
230 h = real_hash (CONST_DOUBLE_REAL_VALUE (value));
234 /* Returns nonzero if the value represented by X (really a ...)
235 is the same as that represented by Y (really a ...) */
237 const_double_htab_eq (x, y)
241 rtx a = (rtx)x, b = (rtx)y;
243 if (GET_MODE (a) != GET_MODE (b))
245 if (GET_MODE (a) == VOIDmode)
246 return (CONST_DOUBLE_LOW (a) == CONST_DOUBLE_LOW (b)
247 && CONST_DOUBLE_HIGH (a) == CONST_DOUBLE_HIGH (b));
249 return real_identical (CONST_DOUBLE_REAL_VALUE (a),
250 CONST_DOUBLE_REAL_VALUE (b));
253 /* Returns a hash code for X (which is a really a mem_attrs *). */
256 mem_attrs_htab_hash (x)
259 mem_attrs *p = (mem_attrs *) x;
261 return (p->alias ^ (p->align * 1000)
262 ^ ((p->offset ? INTVAL (p->offset) : 0) * 50000)
263 ^ ((p->size ? INTVAL (p->size) : 0) * 2500000)
267 /* Returns nonzero if the value represented by X (which is really a
268 mem_attrs *) is the same as that given by Y (which is also really a
272 mem_attrs_htab_eq (x, y)
276 mem_attrs *p = (mem_attrs *) x;
277 mem_attrs *q = (mem_attrs *) y;
279 return (p->alias == q->alias && p->expr == q->expr && p->offset == q->offset
280 && p->size == q->size && p->align == q->align);
283 /* Allocate a new mem_attrs structure and insert it into the hash table if
284 one identical to it is not already in the table. We are doing this for
288 get_mem_attrs (alias, expr, offset, size, align, mode)
294 enum machine_mode mode;
299 /* If everything is the default, we can just return zero. */
300 if (alias == 0 && expr == 0 && offset == 0
302 || (mode != BLKmode && GET_MODE_SIZE (mode) == INTVAL (size)))
303 && (align == BITS_PER_UNIT
305 && mode != BLKmode && align == GET_MODE_ALIGNMENT (mode))))
310 attrs.offset = offset;
314 slot = htab_find_slot (mem_attrs_htab, &attrs, INSERT);
317 *slot = ggc_alloc (sizeof (mem_attrs));
318 memcpy (*slot, &attrs, sizeof (mem_attrs));
324 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
325 don't attempt to share with the various global pieces of rtl (such as
326 frame_pointer_rtx). */
329 gen_raw_REG (mode, regno)
330 enum machine_mode mode;
333 rtx x = gen_rtx_raw_REG (mode, regno);
334 ORIGINAL_REGNO (x) = regno;
338 /* There are some RTL codes that require special attention; the generation
339 functions do the raw handling. If you add to this list, modify
340 special_rtx in gengenrtl.c as well. */
343 gen_rtx_CONST_INT (mode, arg)
344 enum machine_mode mode ATTRIBUTE_UNUSED;
349 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
350 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
352 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
353 if (const_true_rtx && arg == STORE_FLAG_VALUE)
354 return const_true_rtx;
357 /* Look up the CONST_INT in the hash table. */
358 slot = htab_find_slot_with_hash (const_int_htab, &arg,
359 (hashval_t) arg, INSERT);
361 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
367 gen_int_mode (c, mode)
369 enum machine_mode mode;
371 return GEN_INT (trunc_int_for_mode (c, mode));
374 /* CONST_DOUBLEs might be created from pairs of integers, or from
375 REAL_VALUE_TYPEs. Also, their length is known only at run time,
376 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
378 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
379 hash table. If so, return its counterpart; otherwise add it
380 to the hash table and return it. */
382 lookup_const_double (real)
385 void **slot = htab_find_slot (const_double_htab, real, INSERT);
392 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
393 VALUE in mode MODE. */
395 const_double_from_real_value (value, mode)
396 REAL_VALUE_TYPE value;
397 enum machine_mode mode;
399 rtx real = rtx_alloc (CONST_DOUBLE);
400 PUT_MODE (real, mode);
402 memcpy (&CONST_DOUBLE_LOW (real), &value, sizeof (REAL_VALUE_TYPE));
404 return lookup_const_double (real);
407 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
408 of ints: I0 is the low-order word and I1 is the high-order word.
409 Do not use this routine for non-integer modes; convert to
410 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
413 immed_double_const (i0, i1, mode)
414 HOST_WIDE_INT i0, i1;
415 enum machine_mode mode;
420 if (mode != VOIDmode)
423 if (GET_MODE_CLASS (mode) != MODE_INT
424 && GET_MODE_CLASS (mode) != MODE_PARTIAL_INT
425 /* We can get a 0 for an error mark. */
426 && GET_MODE_CLASS (mode) != MODE_VECTOR_INT
427 && GET_MODE_CLASS (mode) != MODE_VECTOR_FLOAT)
430 /* We clear out all bits that don't belong in MODE, unless they and
431 our sign bit are all one. So we get either a reasonable negative
432 value or a reasonable unsigned value for this mode. */
433 width = GET_MODE_BITSIZE (mode);
434 if (width < HOST_BITS_PER_WIDE_INT
435 && ((i0 & ((HOST_WIDE_INT) (-1) << (width - 1)))
436 != ((HOST_WIDE_INT) (-1) << (width - 1))))
437 i0 &= ((HOST_WIDE_INT) 1 << width) - 1, i1 = 0;
438 else if (width == HOST_BITS_PER_WIDE_INT
439 && ! (i1 == ~0 && i0 < 0))
441 else if (width > 2 * HOST_BITS_PER_WIDE_INT)
442 /* We cannot represent this value as a constant. */
445 /* If this would be an entire word for the target, but is not for
446 the host, then sign-extend on the host so that the number will
447 look the same way on the host that it would on the target.
449 For example, when building a 64 bit alpha hosted 32 bit sparc
450 targeted compiler, then we want the 32 bit unsigned value -1 to be
451 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
452 The latter confuses the sparc backend. */
454 if (width < HOST_BITS_PER_WIDE_INT
455 && (i0 & ((HOST_WIDE_INT) 1 << (width - 1))))
456 i0 |= ((HOST_WIDE_INT) (-1) << width);
458 /* If MODE fits within HOST_BITS_PER_WIDE_INT, always use a
461 ??? Strictly speaking, this is wrong if we create a CONST_INT for
462 a large unsigned constant with the size of MODE being
463 HOST_BITS_PER_WIDE_INT and later try to interpret that constant
464 in a wider mode. In that case we will mis-interpret it as a
467 Unfortunately, the only alternative is to make a CONST_DOUBLE for
468 any constant in any mode if it is an unsigned constant larger
469 than the maximum signed integer in an int on the host. However,
470 doing this will break everyone that always expects to see a
471 CONST_INT for SImode and smaller.
473 We have always been making CONST_INTs in this case, so nothing
474 new is being broken. */
476 if (width <= HOST_BITS_PER_WIDE_INT)
477 i1 = (i0 < 0) ? ~(HOST_WIDE_INT) 0 : 0;
480 /* If this integer fits in one word, return a CONST_INT. */
481 if ((i1 == 0 && i0 >= 0) || (i1 == ~0 && i0 < 0))
484 /* We use VOIDmode for integers. */
485 value = rtx_alloc (CONST_DOUBLE);
486 PUT_MODE (value, VOIDmode);
488 CONST_DOUBLE_LOW (value) = i0;
489 CONST_DOUBLE_HIGH (value) = i1;
491 for (i = 2; i < (sizeof CONST_DOUBLE_FORMAT - 1); i++)
492 XWINT (value, i) = 0;
494 return lookup_const_double (value);
498 gen_rtx_REG (mode, regno)
499 enum machine_mode mode;
502 /* In case the MD file explicitly references the frame pointer, have
503 all such references point to the same frame pointer. This is
504 used during frame pointer elimination to distinguish the explicit
505 references to these registers from pseudos that happened to be
508 If we have eliminated the frame pointer or arg pointer, we will
509 be using it as a normal register, for example as a spill
510 register. In such cases, we might be accessing it in a mode that
511 is not Pmode and therefore cannot use the pre-allocated rtx.
513 Also don't do this when we are making new REGs in reload, since
514 we don't want to get confused with the real pointers. */
516 if (mode == Pmode && !reload_in_progress)
518 if (regno == FRAME_POINTER_REGNUM
519 && (!reload_completed || frame_pointer_needed))
520 return frame_pointer_rtx;
521 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
522 if (regno == HARD_FRAME_POINTER_REGNUM
523 && (!reload_completed || frame_pointer_needed))
524 return hard_frame_pointer_rtx;
526 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
527 if (regno == ARG_POINTER_REGNUM)
528 return arg_pointer_rtx;
530 #ifdef RETURN_ADDRESS_POINTER_REGNUM
531 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
532 return return_address_pointer_rtx;
534 if (regno == PIC_OFFSET_TABLE_REGNUM
535 && fixed_regs[PIC_OFFSET_TABLE_REGNUM])
536 return pic_offset_table_rtx;
537 if (regno == STACK_POINTER_REGNUM)
538 return stack_pointer_rtx;
542 /* If the per-function register table has been set up, try to re-use
543 an existing entry in that table to avoid useless generation of RTL.
545 This code is disabled for now until we can fix the various backends
546 which depend on having non-shared hard registers in some cases. Long
547 term we want to re-enable this code as it can significantly cut down
548 on the amount of useless RTL that gets generated.
550 We'll also need to fix some code that runs after reload that wants to
551 set ORIGINAL_REGNO. */
556 && regno < FIRST_PSEUDO_REGISTER
557 && reg_raw_mode[regno] == mode)
558 return regno_reg_rtx[regno];
561 return gen_raw_REG (mode, regno);
565 gen_rtx_MEM (mode, addr)
566 enum machine_mode mode;
569 rtx rt = gen_rtx_raw_MEM (mode, addr);
571 /* This field is not cleared by the mere allocation of the rtx, so
579 gen_rtx_SUBREG (mode, reg, offset)
580 enum machine_mode mode;
584 /* This is the most common failure type.
585 Catch it early so we can see who does it. */
586 if ((offset % GET_MODE_SIZE (mode)) != 0)
589 /* This check isn't usable right now because combine will
590 throw arbitrary crap like a CALL into a SUBREG in
591 gen_lowpart_for_combine so we must just eat it. */
593 /* Check for this too. */
594 if (offset >= GET_MODE_SIZE (GET_MODE (reg)))
597 return gen_rtx_raw_SUBREG (mode, reg, offset);
600 /* Generate a SUBREG representing the least-significant part of REG if MODE
601 is smaller than mode of REG, otherwise paradoxical SUBREG. */
604 gen_lowpart_SUBREG (mode, reg)
605 enum machine_mode mode;
608 enum machine_mode inmode;
610 inmode = GET_MODE (reg);
611 if (inmode == VOIDmode)
613 return gen_rtx_SUBREG (mode, reg,
614 subreg_lowpart_offset (mode, inmode));
617 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
619 ** This routine generates an RTX of the size specified by
620 ** <code>, which is an RTX code. The RTX structure is initialized
621 ** from the arguments <element1> through <elementn>, which are
622 ** interpreted according to the specific RTX type's format. The
623 ** special machine mode associated with the rtx (if any) is specified
626 ** gen_rtx can be invoked in a way which resembles the lisp-like
627 ** rtx it will generate. For example, the following rtx structure:
629 ** (plus:QI (mem:QI (reg:SI 1))
630 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
632 ** ...would be generated by the following C code:
634 ** gen_rtx (PLUS, QImode,
635 ** gen_rtx (MEM, QImode,
636 ** gen_rtx (REG, SImode, 1)),
637 ** gen_rtx (MEM, QImode,
638 ** gen_rtx (PLUS, SImode,
639 ** gen_rtx (REG, SImode, 2),
640 ** gen_rtx (REG, SImode, 3)))),
645 gen_rtx VPARAMS ((enum rtx_code code, enum machine_mode mode, ...))
647 int i; /* Array indices... */
648 const char *fmt; /* Current rtx's format... */
649 rtx rt_val; /* RTX to return to caller... */
652 VA_FIXEDARG (p, enum rtx_code, code);
653 VA_FIXEDARG (p, enum machine_mode, mode);
658 rt_val = gen_rtx_CONST_INT (mode, va_arg (p, HOST_WIDE_INT));
663 HOST_WIDE_INT arg0 = va_arg (p, HOST_WIDE_INT);
664 HOST_WIDE_INT arg1 = va_arg (p, HOST_WIDE_INT);
666 rt_val = immed_double_const (arg0, arg1, mode);
671 rt_val = gen_rtx_REG (mode, va_arg (p, int));
675 rt_val = gen_rtx_MEM (mode, va_arg (p, rtx));
679 rt_val = rtx_alloc (code); /* Allocate the storage space. */
680 rt_val->mode = mode; /* Store the machine mode... */
682 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
683 for (i = 0; i < GET_RTX_LENGTH (code); i++)
687 case '0': /* Unused field. */
690 case 'i': /* An integer? */
691 XINT (rt_val, i) = va_arg (p, int);
694 case 'w': /* A wide integer? */
695 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
698 case 's': /* A string? */
699 XSTR (rt_val, i) = va_arg (p, char *);
702 case 'e': /* An expression? */
703 case 'u': /* An insn? Same except when printing. */
704 XEXP (rt_val, i) = va_arg (p, rtx);
707 case 'E': /* An RTX vector? */
708 XVEC (rt_val, i) = va_arg (p, rtvec);
711 case 'b': /* A bitmap? */
712 XBITMAP (rt_val, i) = va_arg (p, bitmap);
715 case 't': /* A tree? */
716 XTREE (rt_val, i) = va_arg (p, tree);
730 /* gen_rtvec (n, [rt1, ..., rtn])
732 ** This routine creates an rtvec and stores within it the
733 ** pointers to rtx's which are its arguments.
738 gen_rtvec VPARAMS ((int n, ...))
744 VA_FIXEDARG (p, int, n);
747 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
749 vector = (rtx *) alloca (n * sizeof (rtx));
751 for (i = 0; i < n; i++)
752 vector[i] = va_arg (p, rtx);
754 /* The definition of VA_* in K&R C causes `n' to go out of scope. */
758 return gen_rtvec_v (save_n, vector);
762 gen_rtvec_v (n, argp)
770 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
772 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
774 for (i = 0; i < n; i++)
775 rt_val->elem[i] = *argp++;
780 /* Generate a REG rtx for a new pseudo register of mode MODE.
781 This pseudo is assigned the next sequential register number. */
785 enum machine_mode mode;
787 struct function *f = cfun;
790 /* Don't let anything called after initial flow analysis create new
795 if (generating_concat_p
796 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
797 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
799 /* For complex modes, don't make a single pseudo.
800 Instead, make a CONCAT of two pseudos.
801 This allows noncontiguous allocation of the real and imaginary parts,
802 which makes much better code. Besides, allocating DCmode
803 pseudos overstrains reload on some machines like the 386. */
804 rtx realpart, imagpart;
805 enum machine_mode partmode = GET_MODE_INNER (mode);
807 realpart = gen_reg_rtx (partmode);
808 imagpart = gen_reg_rtx (partmode);
809 return gen_rtx_CONCAT (mode, realpart, imagpart);
812 /* Make sure regno_pointer_align, regno_decl, and regno_reg_rtx are large
813 enough to have an element for this pseudo reg number. */
815 if (reg_rtx_no == f->emit->regno_pointer_align_length)
817 int old_size = f->emit->regno_pointer_align_length;
822 new = ggc_realloc (f->emit->regno_pointer_align, old_size * 2);
823 memset (new + old_size, 0, old_size);
824 f->emit->regno_pointer_align = (unsigned char *) new;
826 new1 = (rtx *) ggc_realloc (f->emit->x_regno_reg_rtx,
827 old_size * 2 * sizeof (rtx));
828 memset (new1 + old_size, 0, old_size * sizeof (rtx));
829 regno_reg_rtx = new1;
831 new2 = (tree *) ggc_realloc (f->emit->regno_decl,
832 old_size * 2 * sizeof (tree));
833 memset (new2 + old_size, 0, old_size * sizeof (tree));
834 f->emit->regno_decl = new2;
836 f->emit->regno_pointer_align_length = old_size * 2;
839 val = gen_raw_REG (mode, reg_rtx_no);
840 regno_reg_rtx[reg_rtx_no++] = val;
844 /* Identify REG (which may be a CONCAT) as a user register. */
850 if (GET_CODE (reg) == CONCAT)
852 REG_USERVAR_P (XEXP (reg, 0)) = 1;
853 REG_USERVAR_P (XEXP (reg, 1)) = 1;
855 else if (GET_CODE (reg) == REG)
856 REG_USERVAR_P (reg) = 1;
861 /* Identify REG as a probable pointer register and show its alignment
862 as ALIGN, if nonzero. */
865 mark_reg_pointer (reg, align)
869 if (! REG_POINTER (reg))
871 REG_POINTER (reg) = 1;
874 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
876 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
877 /* We can no-longer be sure just how aligned this pointer is */
878 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
881 /* Return 1 plus largest pseudo reg number used in the current function. */
889 /* Return 1 + the largest label number used so far in the current function. */
894 if (last_label_num && label_num == base_label_num)
895 return last_label_num;
899 /* Return first label number used in this function (if any were used). */
902 get_first_label_num ()
904 return first_label_num;
907 /* Return the final regno of X, which is a SUBREG of a hard
910 subreg_hard_regno (x, check_mode)
914 enum machine_mode mode = GET_MODE (x);
915 unsigned int byte_offset, base_regno, final_regno;
916 rtx reg = SUBREG_REG (x);
918 /* This is where we attempt to catch illegal subregs
919 created by the compiler. */
920 if (GET_CODE (x) != SUBREG
921 || GET_CODE (reg) != REG)
923 base_regno = REGNO (reg);
924 if (base_regno >= FIRST_PSEUDO_REGISTER)
926 if (check_mode && ! HARD_REGNO_MODE_OK (base_regno, GET_MODE (reg)))
928 #ifdef ENABLE_CHECKING
929 if (!subreg_offset_representable_p (REGNO (reg), GET_MODE (reg),
930 SUBREG_BYTE (x), mode))
933 /* Catch non-congruent offsets too. */
934 byte_offset = SUBREG_BYTE (x);
935 if ((byte_offset % GET_MODE_SIZE (mode)) != 0)
938 final_regno = subreg_regno (x);
943 /* Return a value representing some low-order bits of X, where the number
944 of low-order bits is given by MODE. Note that no conversion is done
945 between floating-point and fixed-point values, rather, the bit
946 representation is returned.
948 This function handles the cases in common between gen_lowpart, below,
949 and two variants in cse.c and combine.c. These are the cases that can
950 be safely handled at all points in the compilation.
952 If this is not a case we can handle, return 0. */
955 gen_lowpart_common (mode, x)
956 enum machine_mode mode;
959 int msize = GET_MODE_SIZE (mode);
960 int xsize = GET_MODE_SIZE (GET_MODE (x));
963 if (GET_MODE (x) == mode)
966 /* MODE must occupy no more words than the mode of X. */
967 if (GET_MODE (x) != VOIDmode
968 && ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
969 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)))
972 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
973 if (GET_MODE_CLASS (mode) == MODE_FLOAT
974 && GET_MODE (x) != VOIDmode && msize > xsize)
977 offset = subreg_lowpart_offset (mode, GET_MODE (x));
979 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
980 && (GET_MODE_CLASS (mode) == MODE_INT
981 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
983 /* If we are getting the low-order part of something that has been
984 sign- or zero-extended, we can either just use the object being
985 extended or make a narrower extension. If we want an even smaller
986 piece than the size of the object being extended, call ourselves
989 This case is used mostly by combine and cse. */
991 if (GET_MODE (XEXP (x, 0)) == mode)
993 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
994 return gen_lowpart_common (mode, XEXP (x, 0));
995 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
996 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
998 else if (GET_CODE (x) == SUBREG || GET_CODE (x) == REG
999 || GET_CODE (x) == CONCAT || GET_CODE (x) == CONST_VECTOR)
1000 return simplify_gen_subreg (mode, x, GET_MODE (x), offset);
1001 else if ((GET_MODE_CLASS (mode) == MODE_VECTOR_INT
1002 || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT)
1003 && GET_MODE (x) == VOIDmode)
1004 return simplify_gen_subreg (mode, x, int_mode_for_mode (mode), offset);
1005 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
1006 from the low-order part of the constant. */
1007 else if ((GET_MODE_CLASS (mode) == MODE_INT
1008 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
1009 && GET_MODE (x) == VOIDmode
1010 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
1012 /* If MODE is twice the host word size, X is already the desired
1013 representation. Otherwise, if MODE is wider than a word, we can't
1014 do this. If MODE is exactly a word, return just one CONST_INT. */
1016 if (GET_MODE_BITSIZE (mode) >= 2 * HOST_BITS_PER_WIDE_INT)
1018 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
1020 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT)
1021 return (GET_CODE (x) == CONST_INT ? x
1022 : GEN_INT (CONST_DOUBLE_LOW (x)));
1025 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
1026 HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
1027 : CONST_DOUBLE_LOW (x));
1029 /* Sign extend to HOST_WIDE_INT. */
1030 val = trunc_int_for_mode (val, mode);
1032 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
1037 /* The floating-point emulator can handle all conversions between
1038 FP and integer operands. This simplifies reload because it
1039 doesn't have to deal with constructs like (subreg:DI
1040 (const_double:SF ...)) or (subreg:DF (const_int ...)). */
1041 /* Single-precision floats are always 32-bits and double-precision
1042 floats are always 64-bits. */
1044 else if (GET_MODE_CLASS (mode) == MODE_FLOAT
1045 && GET_MODE_BITSIZE (mode) == 32
1046 && GET_CODE (x) == CONST_INT)
1049 long i = INTVAL (x);
1051 real_from_target (&r, &i, mode);
1052 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
1054 else if (GET_MODE_CLASS (mode) == MODE_FLOAT
1055 && GET_MODE_BITSIZE (mode) == 64
1056 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
1057 && GET_MODE (x) == VOIDmode)
1060 HOST_WIDE_INT low, high;
1063 if (GET_CODE (x) == CONST_INT)
1066 high = low >> (HOST_BITS_PER_WIDE_INT - 1);
1070 low = CONST_DOUBLE_LOW (x);
1071 high = CONST_DOUBLE_HIGH (x);
1074 if (HOST_BITS_PER_WIDE_INT > 32)
1075 high = low >> 31 >> 1;
1077 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
1079 if (WORDS_BIG_ENDIAN)
1080 i[0] = high, i[1] = low;
1082 i[0] = low, i[1] = high;
1084 real_from_target (&r, i, mode);
1085 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
1087 else if ((GET_MODE_CLASS (mode) == MODE_INT
1088 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
1089 && GET_CODE (x) == CONST_DOUBLE
1090 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
1093 long i[4]; /* Only the low 32 bits of each 'long' are used. */
1094 int endian = WORDS_BIG_ENDIAN ? 1 : 0;
1096 /* Convert 'r' into an array of four 32-bit words in target word
1098 REAL_VALUE_FROM_CONST_DOUBLE (r, x);
1099 switch (GET_MODE_BITSIZE (GET_MODE (x)))
1102 REAL_VALUE_TO_TARGET_SINGLE (r, i[3 * endian]);
1105 i[3 - 3 * endian] = 0;
1108 REAL_VALUE_TO_TARGET_DOUBLE (r, i + 2 * endian);
1109 i[2 - 2 * endian] = 0;
1110 i[3 - 2 * endian] = 0;
1113 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i + endian);
1114 i[3 - 3 * endian] = 0;
1117 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i);
1122 /* Now, pack the 32-bit elements of the array into a CONST_DOUBLE
1124 #if HOST_BITS_PER_WIDE_INT == 32
1125 return immed_double_const (i[3 * endian], i[1 + endian], mode);
1127 if (HOST_BITS_PER_WIDE_INT != 64)
1130 return immed_double_const ((((unsigned long) i[3 * endian])
1131 | ((HOST_WIDE_INT) i[1 + endian] << 32)),
1132 (((unsigned long) i[2 - endian])
1133 | ((HOST_WIDE_INT) i[3 - 3 * endian] << 32)),
1138 /* Otherwise, we can't do this. */
1142 /* Return the real part (which has mode MODE) of a complex value X.
1143 This always comes at the low address in memory. */
1146 gen_realpart (mode, x)
1147 enum machine_mode mode;
1150 if (WORDS_BIG_ENDIAN
1151 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1153 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1155 ("can't access real part of complex value in hard register");
1156 else if (WORDS_BIG_ENDIAN)
1157 return gen_highpart (mode, x);
1159 return gen_lowpart (mode, x);
1162 /* Return the imaginary part (which has mode MODE) of a complex value X.
1163 This always comes at the high address in memory. */
1166 gen_imagpart (mode, x)
1167 enum machine_mode mode;
1170 if (WORDS_BIG_ENDIAN)
1171 return gen_lowpart (mode, x);
1172 else if (! WORDS_BIG_ENDIAN
1173 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1175 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1177 ("can't access imaginary part of complex value in hard register");
1179 return gen_highpart (mode, x);
1182 /* Return 1 iff X, assumed to be a SUBREG,
1183 refers to the real part of the complex value in its containing reg.
1184 Complex values are always stored with the real part in the first word,
1185 regardless of WORDS_BIG_ENDIAN. */
1188 subreg_realpart_p (x)
1191 if (GET_CODE (x) != SUBREG)
1194 return ((unsigned int) SUBREG_BYTE (x)
1195 < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x))));
1198 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1199 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1200 least-significant part of X.
1201 MODE specifies how big a part of X to return;
1202 it usually should not be larger than a word.
1203 If X is a MEM whose address is a QUEUED, the value may be so also. */
1206 gen_lowpart (mode, x)
1207 enum machine_mode mode;
1210 rtx result = gen_lowpart_common (mode, x);
1214 else if (GET_CODE (x) == REG)
1216 /* Must be a hard reg that's not valid in MODE. */
1217 result = gen_lowpart_common (mode, copy_to_reg (x));
1222 else if (GET_CODE (x) == MEM)
1224 /* The only additional case we can do is MEM. */
1226 if (WORDS_BIG_ENDIAN)
1227 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
1228 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1230 if (BYTES_BIG_ENDIAN)
1231 /* Adjust the address so that the address-after-the-data
1233 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
1234 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
1236 return adjust_address (x, mode, offset);
1238 else if (GET_CODE (x) == ADDRESSOF)
1239 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
1244 /* Like `gen_lowpart', but refer to the most significant part.
1245 This is used to access the imaginary part of a complex number. */
1248 gen_highpart (mode, x)
1249 enum machine_mode mode;
1252 unsigned int msize = GET_MODE_SIZE (mode);
1255 /* This case loses if X is a subreg. To catch bugs early,
1256 complain if an invalid MODE is used even in other cases. */
1257 if (msize > UNITS_PER_WORD
1258 && msize != GET_MODE_UNIT_SIZE (GET_MODE (x)))
1261 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1262 subreg_highpart_offset (mode, GET_MODE (x)));
1264 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1265 the target if we have a MEM. gen_highpart must return a valid operand,
1266 emitting code if necessary to do so. */
1267 if (result != NULL_RTX && GET_CODE (result) == MEM)
1268 result = validize_mem (result);
1275 /* Like gen_highpart_mode, but accept mode of EXP operand in case EXP can
1276 be VOIDmode constant. */
1278 gen_highpart_mode (outermode, innermode, exp)
1279 enum machine_mode outermode, innermode;
1282 if (GET_MODE (exp) != VOIDmode)
1284 if (GET_MODE (exp) != innermode)
1286 return gen_highpart (outermode, exp);
1288 return simplify_gen_subreg (outermode, exp, innermode,
1289 subreg_highpart_offset (outermode, innermode));
1292 /* Return offset in bytes to get OUTERMODE low part
1293 of the value in mode INNERMODE stored in memory in target format. */
1296 subreg_lowpart_offset (outermode, innermode)
1297 enum machine_mode outermode, innermode;
1299 unsigned int offset = 0;
1300 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1304 if (WORDS_BIG_ENDIAN)
1305 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1306 if (BYTES_BIG_ENDIAN)
1307 offset += difference % UNITS_PER_WORD;
1313 /* Return offset in bytes to get OUTERMODE high part
1314 of the value in mode INNERMODE stored in memory in target format. */
1316 subreg_highpart_offset (outermode, innermode)
1317 enum machine_mode outermode, innermode;
1319 unsigned int offset = 0;
1320 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1322 if (GET_MODE_SIZE (innermode) < GET_MODE_SIZE (outermode))
1327 if (! WORDS_BIG_ENDIAN)
1328 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1329 if (! BYTES_BIG_ENDIAN)
1330 offset += difference % UNITS_PER_WORD;
1336 /* Return 1 iff X, assumed to be a SUBREG,
1337 refers to the least significant part of its containing reg.
1338 If X is not a SUBREG, always return 1 (it is its own low part!). */
1341 subreg_lowpart_p (x)
1344 if (GET_CODE (x) != SUBREG)
1346 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1349 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1350 == SUBREG_BYTE (x));
1354 /* Helper routine for all the constant cases of operand_subword.
1355 Some places invoke this directly. */
1358 constant_subword (op, offset, mode)
1361 enum machine_mode mode;
1363 int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD;
1366 /* If OP is already an integer word, return it. */
1367 if (GET_MODE_CLASS (mode) == MODE_INT
1368 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
1371 /* The output is some bits, the width of the target machine's word.
1372 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1374 if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1375 && GET_MODE_CLASS (mode) == MODE_FLOAT
1376 && GET_MODE_BITSIZE (mode) == 64
1377 && GET_CODE (op) == CONST_DOUBLE)
1382 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1383 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
1385 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1386 which the words are written depends on the word endianness.
1387 ??? This is a potential portability problem and should
1388 be fixed at some point.
1390 We must exercise caution with the sign bit. By definition there
1391 are 32 significant bits in K; there may be more in a HOST_WIDE_INT.
1392 Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT.
1393 So we explicitly mask and sign-extend as necessary. */
1394 if (BITS_PER_WORD == 32)
1397 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1398 return GEN_INT (val);
1400 #if HOST_BITS_PER_WIDE_INT >= 64
1401 else if (BITS_PER_WORD >= 64 && offset == 0)
1403 val = k[! WORDS_BIG_ENDIAN];
1404 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1405 val |= (HOST_WIDE_INT) k[WORDS_BIG_ENDIAN] & 0xffffffff;
1406 return GEN_INT (val);
1409 else if (BITS_PER_WORD == 16)
1411 val = k[offset >> 1];
1412 if ((offset & 1) == ! WORDS_BIG_ENDIAN)
1414 val = ((val & 0xffff) ^ 0x8000) - 0x8000;
1415 return GEN_INT (val);
1420 else if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1421 && GET_MODE_CLASS (mode) == MODE_FLOAT
1422 && GET_MODE_BITSIZE (mode) > 64
1423 && GET_CODE (op) == CONST_DOUBLE)
1428 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1429 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k);
1431 if (BITS_PER_WORD == 32)
1434 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1435 return GEN_INT (val);
1437 #if HOST_BITS_PER_WIDE_INT >= 64
1438 else if (BITS_PER_WORD >= 64 && offset <= 1)
1440 val = k[offset * 2 + ! WORDS_BIG_ENDIAN];
1441 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1442 val |= (HOST_WIDE_INT) k[offset * 2 + WORDS_BIG_ENDIAN] & 0xffffffff;
1443 return GEN_INT (val);
1450 /* Single word float is a little harder, since single- and double-word
1451 values often do not have the same high-order bits. We have already
1452 verified that we want the only defined word of the single-word value. */
1453 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1454 && GET_MODE_BITSIZE (mode) == 32
1455 && GET_CODE (op) == CONST_DOUBLE)
1460 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1461 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
1463 /* Sign extend from known 32-bit value to HOST_WIDE_INT. */
1465 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1467 if (BITS_PER_WORD == 16)
1469 if ((offset & 1) == ! WORDS_BIG_ENDIAN)
1471 val = ((val & 0xffff) ^ 0x8000) - 0x8000;
1474 return GEN_INT (val);
1477 /* The only remaining cases that we can handle are integers.
1478 Convert to proper endianness now since these cases need it.
1479 At this point, offset == 0 means the low-order word.
1481 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1482 in general. However, if OP is (const_int 0), we can just return
1485 if (op == const0_rtx)
1488 if (GET_MODE_CLASS (mode) != MODE_INT
1489 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE)
1490 || BITS_PER_WORD > HOST_BITS_PER_WIDE_INT)
1493 if (WORDS_BIG_ENDIAN)
1494 offset = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - offset;
1496 /* Find out which word on the host machine this value is in and get
1497 it from the constant. */
1498 val = (offset / size_ratio == 0
1499 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
1500 : (GET_CODE (op) == CONST_INT
1501 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
1503 /* Get the value we want into the low bits of val. */
1504 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT)
1505 val = ((val >> ((offset % size_ratio) * BITS_PER_WORD)));
1507 val = trunc_int_for_mode (val, word_mode);
1509 return GEN_INT (val);
1512 /* Return subword OFFSET of operand OP.
1513 The word number, OFFSET, is interpreted as the word number starting
1514 at the low-order address. OFFSET 0 is the low-order word if not
1515 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1517 If we cannot extract the required word, we return zero. Otherwise,
1518 an rtx corresponding to the requested word will be returned.
1520 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1521 reload has completed, a valid address will always be returned. After
1522 reload, if a valid address cannot be returned, we return zero.
1524 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1525 it is the responsibility of the caller.
1527 MODE is the mode of OP in case it is a CONST_INT.
1529 ??? This is still rather broken for some cases. The problem for the
1530 moment is that all callers of this thing provide no 'goal mode' to
1531 tell us to work with. This exists because all callers were written
1532 in a word based SUBREG world.
1533 Now use of this function can be deprecated by simplify_subreg in most
1538 operand_subword (op, offset, validate_address, mode)
1540 unsigned int offset;
1541 int validate_address;
1542 enum machine_mode mode;
1544 if (mode == VOIDmode)
1545 mode = GET_MODE (op);
1547 if (mode == VOIDmode)
1550 /* If OP is narrower than a word, fail. */
1552 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1555 /* If we want a word outside OP, return zero. */
1557 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1560 /* Form a new MEM at the requested address. */
1561 if (GET_CODE (op) == MEM)
1563 rtx new = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1565 if (! validate_address)
1568 else if (reload_completed)
1570 if (! strict_memory_address_p (word_mode, XEXP (new, 0)))
1574 return replace_equiv_address (new, XEXP (new, 0));
1577 /* Rest can be handled by simplify_subreg. */
1578 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1581 /* Similar to `operand_subword', but never return 0. If we can't extract
1582 the required subword, put OP into a register and try again. If that fails,
1583 abort. We always validate the address in this case.
1585 MODE is the mode of OP, in case it is CONST_INT. */
1588 operand_subword_force (op, offset, mode)
1590 unsigned int offset;
1591 enum machine_mode mode;
1593 rtx result = operand_subword (op, offset, 1, mode);
1598 if (mode != BLKmode && mode != VOIDmode)
1600 /* If this is a register which can not be accessed by words, copy it
1601 to a pseudo register. */
1602 if (GET_CODE (op) == REG)
1603 op = copy_to_reg (op);
1605 op = force_reg (mode, op);
1608 result = operand_subword (op, offset, 1, mode);
1615 /* Given a compare instruction, swap the operands.
1616 A test instruction is changed into a compare of 0 against the operand. */
1619 reverse_comparison (insn)
1622 rtx body = PATTERN (insn);
1625 if (GET_CODE (body) == SET)
1626 comp = SET_SRC (body);
1628 comp = SET_SRC (XVECEXP (body, 0, 0));
1630 if (GET_CODE (comp) == COMPARE)
1632 rtx op0 = XEXP (comp, 0);
1633 rtx op1 = XEXP (comp, 1);
1634 XEXP (comp, 0) = op1;
1635 XEXP (comp, 1) = op0;
1639 rtx new = gen_rtx_COMPARE (VOIDmode,
1640 CONST0_RTX (GET_MODE (comp)), comp);
1641 if (GET_CODE (body) == SET)
1642 SET_SRC (body) = new;
1644 SET_SRC (XVECEXP (body, 0, 0)) = new;
1648 /* Within a MEM_EXPR, we care about either (1) a component ref of a decl,
1649 or (2) a component ref of something variable. Represent the later with
1650 a NULL expression. */
1653 component_ref_for_mem_expr (ref)
1656 tree inner = TREE_OPERAND (ref, 0);
1658 if (TREE_CODE (inner) == COMPONENT_REF)
1659 inner = component_ref_for_mem_expr (inner);
1662 tree placeholder_ptr = 0;
1664 /* Now remove any conversions: they don't change what the underlying
1665 object is. Likewise for SAVE_EXPR. Also handle PLACEHOLDER_EXPR. */
1666 while (TREE_CODE (inner) == NOP_EXPR || TREE_CODE (inner) == CONVERT_EXPR
1667 || TREE_CODE (inner) == NON_LVALUE_EXPR
1668 || TREE_CODE (inner) == VIEW_CONVERT_EXPR
1669 || TREE_CODE (inner) == SAVE_EXPR
1670 || TREE_CODE (inner) == PLACEHOLDER_EXPR)
1671 if (TREE_CODE (inner) == PLACEHOLDER_EXPR)
1672 inner = find_placeholder (inner, &placeholder_ptr);
1674 inner = TREE_OPERAND (inner, 0);
1676 if (! DECL_P (inner))
1680 if (inner == TREE_OPERAND (ref, 0))
1683 return build (COMPONENT_REF, TREE_TYPE (ref), inner,
1684 TREE_OPERAND (ref, 1));
1687 /* Given REF, a MEM, and T, either the type of X or the expression
1688 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1689 if we are making a new object of this type. BITPOS is nonzero if
1690 there is an offset outstanding on T that will be applied later. */
1693 set_mem_attributes_minus_bitpos (ref, t, objectp, bitpos)
1697 HOST_WIDE_INT bitpos;
1699 HOST_WIDE_INT alias = MEM_ALIAS_SET (ref);
1700 tree expr = MEM_EXPR (ref);
1701 rtx offset = MEM_OFFSET (ref);
1702 rtx size = MEM_SIZE (ref);
1703 unsigned int align = MEM_ALIGN (ref);
1704 HOST_WIDE_INT apply_bitpos = 0;
1707 /* It can happen that type_for_mode was given a mode for which there
1708 is no language-level type. In which case it returns NULL, which
1713 type = TYPE_P (t) ? t : TREE_TYPE (t);
1715 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1716 wrong answer, as it assumes that DECL_RTL already has the right alias
1717 info. Callers should not set DECL_RTL until after the call to
1718 set_mem_attributes. */
1719 if (DECL_P (t) && ref == DECL_RTL_IF_SET (t))
1722 /* Get the alias set from the expression or type (perhaps using a
1723 front-end routine) and use it. */
1724 alias = get_alias_set (t);
1726 MEM_VOLATILE_P (ref) = TYPE_VOLATILE (type);
1727 MEM_IN_STRUCT_P (ref) = AGGREGATE_TYPE_P (type);
1728 RTX_UNCHANGING_P (ref)
1729 |= ((lang_hooks.honor_readonly
1730 && (TYPE_READONLY (type) || TREE_READONLY (t)))
1731 || (! TYPE_P (t) && TREE_CONSTANT (t)));
1733 /* If we are making an object of this type, or if this is a DECL, we know
1734 that it is a scalar if the type is not an aggregate. */
1735 if ((objectp || DECL_P (t)) && ! AGGREGATE_TYPE_P (type))
1736 MEM_SCALAR_P (ref) = 1;
1738 /* We can set the alignment from the type if we are making an object,
1739 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1740 if (objectp || TREE_CODE (t) == INDIRECT_REF || TYPE_ALIGN_OK (type))
1741 align = MAX (align, TYPE_ALIGN (type));
1743 /* If the size is known, we can set that. */
1744 if (TYPE_SIZE_UNIT (type) && host_integerp (TYPE_SIZE_UNIT (type), 1))
1745 size = GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type), 1));
1747 /* If T is not a type, we may be able to deduce some more information about
1751 maybe_set_unchanging (ref, t);
1752 if (TREE_THIS_VOLATILE (t))
1753 MEM_VOLATILE_P (ref) = 1;
1755 /* Now remove any conversions: they don't change what the underlying
1756 object is. Likewise for SAVE_EXPR. */
1757 while (TREE_CODE (t) == NOP_EXPR || TREE_CODE (t) == CONVERT_EXPR
1758 || TREE_CODE (t) == NON_LVALUE_EXPR
1759 || TREE_CODE (t) == VIEW_CONVERT_EXPR
1760 || TREE_CODE (t) == SAVE_EXPR)
1761 t = TREE_OPERAND (t, 0);
1763 /* If this expression can't be addressed (e.g., it contains a reference
1764 to a non-addressable field), show we don't change its alias set. */
1765 if (! can_address_p (t))
1766 MEM_KEEP_ALIAS_SET_P (ref) = 1;
1768 /* If this is a decl, set the attributes of the MEM from it. */
1772 offset = const0_rtx;
1773 apply_bitpos = bitpos;
1774 size = (DECL_SIZE_UNIT (t)
1775 && host_integerp (DECL_SIZE_UNIT (t), 1)
1776 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t), 1)) : 0);
1777 align = DECL_ALIGN (t);
1780 /* If this is a constant, we know the alignment. */
1781 else if (TREE_CODE_CLASS (TREE_CODE (t)) == 'c')
1783 align = TYPE_ALIGN (type);
1784 #ifdef CONSTANT_ALIGNMENT
1785 align = CONSTANT_ALIGNMENT (t, align);
1789 /* If this is a field reference and not a bit-field, record it. */
1790 /* ??? There is some information that can be gleened from bit-fields,
1791 such as the word offset in the structure that might be modified.
1792 But skip it for now. */
1793 else if (TREE_CODE (t) == COMPONENT_REF
1794 && ! DECL_BIT_FIELD (TREE_OPERAND (t, 1)))
1796 expr = component_ref_for_mem_expr (t);
1797 offset = const0_rtx;
1798 apply_bitpos = bitpos;
1799 /* ??? Any reason the field size would be different than
1800 the size we got from the type? */
1803 /* If this is an array reference, look for an outer field reference. */
1804 else if (TREE_CODE (t) == ARRAY_REF)
1806 tree off_tree = size_zero_node;
1807 /* We can't modify t, because we use it at the end of the
1813 tree index = TREE_OPERAND (t2, 1);
1814 tree array = TREE_OPERAND (t2, 0);
1815 tree domain = TYPE_DOMAIN (TREE_TYPE (array));
1816 tree low_bound = (domain ? TYPE_MIN_VALUE (domain) : 0);
1817 tree unit_size = TYPE_SIZE_UNIT (TREE_TYPE (TREE_TYPE (array)));
1819 /* We assume all arrays have sizes that are a multiple of a byte.
1820 First subtract the lower bound, if any, in the type of the
1821 index, then convert to sizetype and multiply by the size of the
1823 if (low_bound != 0 && ! integer_zerop (low_bound))
1824 index = fold (build (MINUS_EXPR, TREE_TYPE (index),
1827 /* If the index has a self-referential type, pass it to a
1828 WITH_RECORD_EXPR; if the component size is, pass our
1829 component to one. */
1830 if (! TREE_CONSTANT (index)
1831 && contains_placeholder_p (index))
1832 index = build (WITH_RECORD_EXPR, TREE_TYPE (index), index, t2);
1833 if (! TREE_CONSTANT (unit_size)
1834 && contains_placeholder_p (unit_size))
1835 unit_size = build (WITH_RECORD_EXPR, sizetype,
1839 = fold (build (PLUS_EXPR, sizetype,
1840 fold (build (MULT_EXPR, sizetype,
1844 t2 = TREE_OPERAND (t2, 0);
1846 while (TREE_CODE (t2) == ARRAY_REF);
1852 if (host_integerp (off_tree, 1))
1854 HOST_WIDE_INT ioff = tree_low_cst (off_tree, 1);
1855 HOST_WIDE_INT aoff = (ioff & -ioff) * BITS_PER_UNIT;
1856 align = DECL_ALIGN (t2);
1857 if (aoff && aoff < align)
1859 offset = GEN_INT (ioff);
1860 apply_bitpos = bitpos;
1863 else if (TREE_CODE (t2) == COMPONENT_REF)
1865 expr = component_ref_for_mem_expr (t2);
1866 if (host_integerp (off_tree, 1))
1868 offset = GEN_INT (tree_low_cst (off_tree, 1));
1869 apply_bitpos = bitpos;
1871 /* ??? Any reason the field size would be different than
1872 the size we got from the type? */
1874 else if (flag_argument_noalias > 1
1875 && TREE_CODE (t2) == INDIRECT_REF
1876 && TREE_CODE (TREE_OPERAND (t2, 0)) == PARM_DECL)
1883 /* If this is a Fortran indirect argument reference, record the
1885 else if (flag_argument_noalias > 1
1886 && TREE_CODE (t) == INDIRECT_REF
1887 && TREE_CODE (TREE_OPERAND (t, 0)) == PARM_DECL)
1894 /* If we modified OFFSET based on T, then subtract the outstanding
1895 bit position offset. Similarly, increase the size of the accessed
1896 object to contain the negative offset. */
1899 offset = plus_constant (offset, -(apply_bitpos / BITS_PER_UNIT));
1901 size = plus_constant (size, apply_bitpos / BITS_PER_UNIT);
1904 /* Now set the attributes we computed above. */
1906 = get_mem_attrs (alias, expr, offset, size, align, GET_MODE (ref));
1908 /* If this is already known to be a scalar or aggregate, we are done. */
1909 if (MEM_IN_STRUCT_P (ref) || MEM_SCALAR_P (ref))
1912 /* If it is a reference into an aggregate, this is part of an aggregate.
1913 Otherwise we don't know. */
1914 else if (TREE_CODE (t) == COMPONENT_REF || TREE_CODE (t) == ARRAY_REF
1915 || TREE_CODE (t) == ARRAY_RANGE_REF
1916 || TREE_CODE (t) == BIT_FIELD_REF)
1917 MEM_IN_STRUCT_P (ref) = 1;
1921 set_mem_attributes (ref, t, objectp)
1926 set_mem_attributes_minus_bitpos (ref, t, objectp, 0);
1929 /* Set the alias set of MEM to SET. */
1932 set_mem_alias_set (mem, set)
1936 #ifdef ENABLE_CHECKING
1937 /* If the new and old alias sets don't conflict, something is wrong. */
1938 if (!alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)))
1942 MEM_ATTRS (mem) = get_mem_attrs (set, MEM_EXPR (mem), MEM_OFFSET (mem),
1943 MEM_SIZE (mem), MEM_ALIGN (mem),
1947 /* Set the alignment of MEM to ALIGN bits. */
1950 set_mem_align (mem, align)
1954 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1955 MEM_OFFSET (mem), MEM_SIZE (mem), align,
1959 /* Set the expr for MEM to EXPR. */
1962 set_mem_expr (mem, expr)
1967 = get_mem_attrs (MEM_ALIAS_SET (mem), expr, MEM_OFFSET (mem),
1968 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
1971 /* Set the offset of MEM to OFFSET. */
1974 set_mem_offset (mem, offset)
1977 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1978 offset, MEM_SIZE (mem), MEM_ALIGN (mem),
1982 /* Set the size of MEM to SIZE. */
1985 set_mem_size (mem, size)
1988 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1989 MEM_OFFSET (mem), size, MEM_ALIGN (mem),
1993 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1994 and its address changed to ADDR. (VOIDmode means don't change the mode.
1995 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1996 returned memory location is required to be valid. The memory
1997 attributes are not changed. */
2000 change_address_1 (memref, mode, addr, validate)
2002 enum machine_mode mode;
2008 if (GET_CODE (memref) != MEM)
2010 if (mode == VOIDmode)
2011 mode = GET_MODE (memref);
2013 addr = XEXP (memref, 0);
2017 if (reload_in_progress || reload_completed)
2019 if (! memory_address_p (mode, addr))
2023 addr = memory_address (mode, addr);
2026 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
2029 new = gen_rtx_MEM (mode, addr);
2030 MEM_COPY_ATTRIBUTES (new, memref);
2034 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
2035 way we are changing MEMREF, so we only preserve the alias set. */
2038 change_address (memref, mode, addr)
2040 enum machine_mode mode;
2043 rtx new = change_address_1 (memref, mode, addr, 1);
2044 enum machine_mode mmode = GET_MODE (new);
2047 = get_mem_attrs (MEM_ALIAS_SET (memref), 0, 0,
2048 mmode == BLKmode ? 0 : GEN_INT (GET_MODE_SIZE (mmode)),
2049 (mmode == BLKmode ? BITS_PER_UNIT
2050 : GET_MODE_ALIGNMENT (mmode)),
2056 /* Return a memory reference like MEMREF, but with its mode changed
2057 to MODE and its address offset by OFFSET bytes. If VALIDATE is
2058 nonzero, the memory address is forced to be valid.
2059 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
2060 and caller is responsible for adjusting MEMREF base register. */
2063 adjust_address_1 (memref, mode, offset, validate, adjust)
2065 enum machine_mode mode;
2066 HOST_WIDE_INT offset;
2067 int validate, adjust;
2069 rtx addr = XEXP (memref, 0);
2071 rtx memoffset = MEM_OFFSET (memref);
2073 unsigned int memalign = MEM_ALIGN (memref);
2075 /* ??? Prefer to create garbage instead of creating shared rtl.
2076 This may happen even if offset is nonzero -- consider
2077 (plus (plus reg reg) const_int) -- so do this always. */
2078 addr = copy_rtx (addr);
2082 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
2083 object, we can merge it into the LO_SUM. */
2084 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
2086 && (unsigned HOST_WIDE_INT) offset
2087 < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
2088 addr = gen_rtx_LO_SUM (Pmode, XEXP (addr, 0),
2089 plus_constant (XEXP (addr, 1), offset));
2091 addr = plus_constant (addr, offset);
2094 new = change_address_1 (memref, mode, addr, validate);
2096 /* Compute the new values of the memory attributes due to this adjustment.
2097 We add the offsets and update the alignment. */
2099 memoffset = GEN_INT (offset + INTVAL (memoffset));
2101 /* Compute the new alignment by taking the MIN of the alignment and the
2102 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
2107 (unsigned HOST_WIDE_INT) (offset & -offset) * BITS_PER_UNIT);
2109 /* We can compute the size in a number of ways. */
2110 if (GET_MODE (new) != BLKmode)
2111 size = GEN_INT (GET_MODE_SIZE (GET_MODE (new)));
2112 else if (MEM_SIZE (memref))
2113 size = plus_constant (MEM_SIZE (memref), -offset);
2115 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref),
2116 memoffset, size, memalign, GET_MODE (new));
2118 /* At some point, we should validate that this offset is within the object,
2119 if all the appropriate values are known. */
2123 /* Return a memory reference like MEMREF, but with its mode changed
2124 to MODE and its address changed to ADDR, which is assumed to be
2125 MEMREF offseted by OFFSET bytes. If VALIDATE is
2126 nonzero, the memory address is forced to be valid. */
2129 adjust_automodify_address_1 (memref, mode, addr, offset, validate)
2131 enum machine_mode mode;
2133 HOST_WIDE_INT offset;
2136 memref = change_address_1 (memref, VOIDmode, addr, validate);
2137 return adjust_address_1 (memref, mode, offset, validate, 0);
2140 /* Return a memory reference like MEMREF, but whose address is changed by
2141 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2142 known to be in OFFSET (possibly 1). */
2145 offset_address (memref, offset, pow2)
2150 rtx new, addr = XEXP (memref, 0);
2152 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
2154 /* At this point we don't know _why_ the address is invalid. It
2155 could have secondary memory refereces, multiplies or anything.
2157 However, if we did go and rearrange things, we can wind up not
2158 being able to recognize the magic around pic_offset_table_rtx.
2159 This stuff is fragile, and is yet another example of why it is
2160 bad to expose PIC machinery too early. */
2161 if (! memory_address_p (GET_MODE (memref), new)
2162 && GET_CODE (addr) == PLUS
2163 && XEXP (addr, 0) == pic_offset_table_rtx)
2165 addr = force_reg (GET_MODE (addr), addr);
2166 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
2169 update_temp_slot_address (XEXP (memref, 0), new);
2170 new = change_address_1 (memref, VOIDmode, new, 1);
2172 /* Update the alignment to reflect the offset. Reset the offset, which
2175 = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref), 0, 0,
2176 MIN (MEM_ALIGN (memref),
2177 (unsigned HOST_WIDE_INT) pow2 * BITS_PER_UNIT),
2182 /* Return a memory reference like MEMREF, but with its address changed to
2183 ADDR. The caller is asserting that the actual piece of memory pointed
2184 to is the same, just the form of the address is being changed, such as
2185 by putting something into a register. */
2188 replace_equiv_address (memref, addr)
2192 /* change_address_1 copies the memory attribute structure without change
2193 and that's exactly what we want here. */
2194 update_temp_slot_address (XEXP (memref, 0), addr);
2195 return change_address_1 (memref, VOIDmode, addr, 1);
2198 /* Likewise, but the reference is not required to be valid. */
2201 replace_equiv_address_nv (memref, addr)
2205 return change_address_1 (memref, VOIDmode, addr, 0);
2208 /* Return a memory reference like MEMREF, but with its mode widened to
2209 MODE and offset by OFFSET. This would be used by targets that e.g.
2210 cannot issue QImode memory operations and have to use SImode memory
2211 operations plus masking logic. */
2214 widen_memory_access (memref, mode, offset)
2216 enum machine_mode mode;
2217 HOST_WIDE_INT offset;
2219 rtx new = adjust_address_1 (memref, mode, offset, 1, 1);
2220 tree expr = MEM_EXPR (new);
2221 rtx memoffset = MEM_OFFSET (new);
2222 unsigned int size = GET_MODE_SIZE (mode);
2224 /* If we don't know what offset we were at within the expression, then
2225 we can't know if we've overstepped the bounds. */
2231 if (TREE_CODE (expr) == COMPONENT_REF)
2233 tree field = TREE_OPERAND (expr, 1);
2235 if (! DECL_SIZE_UNIT (field))
2241 /* Is the field at least as large as the access? If so, ok,
2242 otherwise strip back to the containing structure. */
2243 if (TREE_CODE (DECL_SIZE_UNIT (field)) == INTEGER_CST
2244 && compare_tree_int (DECL_SIZE_UNIT (field), size) >= 0
2245 && INTVAL (memoffset) >= 0)
2248 if (! host_integerp (DECL_FIELD_OFFSET (field), 1))
2254 expr = TREE_OPERAND (expr, 0);
2255 memoffset = (GEN_INT (INTVAL (memoffset)
2256 + tree_low_cst (DECL_FIELD_OFFSET (field), 1)
2257 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 1)
2260 /* Similarly for the decl. */
2261 else if (DECL_P (expr)
2262 && DECL_SIZE_UNIT (expr)
2263 && TREE_CODE (DECL_SIZE_UNIT (expr)) == INTEGER_CST
2264 && compare_tree_int (DECL_SIZE_UNIT (expr), size) >= 0
2265 && (! memoffset || INTVAL (memoffset) >= 0))
2269 /* The widened memory access overflows the expression, which means
2270 that it could alias another expression. Zap it. */
2277 memoffset = NULL_RTX;
2279 /* The widened memory may alias other stuff, so zap the alias set. */
2280 /* ??? Maybe use get_alias_set on any remaining expression. */
2282 MEM_ATTRS (new) = get_mem_attrs (0, expr, memoffset, GEN_INT (size),
2283 MEM_ALIGN (new), mode);
2288 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2293 return gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX, NULL_RTX,
2294 NULL, label_num++, NULL);
2297 /* For procedure integration. */
2299 /* Install new pointers to the first and last insns in the chain.
2300 Also, set cur_insn_uid to one higher than the last in use.
2301 Used for an inline-procedure after copying the insn chain. */
2304 set_new_first_and_last_insn (first, last)
2313 for (insn = first; insn; insn = NEXT_INSN (insn))
2314 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2319 /* Set the range of label numbers found in the current function.
2320 This is used when belatedly compiling an inline function. */
2323 set_new_first_and_last_label_num (first, last)
2326 base_label_num = label_num;
2327 first_label_num = first;
2328 last_label_num = last;
2331 /* Set the last label number found in the current function.
2332 This is used when belatedly compiling an inline function. */
2335 set_new_last_label_num (last)
2338 base_label_num = label_num;
2339 last_label_num = last;
2342 /* Restore all variables describing the current status from the structure *P.
2343 This is used after a nested function. */
2346 restore_emit_status (p)
2347 struct function *p ATTRIBUTE_UNUSED;
2352 /* Go through all the RTL insn bodies and copy any invalid shared
2353 structure. This routine should only be called once. */
2356 unshare_all_rtl (fndecl, insn)
2362 /* Make sure that virtual parameters are not shared. */
2363 for (decl = DECL_ARGUMENTS (fndecl); decl; decl = TREE_CHAIN (decl))
2364 SET_DECL_RTL (decl, copy_rtx_if_shared (DECL_RTL (decl)));
2366 /* Make sure that virtual stack slots are not shared. */
2367 unshare_all_decls (DECL_INITIAL (fndecl));
2369 /* Unshare just about everything else. */
2370 unshare_all_rtl_1 (insn);
2372 /* Make sure the addresses of stack slots found outside the insn chain
2373 (such as, in DECL_RTL of a variable) are not shared
2374 with the insn chain.
2376 This special care is necessary when the stack slot MEM does not
2377 actually appear in the insn chain. If it does appear, its address
2378 is unshared from all else at that point. */
2379 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
2382 /* Go through all the RTL insn bodies and copy any invalid shared
2383 structure, again. This is a fairly expensive thing to do so it
2384 should be done sparingly. */
2387 unshare_all_rtl_again (insn)
2393 for (p = insn; p; p = NEXT_INSN (p))
2396 reset_used_flags (PATTERN (p));
2397 reset_used_flags (REG_NOTES (p));
2398 reset_used_flags (LOG_LINKS (p));
2401 /* Make sure that virtual stack slots are not shared. */
2402 reset_used_decls (DECL_INITIAL (cfun->decl));
2404 /* Make sure that virtual parameters are not shared. */
2405 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
2406 reset_used_flags (DECL_RTL (decl));
2408 reset_used_flags (stack_slot_list);
2410 unshare_all_rtl (cfun->decl, insn);
2413 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2414 Assumes the mark bits are cleared at entry. */
2417 unshare_all_rtl_1 (insn)
2420 for (; insn; insn = NEXT_INSN (insn))
2423 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
2424 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
2425 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
2429 /* Go through all virtual stack slots of a function and copy any
2430 shared structure. */
2432 unshare_all_decls (blk)
2437 /* Copy shared decls. */
2438 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2439 if (DECL_RTL_SET_P (t))
2440 SET_DECL_RTL (t, copy_rtx_if_shared (DECL_RTL (t)));
2442 /* Now process sub-blocks. */
2443 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2444 unshare_all_decls (t);
2447 /* Go through all virtual stack slots of a function and mark them as
2450 reset_used_decls (blk)
2456 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2457 if (DECL_RTL_SET_P (t))
2458 reset_used_flags (DECL_RTL (t));
2460 /* Now process sub-blocks. */
2461 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2462 reset_used_decls (t);
2465 /* Similar to `copy_rtx' except that if MAY_SHARE is present, it is
2466 placed in the result directly, rather than being copied. MAY_SHARE is
2467 either a MEM of an EXPR_LIST of MEMs. */
2470 copy_most_rtx (orig, may_share)
2477 const char *format_ptr;
2479 if (orig == may_share
2480 || (GET_CODE (may_share) == EXPR_LIST
2481 && in_expr_list_p (may_share, orig)))
2484 code = GET_CODE (orig);
2502 copy = rtx_alloc (code);
2503 PUT_MODE (copy, GET_MODE (orig));
2504 RTX_FLAG (copy, in_struct) = RTX_FLAG (orig, in_struct);
2505 RTX_FLAG (copy, volatil) = RTX_FLAG (orig, volatil);
2506 RTX_FLAG (copy, unchanging) = RTX_FLAG (orig, unchanging);
2507 RTX_FLAG (copy, integrated) = RTX_FLAG (orig, integrated);
2508 RTX_FLAG (copy, frame_related) = RTX_FLAG (orig, frame_related);
2510 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
2512 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
2514 switch (*format_ptr++)
2517 XEXP (copy, i) = XEXP (orig, i);
2518 if (XEXP (orig, i) != NULL && XEXP (orig, i) != may_share)
2519 XEXP (copy, i) = copy_most_rtx (XEXP (orig, i), may_share);
2523 XEXP (copy, i) = XEXP (orig, i);
2528 XVEC (copy, i) = XVEC (orig, i);
2529 if (XVEC (orig, i) != NULL)
2531 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
2532 for (j = 0; j < XVECLEN (copy, i); j++)
2533 XVECEXP (copy, i, j)
2534 = copy_most_rtx (XVECEXP (orig, i, j), may_share);
2539 XWINT (copy, i) = XWINT (orig, i);
2544 XINT (copy, i) = XINT (orig, i);
2548 XTREE (copy, i) = XTREE (orig, i);
2553 XSTR (copy, i) = XSTR (orig, i);
2557 /* Copy this through the wide int field; that's safest. */
2558 X0WINT (copy, i) = X0WINT (orig, i);
2568 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2569 Recursively does the same for subexpressions. */
2572 copy_rtx_if_shared (orig)
2578 const char *format_ptr;
2584 code = GET_CODE (x);
2586 /* These types may be freely shared. */
2600 /* SCRATCH must be shared because they represent distinct values. */
2604 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2605 a LABEL_REF, it isn't sharable. */
2606 if (GET_CODE (XEXP (x, 0)) == PLUS
2607 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
2608 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
2617 /* The chain of insns is not being copied. */
2621 /* A MEM is allowed to be shared if its address is constant.
2623 We used to allow sharing of MEMs which referenced
2624 virtual_stack_vars_rtx or virtual_incoming_args_rtx, but
2625 that can lose. instantiate_virtual_regs will not unshare
2626 the MEMs, and combine may change the structure of the address
2627 because it looks safe and profitable in one context, but
2628 in some other context it creates unrecognizable RTL. */
2629 if (CONSTANT_ADDRESS_P (XEXP (x, 0)))
2638 /* This rtx may not be shared. If it has already been seen,
2639 replace it with a copy of itself. */
2641 if (RTX_FLAG (x, used))
2645 copy = rtx_alloc (code);
2647 (sizeof (*copy) - sizeof (copy->fld)
2648 + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code)));
2652 RTX_FLAG (x, used) = 1;
2654 /* Now scan the subexpressions recursively.
2655 We can store any replaced subexpressions directly into X
2656 since we know X is not shared! Any vectors in X
2657 must be copied if X was copied. */
2659 format_ptr = GET_RTX_FORMAT (code);
2661 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2663 switch (*format_ptr++)
2666 XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
2670 if (XVEC (x, i) != NULL)
2673 int len = XVECLEN (x, i);
2675 if (copied && len > 0)
2676 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
2677 for (j = 0; j < len; j++)
2678 XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j));
2686 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2687 to look for shared sub-parts. */
2690 reset_used_flags (x)
2695 const char *format_ptr;
2700 code = GET_CODE (x);
2702 /* These types may be freely shared so we needn't do any resetting
2724 /* The chain of insns is not being copied. */
2731 RTX_FLAG (x, used) = 0;
2733 format_ptr = GET_RTX_FORMAT (code);
2734 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2736 switch (*format_ptr++)
2739 reset_used_flags (XEXP (x, i));
2743 for (j = 0; j < XVECLEN (x, i); j++)
2744 reset_used_flags (XVECEXP (x, i, j));
2750 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2751 Return X or the rtx for the pseudo reg the value of X was copied into.
2752 OTHER must be valid as a SET_DEST. */
2755 make_safe_from (x, other)
2759 switch (GET_CODE (other))
2762 other = SUBREG_REG (other);
2764 case STRICT_LOW_PART:
2767 other = XEXP (other, 0);
2773 if ((GET_CODE (other) == MEM
2775 && GET_CODE (x) != REG
2776 && GET_CODE (x) != SUBREG)
2777 || (GET_CODE (other) == REG
2778 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2779 || reg_mentioned_p (other, x))))
2781 rtx temp = gen_reg_rtx (GET_MODE (x));
2782 emit_move_insn (temp, x);
2788 /* Emission of insns (adding them to the doubly-linked list). */
2790 /* Return the first insn of the current sequence or current function. */
2798 /* Specify a new insn as the first in the chain. */
2801 set_first_insn (insn)
2804 if (PREV_INSN (insn) != 0)
2809 /* Return the last insn emitted in current sequence or current function. */
2817 /* Specify a new insn as the last in the chain. */
2820 set_last_insn (insn)
2823 if (NEXT_INSN (insn) != 0)
2828 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2831 get_last_insn_anywhere ()
2833 struct sequence_stack *stack;
2836 for (stack = seq_stack; stack; stack = stack->next)
2837 if (stack->last != 0)
2842 /* Return the first nonnote insn emitted in current sequence or current
2843 function. This routine looks inside SEQUENCEs. */
2846 get_first_nonnote_insn ()
2848 rtx insn = first_insn;
2852 insn = next_insn (insn);
2853 if (insn == 0 || GET_CODE (insn) != NOTE)
2860 /* Return the last nonnote insn emitted in current sequence or current
2861 function. This routine looks inside SEQUENCEs. */
2864 get_last_nonnote_insn ()
2866 rtx insn = last_insn;
2870 insn = previous_insn (insn);
2871 if (insn == 0 || GET_CODE (insn) != NOTE)
2878 /* Return a number larger than any instruction's uid in this function. */
2883 return cur_insn_uid;
2886 /* Renumber instructions so that no instruction UIDs are wasted. */
2889 renumber_insns (stream)
2894 /* If we're not supposed to renumber instructions, don't. */
2895 if (!flag_renumber_insns)
2898 /* If there aren't that many instructions, then it's not really
2899 worth renumbering them. */
2900 if (flag_renumber_insns == 1 && get_max_uid () < 25000)
2905 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
2908 fprintf (stream, "Renumbering insn %d to %d\n",
2909 INSN_UID (insn), cur_insn_uid);
2910 INSN_UID (insn) = cur_insn_uid++;
2914 /* Return the next insn. If it is a SEQUENCE, return the first insn
2923 insn = NEXT_INSN (insn);
2924 if (insn && GET_CODE (insn) == INSN
2925 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2926 insn = XVECEXP (PATTERN (insn), 0, 0);
2932 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2936 previous_insn (insn)
2941 insn = PREV_INSN (insn);
2942 if (insn && GET_CODE (insn) == INSN
2943 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2944 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
2950 /* Return the next insn after INSN that is not a NOTE. This routine does not
2951 look inside SEQUENCEs. */
2954 next_nonnote_insn (insn)
2959 insn = NEXT_INSN (insn);
2960 if (insn == 0 || GET_CODE (insn) != NOTE)
2967 /* Return the previous insn before INSN that is not a NOTE. This routine does
2968 not look inside SEQUENCEs. */
2971 prev_nonnote_insn (insn)
2976 insn = PREV_INSN (insn);
2977 if (insn == 0 || GET_CODE (insn) != NOTE)
2984 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2985 or 0, if there is none. This routine does not look inside
2989 next_real_insn (insn)
2994 insn = NEXT_INSN (insn);
2995 if (insn == 0 || GET_CODE (insn) == INSN
2996 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
3003 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
3004 or 0, if there is none. This routine does not look inside
3008 prev_real_insn (insn)
3013 insn = PREV_INSN (insn);
3014 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
3015 || GET_CODE (insn) == JUMP_INSN)
3022 /* Find the next insn after INSN that really does something. This routine
3023 does not look inside SEQUENCEs. Until reload has completed, this is the
3024 same as next_real_insn. */
3027 active_insn_p (insn)
3030 return (GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
3031 || (GET_CODE (insn) == INSN
3032 && (! reload_completed
3033 || (GET_CODE (PATTERN (insn)) != USE
3034 && GET_CODE (PATTERN (insn)) != CLOBBER))));
3038 next_active_insn (insn)
3043 insn = NEXT_INSN (insn);
3044 if (insn == 0 || active_insn_p (insn))
3051 /* Find the last insn before INSN that really does something. This routine
3052 does not look inside SEQUENCEs. Until reload has completed, this is the
3053 same as prev_real_insn. */
3056 prev_active_insn (insn)
3061 insn = PREV_INSN (insn);
3062 if (insn == 0 || active_insn_p (insn))
3069 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
3077 insn = NEXT_INSN (insn);
3078 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
3085 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
3093 insn = PREV_INSN (insn);
3094 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
3102 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3103 and REG_CC_USER notes so we can find it. */
3106 link_cc0_insns (insn)
3109 rtx user = next_nonnote_insn (insn);
3111 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
3112 user = XVECEXP (PATTERN (user), 0, 0);
3114 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn,
3116 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
3119 /* Return the next insn that uses CC0 after INSN, which is assumed to
3120 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3121 applied to the result of this function should yield INSN).
3123 Normally, this is simply the next insn. However, if a REG_CC_USER note
3124 is present, it contains the insn that uses CC0.
3126 Return 0 if we can't find the insn. */
3129 next_cc0_user (insn)
3132 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
3135 return XEXP (note, 0);
3137 insn = next_nonnote_insn (insn);
3138 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
3139 insn = XVECEXP (PATTERN (insn), 0, 0);
3141 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
3147 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3148 note, it is the previous insn. */
3151 prev_cc0_setter (insn)
3154 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
3157 return XEXP (note, 0);
3159 insn = prev_nonnote_insn (insn);
3160 if (! sets_cc0_p (PATTERN (insn)))
3167 /* Increment the label uses for all labels present in rtx. */
3170 mark_label_nuses (x)
3177 code = GET_CODE (x);
3178 if (code == LABEL_REF)
3179 LABEL_NUSES (XEXP (x, 0))++;
3181 fmt = GET_RTX_FORMAT (code);
3182 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3185 mark_label_nuses (XEXP (x, i));
3186 else if (fmt[i] == 'E')
3187 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3188 mark_label_nuses (XVECEXP (x, i, j));
3193 /* Try splitting insns that can be split for better scheduling.
3194 PAT is the pattern which might split.
3195 TRIAL is the insn providing PAT.
3196 LAST is nonzero if we should return the last insn of the sequence produced.
3198 If this routine succeeds in splitting, it returns the first or last
3199 replacement insn depending on the value of LAST. Otherwise, it
3200 returns TRIAL. If the insn to be returned can be split, it will be. */
3203 try_split (pat, trial, last)
3207 rtx before = PREV_INSN (trial);
3208 rtx after = NEXT_INSN (trial);
3209 int has_barrier = 0;
3213 rtx insn_last, insn;
3216 if (any_condjump_p (trial)
3217 && (note = find_reg_note (trial, REG_BR_PROB, 0)))
3218 split_branch_probability = INTVAL (XEXP (note, 0));
3219 probability = split_branch_probability;
3221 seq = split_insns (pat, trial);
3223 split_branch_probability = -1;
3225 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3226 We may need to handle this specially. */
3227 if (after && GET_CODE (after) == BARRIER)
3230 after = NEXT_INSN (after);
3236 /* Avoid infinite loop if any insn of the result matches
3237 the original pattern. */
3241 if (INSN_P (insn_last)
3242 && rtx_equal_p (PATTERN (insn_last), pat))
3244 if (!NEXT_INSN (insn_last))
3246 insn_last = NEXT_INSN (insn_last);
3250 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3252 if (GET_CODE (insn) == JUMP_INSN)
3254 mark_jump_label (PATTERN (insn), insn, 0);
3256 if (probability != -1
3257 && any_condjump_p (insn)
3258 && !find_reg_note (insn, REG_BR_PROB, 0))
3260 /* We can preserve the REG_BR_PROB notes only if exactly
3261 one jump is created, otherwise the machine description
3262 is responsible for this step using
3263 split_branch_probability variable. */
3267 = gen_rtx_EXPR_LIST (REG_BR_PROB,
3268 GEN_INT (probability),
3274 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3275 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3276 if (GET_CODE (trial) == CALL_INSN)
3278 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3279 if (GET_CODE (insn) == CALL_INSN)
3281 CALL_INSN_FUNCTION_USAGE (insn)
3282 = CALL_INSN_FUNCTION_USAGE (trial);
3283 SIBLING_CALL_P (insn) = SIBLING_CALL_P (trial);
3287 /* Copy notes, particularly those related to the CFG. */
3288 for (note = REG_NOTES (trial); note; note = XEXP (note, 1))
3290 switch (REG_NOTE_KIND (note))
3294 while (insn != NULL_RTX)
3296 if (GET_CODE (insn) == CALL_INSN
3297 || (flag_non_call_exceptions
3298 && may_trap_p (PATTERN (insn))))
3300 = gen_rtx_EXPR_LIST (REG_EH_REGION,
3303 insn = PREV_INSN (insn);
3309 case REG_ALWAYS_RETURN:
3311 while (insn != NULL_RTX)
3313 if (GET_CODE (insn) == CALL_INSN)
3315 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3318 insn = PREV_INSN (insn);
3322 case REG_NON_LOCAL_GOTO:
3324 while (insn != NULL_RTX)
3326 if (GET_CODE (insn) == JUMP_INSN)
3328 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3331 insn = PREV_INSN (insn);
3340 /* If there are LABELS inside the split insns increment the
3341 usage count so we don't delete the label. */
3342 if (GET_CODE (trial) == INSN)
3345 while (insn != NULL_RTX)
3347 if (GET_CODE (insn) == INSN)
3348 mark_label_nuses (PATTERN (insn));
3350 insn = PREV_INSN (insn);
3354 tem = emit_insn_after_scope (seq, trial, INSN_SCOPE (trial));
3356 delete_insn (trial);
3358 emit_barrier_after (tem);
3360 /* Recursively call try_split for each new insn created; by the
3361 time control returns here that insn will be fully split, so
3362 set LAST and continue from the insn after the one returned.
3363 We can't use next_active_insn here since AFTER may be a note.
3364 Ignore deleted insns, which can be occur if not optimizing. */
3365 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
3366 if (! INSN_DELETED_P (tem) && INSN_P (tem))
3367 tem = try_split (PATTERN (tem), tem, 1);
3369 /* Return either the first or the last insn, depending on which was
3372 ? (after ? PREV_INSN (after) : last_insn)
3373 : NEXT_INSN (before);
3376 /* Make and return an INSN rtx, initializing all its slots.
3377 Store PATTERN in the pattern slots. */
3380 make_insn_raw (pattern)
3385 insn = rtx_alloc (INSN);
3387 INSN_UID (insn) = cur_insn_uid++;
3388 PATTERN (insn) = pattern;
3389 INSN_CODE (insn) = -1;
3390 LOG_LINKS (insn) = NULL;
3391 REG_NOTES (insn) = NULL;
3392 INSN_SCOPE (insn) = NULL;
3393 BLOCK_FOR_INSN (insn) = NULL;
3395 #ifdef ENABLE_RTL_CHECKING
3398 && (returnjump_p (insn)
3399 || (GET_CODE (insn) == SET
3400 && SET_DEST (insn) == pc_rtx)))
3402 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
3410 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3413 make_jump_insn_raw (pattern)
3418 insn = rtx_alloc (JUMP_INSN);
3419 INSN_UID (insn) = cur_insn_uid++;
3421 PATTERN (insn) = pattern;
3422 INSN_CODE (insn) = -1;
3423 LOG_LINKS (insn) = NULL;
3424 REG_NOTES (insn) = NULL;
3425 JUMP_LABEL (insn) = NULL;
3426 INSN_SCOPE (insn) = NULL;
3427 BLOCK_FOR_INSN (insn) = NULL;
3432 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3435 make_call_insn_raw (pattern)
3440 insn = rtx_alloc (CALL_INSN);
3441 INSN_UID (insn) = cur_insn_uid++;
3443 PATTERN (insn) = pattern;
3444 INSN_CODE (insn) = -1;
3445 LOG_LINKS (insn) = NULL;
3446 REG_NOTES (insn) = NULL;
3447 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
3448 INSN_SCOPE (insn) = NULL;
3449 BLOCK_FOR_INSN (insn) = NULL;
3454 /* Add INSN to the end of the doubly-linked list.
3455 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3461 PREV_INSN (insn) = last_insn;
3462 NEXT_INSN (insn) = 0;
3464 if (NULL != last_insn)
3465 NEXT_INSN (last_insn) = insn;
3467 if (NULL == first_insn)
3473 /* Add INSN into the doubly-linked list after insn AFTER. This and
3474 the next should be the only functions called to insert an insn once
3475 delay slots have been filled since only they know how to update a
3479 add_insn_after (insn, after)
3482 rtx next = NEXT_INSN (after);
3485 if (optimize && INSN_DELETED_P (after))
3488 NEXT_INSN (insn) = next;
3489 PREV_INSN (insn) = after;
3493 PREV_INSN (next) = insn;
3494 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3495 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
3497 else if (last_insn == after)
3501 struct sequence_stack *stack = seq_stack;
3502 /* Scan all pending sequences too. */
3503 for (; stack; stack = stack->next)
3504 if (after == stack->last)
3514 if (GET_CODE (after) != BARRIER
3515 && GET_CODE (insn) != BARRIER
3516 && (bb = BLOCK_FOR_INSN (after)))
3518 set_block_for_insn (insn, bb);
3520 bb->flags |= BB_DIRTY;
3521 /* Should not happen as first in the BB is always
3522 either NOTE or LABEL. */
3523 if (bb->end == after
3524 /* Avoid clobbering of structure when creating new BB. */
3525 && GET_CODE (insn) != BARRIER
3526 && (GET_CODE (insn) != NOTE
3527 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3531 NEXT_INSN (after) = insn;
3532 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
3534 rtx sequence = PATTERN (after);
3535 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3539 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3540 the previous should be the only functions called to insert an insn once
3541 delay slots have been filled since only they know how to update a
3545 add_insn_before (insn, before)
3548 rtx prev = PREV_INSN (before);
3551 if (optimize && INSN_DELETED_P (before))
3554 PREV_INSN (insn) = prev;
3555 NEXT_INSN (insn) = before;
3559 NEXT_INSN (prev) = insn;
3560 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3562 rtx sequence = PATTERN (prev);
3563 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3566 else if (first_insn == before)
3570 struct sequence_stack *stack = seq_stack;
3571 /* Scan all pending sequences too. */
3572 for (; stack; stack = stack->next)
3573 if (before == stack->first)
3575 stack->first = insn;
3583 if (GET_CODE (before) != BARRIER
3584 && GET_CODE (insn) != BARRIER
3585 && (bb = BLOCK_FOR_INSN (before)))
3587 set_block_for_insn (insn, bb);
3589 bb->flags |= BB_DIRTY;
3590 /* Should not happen as first in the BB is always
3591 either NOTE or LABEl. */
3592 if (bb->head == insn
3593 /* Avoid clobbering of structure when creating new BB. */
3594 && GET_CODE (insn) != BARRIER
3595 && (GET_CODE (insn) != NOTE
3596 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3600 PREV_INSN (before) = insn;
3601 if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE)
3602 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
3605 /* Remove an insn from its doubly-linked list. This function knows how
3606 to handle sequences. */
3611 rtx next = NEXT_INSN (insn);
3612 rtx prev = PREV_INSN (insn);
3617 NEXT_INSN (prev) = next;
3618 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3620 rtx sequence = PATTERN (prev);
3621 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
3624 else if (first_insn == insn)
3628 struct sequence_stack *stack = seq_stack;
3629 /* Scan all pending sequences too. */
3630 for (; stack; stack = stack->next)
3631 if (insn == stack->first)
3633 stack->first = next;
3643 PREV_INSN (next) = prev;
3644 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3645 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
3647 else if (last_insn == insn)
3651 struct sequence_stack *stack = seq_stack;
3652 /* Scan all pending sequences too. */
3653 for (; stack; stack = stack->next)
3654 if (insn == stack->last)
3663 if (GET_CODE (insn) != BARRIER
3664 && (bb = BLOCK_FOR_INSN (insn)))
3667 bb->flags |= BB_DIRTY;
3668 if (bb->head == insn)
3670 /* Never ever delete the basic block note without deleting whole
3672 if (GET_CODE (insn) == NOTE)
3676 if (bb->end == insn)
3681 /* Delete all insns made since FROM.
3682 FROM becomes the new last instruction. */
3685 delete_insns_since (from)
3691 NEXT_INSN (from) = 0;
3695 /* This function is deprecated, please use sequences instead.
3697 Move a consecutive bunch of insns to a different place in the chain.
3698 The insns to be moved are those between FROM and TO.
3699 They are moved to a new position after the insn AFTER.
3700 AFTER must not be FROM or TO or any insn in between.
3702 This function does not know about SEQUENCEs and hence should not be
3703 called after delay-slot filling has been done. */
3706 reorder_insns_nobb (from, to, after)
3707 rtx from, to, after;
3709 /* Splice this bunch out of where it is now. */
3710 if (PREV_INSN (from))
3711 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
3713 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
3714 if (last_insn == to)
3715 last_insn = PREV_INSN (from);
3716 if (first_insn == from)
3717 first_insn = NEXT_INSN (to);
3719 /* Make the new neighbors point to it and it to them. */
3720 if (NEXT_INSN (after))
3721 PREV_INSN (NEXT_INSN (after)) = to;
3723 NEXT_INSN (to) = NEXT_INSN (after);
3724 PREV_INSN (from) = after;
3725 NEXT_INSN (after) = from;
3726 if (after == last_insn)
3730 /* Same as function above, but take care to update BB boundaries. */
3732 reorder_insns (from, to, after)
3733 rtx from, to, after;
3735 rtx prev = PREV_INSN (from);
3736 basic_block bb, bb2;
3738 reorder_insns_nobb (from, to, after);
3740 if (GET_CODE (after) != BARRIER
3741 && (bb = BLOCK_FOR_INSN (after)))
3744 bb->flags |= BB_DIRTY;
3746 if (GET_CODE (from) != BARRIER
3747 && (bb2 = BLOCK_FOR_INSN (from)))
3751 bb2->flags |= BB_DIRTY;
3754 if (bb->end == after)
3757 for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
3758 set_block_for_insn (x, bb);
3762 /* Return the line note insn preceding INSN. */
3765 find_line_note (insn)
3768 if (no_line_numbers)
3771 for (; insn; insn = PREV_INSN (insn))
3772 if (GET_CODE (insn) == NOTE
3773 && NOTE_LINE_NUMBER (insn) >= 0)
3779 /* Like reorder_insns, but inserts line notes to preserve the line numbers
3780 of the moved insns when debugging. This may insert a note between AFTER
3781 and FROM, and another one after TO. */
3784 reorder_insns_with_line_notes (from, to, after)
3785 rtx from, to, after;
3787 rtx from_line = find_line_note (from);
3788 rtx after_line = find_line_note (after);
3790 reorder_insns (from, to, after);
3792 if (from_line == after_line)
3796 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
3797 NOTE_LINE_NUMBER (from_line),
3800 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
3801 NOTE_LINE_NUMBER (after_line),
3805 /* Remove unnecessary notes from the instruction stream. */
3808 remove_unnecessary_notes ()
3810 rtx block_stack = NULL_RTX;
3811 rtx eh_stack = NULL_RTX;
3816 /* We must not remove the first instruction in the function because
3817 the compiler depends on the first instruction being a note. */
3818 for (insn = NEXT_INSN (get_insns ()); insn; insn = next)
3820 /* Remember what's next. */
3821 next = NEXT_INSN (insn);
3823 /* We're only interested in notes. */
3824 if (GET_CODE (insn) != NOTE)
3827 switch (NOTE_LINE_NUMBER (insn))
3829 case NOTE_INSN_DELETED:
3830 case NOTE_INSN_LOOP_END_TOP_COND:
3834 case NOTE_INSN_EH_REGION_BEG:
3835 eh_stack = alloc_INSN_LIST (insn, eh_stack);
3838 case NOTE_INSN_EH_REGION_END:
3839 /* Too many end notes. */
3840 if (eh_stack == NULL_RTX)
3842 /* Mismatched nesting. */
3843 if (NOTE_EH_HANDLER (XEXP (eh_stack, 0)) != NOTE_EH_HANDLER (insn))
3846 eh_stack = XEXP (eh_stack, 1);
3847 free_INSN_LIST_node (tmp);
3850 case NOTE_INSN_BLOCK_BEG:
3851 /* By now, all notes indicating lexical blocks should have
3852 NOTE_BLOCK filled in. */
3853 if (NOTE_BLOCK (insn) == NULL_TREE)
3855 block_stack = alloc_INSN_LIST (insn, block_stack);
3858 case NOTE_INSN_BLOCK_END:
3859 /* Too many end notes. */
3860 if (block_stack == NULL_RTX)
3862 /* Mismatched nesting. */
3863 if (NOTE_BLOCK (XEXP (block_stack, 0)) != NOTE_BLOCK (insn))
3866 block_stack = XEXP (block_stack, 1);
3867 free_INSN_LIST_node (tmp);
3869 /* Scan back to see if there are any non-note instructions
3870 between INSN and the beginning of this block. If not,
3871 then there is no PC range in the generated code that will
3872 actually be in this block, so there's no point in
3873 remembering the existence of the block. */
3874 for (tmp = PREV_INSN (insn); tmp; tmp = PREV_INSN (tmp))
3876 /* This block contains a real instruction. Note that we
3877 don't include labels; if the only thing in the block
3878 is a label, then there are still no PC values that
3879 lie within the block. */
3883 /* We're only interested in NOTEs. */
3884 if (GET_CODE (tmp) != NOTE)
3887 if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_BEG)
3889 /* We just verified that this BLOCK matches us with
3890 the block_stack check above. Never delete the
3891 BLOCK for the outermost scope of the function; we
3892 can refer to names from that scope even if the
3893 block notes are messed up. */
3894 if (! is_body_block (NOTE_BLOCK (insn))
3895 && (*debug_hooks->ignore_block) (NOTE_BLOCK (insn)))
3902 else if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_END)
3903 /* There's a nested block. We need to leave the
3904 current block in place since otherwise the debugger
3905 wouldn't be able to show symbols from our block in
3906 the nested block. */
3912 /* Too many begin notes. */
3913 if (block_stack || eh_stack)
3918 /* Emit insn(s) of given code and pattern
3919 at a specified place within the doubly-linked list.
3921 All of the emit_foo global entry points accept an object
3922 X which is either an insn list or a PATTERN of a single
3925 There are thus a few canonical ways to generate code and
3926 emit it at a specific place in the instruction stream. For
3927 example, consider the instruction named SPOT and the fact that
3928 we would like to emit some instructions before SPOT. We might
3932 ... emit the new instructions ...
3933 insns_head = get_insns ();
3936 emit_insn_before (insns_head, SPOT);
3938 It used to be common to generate SEQUENCE rtl instead, but that
3939 is a relic of the past which no longer occurs. The reason is that
3940 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
3941 generated would almost certainly die right after it was created. */
3943 /* Make X be output before the instruction BEFORE. */
3946 emit_insn_before (x, before)
3952 #ifdef ENABLE_RTL_CHECKING
3953 if (before == NULL_RTX)
3960 switch (GET_CODE (x))
3971 rtx next = NEXT_INSN (insn);
3972 add_insn_before (insn, before);
3978 #ifdef ENABLE_RTL_CHECKING
3985 last = make_insn_raw (x);
3986 add_insn_before (last, before);
3993 /* Make an instruction with body X and code JUMP_INSN
3994 and output it before the instruction BEFORE. */
3997 emit_jump_insn_before (x, before)
4000 rtx insn, last = NULL_RTX;
4002 #ifdef ENABLE_RTL_CHECKING
4003 if (before == NULL_RTX)
4007 switch (GET_CODE (x))
4018 rtx next = NEXT_INSN (insn);
4019 add_insn_before (insn, before);
4025 #ifdef ENABLE_RTL_CHECKING
4032 last = make_jump_insn_raw (x);
4033 add_insn_before (last, before);
4040 /* Make an instruction with body X and code CALL_INSN
4041 and output it before the instruction BEFORE. */
4044 emit_call_insn_before (x, before)
4047 rtx last = NULL_RTX, insn;
4049 #ifdef ENABLE_RTL_CHECKING
4050 if (before == NULL_RTX)
4054 switch (GET_CODE (x))
4065 rtx next = NEXT_INSN (insn);
4066 add_insn_before (insn, before);
4072 #ifdef ENABLE_RTL_CHECKING
4079 last = make_call_insn_raw (x);
4080 add_insn_before (last, before);
4087 /* Make an insn of code BARRIER
4088 and output it before the insn BEFORE. */
4091 emit_barrier_before (before)
4094 rtx insn = rtx_alloc (BARRIER);
4096 INSN_UID (insn) = cur_insn_uid++;
4098 add_insn_before (insn, before);
4102 /* Emit the label LABEL before the insn BEFORE. */
4105 emit_label_before (label, before)
4108 /* This can be called twice for the same label as a result of the
4109 confusion that follows a syntax error! So make it harmless. */
4110 if (INSN_UID (label) == 0)
4112 INSN_UID (label) = cur_insn_uid++;
4113 add_insn_before (label, before);
4119 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4122 emit_note_before (subtype, before)
4126 rtx note = rtx_alloc (NOTE);
4127 INSN_UID (note) = cur_insn_uid++;
4128 NOTE_SOURCE_FILE (note) = 0;
4129 NOTE_LINE_NUMBER (note) = subtype;
4130 BLOCK_FOR_INSN (note) = NULL;
4132 add_insn_before (note, before);
4136 /* Helper for emit_insn_after, handles lists of instructions
4139 static rtx emit_insn_after_1 PARAMS ((rtx, rtx));
4142 emit_insn_after_1 (first, after)
4149 if (GET_CODE (after) != BARRIER
4150 && (bb = BLOCK_FOR_INSN (after)))
4152 bb->flags |= BB_DIRTY;
4153 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4154 if (GET_CODE (last) != BARRIER)
4155 set_block_for_insn (last, bb);
4156 if (GET_CODE (last) != BARRIER)
4157 set_block_for_insn (last, bb);
4158 if (bb->end == after)
4162 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4165 after_after = NEXT_INSN (after);
4167 NEXT_INSN (after) = first;
4168 PREV_INSN (first) = after;
4169 NEXT_INSN (last) = after_after;
4171 PREV_INSN (after_after) = last;
4173 if (after == last_insn)
4178 /* Make X be output after the insn AFTER. */
4181 emit_insn_after (x, after)
4186 #ifdef ENABLE_RTL_CHECKING
4187 if (after == NULL_RTX)
4194 switch (GET_CODE (x))
4202 last = emit_insn_after_1 (x, after);
4205 #ifdef ENABLE_RTL_CHECKING
4212 last = make_insn_raw (x);
4213 add_insn_after (last, after);
4220 /* Similar to emit_insn_after, except that line notes are to be inserted so
4221 as to act as if this insn were at FROM. */
4224 emit_insn_after_with_line_notes (x, after, from)
4227 rtx from_line = find_line_note (from);
4228 rtx after_line = find_line_note (after);
4229 rtx insn = emit_insn_after (x, after);
4232 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
4233 NOTE_LINE_NUMBER (from_line),
4237 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
4238 NOTE_LINE_NUMBER (after_line),
4242 /* Make an insn of code JUMP_INSN with body X
4243 and output it after the insn AFTER. */
4246 emit_jump_insn_after (x, after)
4251 #ifdef ENABLE_RTL_CHECKING
4252 if (after == NULL_RTX)
4256 switch (GET_CODE (x))
4264 last = emit_insn_after_1 (x, after);
4267 #ifdef ENABLE_RTL_CHECKING
4274 last = make_jump_insn_raw (x);
4275 add_insn_after (last, after);
4282 /* Make an instruction with body X and code CALL_INSN
4283 and output it after the instruction AFTER. */
4286 emit_call_insn_after (x, after)
4291 #ifdef ENABLE_RTL_CHECKING
4292 if (after == NULL_RTX)
4296 switch (GET_CODE (x))
4304 last = emit_insn_after_1 (x, after);
4307 #ifdef ENABLE_RTL_CHECKING
4314 last = make_call_insn_raw (x);
4315 add_insn_after (last, after);
4322 /* Make an insn of code BARRIER
4323 and output it after the insn AFTER. */
4326 emit_barrier_after (after)
4329 rtx insn = rtx_alloc (BARRIER);
4331 INSN_UID (insn) = cur_insn_uid++;
4333 add_insn_after (insn, after);
4337 /* Emit the label LABEL after the insn AFTER. */
4340 emit_label_after (label, after)
4343 /* This can be called twice for the same label
4344 as a result of the confusion that follows a syntax error!
4345 So make it harmless. */
4346 if (INSN_UID (label) == 0)
4348 INSN_UID (label) = cur_insn_uid++;
4349 add_insn_after (label, after);
4355 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4358 emit_note_after (subtype, after)
4362 rtx note = rtx_alloc (NOTE);
4363 INSN_UID (note) = cur_insn_uid++;
4364 NOTE_SOURCE_FILE (note) = 0;
4365 NOTE_LINE_NUMBER (note) = subtype;
4366 BLOCK_FOR_INSN (note) = NULL;
4367 add_insn_after (note, after);
4371 /* Emit a line note for FILE and LINE after the insn AFTER. */
4374 emit_line_note_after (file, line, after)
4381 if (no_line_numbers && line > 0)
4387 note = rtx_alloc (NOTE);
4388 INSN_UID (note) = cur_insn_uid++;
4389 NOTE_SOURCE_FILE (note) = file;
4390 NOTE_LINE_NUMBER (note) = line;
4391 BLOCK_FOR_INSN (note) = NULL;
4392 add_insn_after (note, after);
4396 /* Like emit_insn_after, but set INSN_SCOPE according to SCOPE. */
4398 emit_insn_after_scope (pattern, after, scope)
4402 rtx last = emit_insn_after (pattern, after);
4404 after = NEXT_INSN (after);
4407 if (active_insn_p (after))
4408 INSN_SCOPE (after) = scope;
4411 after = NEXT_INSN (after);
4416 /* Like emit_jump_insn_after, but set INSN_SCOPE according to SCOPE. */
4418 emit_jump_insn_after_scope (pattern, after, scope)
4422 rtx last = emit_jump_insn_after (pattern, after);
4424 after = NEXT_INSN (after);
4427 if (active_insn_p (after))
4428 INSN_SCOPE (after) = scope;
4431 after = NEXT_INSN (after);
4436 /* Like emit_call_insn_after, but set INSN_SCOPE according to SCOPE. */
4438 emit_call_insn_after_scope (pattern, after, scope)
4442 rtx last = emit_call_insn_after (pattern, after);
4444 after = NEXT_INSN (after);
4447 if (active_insn_p (after))
4448 INSN_SCOPE (after) = scope;
4451 after = NEXT_INSN (after);
4456 /* Like emit_insn_before, but set INSN_SCOPE according to SCOPE. */
4458 emit_insn_before_scope (pattern, before, scope)
4459 rtx pattern, before;
4462 rtx first = PREV_INSN (before);
4463 rtx last = emit_insn_before (pattern, before);
4465 first = NEXT_INSN (first);
4468 if (active_insn_p (first))
4469 INSN_SCOPE (first) = scope;
4472 first = NEXT_INSN (first);
4477 /* Take X and emit it at the end of the doubly-linked
4480 Returns the last insn emitted. */
4486 rtx last = last_insn;
4492 switch (GET_CODE (x))
4503 rtx next = NEXT_INSN (insn);
4510 #ifdef ENABLE_RTL_CHECKING
4517 last = make_insn_raw (x);
4525 /* Make an insn of code JUMP_INSN with pattern X
4526 and add it to the end of the doubly-linked list. */
4532 rtx last = NULL_RTX, insn;
4534 switch (GET_CODE (x))
4545 rtx next = NEXT_INSN (insn);
4552 #ifdef ENABLE_RTL_CHECKING
4559 last = make_jump_insn_raw (x);
4567 /* Make an insn of code CALL_INSN with pattern X
4568 and add it to the end of the doubly-linked list. */
4576 switch (GET_CODE (x))
4584 insn = emit_insn (x);
4587 #ifdef ENABLE_RTL_CHECKING
4594 insn = make_call_insn_raw (x);
4602 /* Add the label LABEL to the end of the doubly-linked list. */
4608 /* This can be called twice for the same label
4609 as a result of the confusion that follows a syntax error!
4610 So make it harmless. */
4611 if (INSN_UID (label) == 0)
4613 INSN_UID (label) = cur_insn_uid++;
4619 /* Make an insn of code BARRIER
4620 and add it to the end of the doubly-linked list. */
4625 rtx barrier = rtx_alloc (BARRIER);
4626 INSN_UID (barrier) = cur_insn_uid++;
4631 /* Make an insn of code NOTE
4632 with data-fields specified by FILE and LINE
4633 and add it to the end of the doubly-linked list,
4634 but only if line-numbers are desired for debugging info. */
4637 emit_line_note (file, line)
4641 set_file_and_line_for_stmt (file, line);
4644 if (no_line_numbers)
4648 return emit_note (file, line);
4651 /* Make an insn of code NOTE
4652 with data-fields specified by FILE and LINE
4653 and add it to the end of the doubly-linked list.
4654 If it is a line-number NOTE, omit it if it matches the previous one. */
4657 emit_note (file, line)
4665 if (file && last_filename && !strcmp (file, last_filename)
4666 && line == last_linenum)
4668 last_filename = file;
4669 last_linenum = line;
4672 if (no_line_numbers && line > 0)
4678 note = rtx_alloc (NOTE);
4679 INSN_UID (note) = cur_insn_uid++;
4680 NOTE_SOURCE_FILE (note) = file;
4681 NOTE_LINE_NUMBER (note) = line;
4682 BLOCK_FOR_INSN (note) = NULL;
4687 /* Emit a NOTE, and don't omit it even if LINE is the previous note. */
4690 emit_line_note_force (file, line)
4695 return emit_line_note (file, line);
4698 /* Cause next statement to emit a line note even if the line number
4699 has not changed. This is used at the beginning of a function. */
4702 force_next_line_note ()
4707 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4708 note of this type already exists, remove it first. */
4711 set_unique_reg_note (insn, kind, datum)
4716 rtx note = find_reg_note (insn, kind, NULL_RTX);
4722 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4723 has multiple sets (some callers assume single_set
4724 means the insn only has one set, when in fact it
4725 means the insn only has one * useful * set). */
4726 if (GET_CODE (PATTERN (insn)) == PARALLEL && multiple_sets (insn))
4733 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4734 It serves no useful purpose and breaks eliminate_regs. */
4735 if (GET_CODE (datum) == ASM_OPERANDS)
4745 XEXP (note, 0) = datum;
4749 REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn));
4750 return REG_NOTES (insn);
4753 /* Return an indication of which type of insn should have X as a body.
4754 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
4760 if (GET_CODE (x) == CODE_LABEL)
4762 if (GET_CODE (x) == CALL)
4764 if (GET_CODE (x) == RETURN)
4766 if (GET_CODE (x) == SET)
4768 if (SET_DEST (x) == pc_rtx)
4770 else if (GET_CODE (SET_SRC (x)) == CALL)
4775 if (GET_CODE (x) == PARALLEL)
4778 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
4779 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
4781 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4782 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
4784 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4785 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
4791 /* Emit the rtl pattern X as an appropriate kind of insn.
4792 If X is a label, it is simply added into the insn chain. */
4798 enum rtx_code code = classify_insn (x);
4800 if (code == CODE_LABEL)
4801 return emit_label (x);
4802 else if (code == INSN)
4803 return emit_insn (x);
4804 else if (code == JUMP_INSN)
4806 rtx insn = emit_jump_insn (x);
4807 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
4808 return emit_barrier ();
4811 else if (code == CALL_INSN)
4812 return emit_call_insn (x);
4817 /* Space for free sequence stack entries. */
4818 static GTY ((deletable (""))) struct sequence_stack *free_sequence_stack;
4820 /* Begin emitting insns to a sequence which can be packaged in an
4821 RTL_EXPR. If this sequence will contain something that might cause
4822 the compiler to pop arguments to function calls (because those
4823 pops have previously been deferred; see INHIBIT_DEFER_POP for more
4824 details), use do_pending_stack_adjust before calling this function.
4825 That will ensure that the deferred pops are not accidentally
4826 emitted in the middle of this sequence. */
4831 struct sequence_stack *tem;
4833 if (free_sequence_stack != NULL)
4835 tem = free_sequence_stack;
4836 free_sequence_stack = tem->next;
4839 tem = (struct sequence_stack *) ggc_alloc (sizeof (struct sequence_stack));
4841 tem->next = seq_stack;
4842 tem->first = first_insn;
4843 tem->last = last_insn;
4844 tem->sequence_rtl_expr = seq_rtl_expr;
4852 /* Similarly, but indicate that this sequence will be placed in T, an
4853 RTL_EXPR. See the documentation for start_sequence for more
4854 information about how to use this function. */
4857 start_sequence_for_rtl_expr (t)
4865 /* Set up the insn chain starting with FIRST as the current sequence,
4866 saving the previously current one. See the documentation for
4867 start_sequence for more information about how to use this function. */
4870 push_to_sequence (first)
4877 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
4883 /* Set up the insn chain from a chain stort in FIRST to LAST. */
4886 push_to_full_sequence (first, last)
4892 /* We really should have the end of the insn chain here. */
4893 if (last && NEXT_INSN (last))
4897 /* Set up the outer-level insn chain
4898 as the current sequence, saving the previously current one. */
4901 push_topmost_sequence ()
4903 struct sequence_stack *stack, *top = NULL;
4907 for (stack = seq_stack; stack; stack = stack->next)
4910 first_insn = top->first;
4911 last_insn = top->last;
4912 seq_rtl_expr = top->sequence_rtl_expr;
4915 /* After emitting to the outer-level insn chain, update the outer-level
4916 insn chain, and restore the previous saved state. */
4919 pop_topmost_sequence ()
4921 struct sequence_stack *stack, *top = NULL;
4923 for (stack = seq_stack; stack; stack = stack->next)
4926 top->first = first_insn;
4927 top->last = last_insn;
4928 /* ??? Why don't we save seq_rtl_expr here? */
4933 /* After emitting to a sequence, restore previous saved state.
4935 To get the contents of the sequence just made, you must call
4936 `get_insns' *before* calling here.
4938 If the compiler might have deferred popping arguments while
4939 generating this sequence, and this sequence will not be immediately
4940 inserted into the instruction stream, use do_pending_stack_adjust
4941 before calling get_insns. That will ensure that the deferred
4942 pops are inserted into this sequence, and not into some random
4943 location in the instruction stream. See INHIBIT_DEFER_POP for more
4944 information about deferred popping of arguments. */
4949 struct sequence_stack *tem = seq_stack;
4951 first_insn = tem->first;
4952 last_insn = tem->last;
4953 seq_rtl_expr = tem->sequence_rtl_expr;
4954 seq_stack = tem->next;
4956 memset (tem, 0, sizeof (*tem));
4957 tem->next = free_sequence_stack;
4958 free_sequence_stack = tem;
4961 /* This works like end_sequence, but records the old sequence in FIRST
4965 end_full_sequence (first, last)
4968 *first = first_insn;
4973 /* Return 1 if currently emitting into a sequence. */
4978 return seq_stack != 0;
4981 /* Put the various virtual registers into REGNO_REG_RTX. */
4984 init_virtual_regs (es)
4985 struct emit_status *es;
4987 rtx *ptr = es->x_regno_reg_rtx;
4988 ptr[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
4989 ptr[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
4990 ptr[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
4991 ptr[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
4992 ptr[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
4996 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
4997 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
4998 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
4999 static int copy_insn_n_scratches;
5001 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5002 copied an ASM_OPERANDS.
5003 In that case, it is the original input-operand vector. */
5004 static rtvec orig_asm_operands_vector;
5006 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5007 copied an ASM_OPERANDS.
5008 In that case, it is the copied input-operand vector. */
5009 static rtvec copy_asm_operands_vector;
5011 /* Likewise for the constraints vector. */
5012 static rtvec orig_asm_constraints_vector;
5013 static rtvec copy_asm_constraints_vector;
5015 /* Recursively create a new copy of an rtx for copy_insn.
5016 This function differs from copy_rtx in that it handles SCRATCHes and
5017 ASM_OPERANDs properly.
5018 Normally, this function is not used directly; use copy_insn as front end.
5019 However, you could first copy an insn pattern with copy_insn and then use
5020 this function afterwards to properly copy any REG_NOTEs containing
5030 const char *format_ptr;
5032 code = GET_CODE (orig);
5049 for (i = 0; i < copy_insn_n_scratches; i++)
5050 if (copy_insn_scratch_in[i] == orig)
5051 return copy_insn_scratch_out[i];
5055 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
5056 a LABEL_REF, it isn't sharable. */
5057 if (GET_CODE (XEXP (orig, 0)) == PLUS
5058 && GET_CODE (XEXP (XEXP (orig, 0), 0)) == SYMBOL_REF
5059 && GET_CODE (XEXP (XEXP (orig, 0), 1)) == CONST_INT)
5063 /* A MEM with a constant address is not sharable. The problem is that
5064 the constant address may need to be reloaded. If the mem is shared,
5065 then reloading one copy of this mem will cause all copies to appear
5066 to have been reloaded. */
5072 copy = rtx_alloc (code);
5074 /* Copy the various flags, and other information. We assume that
5075 all fields need copying, and then clear the fields that should
5076 not be copied. That is the sensible default behavior, and forces
5077 us to explicitly document why we are *not* copying a flag. */
5078 memcpy (copy, orig, sizeof (struct rtx_def) - sizeof (rtunion));
5080 /* We do not copy the USED flag, which is used as a mark bit during
5081 walks over the RTL. */
5082 RTX_FLAG (copy, used) = 0;
5084 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5085 if (GET_RTX_CLASS (code) == 'i')
5087 RTX_FLAG (copy, jump) = 0;
5088 RTX_FLAG (copy, call) = 0;
5089 RTX_FLAG (copy, frame_related) = 0;
5092 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
5094 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
5096 copy->fld[i] = orig->fld[i];
5097 switch (*format_ptr++)
5100 if (XEXP (orig, i) != NULL)
5101 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
5106 if (XVEC (orig, i) == orig_asm_constraints_vector)
5107 XVEC (copy, i) = copy_asm_constraints_vector;
5108 else if (XVEC (orig, i) == orig_asm_operands_vector)
5109 XVEC (copy, i) = copy_asm_operands_vector;
5110 else if (XVEC (orig, i) != NULL)
5112 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
5113 for (j = 0; j < XVECLEN (copy, i); j++)
5114 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
5125 /* These are left unchanged. */
5133 if (code == SCRATCH)
5135 i = copy_insn_n_scratches++;
5136 if (i >= MAX_RECOG_OPERANDS)
5138 copy_insn_scratch_in[i] = orig;
5139 copy_insn_scratch_out[i] = copy;
5141 else if (code == ASM_OPERANDS)
5143 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
5144 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
5145 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
5146 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
5152 /* Create a new copy of an rtx.
5153 This function differs from copy_rtx in that it handles SCRATCHes and
5154 ASM_OPERANDs properly.
5155 INSN doesn't really have to be a full INSN; it could be just the
5161 copy_insn_n_scratches = 0;
5162 orig_asm_operands_vector = 0;
5163 orig_asm_constraints_vector = 0;
5164 copy_asm_operands_vector = 0;
5165 copy_asm_constraints_vector = 0;
5166 return copy_insn_1 (insn);
5169 /* Initialize data structures and variables in this file
5170 before generating rtl for each function. */
5175 struct function *f = cfun;
5177 f->emit = (struct emit_status *) ggc_alloc (sizeof (struct emit_status));
5180 seq_rtl_expr = NULL;
5182 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
5185 first_label_num = label_num;
5189 /* Init the tables that describe all the pseudo regs. */
5191 f->emit->regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
5193 f->emit->regno_pointer_align
5194 = (unsigned char *) ggc_alloc_cleared (f->emit->regno_pointer_align_length
5195 * sizeof (unsigned char));
5198 = (rtx *) ggc_alloc_cleared (f->emit->regno_pointer_align_length
5202 = (tree *) ggc_alloc_cleared (f->emit->regno_pointer_align_length
5205 /* Put copies of all the hard registers into regno_reg_rtx. */
5206 memcpy (regno_reg_rtx,
5207 static_regno_reg_rtx,
5208 FIRST_PSEUDO_REGISTER * sizeof (rtx));
5210 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5211 init_virtual_regs (f->emit);
5213 /* Indicate that the virtual registers and stack locations are
5215 REG_POINTER (stack_pointer_rtx) = 1;
5216 REG_POINTER (frame_pointer_rtx) = 1;
5217 REG_POINTER (hard_frame_pointer_rtx) = 1;
5218 REG_POINTER (arg_pointer_rtx) = 1;
5220 REG_POINTER (virtual_incoming_args_rtx) = 1;
5221 REG_POINTER (virtual_stack_vars_rtx) = 1;
5222 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
5223 REG_POINTER (virtual_outgoing_args_rtx) = 1;
5224 REG_POINTER (virtual_cfa_rtx) = 1;
5226 #ifdef STACK_BOUNDARY
5227 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
5228 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5229 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5230 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
5232 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
5233 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
5234 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
5235 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
5236 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
5239 #ifdef INIT_EXPANDERS
5244 /* Generate the constant 0. */
5247 gen_const_vector_0 (mode)
5248 enum machine_mode mode;
5253 enum machine_mode inner;
5255 units = GET_MODE_NUNITS (mode);
5256 inner = GET_MODE_INNER (mode);
5258 v = rtvec_alloc (units);
5260 /* We need to call this function after we to set CONST0_RTX first. */
5261 if (!CONST0_RTX (inner))
5264 for (i = 0; i < units; ++i)
5265 RTVEC_ELT (v, i) = CONST0_RTX (inner);
5267 tem = gen_rtx_raw_CONST_VECTOR (mode, v);
5271 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5272 all elements are zero. */
5274 gen_rtx_CONST_VECTOR (mode, v)
5275 enum machine_mode mode;
5278 rtx inner_zero = CONST0_RTX (GET_MODE_INNER (mode));
5281 for (i = GET_MODE_NUNITS (mode) - 1; i >= 0; i--)
5282 if (RTVEC_ELT (v, i) != inner_zero)
5283 return gen_rtx_raw_CONST_VECTOR (mode, v);
5284 return CONST0_RTX (mode);
5287 /* Create some permanent unique rtl objects shared between all functions.
5288 LINE_NUMBERS is nonzero if line numbers are to be generated. */
5291 init_emit_once (line_numbers)
5295 enum machine_mode mode;
5296 enum machine_mode double_mode;
5298 /* Initialize the CONST_INT, CONST_DOUBLE, and memory attribute hash
5300 const_int_htab = htab_create (37, const_int_htab_hash,
5301 const_int_htab_eq, NULL);
5303 const_double_htab = htab_create (37, const_double_htab_hash,
5304 const_double_htab_eq, NULL);
5306 mem_attrs_htab = htab_create (37, mem_attrs_htab_hash,
5307 mem_attrs_htab_eq, NULL);
5309 no_line_numbers = ! line_numbers;
5311 /* Compute the word and byte modes. */
5313 byte_mode = VOIDmode;
5314 word_mode = VOIDmode;
5315 double_mode = VOIDmode;
5317 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
5318 mode = GET_MODE_WIDER_MODE (mode))
5320 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
5321 && byte_mode == VOIDmode)
5324 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
5325 && word_mode == VOIDmode)
5329 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
5330 mode = GET_MODE_WIDER_MODE (mode))
5332 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
5333 && double_mode == VOIDmode)
5337 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
5339 /* Assign register numbers to the globally defined register rtx.
5340 This must be done at runtime because the register number field
5341 is in a union and some compilers can't initialize unions. */
5343 pc_rtx = gen_rtx (PC, VOIDmode);
5344 cc0_rtx = gen_rtx (CC0, VOIDmode);
5345 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
5346 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
5347 if (hard_frame_pointer_rtx == 0)
5348 hard_frame_pointer_rtx = gen_raw_REG (Pmode,
5349 HARD_FRAME_POINTER_REGNUM);
5350 if (arg_pointer_rtx == 0)
5351 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
5352 virtual_incoming_args_rtx =
5353 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
5354 virtual_stack_vars_rtx =
5355 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
5356 virtual_stack_dynamic_rtx =
5357 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
5358 virtual_outgoing_args_rtx =
5359 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
5360 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
5362 /* Initialize RTL for commonly used hard registers. These are
5363 copied into regno_reg_rtx as we begin to compile each function. */
5364 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
5365 static_regno_reg_rtx[i] = gen_raw_REG (reg_raw_mode[i], i);
5367 #ifdef INIT_EXPANDERS
5368 /* This is to initialize {init|mark|free}_machine_status before the first
5369 call to push_function_context_to. This is needed by the Chill front
5370 end which calls push_function_context_to before the first call to
5371 init_function_start. */
5375 /* Create the unique rtx's for certain rtx codes and operand values. */
5377 /* Don't use gen_rtx here since gen_rtx in this case
5378 tries to use these variables. */
5379 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
5380 const_int_rtx[i + MAX_SAVED_CONST_INT] =
5381 gen_rtx_raw_CONST_INT (VOIDmode, (HOST_WIDE_INT) i);
5383 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
5384 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
5385 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
5387 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
5389 REAL_VALUE_FROM_INT (dconst0, 0, 0, double_mode);
5390 REAL_VALUE_FROM_INT (dconst1, 1, 0, double_mode);
5391 REAL_VALUE_FROM_INT (dconst2, 2, 0, double_mode);
5392 REAL_VALUE_FROM_INT (dconstm1, -1, -1, double_mode);
5394 for (i = 0; i <= 2; i++)
5396 REAL_VALUE_TYPE *r =
5397 (i == 0 ? &dconst0 : i == 1 ? &dconst1 : &dconst2);
5399 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
5400 mode = GET_MODE_WIDER_MODE (mode))
5401 const_tiny_rtx[i][(int) mode] =
5402 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5404 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
5406 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
5407 mode = GET_MODE_WIDER_MODE (mode))
5408 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5410 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
5412 mode = GET_MODE_WIDER_MODE (mode))
5413 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5416 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
5418 mode = GET_MODE_WIDER_MODE (mode))
5419 const_tiny_rtx[0][(int) mode] = gen_const_vector_0 (mode);
5421 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
5423 mode = GET_MODE_WIDER_MODE (mode))
5424 const_tiny_rtx[0][(int) mode] = gen_const_vector_0 (mode);
5426 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
5427 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
5428 const_tiny_rtx[0][i] = const0_rtx;
5430 const_tiny_rtx[0][(int) BImode] = const0_rtx;
5431 if (STORE_FLAG_VALUE == 1)
5432 const_tiny_rtx[1][(int) BImode] = const1_rtx;
5434 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5435 return_address_pointer_rtx
5436 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
5440 struct_value_rtx = STRUCT_VALUE;
5442 struct_value_rtx = gen_rtx_REG (Pmode, STRUCT_VALUE_REGNUM);
5445 #ifdef STRUCT_VALUE_INCOMING
5446 struct_value_incoming_rtx = STRUCT_VALUE_INCOMING;
5448 #ifdef STRUCT_VALUE_INCOMING_REGNUM
5449 struct_value_incoming_rtx
5450 = gen_rtx_REG (Pmode, STRUCT_VALUE_INCOMING_REGNUM);
5452 struct_value_incoming_rtx = struct_value_rtx;
5456 #ifdef STATIC_CHAIN_REGNUM
5457 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
5459 #ifdef STATIC_CHAIN_INCOMING_REGNUM
5460 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
5461 static_chain_incoming_rtx
5462 = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
5465 static_chain_incoming_rtx = static_chain_rtx;
5469 static_chain_rtx = STATIC_CHAIN;
5471 #ifdef STATIC_CHAIN_INCOMING
5472 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
5474 static_chain_incoming_rtx = static_chain_rtx;
5478 if (PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
5479 pic_offset_table_rtx = gen_raw_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
5482 /* Query and clear/ restore no_line_numbers. This is used by the
5483 switch / case handling in stmt.c to give proper line numbers in
5484 warnings about unreachable code. */
5487 force_line_numbers ()
5489 int old = no_line_numbers;
5491 no_line_numbers = 0;
5493 force_next_line_note ();
5498 restore_line_number_status (old_value)
5501 no_line_numbers = old_value;
5504 /* Produce exact duplicate of insn INSN after AFTER.
5505 Care updating of libcall regions if present. */
5508 emit_copy_of_insn_after (insn, after)
5512 rtx note1, note2, link;
5514 switch (GET_CODE (insn))
5517 new = emit_insn_after (copy_insn (PATTERN (insn)), after);
5521 new = emit_jump_insn_after (copy_insn (PATTERN (insn)), after);
5525 new = emit_call_insn_after (copy_insn (PATTERN (insn)), after);
5526 if (CALL_INSN_FUNCTION_USAGE (insn))
5527 CALL_INSN_FUNCTION_USAGE (new)
5528 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn));
5529 SIBLING_CALL_P (new) = SIBLING_CALL_P (insn);
5530 CONST_OR_PURE_CALL_P (new) = CONST_OR_PURE_CALL_P (insn);
5537 /* Update LABEL_NUSES. */
5538 mark_jump_label (PATTERN (new), new, 0);
5540 INSN_SCOPE (new) = INSN_SCOPE (insn);
5542 /* Copy all REG_NOTES except REG_LABEL since mark_jump_label will
5544 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5545 if (REG_NOTE_KIND (link) != REG_LABEL)
5547 if (GET_CODE (link) == EXPR_LIST)
5549 = copy_insn_1 (gen_rtx_EXPR_LIST (REG_NOTE_KIND (link),
5554 = copy_insn_1 (gen_rtx_INSN_LIST (REG_NOTE_KIND (link),
5559 /* Fix the libcall sequences. */
5560 if ((note1 = find_reg_note (new, REG_RETVAL, NULL_RTX)) != NULL)
5563 while ((note2 = find_reg_note (p, REG_LIBCALL, NULL_RTX)) == NULL)
5565 XEXP (note1, 0) = p;
5566 XEXP (note2, 0) = new;
5571 #include "gt-emit-rtl.h"