1 /* Convert RTL to assembler code and output it, for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
24 /* This is the final pass of the compiler.
25 It looks at the rtl code for a function and outputs assembler code.
27 Call `final_start_function' to output the assembler code for function entry,
28 `final' to output assembler code for some RTL code,
29 `final_end_function' to output assembler code for function exit.
30 If a function is compiled in several pieces, each piece is
31 output separately with `final'.
33 Some optimizations are also done at this level.
34 Move instructions that were made unnecessary by good register allocation
35 are detected and omitted from the output. (Though most of these
36 are removed by the last jump pass.)
38 Instructions to set the condition codes are omitted when it can be
39 seen that the condition codes already had the desired values.
41 In some cases it is sufficient if the inherited condition codes
42 have related values, but this may require the following insn
43 (the one that tests the condition codes) to be modified.
45 The code for the function prologue and epilogue are generated
46 directly in assembler by the target functions function_prologue and
47 function_epilogue. Those instructions never exist as rtl. */
56 #include "insn-config.h"
57 #include "insn-attr.h"
59 #include "conditions.h"
62 #include "hard-reg-set.h"
69 #include "basic-block.h"
74 #ifdef XCOFF_DEBUGGING_INFO
75 #include "xcoffout.h" /* Needed for external data
76 declarations for e.g. AIX 4.x. */
79 #if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO)
80 #include "dwarf2out.h"
83 /* If we aren't using cc0, CC_STATUS_INIT shouldn't exist. So define a
84 null default for it to save conditionalization later. */
85 #ifndef CC_STATUS_INIT
86 #define CC_STATUS_INIT
89 /* How to start an assembler comment. */
90 #ifndef ASM_COMMENT_START
91 #define ASM_COMMENT_START ";#"
94 /* Is the given character a logical line separator for the assembler? */
95 #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR
96 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == ';')
99 #ifndef JUMP_TABLES_IN_TEXT_SECTION
100 #define JUMP_TABLES_IN_TEXT_SECTION 0
103 /* Last insn processed by final_scan_insn. */
104 static rtx debug_insn;
105 rtx current_output_insn;
107 /* Line number of last NOTE. */
108 static int last_linenum;
110 /* Highest line number in current block. */
111 static int high_block_linenum;
113 /* Likewise for function. */
114 static int high_function_linenum;
116 /* Filename of last NOTE. */
117 static const char *last_filename;
119 /* Number of instrumented arcs when profile_arc_flag is set. */
120 extern int count_instrumented_edges;
122 extern int length_unit_log; /* This is defined in insn-attrtab.c. */
124 /* Nonzero while outputting an `asm' with operands.
125 This means that inconsistencies are the user's fault, so don't abort.
126 The precise value is the insn being output, to pass to error_for_asm. */
127 static rtx this_is_asm_operands;
129 /* Number of operands of this insn, for an `asm' with operands. */
130 static unsigned int insn_noperands;
132 /* Compare optimization flag. */
134 static rtx last_ignored_compare = 0;
136 /* Flag indicating this insn is the start of a new basic block. */
138 static int new_block = 1;
140 /* Assign a unique number to each insn that is output.
141 This can be used to generate unique local labels. */
143 static int insn_counter = 0;
146 /* This variable contains machine-dependent flags (defined in tm.h)
147 set and examined by output routines
148 that describe how to interpret the condition codes properly. */
152 /* During output of an insn, this contains a copy of cc_status
153 from before the insn. */
155 CC_STATUS cc_prev_status;
158 /* Indexed by hardware reg number, is 1 if that register is ever
159 used in the current function.
161 In life_analysis, or in stupid_life_analysis, this is set
162 up to record the hard regs used explicitly. Reload adds
163 in the hard regs used for holding pseudo regs. Final uses
164 it to generate the code in the function prologue and epilogue
165 to save and restore registers as needed. */
167 char regs_ever_live[FIRST_PSEUDO_REGISTER];
169 /* Nonzero means current function must be given a frame pointer.
170 Set in stmt.c if anything is allocated on the stack there.
171 Set in reload1.c if anything is allocated on the stack there. */
173 int frame_pointer_needed;
175 /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */
177 static int block_depth;
179 /* Nonzero if have enabled APP processing of our assembler output. */
183 /* If we are outputting an insn sequence, this contains the sequence rtx.
188 #ifdef ASSEMBLER_DIALECT
190 /* Number of the assembler dialect to use, starting at 0. */
191 static int dialect_number;
194 /* Indexed by line number, nonzero if there is a note for that line. */
196 static char *line_note_exists;
198 #ifdef HAVE_conditional_execution
199 /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */
200 rtx current_insn_predicate;
203 #ifdef HAVE_ATTR_length
204 static int asm_insn_count PARAMS ((rtx));
206 static void profile_function PARAMS ((FILE *));
207 static void profile_after_prologue PARAMS ((FILE *));
208 static void notice_source_line PARAMS ((rtx));
209 static rtx walk_alter_subreg PARAMS ((rtx *));
210 static void output_asm_name PARAMS ((void));
211 static tree get_mem_expr_from_op PARAMS ((rtx, int *));
212 static void output_asm_operand_names PARAMS ((rtx *, int *, int));
213 static void output_operand PARAMS ((rtx, int));
214 #ifdef LEAF_REGISTERS
215 static void leaf_renumber_regs PARAMS ((rtx));
218 static int alter_cond PARAMS ((rtx));
220 #ifndef ADDR_VEC_ALIGN
221 static int final_addr_vec_align PARAMS ((rtx));
223 #ifdef HAVE_ATTR_length
224 static int align_fuzz PARAMS ((rtx, rtx, int, unsigned));
227 /* Initialize data in final at the beginning of a compilation. */
230 init_final (filename)
231 const char *filename ATTRIBUTE_UNUSED;
236 #ifdef ASSEMBLER_DIALECT
237 dialect_number = ASSEMBLER_DIALECT;
241 /* Called at end of source file,
242 to output the block-profiling table for this entire compilation. */
246 const char *filename;
248 if (profile_arc_flag)
251 int align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT);
253 int long_bytes = LONG_TYPE_SIZE / BITS_PER_UNIT;
254 int gcov_type_bytes = GCOV_TYPE_SIZE / BITS_PER_UNIT;
255 int pointer_bytes = POINTER_SIZE / BITS_PER_UNIT;
256 unsigned int align2 = LONG_TYPE_SIZE;
258 size = gcov_type_bytes * count_instrumented_edges;
261 rounded += (BIGGEST_ALIGNMENT / BITS_PER_UNIT) - 1;
262 rounded = (rounded / (BIGGEST_ALIGNMENT / BITS_PER_UNIT)
263 * (BIGGEST_ALIGNMENT / BITS_PER_UNIT));
265 /* ??? This _really_ ought to be done with a structure layout
266 and with assemble_constructor. If long_bytes != pointer_bytes
267 we'll be emitting unaligned data at some point. */
268 if (long_bytes != pointer_bytes)
273 /* Output the main header, of 11 words:
274 0: 1 if this file is initialized, else 0.
275 1: address of file name (LPBX1).
276 2: address of table of counts (LPBX2).
277 3: number of counts in the table.
278 4: always 0, for compatibility with Sun.
280 The following are GNU extensions:
282 5: address of table of start addrs of basic blocks (LPBX3).
283 6: Number of bytes in this header.
284 7: address of table of function names (LPBX4).
285 8: address of table of line numbers (LPBX5) or 0.
286 9: address of table of file names (LPBX6) or 0.
287 10: space reserved for basic block profiling. */
289 ASM_OUTPUT_ALIGN (asm_out_file, align);
291 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 0);
294 assemble_integer (const0_rtx, long_bytes, align2, 1);
296 /* Address of filename. */
297 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 1);
298 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name), pointer_bytes,
301 /* Address of count table. */
302 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 2);
303 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name), pointer_bytes,
306 /* Count of the # of instrumented arcs. */
307 assemble_integer (GEN_INT (count_instrumented_edges),
308 long_bytes, align2, 1);
310 /* Zero word (link field). */
311 assemble_integer (const0_rtx, pointer_bytes, align2, 1);
313 assemble_integer (const0_rtx, pointer_bytes, align2, 1);
315 /* Byte count for extended structure. */
316 assemble_integer (GEN_INT (11 * UNITS_PER_WORD), long_bytes, align2, 1);
318 /* Address of function name table. */
319 assemble_integer (const0_rtx, pointer_bytes, align2, 1);
321 /* Address of line number and filename tables if debugging. */
322 assemble_integer (const0_rtx, pointer_bytes, align2, 1);
323 assemble_integer (const0_rtx, pointer_bytes, align2, 1);
325 /* Space for extension ptr (link field). */
326 assemble_integer (const0_rtx, UNITS_PER_WORD, align2, 1);
328 /* Output the file name changing the suffix to .d for
329 Sun tcov compatibility. */
330 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 1);
332 char *cwd = getpwd ();
333 int len = strlen (filename) + strlen (cwd) + 1;
334 char *data_file = (char *) alloca (len + 4);
336 strcpy (data_file, cwd);
337 strcat (data_file, "/");
338 strcat (data_file, filename);
339 strip_off_ending (data_file, len);
340 strcat (data_file, ".da");
341 assemble_string (data_file, strlen (data_file) + 1);
344 /* Make space for the table of counts. */
347 /* Realign data section. */
348 ASM_OUTPUT_ALIGN (asm_out_file, align);
349 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 2);
351 assemble_zeros (size);
355 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 2);
356 #ifdef ASM_OUTPUT_SHARED_LOCAL
357 if (flag_shared_data)
358 ASM_OUTPUT_SHARED_LOCAL (asm_out_file, name, size, rounded);
361 #ifdef ASM_OUTPUT_ALIGNED_DECL_LOCAL
362 ASM_OUTPUT_ALIGNED_DECL_LOCAL (asm_out_file, NULL_TREE, name,
363 size, BIGGEST_ALIGNMENT);
365 #ifdef ASM_OUTPUT_ALIGNED_LOCAL
366 ASM_OUTPUT_ALIGNED_LOCAL (asm_out_file, name, size,
369 ASM_OUTPUT_LOCAL (asm_out_file, name, size, rounded);
376 /* Default target function prologue and epilogue assembler output.
378 If not overridden for epilogue code, then the function body itself
379 contains return instructions wherever needed. */
381 default_function_pro_epilogue (file, size)
382 FILE *file ATTRIBUTE_UNUSED;
383 HOST_WIDE_INT size ATTRIBUTE_UNUSED;
387 /* Default target hook that outputs nothing to a stream. */
389 no_asm_to_stream (file)
390 FILE *file ATTRIBUTE_UNUSED;
394 /* Enable APP processing of subsequent output.
395 Used before the output from an `asm' statement. */
402 fputs (ASM_APP_ON, asm_out_file);
407 /* Disable APP processing of subsequent output.
408 Called from varasm.c before most kinds of output. */
415 fputs (ASM_APP_OFF, asm_out_file);
420 /* Return the number of slots filled in the current
421 delayed branch sequence (we don't count the insn needing the
422 delay slot). Zero if not in a delayed branch sequence. */
426 dbr_sequence_length ()
428 if (final_sequence != 0)
429 return XVECLEN (final_sequence, 0) - 1;
435 /* The next two pages contain routines used to compute the length of an insn
436 and to shorten branches. */
438 /* Arrays for insn lengths, and addresses. The latter is referenced by
439 `insn_current_length'. */
441 static int *insn_lengths;
443 #ifdef HAVE_ATTR_length
444 varray_type insn_addresses_;
447 /* Max uid for which the above arrays are valid. */
448 static int insn_lengths_max_uid;
450 /* Address of insn being processed. Used by `insn_current_length'. */
451 int insn_current_address;
453 /* Address of insn being processed in previous iteration. */
454 int insn_last_address;
456 /* known invariant alignment of insn being processed. */
457 int insn_current_align;
459 /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)]
460 gives the next following alignment insn that increases the known
461 alignment, or NULL_RTX if there is no such insn.
462 For any alignment obtained this way, we can again index uid_align with
463 its uid to obtain the next following align that in turn increases the
464 alignment, till we reach NULL_RTX; the sequence obtained this way
465 for each insn we'll call the alignment chain of this insn in the following
468 struct label_alignment
474 static rtx *uid_align;
475 static int *uid_shuid;
476 static struct label_alignment *label_align;
478 /* Indicate that branch shortening hasn't yet been done. */
492 insn_lengths_max_uid = 0;
494 #ifdef HAVE_ATTR_length
495 INSN_ADDRESSES_FREE ();
504 /* Obtain the current length of an insn. If branch shortening has been done,
505 get its actual length. Otherwise, get its maximum length. */
508 get_attr_length (insn)
509 rtx insn ATTRIBUTE_UNUSED;
511 #ifdef HAVE_ATTR_length
516 if (insn_lengths_max_uid > INSN_UID (insn))
517 return insn_lengths[INSN_UID (insn)];
519 switch (GET_CODE (insn))
527 length = insn_default_length (insn);
531 body = PATTERN (insn);
532 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
534 /* Alignment is machine-dependent and should be handled by
538 length = insn_default_length (insn);
542 body = PATTERN (insn);
543 if (GET_CODE (body) == USE || GET_CODE (body) == CLOBBER)
546 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
547 length = asm_insn_count (body) * insn_default_length (insn);
548 else if (GET_CODE (body) == SEQUENCE)
549 for (i = 0; i < XVECLEN (body, 0); i++)
550 length += get_attr_length (XVECEXP (body, 0, i));
552 length = insn_default_length (insn);
559 #ifdef ADJUST_INSN_LENGTH
560 ADJUST_INSN_LENGTH (insn, length);
563 #else /* not HAVE_ATTR_length */
565 #endif /* not HAVE_ATTR_length */
568 /* Code to handle alignment inside shorten_branches. */
570 /* Here is an explanation how the algorithm in align_fuzz can give
573 Call a sequence of instructions beginning with alignment point X
574 and continuing until the next alignment point `block X'. When `X'
575 is used in an expression, it means the alignment value of the
578 Call the distance between the start of the first insn of block X, and
579 the end of the last insn of block X `IX', for the `inner size of X'.
580 This is clearly the sum of the instruction lengths.
582 Likewise with the next alignment-delimited block following X, which we
585 Call the distance between the start of the first insn of block X, and
586 the start of the first insn of block Y `OX', for the `outer size of X'.
588 The estimated padding is then OX - IX.
590 OX can be safely estimated as
595 OX = round_up(IX, X) + Y - X
597 Clearly est(IX) >= real(IX), because that only depends on the
598 instruction lengths, and those being overestimated is a given.
600 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so
601 we needn't worry about that when thinking about OX.
603 When X >= Y, the alignment provided by Y adds no uncertainty factor
604 for branch ranges starting before X, so we can just round what we have.
605 But when X < Y, we don't know anything about the, so to speak,
606 `middle bits', so we have to assume the worst when aligning up from an
607 address mod X to one mod Y, which is Y - X. */
610 #define LABEL_ALIGN(LABEL) align_labels_log
613 #ifndef LABEL_ALIGN_MAX_SKIP
614 #define LABEL_ALIGN_MAX_SKIP align_labels_max_skip
618 #define LOOP_ALIGN(LABEL) align_loops_log
621 #ifndef LOOP_ALIGN_MAX_SKIP
622 #define LOOP_ALIGN_MAX_SKIP align_loops_max_skip
625 #ifndef LABEL_ALIGN_AFTER_BARRIER
626 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0
629 #ifndef LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
630 #define LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP 0
634 #define JUMP_ALIGN(LABEL) align_jumps_log
637 #ifndef JUMP_ALIGN_MAX_SKIP
638 #define JUMP_ALIGN_MAX_SKIP align_jumps_max_skip
641 #ifndef ADDR_VEC_ALIGN
643 final_addr_vec_align (addr_vec)
646 int align = GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec)));
648 if (align > BIGGEST_ALIGNMENT / BITS_PER_UNIT)
649 align = BIGGEST_ALIGNMENT / BITS_PER_UNIT;
650 return exact_log2 (align);
654 #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC)
657 #ifndef INSN_LENGTH_ALIGNMENT
658 #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log
661 #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)])
663 static int min_labelno, max_labelno;
665 #define LABEL_TO_ALIGNMENT(LABEL) \
666 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment)
668 #define LABEL_TO_MAX_SKIP(LABEL) \
669 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip)
671 /* For the benefit of port specific code do this also as a function. */
674 label_to_alignment (label)
677 return LABEL_TO_ALIGNMENT (label);
680 #ifdef HAVE_ATTR_length
681 /* The differences in addresses
682 between a branch and its target might grow or shrink depending on
683 the alignment the start insn of the range (the branch for a forward
684 branch or the label for a backward branch) starts out on; if these
685 differences are used naively, they can even oscillate infinitely.
686 We therefore want to compute a 'worst case' address difference that
687 is independent of the alignment the start insn of the range end
688 up on, and that is at least as large as the actual difference.
689 The function align_fuzz calculates the amount we have to add to the
690 naively computed difference, by traversing the part of the alignment
691 chain of the start insn of the range that is in front of the end insn
692 of the range, and considering for each alignment the maximum amount
693 that it might contribute to a size increase.
695 For casesi tables, we also want to know worst case minimum amounts of
696 address difference, in case a machine description wants to introduce
697 some common offset that is added to all offsets in a table.
698 For this purpose, align_fuzz with a growth argument of 0 computes the
699 appropriate adjustment. */
701 /* Compute the maximum delta by which the difference of the addresses of
702 START and END might grow / shrink due to a different address for start
703 which changes the size of alignment insns between START and END.
704 KNOWN_ALIGN_LOG is the alignment known for START.
705 GROWTH should be ~0 if the objective is to compute potential code size
706 increase, and 0 if the objective is to compute potential shrink.
707 The return value is undefined for any other value of GROWTH. */
710 align_fuzz (start, end, known_align_log, growth)
715 int uid = INSN_UID (start);
717 int known_align = 1 << known_align_log;
718 int end_shuid = INSN_SHUID (end);
721 for (align_label = uid_align[uid]; align_label; align_label = uid_align[uid])
723 int align_addr, new_align;
725 uid = INSN_UID (align_label);
726 align_addr = INSN_ADDRESSES (uid) - insn_lengths[uid];
727 if (uid_shuid[uid] > end_shuid)
729 known_align_log = LABEL_TO_ALIGNMENT (align_label);
730 new_align = 1 << known_align_log;
731 if (new_align < known_align)
733 fuzz += (-align_addr ^ growth) & (new_align - known_align);
734 known_align = new_align;
739 /* Compute a worst-case reference address of a branch so that it
740 can be safely used in the presence of aligned labels. Since the
741 size of the branch itself is unknown, the size of the branch is
742 not included in the range. I.e. for a forward branch, the reference
743 address is the end address of the branch as known from the previous
744 branch shortening pass, minus a value to account for possible size
745 increase due to alignment. For a backward branch, it is the start
746 address of the branch as known from the current pass, plus a value
747 to account for possible size increase due to alignment.
748 NB.: Therefore, the maximum offset allowed for backward branches needs
749 to exclude the branch size. */
752 insn_current_reference_address (branch)
758 if (! INSN_ADDRESSES_SET_P ())
761 seq = NEXT_INSN (PREV_INSN (branch));
762 seq_uid = INSN_UID (seq);
763 if (GET_CODE (branch) != JUMP_INSN)
764 /* This can happen for example on the PA; the objective is to know the
765 offset to address something in front of the start of the function.
766 Thus, we can treat it like a backward branch.
767 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than
768 any alignment we'd encounter, so we skip the call to align_fuzz. */
769 return insn_current_address;
770 dest = JUMP_LABEL (branch);
772 /* BRANCH has no proper alignment chain set, so use SEQ.
773 BRANCH also has no INSN_SHUID. */
774 if (INSN_SHUID (seq) < INSN_SHUID (dest))
776 /* Forward branch. */
777 return (insn_last_address + insn_lengths[seq_uid]
778 - align_fuzz (seq, dest, length_unit_log, ~0));
782 /* Backward branch. */
783 return (insn_current_address
784 + align_fuzz (dest, seq, length_unit_log, ~0));
787 #endif /* HAVE_ATTR_length */
790 compute_alignments ()
793 int log, max_skip, max_log;
801 max_labelno = max_label_num ();
802 min_labelno = get_first_label_num ();
803 label_align = (struct label_alignment *)
804 xcalloc (max_labelno - min_labelno + 1, sizeof (struct label_alignment));
806 /* If not optimizing or optimizing for size, don't assign any alignments. */
807 if (! optimize || optimize_size)
810 for (i = 0; i < n_basic_blocks; i++)
812 basic_block bb = BASIC_BLOCK (i);
813 rtx label = bb->head;
814 int fallthru_frequency = 0, branch_frequency = 0, has_fallthru = 0;
817 if (GET_CODE (label) != CODE_LABEL)
819 max_log = LABEL_ALIGN (label);
820 max_skip = LABEL_ALIGN_MAX_SKIP;
822 for (e = bb->pred; e; e = e->pred_next)
824 if (e->flags & EDGE_FALLTHRU)
825 has_fallthru = 1, fallthru_frequency += EDGE_FREQUENCY (e);
827 branch_frequency += EDGE_FREQUENCY (e);
830 /* There are two purposes to align block with no fallthru incoming edge:
831 1) to avoid fetch stalls when branch destination is near cache boundary
832 2) to improve cache efficiency in case the previous block is not executed
833 (so it does not need to be in the cache).
835 We to catch first case, we align frequently executed blocks.
836 To catch the second, we align blocks that are executed more frequently
837 than the predecessor and the predecessor is likely to not be executed
838 when function is called. */
841 && (branch_frequency > BB_FREQ_MAX / 10
842 || (bb->frequency > BASIC_BLOCK (i - 1)->frequency * 10
843 && (BASIC_BLOCK (i - 1)->frequency
844 <= ENTRY_BLOCK_PTR->frequency / 2))))
846 log = JUMP_ALIGN (label);
850 max_skip = JUMP_ALIGN_MAX_SKIP;
853 /* In case block is frequent and reached mostly by non-fallthru edge,
854 align it. It is most likely an first block of loop. */
856 && branch_frequency + fallthru_frequency > BB_FREQ_MAX / 10
857 && branch_frequency > fallthru_frequency * 5)
859 log = LOOP_ALIGN (label);
863 max_skip = LOOP_ALIGN_MAX_SKIP;
866 LABEL_TO_ALIGNMENT (label) = max_log;
867 LABEL_TO_MAX_SKIP (label) = max_skip;
871 /* Make a pass over all insns and compute their actual lengths by shortening
872 any branches of variable length if possible. */
874 /* Give a default value for the lowest address in a function. */
876 #ifndef FIRST_INSN_ADDRESS
877 #define FIRST_INSN_ADDRESS 0
880 /* shorten_branches might be called multiple times: for example, the SH
881 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
882 In order to do this, it needs proper length information, which it obtains
883 by calling shorten_branches. This cannot be collapsed with
884 shorten_branches itself into a single pass unless we also want to integrate
885 reorg.c, since the branch splitting exposes new instructions with delay
889 shorten_branches (first)
890 rtx first ATTRIBUTE_UNUSED;
897 #ifdef HAVE_ATTR_length
898 #define MAX_CODE_ALIGN 16
900 int something_changed = 1;
901 char *varying_length;
904 rtx align_tab[MAX_CODE_ALIGN];
908 /* Compute maximum UID and allocate label_align / uid_shuid. */
909 max_uid = get_max_uid ();
911 uid_shuid = (int *) xmalloc (max_uid * sizeof *uid_shuid);
913 if (max_labelno != max_label_num ())
915 int old = max_labelno;
919 max_labelno = max_label_num ();
921 n_labels = max_labelno - min_labelno + 1;
922 n_old_labels = old - min_labelno + 1;
924 label_align = (struct label_alignment *) xrealloc
925 (label_align, n_labels * sizeof (struct label_alignment));
927 /* Range of labels grows monotonically in the function. Abort here
928 means that the initialization of array got lost. */
929 if (n_old_labels > n_labels)
932 memset (label_align + n_old_labels, 0,
933 (n_labels - n_old_labels) * sizeof (struct label_alignment));
936 /* Initialize label_align and set up uid_shuid to be strictly
937 monotonically rising with insn order. */
938 /* We use max_log here to keep track of the maximum alignment we want to
939 impose on the next CODE_LABEL (or the current one if we are processing
940 the CODE_LABEL itself). */
945 for (insn = get_insns (), i = 1; insn; insn = NEXT_INSN (insn))
949 INSN_SHUID (insn) = i++;
952 /* reorg might make the first insn of a loop being run once only,
953 and delete the label in front of it. Then we want to apply
954 the loop alignment to the new label created by reorg, which
955 is separated by the former loop start insn from the
956 NOTE_INSN_LOOP_BEG. */
958 else if (GET_CODE (insn) == CODE_LABEL)
962 /* Merge in alignments computed by compute_alignments. */
963 log = LABEL_TO_ALIGNMENT (insn);
967 max_skip = LABEL_TO_MAX_SKIP (insn);
970 log = LABEL_ALIGN (insn);
974 max_skip = LABEL_ALIGN_MAX_SKIP;
976 next = NEXT_INSN (insn);
977 /* ADDR_VECs only take room if read-only data goes into the text
979 if (JUMP_TABLES_IN_TEXT_SECTION
980 #if !defined(READONLY_DATA_SECTION)
984 if (next && GET_CODE (next) == JUMP_INSN)
986 rtx nextbody = PATTERN (next);
987 if (GET_CODE (nextbody) == ADDR_VEC
988 || GET_CODE (nextbody) == ADDR_DIFF_VEC)
990 log = ADDR_VEC_ALIGN (next);
994 max_skip = LABEL_ALIGN_MAX_SKIP;
998 LABEL_TO_ALIGNMENT (insn) = max_log;
999 LABEL_TO_MAX_SKIP (insn) = max_skip;
1003 else if (GET_CODE (insn) == BARRIER)
1007 for (label = insn; label && ! INSN_P (label);
1008 label = NEXT_INSN (label))
1009 if (GET_CODE (label) == CODE_LABEL)
1011 log = LABEL_ALIGN_AFTER_BARRIER (insn);
1015 max_skip = LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP;
1021 #ifdef HAVE_ATTR_length
1023 /* Allocate the rest of the arrays. */
1024 insn_lengths = (int *) xmalloc (max_uid * sizeof (*insn_lengths));
1025 insn_lengths_max_uid = max_uid;
1026 /* Syntax errors can lead to labels being outside of the main insn stream.
1027 Initialize insn_addresses, so that we get reproducible results. */
1028 INSN_ADDRESSES_ALLOC (max_uid);
1030 varying_length = (char *) xcalloc (max_uid, sizeof (char));
1032 /* Initialize uid_align. We scan instructions
1033 from end to start, and keep in align_tab[n] the last seen insn
1034 that does an alignment of at least n+1, i.e. the successor
1035 in the alignment chain for an insn that does / has a known
1037 uid_align = (rtx *) xcalloc (max_uid, sizeof *uid_align);
1039 for (i = MAX_CODE_ALIGN; --i >= 0;)
1040 align_tab[i] = NULL_RTX;
1041 seq = get_last_insn ();
1042 for (; seq; seq = PREV_INSN (seq))
1044 int uid = INSN_UID (seq);
1046 log = (GET_CODE (seq) == CODE_LABEL ? LABEL_TO_ALIGNMENT (seq) : 0);
1047 uid_align[uid] = align_tab[0];
1050 /* Found an alignment label. */
1051 uid_align[uid] = align_tab[log];
1052 for (i = log - 1; i >= 0; i--)
1056 #ifdef CASE_VECTOR_SHORTEN_MODE
1059 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum
1062 int min_shuid = INSN_SHUID (get_insns ()) - 1;
1063 int max_shuid = INSN_SHUID (get_last_insn ()) + 1;
1066 for (insn = first; insn != 0; insn = NEXT_INSN (insn))
1068 rtx min_lab = NULL_RTX, max_lab = NULL_RTX, pat;
1069 int len, i, min, max, insn_shuid;
1071 addr_diff_vec_flags flags;
1073 if (GET_CODE (insn) != JUMP_INSN
1074 || GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC)
1076 pat = PATTERN (insn);
1077 len = XVECLEN (pat, 1);
1080 min_align = MAX_CODE_ALIGN;
1081 for (min = max_shuid, max = min_shuid, i = len - 1; i >= 0; i--)
1083 rtx lab = XEXP (XVECEXP (pat, 1, i), 0);
1084 int shuid = INSN_SHUID (lab);
1095 if (min_align > LABEL_TO_ALIGNMENT (lab))
1096 min_align = LABEL_TO_ALIGNMENT (lab);
1098 XEXP (pat, 2) = gen_rtx_LABEL_REF (VOIDmode, min_lab);
1099 XEXP (pat, 3) = gen_rtx_LABEL_REF (VOIDmode, max_lab);
1100 insn_shuid = INSN_SHUID (insn);
1101 rel = INSN_SHUID (XEXP (XEXP (pat, 0), 0));
1102 flags.min_align = min_align;
1103 flags.base_after_vec = rel > insn_shuid;
1104 flags.min_after_vec = min > insn_shuid;
1105 flags.max_after_vec = max > insn_shuid;
1106 flags.min_after_base = min > rel;
1107 flags.max_after_base = max > rel;
1108 ADDR_DIFF_VEC_FLAGS (pat) = flags;
1111 #endif /* CASE_VECTOR_SHORTEN_MODE */
1113 /* Compute initial lengths, addresses, and varying flags for each insn. */
1114 for (insn_current_address = FIRST_INSN_ADDRESS, insn = first;
1116 insn_current_address += insn_lengths[uid], insn = NEXT_INSN (insn))
1118 uid = INSN_UID (insn);
1120 insn_lengths[uid] = 0;
1122 if (GET_CODE (insn) == CODE_LABEL)
1124 int log = LABEL_TO_ALIGNMENT (insn);
1127 int align = 1 << log;
1128 int new_address = (insn_current_address + align - 1) & -align;
1129 insn_lengths[uid] = new_address - insn_current_address;
1133 INSN_ADDRESSES (uid) = insn_current_address;
1135 if (GET_CODE (insn) == NOTE || GET_CODE (insn) == BARRIER
1136 || GET_CODE (insn) == CODE_LABEL)
1138 if (INSN_DELETED_P (insn))
1141 body = PATTERN (insn);
1142 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
1144 /* This only takes room if read-only data goes into the text
1146 if (JUMP_TABLES_IN_TEXT_SECTION
1147 #if !defined(READONLY_DATA_SECTION)
1151 insn_lengths[uid] = (XVECLEN (body,
1152 GET_CODE (body) == ADDR_DIFF_VEC)
1153 * GET_MODE_SIZE (GET_MODE (body)));
1154 /* Alignment is handled by ADDR_VEC_ALIGN. */
1156 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
1157 insn_lengths[uid] = asm_insn_count (body) * insn_default_length (insn);
1158 else if (GET_CODE (body) == SEQUENCE)
1161 int const_delay_slots;
1163 const_delay_slots = const_num_delay_slots (XVECEXP (body, 0, 0));
1165 const_delay_slots = 0;
1167 /* Inside a delay slot sequence, we do not do any branch shortening
1168 if the shortening could change the number of delay slots
1170 for (i = 0; i < XVECLEN (body, 0); i++)
1172 rtx inner_insn = XVECEXP (body, 0, i);
1173 int inner_uid = INSN_UID (inner_insn);
1176 if (GET_CODE (body) == ASM_INPUT
1177 || asm_noperands (PATTERN (XVECEXP (body, 0, i))) >= 0)
1178 inner_length = (asm_insn_count (PATTERN (inner_insn))
1179 * insn_default_length (inner_insn));
1181 inner_length = insn_default_length (inner_insn);
1183 insn_lengths[inner_uid] = inner_length;
1184 if (const_delay_slots)
1186 if ((varying_length[inner_uid]
1187 = insn_variable_length_p (inner_insn)) != 0)
1188 varying_length[uid] = 1;
1189 INSN_ADDRESSES (inner_uid) = (insn_current_address
1190 + insn_lengths[uid]);
1193 varying_length[inner_uid] = 0;
1194 insn_lengths[uid] += inner_length;
1197 else if (GET_CODE (body) != USE && GET_CODE (body) != CLOBBER)
1199 insn_lengths[uid] = insn_default_length (insn);
1200 varying_length[uid] = insn_variable_length_p (insn);
1203 /* If needed, do any adjustment. */
1204 #ifdef ADJUST_INSN_LENGTH
1205 ADJUST_INSN_LENGTH (insn, insn_lengths[uid]);
1206 if (insn_lengths[uid] < 0)
1207 fatal_insn ("negative insn length", insn);
1211 /* Now loop over all the insns finding varying length insns. For each,
1212 get the current insn length. If it has changed, reflect the change.
1213 When nothing changes for a full pass, we are done. */
1215 while (something_changed)
1217 something_changed = 0;
1218 insn_current_align = MAX_CODE_ALIGN - 1;
1219 for (insn_current_address = FIRST_INSN_ADDRESS, insn = first;
1221 insn = NEXT_INSN (insn))
1224 #ifdef ADJUST_INSN_LENGTH
1229 uid = INSN_UID (insn);
1231 if (GET_CODE (insn) == CODE_LABEL)
1233 int log = LABEL_TO_ALIGNMENT (insn);
1234 if (log > insn_current_align)
1236 int align = 1 << log;
1237 int new_address= (insn_current_address + align - 1) & -align;
1238 insn_lengths[uid] = new_address - insn_current_address;
1239 insn_current_align = log;
1240 insn_current_address = new_address;
1243 insn_lengths[uid] = 0;
1244 INSN_ADDRESSES (uid) = insn_current_address;
1248 length_align = INSN_LENGTH_ALIGNMENT (insn);
1249 if (length_align < insn_current_align)
1250 insn_current_align = length_align;
1252 insn_last_address = INSN_ADDRESSES (uid);
1253 INSN_ADDRESSES (uid) = insn_current_address;
1255 #ifdef CASE_VECTOR_SHORTEN_MODE
1256 if (optimize && GET_CODE (insn) == JUMP_INSN
1257 && GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
1259 rtx body = PATTERN (insn);
1260 int old_length = insn_lengths[uid];
1261 rtx rel_lab = XEXP (XEXP (body, 0), 0);
1262 rtx min_lab = XEXP (XEXP (body, 2), 0);
1263 rtx max_lab = XEXP (XEXP (body, 3), 0);
1264 int rel_addr = INSN_ADDRESSES (INSN_UID (rel_lab));
1265 int min_addr = INSN_ADDRESSES (INSN_UID (min_lab));
1266 int max_addr = INSN_ADDRESSES (INSN_UID (max_lab));
1269 addr_diff_vec_flags flags;
1271 /* Avoid automatic aggregate initialization. */
1272 flags = ADDR_DIFF_VEC_FLAGS (body);
1274 /* Try to find a known alignment for rel_lab. */
1275 for (prev = rel_lab;
1277 && ! insn_lengths[INSN_UID (prev)]
1278 && ! (varying_length[INSN_UID (prev)] & 1);
1279 prev = PREV_INSN (prev))
1280 if (varying_length[INSN_UID (prev)] & 2)
1282 rel_align = LABEL_TO_ALIGNMENT (prev);
1286 /* See the comment on addr_diff_vec_flags in rtl.h for the
1287 meaning of the flags values. base: REL_LAB vec: INSN */
1288 /* Anything after INSN has still addresses from the last
1289 pass; adjust these so that they reflect our current
1290 estimate for this pass. */
1291 if (flags.base_after_vec)
1292 rel_addr += insn_current_address - insn_last_address;
1293 if (flags.min_after_vec)
1294 min_addr += insn_current_address - insn_last_address;
1295 if (flags.max_after_vec)
1296 max_addr += insn_current_address - insn_last_address;
1297 /* We want to know the worst case, i.e. lowest possible value
1298 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB,
1299 its offset is positive, and we have to be wary of code shrink;
1300 otherwise, it is negative, and we have to be vary of code
1302 if (flags.min_after_base)
1304 /* If INSN is between REL_LAB and MIN_LAB, the size
1305 changes we are about to make can change the alignment
1306 within the observed offset, therefore we have to break
1307 it up into two parts that are independent. */
1308 if (! flags.base_after_vec && flags.min_after_vec)
1310 min_addr -= align_fuzz (rel_lab, insn, rel_align, 0);
1311 min_addr -= align_fuzz (insn, min_lab, 0, 0);
1314 min_addr -= align_fuzz (rel_lab, min_lab, rel_align, 0);
1318 if (flags.base_after_vec && ! flags.min_after_vec)
1320 min_addr -= align_fuzz (min_lab, insn, 0, ~0);
1321 min_addr -= align_fuzz (insn, rel_lab, 0, ~0);
1324 min_addr -= align_fuzz (min_lab, rel_lab, 0, ~0);
1326 /* Likewise, determine the highest lowest possible value
1327 for the offset of MAX_LAB. */
1328 if (flags.max_after_base)
1330 if (! flags.base_after_vec && flags.max_after_vec)
1332 max_addr += align_fuzz (rel_lab, insn, rel_align, ~0);
1333 max_addr += align_fuzz (insn, max_lab, 0, ~0);
1336 max_addr += align_fuzz (rel_lab, max_lab, rel_align, ~0);
1340 if (flags.base_after_vec && ! flags.max_after_vec)
1342 max_addr += align_fuzz (max_lab, insn, 0, 0);
1343 max_addr += align_fuzz (insn, rel_lab, 0, 0);
1346 max_addr += align_fuzz (max_lab, rel_lab, 0, 0);
1348 PUT_MODE (body, CASE_VECTOR_SHORTEN_MODE (min_addr - rel_addr,
1349 max_addr - rel_addr,
1351 if (JUMP_TABLES_IN_TEXT_SECTION
1352 #if !defined(READONLY_DATA_SECTION)
1358 = (XVECLEN (body, 1) * GET_MODE_SIZE (GET_MODE (body)));
1359 insn_current_address += insn_lengths[uid];
1360 if (insn_lengths[uid] != old_length)
1361 something_changed = 1;
1366 #endif /* CASE_VECTOR_SHORTEN_MODE */
1368 if (! (varying_length[uid]))
1370 if (GET_CODE (insn) == INSN
1371 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1375 body = PATTERN (insn);
1376 for (i = 0; i < XVECLEN (body, 0); i++)
1378 rtx inner_insn = XVECEXP (body, 0, i);
1379 int inner_uid = INSN_UID (inner_insn);
1381 INSN_ADDRESSES (inner_uid) = insn_current_address;
1383 insn_current_address += insn_lengths[inner_uid];
1387 insn_current_address += insn_lengths[uid];
1392 if (GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
1396 body = PATTERN (insn);
1398 for (i = 0; i < XVECLEN (body, 0); i++)
1400 rtx inner_insn = XVECEXP (body, 0, i);
1401 int inner_uid = INSN_UID (inner_insn);
1404 INSN_ADDRESSES (inner_uid) = insn_current_address;
1406 /* insn_current_length returns 0 for insns with a
1407 non-varying length. */
1408 if (! varying_length[inner_uid])
1409 inner_length = insn_lengths[inner_uid];
1411 inner_length = insn_current_length (inner_insn);
1413 if (inner_length != insn_lengths[inner_uid])
1415 insn_lengths[inner_uid] = inner_length;
1416 something_changed = 1;
1418 insn_current_address += insn_lengths[inner_uid];
1419 new_length += inner_length;
1424 new_length = insn_current_length (insn);
1425 insn_current_address += new_length;
1428 #ifdef ADJUST_INSN_LENGTH
1429 /* If needed, do any adjustment. */
1430 tmp_length = new_length;
1431 ADJUST_INSN_LENGTH (insn, new_length);
1432 insn_current_address += (new_length - tmp_length);
1435 if (new_length != insn_lengths[uid])
1437 insn_lengths[uid] = new_length;
1438 something_changed = 1;
1441 /* For a non-optimizing compile, do only a single pass. */
1446 free (varying_length);
1448 #endif /* HAVE_ATTR_length */
1451 #ifdef HAVE_ATTR_length
1452 /* Given the body of an INSN known to be generated by an ASM statement, return
1453 the number of machine instructions likely to be generated for this insn.
1454 This is used to compute its length. */
1457 asm_insn_count (body)
1460 const char *template;
1463 if (GET_CODE (body) == ASM_INPUT)
1464 template = XSTR (body, 0);
1466 template = decode_asm_operands (body, NULL, NULL, NULL, NULL);
1468 for (; *template; template++)
1469 if (IS_ASM_LOGICAL_LINE_SEPARATOR (*template) || *template == '\n')
1476 /* Output assembler code for the start of a function,
1477 and initialize some of the variables in this file
1478 for the new function. The label for the function and associated
1479 assembler pseudo-ops have already been output in `assemble_start_function'.
1481 FIRST is the first insn of the rtl for the function being compiled.
1482 FILE is the file to write assembler code to.
1483 OPTIMIZE is nonzero if we should eliminate redundant
1484 test and compare insns. */
1487 final_start_function (first, file, optimize)
1490 int optimize ATTRIBUTE_UNUSED;
1494 this_is_asm_operands = 0;
1496 #ifdef NON_SAVING_SETJMP
1497 /* A function that calls setjmp should save and restore all the
1498 call-saved registers on a system where longjmp clobbers them. */
1499 if (NON_SAVING_SETJMP && current_function_calls_setjmp)
1503 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1504 if (!call_used_regs[i])
1505 regs_ever_live[i] = 1;
1509 if (NOTE_LINE_NUMBER (first) != NOTE_INSN_DELETED)
1510 notice_source_line (first);
1511 high_block_linenum = high_function_linenum = last_linenum;
1513 (*debug_hooks->begin_prologue) (last_linenum, last_filename);
1515 #if defined (DWARF2_UNWIND_INFO) || defined (IA64_UNWIND_INFO)
1516 if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG)
1517 dwarf2out_begin_prologue (0, NULL);
1520 #ifdef LEAF_REG_REMAP
1521 if (current_function_uses_only_leaf_regs)
1522 leaf_renumber_regs (first);
1525 /* The Sun386i and perhaps other machines don't work right
1526 if the profiling code comes after the prologue. */
1527 #ifdef PROFILE_BEFORE_PROLOGUE
1528 if (current_function_profile)
1529 profile_function (file);
1530 #endif /* PROFILE_BEFORE_PROLOGUE */
1532 #if defined (DWARF2_UNWIND_INFO) && defined (HAVE_prologue)
1533 if (dwarf2out_do_frame ())
1534 dwarf2out_frame_debug (NULL_RTX);
1537 /* If debugging, assign block numbers to all of the blocks in this
1541 remove_unnecessary_notes ();
1543 number_blocks (current_function_decl);
1544 /* We never actually put out begin/end notes for the top-level
1545 block in the function. But, conceptually, that block is
1547 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl)) = 1;
1550 /* First output the function prologue: code to set up the stack frame. */
1551 (*targetm.asm_out.function_prologue) (file, get_frame_size ());
1553 #ifdef VMS_DEBUGGING_INFO
1554 /* Output label after the prologue of the function. */
1555 if (write_symbols == VMS_DEBUG || write_symbols == VMS_AND_DWARF2_DEBUG)
1556 vmsdbgout_after_prologue ();
1559 /* If the machine represents the prologue as RTL, the profiling code must
1560 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
1561 #ifdef HAVE_prologue
1562 if (! HAVE_prologue)
1564 profile_after_prologue (file);
1568 profile_after_prologue (file)
1569 FILE *file ATTRIBUTE_UNUSED;
1571 #ifndef PROFILE_BEFORE_PROLOGUE
1572 if (current_function_profile)
1573 profile_function (file);
1574 #endif /* not PROFILE_BEFORE_PROLOGUE */
1578 profile_function (file)
1579 FILE *file ATTRIBUTE_UNUSED;
1581 #ifndef NO_PROFILE_COUNTERS
1582 int align = MIN (BIGGEST_ALIGNMENT, LONG_TYPE_SIZE);
1584 #if defined(ASM_OUTPUT_REG_PUSH)
1585 #if defined(STRUCT_VALUE_INCOMING_REGNUM) || defined(STRUCT_VALUE_REGNUM)
1586 int sval = current_function_returns_struct;
1588 #if defined(STATIC_CHAIN_INCOMING_REGNUM) || defined(STATIC_CHAIN_REGNUM)
1589 int cxt = current_function_needs_context;
1591 #endif /* ASM_OUTPUT_REG_PUSH */
1593 #ifndef NO_PROFILE_COUNTERS
1595 ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT));
1596 ASM_OUTPUT_INTERNAL_LABEL (file, "LP", current_function_profile_label_no);
1597 assemble_integer (const0_rtx, LONG_TYPE_SIZE / BITS_PER_UNIT, align, 1);
1600 function_section (current_function_decl);
1602 #if defined(STRUCT_VALUE_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1604 ASM_OUTPUT_REG_PUSH (file, STRUCT_VALUE_INCOMING_REGNUM);
1606 #if defined(STRUCT_VALUE_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1609 ASM_OUTPUT_REG_PUSH (file, STRUCT_VALUE_REGNUM);
1614 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1616 ASM_OUTPUT_REG_PUSH (file, STATIC_CHAIN_INCOMING_REGNUM);
1618 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1621 ASM_OUTPUT_REG_PUSH (file, STATIC_CHAIN_REGNUM);
1626 FUNCTION_PROFILER (file, current_function_profile_label_no);
1628 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1630 ASM_OUTPUT_REG_POP (file, STATIC_CHAIN_INCOMING_REGNUM);
1632 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1635 ASM_OUTPUT_REG_POP (file, STATIC_CHAIN_REGNUM);
1640 #if defined(STRUCT_VALUE_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1642 ASM_OUTPUT_REG_POP (file, STRUCT_VALUE_INCOMING_REGNUM);
1644 #if defined(STRUCT_VALUE_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1647 ASM_OUTPUT_REG_POP (file, STRUCT_VALUE_REGNUM);
1653 /* Output assembler code for the end of a function.
1654 For clarity, args are same as those of `final_start_function'
1655 even though not all of them are needed. */
1658 final_end_function ()
1662 (*debug_hooks->end_function) (high_function_linenum);
1664 /* Finally, output the function epilogue:
1665 code to restore the stack frame and return to the caller. */
1666 (*targetm.asm_out.function_epilogue) (asm_out_file, get_frame_size ());
1668 /* And debug output. */
1669 (*debug_hooks->end_epilogue) ();
1671 #if defined (DWARF2_UNWIND_INFO)
1672 if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG
1673 && dwarf2out_do_frame ())
1674 dwarf2out_end_epilogue ();
1678 /* Output assembler code for some insns: all or part of a function.
1679 For description of args, see `final_start_function', above.
1681 PRESCAN is 1 if we are not really outputting,
1682 just scanning as if we were outputting.
1683 Prescanning deletes and rearranges insns just like ordinary output.
1684 PRESCAN is -2 if we are outputting after having prescanned.
1685 In this case, don't try to delete or rearrange insns
1686 because that has already been done.
1687 Prescanning is done only on certain machines. */
1690 final (first, file, optimize, prescan)
1700 last_ignored_compare = 0;
1703 /* Make a map indicating which line numbers appear in this function.
1704 When producing SDB debugging info, delete troublesome line number
1705 notes from inlined functions in other files as well as duplicate
1706 line number notes. */
1707 #ifdef SDB_DEBUGGING_INFO
1708 if (write_symbols == SDB_DEBUG)
1711 for (insn = first; insn; insn = NEXT_INSN (insn))
1712 if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) > 0)
1714 if ((RTX_INTEGRATED_P (insn)
1715 && strcmp (NOTE_SOURCE_FILE (insn), main_input_filename) != 0)
1717 && NOTE_LINE_NUMBER (insn) == NOTE_LINE_NUMBER (last)
1718 && NOTE_SOURCE_FILE (insn) == NOTE_SOURCE_FILE (last)))
1720 delete_insn (insn); /* Use delete_note. */
1724 if (NOTE_LINE_NUMBER (insn) > max_line)
1725 max_line = NOTE_LINE_NUMBER (insn);
1731 for (insn = first; insn; insn = NEXT_INSN (insn))
1732 if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) > max_line)
1733 max_line = NOTE_LINE_NUMBER (insn);
1736 line_note_exists = (char *) xcalloc (max_line + 1, sizeof (char));
1738 for (insn = first; insn; insn = NEXT_INSN (insn))
1740 if (INSN_UID (insn) > max_uid) /* find largest UID */
1741 max_uid = INSN_UID (insn);
1742 if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) > 0)
1743 line_note_exists[NOTE_LINE_NUMBER (insn)] = 1;
1745 /* If CC tracking across branches is enabled, record the insn which
1746 jumps to each branch only reached from one place. */
1747 if (optimize && GET_CODE (insn) == JUMP_INSN)
1749 rtx lab = JUMP_LABEL (insn);
1750 if (lab && LABEL_NUSES (lab) == 1)
1752 LABEL_REFS (lab) = insn;
1762 /* Output the insns. */
1763 for (insn = NEXT_INSN (first); insn;)
1765 #ifdef HAVE_ATTR_length
1766 if ((unsigned) INSN_UID (insn) >= INSN_ADDRESSES_SIZE ())
1769 /* Irritatingly, the reg-stack pass is creating new instructions
1770 and because of REG_DEAD note abuse it has to run after
1771 shorten_branches. Fake address of -1 then. */
1772 insn_current_address = -1;
1774 /* This can be triggered by bugs elsewhere in the compiler if
1775 new insns are created after init_insn_lengths is called. */
1780 insn_current_address = INSN_ADDRESSES (INSN_UID (insn));
1781 #endif /* HAVE_ATTR_length */
1783 insn = final_scan_insn (insn, file, optimize, prescan, 0);
1786 free (line_note_exists);
1787 line_note_exists = NULL;
1791 get_insn_template (code, insn)
1795 const void *output = insn_data[code].output;
1796 switch (insn_data[code].output_format)
1798 case INSN_OUTPUT_FORMAT_SINGLE:
1799 return (const char *) output;
1800 case INSN_OUTPUT_FORMAT_MULTI:
1801 return ((const char *const *) output)[which_alternative];
1802 case INSN_OUTPUT_FORMAT_FUNCTION:
1805 return (*(insn_output_fn) output) (recog_data.operand, insn);
1812 /* The final scan for one insn, INSN.
1813 Args are same as in `final', except that INSN
1814 is the insn being scanned.
1815 Value returned is the next insn to be scanned.
1817 NOPEEPHOLES is the flag to disallow peephole processing (currently
1818 used for within delayed branch sequence output). */
1821 final_scan_insn (insn, file, optimize, prescan, nopeepholes)
1824 int optimize ATTRIBUTE_UNUSED;
1826 int nopeepholes ATTRIBUTE_UNUSED;
1834 /* Ignore deleted insns. These can occur when we split insns (due to a
1835 template of "#") while not optimizing. */
1836 if (INSN_DELETED_P (insn))
1837 return NEXT_INSN (insn);
1839 switch (GET_CODE (insn))
1845 switch (NOTE_LINE_NUMBER (insn))
1847 case NOTE_INSN_DELETED:
1848 case NOTE_INSN_LOOP_BEG:
1849 case NOTE_INSN_LOOP_END:
1850 case NOTE_INSN_LOOP_END_TOP_COND:
1851 case NOTE_INSN_LOOP_CONT:
1852 case NOTE_INSN_LOOP_VTOP:
1853 case NOTE_INSN_FUNCTION_END:
1854 case NOTE_INSN_REPEATED_LINE_NUMBER:
1855 case NOTE_INSN_RANGE_BEG:
1856 case NOTE_INSN_RANGE_END:
1857 case NOTE_INSN_LIVE:
1858 case NOTE_INSN_EXPECTED_VALUE:
1861 case NOTE_INSN_BASIC_BLOCK:
1862 #ifdef IA64_UNWIND_INFO
1863 IA64_UNWIND_EMIT (asm_out_file, insn);
1866 fprintf (asm_out_file, "\t%s basic block %d\n",
1867 ASM_COMMENT_START, NOTE_BASIC_BLOCK (insn)->index);
1870 case NOTE_INSN_EH_REGION_BEG:
1871 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHB",
1872 NOTE_EH_HANDLER (insn));
1875 case NOTE_INSN_EH_REGION_END:
1876 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHE",
1877 NOTE_EH_HANDLER (insn));
1880 case NOTE_INSN_PROLOGUE_END:
1881 (*targetm.asm_out.function_end_prologue) (file);
1882 profile_after_prologue (file);
1885 case NOTE_INSN_EPILOGUE_BEG:
1886 (*targetm.asm_out.function_begin_epilogue) (file);
1889 case NOTE_INSN_FUNCTION_BEG:
1891 (*debug_hooks->end_prologue) (last_linenum);
1894 case NOTE_INSN_BLOCK_BEG:
1895 if (debug_info_level == DINFO_LEVEL_NORMAL
1896 || debug_info_level == DINFO_LEVEL_VERBOSE
1897 || write_symbols == DWARF_DEBUG
1898 || write_symbols == DWARF2_DEBUG
1899 || write_symbols == VMS_AND_DWARF2_DEBUG
1900 || write_symbols == VMS_DEBUG)
1902 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
1906 high_block_linenum = last_linenum;
1908 /* Output debugging info about the symbol-block beginning. */
1909 (*debug_hooks->begin_block) (last_linenum, n);
1911 /* Mark this block as output. */
1912 TREE_ASM_WRITTEN (NOTE_BLOCK (insn)) = 1;
1916 case NOTE_INSN_BLOCK_END:
1917 if (debug_info_level == DINFO_LEVEL_NORMAL
1918 || debug_info_level == DINFO_LEVEL_VERBOSE
1919 || write_symbols == DWARF_DEBUG
1920 || write_symbols == DWARF2_DEBUG
1921 || write_symbols == VMS_AND_DWARF2_DEBUG
1922 || write_symbols == VMS_DEBUG)
1924 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
1928 /* End of a symbol-block. */
1930 if (block_depth < 0)
1933 (*debug_hooks->end_block) (high_block_linenum, n);
1937 case NOTE_INSN_DELETED_LABEL:
1938 /* Emit the label. We may have deleted the CODE_LABEL because
1939 the label could be proved to be unreachable, though still
1940 referenced (in the form of having its address taken. */
1941 ASM_OUTPUT_DEBUG_LABEL (file, "L", CODE_LABEL_NUMBER (insn));
1948 if (NOTE_LINE_NUMBER (insn) <= 0)
1951 /* This note is a line-number. */
1956 /* If there is anything real after this note, output it.
1957 If another line note follows, omit this one. */
1958 for (note = NEXT_INSN (insn); note; note = NEXT_INSN (note))
1960 if (GET_CODE (note) != NOTE && GET_CODE (note) != CODE_LABEL)
1963 /* These types of notes can be significant
1964 so make sure the preceding line number stays. */
1965 else if (GET_CODE (note) == NOTE
1966 && (NOTE_LINE_NUMBER (note) == NOTE_INSN_BLOCK_BEG
1967 || NOTE_LINE_NUMBER (note) == NOTE_INSN_BLOCK_END
1968 || NOTE_LINE_NUMBER (note) == NOTE_INSN_FUNCTION_BEG))
1970 else if (GET_CODE (note) == NOTE && NOTE_LINE_NUMBER (note) > 0)
1972 /* Another line note follows; we can delete this note
1973 if no intervening line numbers have notes elsewhere. */
1975 for (num = NOTE_LINE_NUMBER (insn) + 1;
1976 num < NOTE_LINE_NUMBER (note);
1978 if (line_note_exists[num])
1981 if (num >= NOTE_LINE_NUMBER (note))
1987 /* Output this line note if it is the first or the last line
1991 notice_source_line (insn);
1992 (*debug_hooks->source_line) (last_linenum, last_filename);
2000 #if defined (DWARF2_UNWIND_INFO)
2001 if (dwarf2out_do_frame ())
2002 dwarf2out_frame_debug (insn);
2007 /* The target port might emit labels in the output function for
2008 some insn, e.g. sh.c output_branchy_insn. */
2009 if (CODE_LABEL_NUMBER (insn) <= max_labelno)
2011 int align = LABEL_TO_ALIGNMENT (insn);
2012 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2013 int max_skip = LABEL_TO_MAX_SKIP (insn);
2016 if (align && NEXT_INSN (insn))
2018 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2019 ASM_OUTPUT_MAX_SKIP_ALIGN (file, align, max_skip);
2021 ASM_OUTPUT_ALIGN (file, align);
2027 /* If this label is reached from only one place, set the condition
2028 codes from the instruction just before the branch. */
2030 /* Disabled because some insns set cc_status in the C output code
2031 and NOTICE_UPDATE_CC alone can set incorrect status. */
2032 if (0 /* optimize && LABEL_NUSES (insn) == 1*/)
2034 rtx jump = LABEL_REFS (insn);
2035 rtx barrier = prev_nonnote_insn (insn);
2037 /* If the LABEL_REFS field of this label has been set to point
2038 at a branch, the predecessor of the branch is a regular
2039 insn, and that branch is the only way to reach this label,
2040 set the condition codes based on the branch and its
2042 if (barrier && GET_CODE (barrier) == BARRIER
2043 && jump && GET_CODE (jump) == JUMP_INSN
2044 && (prev = prev_nonnote_insn (jump))
2045 && GET_CODE (prev) == INSN)
2047 NOTICE_UPDATE_CC (PATTERN (prev), prev);
2048 NOTICE_UPDATE_CC (PATTERN (jump), jump);
2056 #ifdef FINAL_PRESCAN_LABEL
2057 FINAL_PRESCAN_INSN (insn, NULL, 0);
2060 if (LABEL_NAME (insn))
2061 (*debug_hooks->label) (insn);
2065 fputs (ASM_APP_OFF, file);
2068 if (NEXT_INSN (insn) != 0
2069 && GET_CODE (NEXT_INSN (insn)) == JUMP_INSN)
2071 rtx nextbody = PATTERN (NEXT_INSN (insn));
2073 /* If this label is followed by a jump-table,
2074 make sure we put the label in the read-only section. Also
2075 possibly write the label and jump table together. */
2077 if (GET_CODE (nextbody) == ADDR_VEC
2078 || GET_CODE (nextbody) == ADDR_DIFF_VEC)
2080 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2081 /* In this case, the case vector is being moved by the
2082 target, so don't output the label at all. Leave that
2083 to the back end macros. */
2085 if (! JUMP_TABLES_IN_TEXT_SECTION)
2089 readonly_data_section ();
2091 #ifdef ADDR_VEC_ALIGN
2092 log_align = ADDR_VEC_ALIGN (NEXT_INSN (insn));
2094 log_align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT);
2096 ASM_OUTPUT_ALIGN (file, log_align);
2099 function_section (current_function_decl);
2101 #ifdef ASM_OUTPUT_CASE_LABEL
2102 ASM_OUTPUT_CASE_LABEL (file, "L", CODE_LABEL_NUMBER (insn),
2105 if (LABEL_ALTERNATE_NAME (insn))
2106 ASM_OUTPUT_ALTERNATE_LABEL_NAME (file, insn);
2108 ASM_OUTPUT_INTERNAL_LABEL (file, "L", CODE_LABEL_NUMBER (insn));
2114 if (LABEL_ALTERNATE_NAME (insn))
2115 ASM_OUTPUT_ALTERNATE_LABEL_NAME (file, insn);
2117 ASM_OUTPUT_INTERNAL_LABEL (file, "L", CODE_LABEL_NUMBER (insn));
2122 rtx body = PATTERN (insn);
2123 int insn_code_number;
2124 const char *template;
2127 /* An INSN, JUMP_INSN or CALL_INSN.
2128 First check for special kinds that recog doesn't recognize. */
2130 if (GET_CODE (body) == USE /* These are just declarations */
2131 || GET_CODE (body) == CLOBBER)
2135 /* If there is a REG_CC_SETTER note on this insn, it means that
2136 the setting of the condition code was done in the delay slot
2137 of the insn that branched here. So recover the cc status
2138 from the insn that set it. */
2140 note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2143 NOTICE_UPDATE_CC (PATTERN (XEXP (note, 0)), XEXP (note, 0));
2144 cc_prev_status = cc_status;
2148 /* Detect insns that are really jump-tables
2149 and output them as such. */
2151 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
2153 #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC))
2162 fputs (ASM_APP_OFF, file);
2166 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2167 if (GET_CODE (body) == ADDR_VEC)
2169 #ifdef ASM_OUTPUT_ADDR_VEC
2170 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn), body);
2177 #ifdef ASM_OUTPUT_ADDR_DIFF_VEC
2178 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn), body);
2184 vlen = XVECLEN (body, GET_CODE (body) == ADDR_DIFF_VEC);
2185 for (idx = 0; idx < vlen; idx++)
2187 if (GET_CODE (body) == ADDR_VEC)
2189 #ifdef ASM_OUTPUT_ADDR_VEC_ELT
2190 ASM_OUTPUT_ADDR_VEC_ELT
2191 (file, CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 0, idx), 0)));
2198 #ifdef ASM_OUTPUT_ADDR_DIFF_ELT
2199 ASM_OUTPUT_ADDR_DIFF_ELT
2202 CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 1, idx), 0)),
2203 CODE_LABEL_NUMBER (XEXP (XEXP (body, 0), 0)));
2209 #ifdef ASM_OUTPUT_CASE_END
2210 ASM_OUTPUT_CASE_END (file,
2211 CODE_LABEL_NUMBER (PREV_INSN (insn)),
2216 function_section (current_function_decl);
2221 if (GET_CODE (body) == ASM_INPUT)
2223 const char *string = XSTR (body, 0);
2225 /* There's no telling what that did to the condition codes. */
2234 fputs (ASM_APP_ON, file);
2237 fprintf (asm_out_file, "\t%s\n", string);
2242 /* Detect `asm' construct with operands. */
2243 if (asm_noperands (body) >= 0)
2245 unsigned int noperands = asm_noperands (body);
2246 rtx *ops = (rtx *) alloca (noperands * sizeof (rtx));
2249 /* There's no telling what that did to the condition codes. */
2254 /* Get out the operand values. */
2255 string = decode_asm_operands (body, ops, NULL, NULL, NULL);
2256 /* Inhibit aborts on what would otherwise be compiler bugs. */
2257 insn_noperands = noperands;
2258 this_is_asm_operands = insn;
2260 /* Output the insn using them. */
2265 fputs (ASM_APP_ON, file);
2268 output_asm_insn (string, ops);
2271 this_is_asm_operands = 0;
2275 if (prescan <= 0 && app_on)
2277 fputs (ASM_APP_OFF, file);
2281 if (GET_CODE (body) == SEQUENCE)
2283 /* A delayed-branch sequence */
2289 final_sequence = body;
2291 /* The first insn in this SEQUENCE might be a JUMP_INSN that will
2292 force the restoration of a comparison that was previously
2293 thought unnecessary. If that happens, cancel this sequence
2294 and cause that insn to be restored. */
2296 next = final_scan_insn (XVECEXP (body, 0, 0), file, 0, prescan, 1);
2297 if (next != XVECEXP (body, 0, 1))
2303 for (i = 1; i < XVECLEN (body, 0); i++)
2305 rtx insn = XVECEXP (body, 0, i);
2306 rtx next = NEXT_INSN (insn);
2307 /* We loop in case any instruction in a delay slot gets
2310 insn = final_scan_insn (insn, file, 0, prescan, 1);
2311 while (insn != next);
2313 #ifdef DBR_OUTPUT_SEQEND
2314 DBR_OUTPUT_SEQEND (file);
2318 /* If the insn requiring the delay slot was a CALL_INSN, the
2319 insns in the delay slot are actually executed before the
2320 called function. Hence we don't preserve any CC-setting
2321 actions in these insns and the CC must be marked as being
2322 clobbered by the function. */
2323 if (GET_CODE (XVECEXP (body, 0, 0)) == CALL_INSN)
2330 /* We have a real machine instruction as rtl. */
2332 body = PATTERN (insn);
2335 set = single_set (insn);
2337 /* Check for redundant test and compare instructions
2338 (when the condition codes are already set up as desired).
2339 This is done only when optimizing; if not optimizing,
2340 it should be possible for the user to alter a variable
2341 with the debugger in between statements
2342 and the next statement should reexamine the variable
2343 to compute the condition codes. */
2348 rtx set = single_set (insn);
2352 && GET_CODE (SET_DEST (set)) == CC0
2353 && insn != last_ignored_compare)
2355 if (GET_CODE (SET_SRC (set)) == SUBREG)
2356 SET_SRC (set) = alter_subreg (&SET_SRC (set));
2357 else if (GET_CODE (SET_SRC (set)) == COMPARE)
2359 if (GET_CODE (XEXP (SET_SRC (set), 0)) == SUBREG)
2360 XEXP (SET_SRC (set), 0)
2361 = alter_subreg (&XEXP (SET_SRC (set), 0));
2362 if (GET_CODE (XEXP (SET_SRC (set), 1)) == SUBREG)
2363 XEXP (SET_SRC (set), 1)
2364 = alter_subreg (&XEXP (SET_SRC (set), 1));
2366 if ((cc_status.value1 != 0
2367 && rtx_equal_p (SET_SRC (set), cc_status.value1))
2368 || (cc_status.value2 != 0
2369 && rtx_equal_p (SET_SRC (set), cc_status.value2)))
2371 /* Don't delete insn if it has an addressing side-effect. */
2372 if (! FIND_REG_INC_NOTE (insn, NULL_RTX)
2373 /* or if anything in it is volatile. */
2374 && ! volatile_refs_p (PATTERN (insn)))
2376 /* We don't really delete the insn; just ignore it. */
2377 last_ignored_compare = insn;
2386 /* Don't bother outputting obvious no-ops, even without -O.
2387 This optimization is fast and doesn't interfere with debugging.
2388 Don't do this if the insn is in a delay slot, since this
2389 will cause an improper number of delay insns to be written. */
2390 if (final_sequence == 0
2392 && GET_CODE (insn) == INSN && GET_CODE (body) == SET
2393 && GET_CODE (SET_SRC (body)) == REG
2394 && GET_CODE (SET_DEST (body)) == REG
2395 && REGNO (SET_SRC (body)) == REGNO (SET_DEST (body)))
2400 /* If this is a conditional branch, maybe modify it
2401 if the cc's are in a nonstandard state
2402 so that it accomplishes the same thing that it would
2403 do straightforwardly if the cc's were set up normally. */
2405 if (cc_status.flags != 0
2406 && GET_CODE (insn) == JUMP_INSN
2407 && GET_CODE (body) == SET
2408 && SET_DEST (body) == pc_rtx
2409 && GET_CODE (SET_SRC (body)) == IF_THEN_ELSE
2410 && GET_RTX_CLASS (GET_CODE (XEXP (SET_SRC (body), 0))) == '<'
2411 && XEXP (XEXP (SET_SRC (body), 0), 0) == cc0_rtx
2412 /* This is done during prescan; it is not done again
2413 in final scan when prescan has been done. */
2416 /* This function may alter the contents of its argument
2417 and clear some of the cc_status.flags bits.
2418 It may also return 1 meaning condition now always true
2419 or -1 meaning condition now always false
2420 or 2 meaning condition nontrivial but altered. */
2421 int result = alter_cond (XEXP (SET_SRC (body), 0));
2422 /* If condition now has fixed value, replace the IF_THEN_ELSE
2423 with its then-operand or its else-operand. */
2425 SET_SRC (body) = XEXP (SET_SRC (body), 1);
2427 SET_SRC (body) = XEXP (SET_SRC (body), 2);
2429 /* The jump is now either unconditional or a no-op.
2430 If it has become a no-op, don't try to output it.
2431 (It would not be recognized.) */
2432 if (SET_SRC (body) == pc_rtx)
2437 else if (GET_CODE (SET_SRC (body)) == RETURN)
2438 /* Replace (set (pc) (return)) with (return). */
2439 PATTERN (insn) = body = SET_SRC (body);
2441 /* Rerecognize the instruction if it has changed. */
2443 INSN_CODE (insn) = -1;
2446 /* Make same adjustments to instructions that examine the
2447 condition codes without jumping and instructions that
2448 handle conditional moves (if this machine has either one). */
2450 if (cc_status.flags != 0
2453 rtx cond_rtx, then_rtx, else_rtx;
2455 if (GET_CODE (insn) != JUMP_INSN
2456 && GET_CODE (SET_SRC (set)) == IF_THEN_ELSE)
2458 cond_rtx = XEXP (SET_SRC (set), 0);
2459 then_rtx = XEXP (SET_SRC (set), 1);
2460 else_rtx = XEXP (SET_SRC (set), 2);
2464 cond_rtx = SET_SRC (set);
2465 then_rtx = const_true_rtx;
2466 else_rtx = const0_rtx;
2469 switch (GET_CODE (cond_rtx))
2483 if (XEXP (cond_rtx, 0) != cc0_rtx)
2485 result = alter_cond (cond_rtx);
2487 validate_change (insn, &SET_SRC (set), then_rtx, 0);
2488 else if (result == -1)
2489 validate_change (insn, &SET_SRC (set), else_rtx, 0);
2490 else if (result == 2)
2491 INSN_CODE (insn) = -1;
2492 if (SET_DEST (set) == SET_SRC (set))
2504 #ifdef HAVE_peephole
2505 /* Do machine-specific peephole optimizations if desired. */
2507 if (optimize && !flag_no_peephole && !nopeepholes)
2509 rtx next = peephole (insn);
2510 /* When peepholing, if there were notes within the peephole,
2511 emit them before the peephole. */
2512 if (next != 0 && next != NEXT_INSN (insn))
2514 rtx prev = PREV_INSN (insn);
2516 for (note = NEXT_INSN (insn); note != next;
2517 note = NEXT_INSN (note))
2518 final_scan_insn (note, file, optimize, prescan, nopeepholes);
2520 /* In case this is prescan, put the notes
2521 in proper position for later rescan. */
2522 note = NEXT_INSN (insn);
2523 PREV_INSN (note) = prev;
2524 NEXT_INSN (prev) = note;
2525 NEXT_INSN (PREV_INSN (next)) = insn;
2526 PREV_INSN (insn) = PREV_INSN (next);
2527 NEXT_INSN (insn) = next;
2528 PREV_INSN (next) = insn;
2531 /* PEEPHOLE might have changed this. */
2532 body = PATTERN (insn);
2536 /* Try to recognize the instruction.
2537 If successful, verify that the operands satisfy the
2538 constraints for the instruction. Crash if they don't,
2539 since `reload' should have changed them so that they do. */
2541 insn_code_number = recog_memoized (insn);
2542 cleanup_subreg_operands (insn);
2544 /* Dump the insn in the assembly for debugging. */
2545 if (flag_dump_rtl_in_asm)
2547 print_rtx_head = ASM_COMMENT_START;
2548 print_rtl_single (asm_out_file, insn);
2549 print_rtx_head = "";
2552 if (! constrain_operands_cached (1))
2553 fatal_insn_not_found (insn);
2555 /* Some target machines need to prescan each insn before
2558 #ifdef FINAL_PRESCAN_INSN
2559 FINAL_PRESCAN_INSN (insn, recog_data.operand, recog_data.n_operands);
2562 #ifdef HAVE_conditional_execution
2563 if (GET_CODE (PATTERN (insn)) == COND_EXEC)
2564 current_insn_predicate = COND_EXEC_TEST (PATTERN (insn));
2566 current_insn_predicate = NULL_RTX;
2570 cc_prev_status = cc_status;
2572 /* Update `cc_status' for this instruction.
2573 The instruction's output routine may change it further.
2574 If the output routine for a jump insn needs to depend
2575 on the cc status, it should look at cc_prev_status. */
2577 NOTICE_UPDATE_CC (body, insn);
2580 current_output_insn = debug_insn = insn;
2582 #if defined (DWARF2_UNWIND_INFO)
2583 if (GET_CODE (insn) == CALL_INSN && dwarf2out_do_frame ())
2584 dwarf2out_frame_debug (insn);
2587 /* Find the proper template for this insn. */
2588 template = get_insn_template (insn_code_number, insn);
2590 /* If the C code returns 0, it means that it is a jump insn
2591 which follows a deleted test insn, and that test insn
2592 needs to be reinserted. */
2597 if (prev_nonnote_insn (insn) != last_ignored_compare)
2601 /* We have already processed the notes between the setter and
2602 the user. Make sure we don't process them again, this is
2603 particularly important if one of the notes is a block
2604 scope note or an EH note. */
2606 prev != last_ignored_compare;
2607 prev = PREV_INSN (prev))
2609 if (GET_CODE (prev) == NOTE)
2610 delete_insn (prev); /* Use delete_note. */
2616 /* If the template is the string "#", it means that this insn must
2618 if (template[0] == '#' && template[1] == '\0')
2620 rtx new = try_split (body, insn, 0);
2622 /* If we didn't split the insn, go away. */
2623 if (new == insn && PATTERN (new) == body)
2624 fatal_insn ("could not split insn", insn);
2626 #ifdef HAVE_ATTR_length
2627 /* This instruction should have been split in shorten_branches,
2628 to ensure that we would have valid length info for the
2640 #ifdef IA64_UNWIND_INFO
2641 IA64_UNWIND_EMIT (asm_out_file, insn);
2643 /* Output assembler code from the template. */
2645 output_asm_insn (template, recog_data.operand);
2647 #if defined (DWARF2_UNWIND_INFO)
2648 #if defined (HAVE_prologue)
2649 if (GET_CODE (insn) == INSN && dwarf2out_do_frame ())
2650 dwarf2out_frame_debug (insn);
2652 if (!ACCUMULATE_OUTGOING_ARGS
2653 && GET_CODE (insn) == INSN
2654 && dwarf2out_do_frame ())
2655 dwarf2out_frame_debug (insn);
2660 /* It's not at all clear why we did this and doing so interferes
2661 with tests we'd like to do to use REG_WAS_0 notes, so let's try
2664 /* Mark this insn as having been output. */
2665 INSN_DELETED_P (insn) = 1;
2668 /* Emit information for vtable gc. */
2669 note = find_reg_note (insn, REG_VTABLE_REF, NULL_RTX);
2671 assemble_vtable_entry (XEXP (XEXP (note, 0), 0),
2672 INTVAL (XEXP (XEXP (note, 0), 1)));
2674 current_output_insn = debug_insn = 0;
2677 return NEXT_INSN (insn);
2680 /* Output debugging info to the assembler file FILE
2681 based on the NOTE-insn INSN, assumed to be a line number. */
2684 notice_source_line (insn)
2687 const char *filename = NOTE_SOURCE_FILE (insn);
2689 last_filename = filename;
2690 last_linenum = NOTE_LINE_NUMBER (insn);
2691 high_block_linenum = MAX (last_linenum, high_block_linenum);
2692 high_function_linenum = MAX (last_linenum, high_function_linenum);
2695 /* For each operand in INSN, simplify (subreg (reg)) so that it refers
2696 directly to the desired hard register. */
2699 cleanup_subreg_operands (insn)
2703 extract_insn_cached (insn);
2704 for (i = 0; i < recog_data.n_operands; i++)
2706 /* The following test cannot use recog_data.operand when tesing
2707 for a SUBREG: the underlying object might have been changed
2708 already if we are inside a match_operator expression that
2709 matches the else clause. Instead we test the underlying
2710 expression directly. */
2711 if (GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
2712 recog_data.operand[i] = alter_subreg (recog_data.operand_loc[i]);
2713 else if (GET_CODE (recog_data.operand[i]) == PLUS
2714 || GET_CODE (recog_data.operand[i]) == MULT
2715 || GET_CODE (recog_data.operand[i]) == MEM)
2716 recog_data.operand[i] = walk_alter_subreg (recog_data.operand_loc[i]);
2719 for (i = 0; i < recog_data.n_dups; i++)
2721 if (GET_CODE (*recog_data.dup_loc[i]) == SUBREG)
2722 *recog_data.dup_loc[i] = alter_subreg (recog_data.dup_loc[i]);
2723 else if (GET_CODE (*recog_data.dup_loc[i]) == PLUS
2724 || GET_CODE (*recog_data.dup_loc[i]) == MULT
2725 || GET_CODE (*recog_data.dup_loc[i]) == MEM)
2726 *recog_data.dup_loc[i] = walk_alter_subreg (recog_data.dup_loc[i]);
2730 /* If X is a SUBREG, replace it with a REG or a MEM,
2731 based on the thing it is a subreg of. */
2738 rtx y = SUBREG_REG (x);
2740 /* simplify_subreg does not remove subreg from volatile references.
2741 We are required to. */
2742 if (GET_CODE (y) == MEM)
2743 *xp = adjust_address (y, GET_MODE (x), SUBREG_BYTE (x));
2746 rtx new = simplify_subreg (GET_MODE (x), y, GET_MODE (y),
2751 /* Simplify_subreg can't handle some REG cases, but we have to. */
2752 else if (GET_CODE (y) == REG)
2754 unsigned int regno = subreg_hard_regno (x, 1);
2757 ORIGINAL_REGNO (x) = ORIGINAL_REGNO (y);
2758 /* This field has a different meaning for REGs and SUBREGs. Make
2759 sure to clear it! */
2769 /* Do alter_subreg on all the SUBREGs contained in X. */
2772 walk_alter_subreg (xp)
2776 switch (GET_CODE (x))
2780 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0));
2781 XEXP (x, 1) = walk_alter_subreg (&XEXP (x, 1));
2785 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0));
2789 return alter_subreg (xp);
2800 /* Given BODY, the body of a jump instruction, alter the jump condition
2801 as required by the bits that are set in cc_status.flags.
2802 Not all of the bits there can be handled at this level in all cases.
2804 The value is normally 0.
2805 1 means that the condition has become always true.
2806 -1 means that the condition has become always false.
2807 2 means that COND has been altered. */
2815 if (cc_status.flags & CC_REVERSED)
2818 PUT_CODE (cond, swap_condition (GET_CODE (cond)));
2821 if (cc_status.flags & CC_INVERTED)
2824 PUT_CODE (cond, reverse_condition (GET_CODE (cond)));
2827 if (cc_status.flags & CC_NOT_POSITIVE)
2828 switch (GET_CODE (cond))
2833 /* Jump becomes unconditional. */
2839 /* Jump becomes no-op. */
2843 PUT_CODE (cond, EQ);
2848 PUT_CODE (cond, NE);
2856 if (cc_status.flags & CC_NOT_NEGATIVE)
2857 switch (GET_CODE (cond))
2861 /* Jump becomes unconditional. */
2866 /* Jump becomes no-op. */
2871 PUT_CODE (cond, EQ);
2877 PUT_CODE (cond, NE);
2885 if (cc_status.flags & CC_NO_OVERFLOW)
2886 switch (GET_CODE (cond))
2889 /* Jump becomes unconditional. */
2893 PUT_CODE (cond, EQ);
2898 PUT_CODE (cond, NE);
2903 /* Jump becomes no-op. */
2910 if (cc_status.flags & (CC_Z_IN_NOT_N | CC_Z_IN_N))
2911 switch (GET_CODE (cond))
2917 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? GE : LT);
2922 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? LT : GE);
2927 if (cc_status.flags & CC_NOT_SIGNED)
2928 /* The flags are valid if signed condition operators are converted
2930 switch (GET_CODE (cond))
2933 PUT_CODE (cond, LEU);
2938 PUT_CODE (cond, LTU);
2943 PUT_CODE (cond, GTU);
2948 PUT_CODE (cond, GEU);
2960 /* Report inconsistency between the assembler template and the operands.
2961 In an `asm', it's the user's fault; otherwise, the compiler's fault. */
2964 output_operand_lossage VPARAMS ((const char *msgid, ...))
2968 const char *pfx_str;
2969 VA_OPEN (ap, msgid);
2970 VA_FIXEDARG (ap, const char *, msgid);
2972 pfx_str = this_is_asm_operands ? _("invalid `asm': ") : "output_operand: ";
2973 asprintf (&fmt_string, "%s%s", pfx_str, _(msgid));
2974 vasprintf (&new_message, fmt_string, ap);
2976 if (this_is_asm_operands)
2977 error_for_asm (this_is_asm_operands, "%s", new_message);
2979 internal_error ("%s", new_message);
2986 /* Output of assembler code from a template, and its subroutines. */
2988 /* Annotate the assembly with a comment describing the pattern and
2989 alternative used. */
2996 int num = INSN_CODE (debug_insn);
2997 fprintf (asm_out_file, "\t%s %d\t%s",
2998 ASM_COMMENT_START, INSN_UID (debug_insn),
2999 insn_data[num].name);
3000 if (insn_data[num].n_alternatives > 1)
3001 fprintf (asm_out_file, "/%d", which_alternative + 1);
3002 #ifdef HAVE_ATTR_length
3003 fprintf (asm_out_file, "\t[length = %d]",
3004 get_attr_length (debug_insn));
3006 /* Clear this so only the first assembler insn
3007 of any rtl insn will get the special comment for -dp. */
3012 /* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it
3013 or its address, return that expr . Set *PADDRESSP to 1 if the expr
3014 corresponds to the address of the object and 0 if to the object. */
3017 get_mem_expr_from_op (op, paddressp)
3026 if (GET_CODE (op) == REG && ORIGINAL_REGNO (op) >= FIRST_PSEUDO_REGISTER)
3027 return REGNO_DECL (ORIGINAL_REGNO (op));
3028 else if (GET_CODE (op) != MEM)
3031 if (MEM_EXPR (op) != 0)
3032 return MEM_EXPR (op);
3034 /* Otherwise we have an address, so indicate it and look at the address. */
3038 /* First check if we have a decl for the address, then look at the right side
3039 if it is a PLUS. Otherwise, strip off arithmetic and keep looking.
3040 But don't allow the address to itself be indirect. */
3041 if ((expr = get_mem_expr_from_op (op, &inner_addressp)) && ! inner_addressp)
3043 else if (GET_CODE (op) == PLUS
3044 && (expr = get_mem_expr_from_op (XEXP (op, 1), &inner_addressp)))
3047 while (GET_RTX_CLASS (GET_CODE (op)) == '1'
3048 || GET_RTX_CLASS (GET_CODE (op)) == '2')
3051 expr = get_mem_expr_from_op (op, &inner_addressp);
3052 return inner_addressp ? 0 : expr;
3055 /* Output operand names for assembler instructions. OPERANDS is the
3056 operand vector, OPORDER is the order to write the operands, and NOPS
3057 is the number of operands to write. */
3060 output_asm_operand_names (operands, oporder, nops)
3068 for (i = 0; i < nops; i++)
3071 tree expr = get_mem_expr_from_op (operands[oporder[i]], &addressp);
3075 fprintf (asm_out_file, "%c%s %s",
3076 wrote ? ',' : '\t', wrote ? "" : ASM_COMMENT_START,
3077 addressp ? "*" : "");
3078 print_mem_expr (asm_out_file, expr);
3084 /* Output text from TEMPLATE to the assembler output file,
3085 obeying %-directions to substitute operands taken from
3086 the vector OPERANDS.
3088 %N (for N a digit) means print operand N in usual manner.
3089 %lN means require operand N to be a CODE_LABEL or LABEL_REF
3090 and print the label name with no punctuation.
3091 %cN means require operand N to be a constant
3092 and print the constant expression with no punctuation.
3093 %aN means expect operand N to be a memory address
3094 (not a memory reference!) and print a reference
3096 %nN means expect operand N to be a constant
3097 and print a constant expression for minus the value
3098 of the operand, with no other punctuation. */
3101 output_asm_insn (template, operands)
3102 const char *template;
3107 #ifdef ASSEMBLER_DIALECT
3110 int oporder[MAX_RECOG_OPERANDS];
3111 char opoutput[MAX_RECOG_OPERANDS];
3114 /* An insn may return a null string template
3115 in a case where no assembler code is needed. */
3119 memset (opoutput, 0, sizeof opoutput);
3121 putc ('\t', asm_out_file);
3123 #ifdef ASM_OUTPUT_OPCODE
3124 ASM_OUTPUT_OPCODE (asm_out_file, p);
3131 if (flag_verbose_asm)
3132 output_asm_operand_names (operands, oporder, ops);
3133 if (flag_print_asm_name)
3137 memset (opoutput, 0, sizeof opoutput);
3139 putc (c, asm_out_file);
3140 #ifdef ASM_OUTPUT_OPCODE
3141 while ((c = *p) == '\t')
3143 putc (c, asm_out_file);
3146 ASM_OUTPUT_OPCODE (asm_out_file, p);
3150 #ifdef ASSEMBLER_DIALECT
3156 output_operand_lossage ("nested assembly dialect alternatives");
3160 /* If we want the first dialect, do nothing. Otherwise, skip
3161 DIALECT_NUMBER of strings ending with '|'. */
3162 for (i = 0; i < dialect_number; i++)
3164 while (*p && *p != '}' && *p++ != '|')
3173 output_operand_lossage ("unterminated assembly dialect alternative");
3180 /* Skip to close brace. */
3185 output_operand_lossage ("unterminated assembly dialect alternative");
3189 while (*p++ != '}');
3193 putc (c, asm_out_file);
3198 putc (c, asm_out_file);
3204 /* %% outputs a single %. */
3208 putc (c, asm_out_file);
3210 /* %= outputs a number which is unique to each insn in the entire
3211 compilation. This is useful for making local labels that are
3212 referred to more than once in a given insn. */
3216 fprintf (asm_out_file, "%d", insn_counter);
3218 /* % followed by a letter and some digits
3219 outputs an operand in a special way depending on the letter.
3220 Letters `acln' are implemented directly.
3221 Other letters are passed to `output_operand' so that
3222 the PRINT_OPERAND macro can define them. */
3223 else if (ISALPHA (*p))
3229 output_operand_lossage ("operand number missing after %%-letter");
3230 else if (this_is_asm_operands
3231 && (c < 0 || (unsigned int) c >= insn_noperands))
3232 output_operand_lossage ("operand number out of range");
3233 else if (letter == 'l')
3234 output_asm_label (operands[c]);
3235 else if (letter == 'a')
3236 output_address (operands[c]);
3237 else if (letter == 'c')
3239 if (CONSTANT_ADDRESS_P (operands[c]))
3240 output_addr_const (asm_out_file, operands[c]);
3242 output_operand (operands[c], 'c');
3244 else if (letter == 'n')
3246 if (GET_CODE (operands[c]) == CONST_INT)
3247 fprintf (asm_out_file, HOST_WIDE_INT_PRINT_DEC,
3248 - INTVAL (operands[c]));
3251 putc ('-', asm_out_file);
3252 output_addr_const (asm_out_file, operands[c]);
3256 output_operand (operands[c], letter);
3262 while (ISDIGIT (c = *p))
3265 /* % followed by a digit outputs an operand the default way. */
3266 else if (ISDIGIT (*p))
3269 if (this_is_asm_operands
3270 && (c < 0 || (unsigned int) c >= insn_noperands))
3271 output_operand_lossage ("operand number out of range");
3273 output_operand (operands[c], 0);
3279 while (ISDIGIT (c = *p))
3282 /* % followed by punctuation: output something for that
3283 punctuation character alone, with no operand.
3284 The PRINT_OPERAND macro decides what is actually done. */
3285 #ifdef PRINT_OPERAND_PUNCT_VALID_P
3286 else if (PRINT_OPERAND_PUNCT_VALID_P ((unsigned char) *p))
3287 output_operand (NULL_RTX, *p++);
3290 output_operand_lossage ("invalid %%-code");
3294 putc (c, asm_out_file);
3297 /* Write out the variable names for operands, if we know them. */
3298 if (flag_verbose_asm)
3299 output_asm_operand_names (operands, oporder, ops);
3300 if (flag_print_asm_name)
3303 putc ('\n', asm_out_file);
3306 /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
3309 output_asm_label (x)
3314 if (GET_CODE (x) == LABEL_REF)
3316 if (GET_CODE (x) == CODE_LABEL
3317 || (GET_CODE (x) == NOTE
3318 && NOTE_LINE_NUMBER (x) == NOTE_INSN_DELETED_LABEL))
3319 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3321 output_operand_lossage ("`%%l' operand isn't a label");
3323 assemble_name (asm_out_file, buf);
3326 /* Print operand X using machine-dependent assembler syntax.
3327 The macro PRINT_OPERAND is defined just to control this function.
3328 CODE is a non-digit that preceded the operand-number in the % spec,
3329 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
3330 between the % and the digits.
3331 When CODE is a non-letter, X is 0.
3333 The meanings of the letters are machine-dependent and controlled
3334 by PRINT_OPERAND. */
3337 output_operand (x, code)
3339 int code ATTRIBUTE_UNUSED;
3341 if (x && GET_CODE (x) == SUBREG)
3342 x = alter_subreg (&x);
3344 /* If X is a pseudo-register, abort now rather than writing trash to the
3347 if (x && GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER)
3350 PRINT_OPERAND (asm_out_file, x, code);
3353 /* Print a memory reference operand for address X
3354 using machine-dependent assembler syntax.
3355 The macro PRINT_OPERAND_ADDRESS exists just to control this function. */
3361 walk_alter_subreg (&x);
3362 PRINT_OPERAND_ADDRESS (asm_out_file, x);
3365 /* Print an integer constant expression in assembler syntax.
3366 Addition and subtraction are the only arithmetic
3367 that may appear in these expressions. */
3370 output_addr_const (file, x)
3377 switch (GET_CODE (x))
3384 #ifdef ASM_OUTPUT_SYMBOL_REF
3385 ASM_OUTPUT_SYMBOL_REF (file, x);
3387 assemble_name (file, XSTR (x, 0));
3395 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3396 #ifdef ASM_OUTPUT_LABEL_REF
3397 ASM_OUTPUT_LABEL_REF (file, buf);
3399 assemble_name (file, buf);
3404 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x));
3408 /* This used to output parentheses around the expression,
3409 but that does not work on the 386 (either ATT or BSD assembler). */
3410 output_addr_const (file, XEXP (x, 0));
3414 if (GET_MODE (x) == VOIDmode)
3416 /* We can use %d if the number is one word and positive. */
3417 if (CONST_DOUBLE_HIGH (x))
3418 fprintf (file, HOST_WIDE_INT_PRINT_DOUBLE_HEX,
3419 CONST_DOUBLE_HIGH (x), CONST_DOUBLE_LOW (x));
3420 else if (CONST_DOUBLE_LOW (x) < 0)
3421 fprintf (file, HOST_WIDE_INT_PRINT_HEX, CONST_DOUBLE_LOW (x));
3423 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x));
3426 /* We can't handle floating point constants;
3427 PRINT_OPERAND must handle them. */
3428 output_operand_lossage ("floating constant misused");
3432 /* Some assemblers need integer constants to appear last (eg masm). */
3433 if (GET_CODE (XEXP (x, 0)) == CONST_INT)
3435 output_addr_const (file, XEXP (x, 1));
3436 if (INTVAL (XEXP (x, 0)) >= 0)
3437 fprintf (file, "+");
3438 output_addr_const (file, XEXP (x, 0));
3442 output_addr_const (file, XEXP (x, 0));
3443 if (GET_CODE (XEXP (x, 1)) != CONST_INT
3444 || INTVAL (XEXP (x, 1)) >= 0)
3445 fprintf (file, "+");
3446 output_addr_const (file, XEXP (x, 1));
3451 /* Avoid outputting things like x-x or x+5-x,
3452 since some assemblers can't handle that. */
3453 x = simplify_subtraction (x);
3454 if (GET_CODE (x) != MINUS)
3457 output_addr_const (file, XEXP (x, 0));
3458 fprintf (file, "-");
3459 if ((GET_CODE (XEXP (x, 1)) == CONST_INT && INTVAL (XEXP (x, 1)) >= 0)
3460 || GET_CODE (XEXP (x, 1)) == PC
3461 || GET_CODE (XEXP (x, 1)) == SYMBOL_REF)
3462 output_addr_const (file, XEXP (x, 1));
3465 fputs (targetm.asm_out.open_paren, file);
3466 output_addr_const (file, XEXP (x, 1));
3467 fputs (targetm.asm_out.close_paren, file);
3474 output_addr_const (file, XEXP (x, 0));
3478 #ifdef OUTPUT_ADDR_CONST_EXTRA
3479 OUTPUT_ADDR_CONST_EXTRA (file, x, fail);
3484 output_operand_lossage ("invalid expression as operand");
3488 /* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
3489 %R prints the value of REGISTER_PREFIX.
3490 %L prints the value of LOCAL_LABEL_PREFIX.
3491 %U prints the value of USER_LABEL_PREFIX.
3492 %I prints the value of IMMEDIATE_PREFIX.
3493 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
3494 Also supported are %d, %x, %s, %e, %f, %g and %%.
3496 We handle alternate assembler dialects here, just like output_asm_insn. */
3499 asm_fprintf VPARAMS ((FILE *file, const char *p, ...))
3504 VA_OPEN (argptr, p);
3505 VA_FIXEDARG (argptr, FILE *, file);
3506 VA_FIXEDARG (argptr, const char *, p);
3513 #ifdef ASSEMBLER_DIALECT
3518 /* If we want the first dialect, do nothing. Otherwise, skip
3519 DIALECT_NUMBER of strings ending with '|'. */
3520 for (i = 0; i < dialect_number; i++)
3522 while (*p && *p++ != '|')
3532 /* Skip to close brace. */
3533 while (*p && *p++ != '}')
3544 while (ISDIGIT (c) || c == '.')
3552 fprintf (file, "%%");
3555 case 'd': case 'i': case 'u':
3556 case 'x': case 'p': case 'X':
3560 fprintf (file, buf, va_arg (argptr, int));
3564 /* This is a prefix to the 'd', 'i', 'u', 'x', 'p', and 'X' cases,
3565 but we do not check for those cases. It means that the value
3566 is a HOST_WIDE_INT, which may be either `int' or `long'. */
3568 #if HOST_BITS_PER_WIDE_INT == HOST_BITS_PER_INT
3570 #if HOST_BITS_PER_WIDE_INT == HOST_BITS_PER_LONG
3580 fprintf (file, buf, va_arg (argptr, HOST_WIDE_INT));
3587 fprintf (file, buf, va_arg (argptr, long));
3595 fprintf (file, buf, va_arg (argptr, double));
3601 fprintf (file, buf, va_arg (argptr, char *));
3605 #ifdef ASM_OUTPUT_OPCODE
3606 ASM_OUTPUT_OPCODE (asm_out_file, p);
3611 #ifdef REGISTER_PREFIX
3612 fprintf (file, "%s", REGISTER_PREFIX);
3617 #ifdef IMMEDIATE_PREFIX
3618 fprintf (file, "%s", IMMEDIATE_PREFIX);
3623 #ifdef LOCAL_LABEL_PREFIX
3624 fprintf (file, "%s", LOCAL_LABEL_PREFIX);
3629 fputs (user_label_prefix, file);
3632 #ifdef ASM_FPRINTF_EXTENSIONS
3633 /* Upper case letters are reserved for general use by asm_fprintf
3634 and so are not available to target specific code. In order to
3635 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then,
3636 they are defined here. As they get turned into real extensions
3637 to asm_fprintf they should be removed from this list. */
3638 case 'A': case 'B': case 'C': case 'D': case 'E':
3639 case 'F': case 'G': case 'H': case 'J': case 'K':
3640 case 'M': case 'N': case 'P': case 'Q': case 'S':
3641 case 'T': case 'V': case 'W': case 'Y': case 'Z':
3644 ASM_FPRINTF_EXTENSIONS (file, argptr, p)
3657 /* Split up a CONST_DOUBLE or integer constant rtx
3658 into two rtx's for single words,
3659 storing in *FIRST the word that comes first in memory in the target
3660 and in *SECOND the other. */
3663 split_double (value, first, second)
3665 rtx *first, *second;
3667 if (GET_CODE (value) == CONST_INT)
3669 if (HOST_BITS_PER_WIDE_INT >= (2 * BITS_PER_WORD))
3671 /* In this case the CONST_INT holds both target words.
3672 Extract the bits from it into two word-sized pieces.
3673 Sign extend each half to HOST_WIDE_INT. */
3674 unsigned HOST_WIDE_INT low, high;
3675 unsigned HOST_WIDE_INT mask, sign_bit, sign_extend;
3677 /* Set sign_bit to the most significant bit of a word. */
3679 sign_bit <<= BITS_PER_WORD - 1;
3681 /* Set mask so that all bits of the word are set. We could
3682 have used 1 << BITS_PER_WORD instead of basing the
3683 calculation on sign_bit. However, on machines where
3684 HOST_BITS_PER_WIDE_INT == BITS_PER_WORD, it could cause a
3685 compiler warning, even though the code would never be
3687 mask = sign_bit << 1;
3690 /* Set sign_extend as any remaining bits. */
3691 sign_extend = ~mask;
3693 /* Pick the lower word and sign-extend it. */
3694 low = INTVAL (value);
3699 /* Pick the higher word, shifted to the least significant
3700 bits, and sign-extend it. */
3701 high = INTVAL (value);
3702 high >>= BITS_PER_WORD - 1;
3705 if (high & sign_bit)
3706 high |= sign_extend;
3708 /* Store the words in the target machine order. */
3709 if (WORDS_BIG_ENDIAN)
3711 *first = GEN_INT (high);
3712 *second = GEN_INT (low);
3716 *first = GEN_INT (low);
3717 *second = GEN_INT (high);
3722 /* The rule for using CONST_INT for a wider mode
3723 is that we regard the value as signed.
3724 So sign-extend it. */
3725 rtx high = (INTVAL (value) < 0 ? constm1_rtx : const0_rtx);
3726 if (WORDS_BIG_ENDIAN)
3738 else if (GET_CODE (value) != CONST_DOUBLE)
3740 if (WORDS_BIG_ENDIAN)
3742 *first = const0_rtx;
3748 *second = const0_rtx;
3751 else if (GET_MODE (value) == VOIDmode
3752 /* This is the old way we did CONST_DOUBLE integers. */
3753 || GET_MODE_CLASS (GET_MODE (value)) == MODE_INT)
3755 /* In an integer, the words are defined as most and least significant.
3756 So order them by the target's convention. */
3757 if (WORDS_BIG_ENDIAN)
3759 *first = GEN_INT (CONST_DOUBLE_HIGH (value));
3760 *second = GEN_INT (CONST_DOUBLE_LOW (value));
3764 *first = GEN_INT (CONST_DOUBLE_LOW (value));
3765 *second = GEN_INT (CONST_DOUBLE_HIGH (value));
3770 #ifdef REAL_ARITHMETIC
3773 REAL_VALUE_FROM_CONST_DOUBLE (r, value);
3775 /* Note, this converts the REAL_VALUE_TYPE to the target's
3776 format, splits up the floating point double and outputs
3777 exactly 32 bits of it into each of l[0] and l[1] --
3778 not necessarily BITS_PER_WORD bits. */
3779 REAL_VALUE_TO_TARGET_DOUBLE (r, l);
3781 /* If 32 bits is an entire word for the target, but not for the host,
3782 then sign-extend on the host so that the number will look the same
3783 way on the host that it would on the target. See for instance
3784 simplify_unary_operation. The #if is needed to avoid compiler
3787 #if HOST_BITS_PER_LONG > 32
3788 if (BITS_PER_WORD < HOST_BITS_PER_LONG && BITS_PER_WORD == 32)
3790 if (l[0] & ((long) 1 << 31))
3791 l[0] |= ((long) (-1) << 32);
3792 if (l[1] & ((long) 1 << 31))
3793 l[1] |= ((long) (-1) << 32);
3797 *first = GEN_INT ((HOST_WIDE_INT) l[0]);
3798 *second = GEN_INT ((HOST_WIDE_INT) l[1]);
3800 if ((HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT
3801 || HOST_BITS_PER_WIDE_INT != BITS_PER_WORD)
3802 && ! flag_pretend_float)
3806 #ifdef HOST_WORDS_BIG_ENDIAN
3813 /* Host and target agree => no need to swap. */
3814 *first = GEN_INT (CONST_DOUBLE_LOW (value));
3815 *second = GEN_INT (CONST_DOUBLE_HIGH (value));
3819 *second = GEN_INT (CONST_DOUBLE_LOW (value));
3820 *first = GEN_INT (CONST_DOUBLE_HIGH (value));
3822 #endif /* no REAL_ARITHMETIC */
3826 /* Return nonzero if this function has no function calls. */
3834 if (current_function_profile || profile_arc_flag)
3837 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
3839 if (GET_CODE (insn) == CALL_INSN
3840 && ! SIBLING_CALL_P (insn))
3842 if (GET_CODE (insn) == INSN
3843 && GET_CODE (PATTERN (insn)) == SEQUENCE
3844 && GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == CALL_INSN
3845 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0)))
3848 for (link = current_function_epilogue_delay_list;
3850 link = XEXP (link, 1))
3852 insn = XEXP (link, 0);
3854 if (GET_CODE (insn) == CALL_INSN
3855 && ! SIBLING_CALL_P (insn))
3857 if (GET_CODE (insn) == INSN
3858 && GET_CODE (PATTERN (insn)) == SEQUENCE
3859 && GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == CALL_INSN
3860 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0)))
3867 /* Return 1 if branch is an forward branch.
3868 Uses insn_shuid array, so it works only in the final pass. May be used by
3869 output templates to customary add branch prediction hints.
3872 final_forward_branch_p (insn)
3875 int insn_id, label_id;
3878 insn_id = INSN_SHUID (insn);
3879 label_id = INSN_SHUID (JUMP_LABEL (insn));
3880 /* We've hit some insns that does not have id information available. */
3881 if (!insn_id || !label_id)
3883 return insn_id < label_id;
3886 /* On some machines, a function with no call insns
3887 can run faster if it doesn't create its own register window.
3888 When output, the leaf function should use only the "output"
3889 registers. Ordinarily, the function would be compiled to use
3890 the "input" registers to find its arguments; it is a candidate
3891 for leaf treatment if it uses only the "input" registers.
3892 Leaf function treatment means renumbering so the function
3893 uses the "output" registers instead. */
3895 #ifdef LEAF_REGISTERS
3897 /* Return 1 if this function uses only the registers that can be
3898 safely renumbered. */
3901 only_leaf_regs_used ()
3904 char *permitted_reg_in_leaf_functions = LEAF_REGISTERS;
3906 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
3907 if ((regs_ever_live[i] || global_regs[i])
3908 && ! permitted_reg_in_leaf_functions[i])
3911 if (current_function_uses_pic_offset_table
3912 && pic_offset_table_rtx != 0
3913 && GET_CODE (pic_offset_table_rtx) == REG
3914 && ! permitted_reg_in_leaf_functions[REGNO (pic_offset_table_rtx)])
3920 /* Scan all instructions and renumber all registers into those
3921 available in leaf functions. */
3924 leaf_renumber_regs (first)
3929 /* Renumber only the actual patterns.
3930 The reg-notes can contain frame pointer refs,
3931 and renumbering them could crash, and should not be needed. */
3932 for (insn = first; insn; insn = NEXT_INSN (insn))
3934 leaf_renumber_regs_insn (PATTERN (insn));
3935 for (insn = current_function_epilogue_delay_list;
3937 insn = XEXP (insn, 1))
3938 if (INSN_P (XEXP (insn, 0)))
3939 leaf_renumber_regs_insn (PATTERN (XEXP (insn, 0)));
3942 /* Scan IN_RTX and its subexpressions, and renumber all regs into those
3943 available in leaf functions. */
3946 leaf_renumber_regs_insn (in_rtx)
3950 const char *format_ptr;
3955 /* Renumber all input-registers into output-registers.
3956 renumbered_regs would be 1 for an output-register;
3959 if (GET_CODE (in_rtx) == REG)
3963 /* Don't renumber the same reg twice. */
3967 newreg = REGNO (in_rtx);
3968 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg
3969 to reach here as part of a REG_NOTE. */
3970 if (newreg >= FIRST_PSEUDO_REGISTER)
3975 newreg = LEAF_REG_REMAP (newreg);
3978 regs_ever_live[REGNO (in_rtx)] = 0;
3979 regs_ever_live[newreg] = 1;
3980 REGNO (in_rtx) = newreg;
3984 if (INSN_P (in_rtx))
3986 /* Inside a SEQUENCE, we find insns.
3987 Renumber just the patterns of these insns,
3988 just as we do for the top-level insns. */
3989 leaf_renumber_regs_insn (PATTERN (in_rtx));
3993 format_ptr = GET_RTX_FORMAT (GET_CODE (in_rtx));
3995 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (in_rtx)); i++)
3996 switch (*format_ptr++)
3999 leaf_renumber_regs_insn (XEXP (in_rtx, i));
4003 if (NULL != XVEC (in_rtx, i))
4005 for (j = 0; j < XVECLEN (in_rtx, i); j++)
4006 leaf_renumber_regs_insn (XVECEXP (in_rtx, i, j));