1 /* Perform various loop optimizations, including strength reduction.
2 Copyright (C) 1987, 1988, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
22 /* This is the loop optimization pass of the compiler.
23 It finds invariant computations within loops and moves them
24 to the beginning of the loop. Then it identifies basic and
25 general induction variables. Strength reduction is applied to the general
26 induction variables, and induction variable elimination is applied to
27 the basic induction variables.
29 It also finds cases where
30 a register is set within the loop by zero-extending a narrower value
31 and changes these to zero the entire register once before the loop
32 and merely copy the low part within the loop.
34 Most of the complexity is in heuristics to decide when it is worth
35 while to do these things. */
44 #include "hard-reg-set.h"
45 #include "basic-block.h"
46 #include "insn-config.h"
56 #include "insn-flags.h"
59 /* Not really meaningful values, but at least something. */
60 #ifndef SIMULTANEOUS_PREFETCHES
61 #define SIMULTANEOUS_PREFETCHES 3
63 #ifndef PREFETCH_BLOCK
64 #define PREFETCH_BLOCK 32
67 #define HAVE_prefetch 0
68 #define CODE_FOR_prefetch 0
69 #define gen_prefetch(a,b,c) (abort(), NULL_RTX)
72 /* Give up the prefetch optimizations once we exceed a given threshhold.
73 It is unlikely that we would be able to optimize something in a loop
74 with so many detected prefetches. */
75 #define MAX_PREFETCHES 100
76 /* The number of prefetch blocks that are beneficial to fetch at once before
77 a loop with a known (and low) iteration count. */
78 #define PREFETCH_BLOCKS_BEFORE_LOOP_MAX 6
79 /* For very tiny loops it is not worthwhile to prefetch even before the loop,
80 since it is likely that the data are already in the cache. */
81 #define PREFETCH_BLOCKS_BEFORE_LOOP_MIN 2
82 /* The minimal number of prefetch blocks that a loop must consume to make
83 the emitting of prefetch instruction in the body of loop worthwhile. */
84 #define PREFETCH_BLOCKS_IN_LOOP_MIN 6
86 /* Parameterize some prefetch heuristics so they can be turned on and off
87 easily for performance testing on new architecures. These can be
88 defined in target-dependent files. */
90 /* Prefetch is worthwhile only when loads/stores are dense. */
91 #ifndef PREFETCH_ONLY_DENSE_MEM
92 #define PREFETCH_ONLY_DENSE_MEM 1
95 /* Define what we mean by "dense" loads and stores; This value divided by 256
96 is the minimum percentage of memory references that worth prefetching. */
97 #ifndef PREFETCH_DENSE_MEM
98 #define PREFETCH_DENSE_MEM 220
101 /* Do not prefetch for a loop whose iteration count is known to be low. */
102 #ifndef PREFETCH_NO_LOW_LOOPCNT
103 #define PREFETCH_NO_LOW_LOOPCNT 1
106 /* Define what we mean by a "low" iteration count. */
107 #ifndef PREFETCH_LOW_LOOPCNT
108 #define PREFETCH_LOW_LOOPCNT 32
111 /* Do not prefetch for a loop that contains a function call; such a loop is
112 probably not an internal loop. */
113 #ifndef PREFETCH_NO_CALL
114 #define PREFETCH_NO_CALL 1
117 /* Do not prefetch accesses with an extreme stride. */
118 #ifndef PREFETCH_NO_EXTREME_STRIDE
119 #define PREFETCH_NO_EXTREME_STRIDE 1
122 /* Define what we mean by an "extreme" stride. */
123 #ifndef PREFETCH_EXTREME_STRIDE
124 #define PREFETCH_EXTREME_STRIDE 4096
127 /* Do not handle reversed order prefetches (negative stride). */
128 #ifndef PREFETCH_NO_REVERSE_ORDER
129 #define PREFETCH_NO_REVERSE_ORDER 1
132 /* Prefetch even if the GIV is not always executed. */
133 #ifndef PREFETCH_NOT_ALWAYS
134 #define PREFETCH_NOT_ALWAYS 0
137 /* If the loop requires more prefetches than the target can process in
138 parallel then don't prefetch anything in that loop. */
139 #ifndef PREFETCH_LIMIT_TO_SIMULTANEOUS
140 #define PREFETCH_LIMIT_TO_SIMULTANEOUS 1
143 #define LOOP_REG_LIFETIME(LOOP, REGNO) \
144 ((REGNO_LAST_LUID (REGNO) - REGNO_FIRST_LUID (REGNO)))
146 #define LOOP_REG_GLOBAL_P(LOOP, REGNO) \
147 ((REGNO_LAST_LUID (REGNO) > INSN_LUID ((LOOP)->end) \
148 || REGNO_FIRST_LUID (REGNO) < INSN_LUID ((LOOP)->start)))
150 #define LOOP_REGNO_NREGS(REGNO, SET_DEST) \
151 ((REGNO) < FIRST_PSEUDO_REGISTER \
152 ? HARD_REGNO_NREGS ((REGNO), GET_MODE (SET_DEST)) : 1)
155 /* Vector mapping INSN_UIDs to luids.
156 The luids are like uids but increase monotonically always.
157 We use them to see whether a jump comes from outside a given loop. */
161 /* Indexed by INSN_UID, contains the ordinal giving the (innermost) loop
162 number the insn is contained in. */
164 struct loop **uid_loop;
166 /* 1 + largest uid of any insn. */
168 int max_uid_for_loop;
170 /* 1 + luid of last insn. */
174 /* Number of loops detected in current function. Used as index to the
177 static int max_loop_num;
179 /* Bound on pseudo register number before loop optimization.
180 A pseudo has valid regscan info if its number is < max_reg_before_loop. */
181 unsigned int max_reg_before_loop;
183 /* The value to pass to the next call of reg_scan_update. */
184 static int loop_max_reg;
186 #define obstack_chunk_alloc xmalloc
187 #define obstack_chunk_free free
189 /* During the analysis of a loop, a chain of `struct movable's
190 is made to record all the movable insns found.
191 Then the entire chain can be scanned to decide which to move. */
195 rtx insn; /* A movable insn */
196 rtx set_src; /* The expression this reg is set from. */
197 rtx set_dest; /* The destination of this SET. */
198 rtx dependencies; /* When INSN is libcall, this is an EXPR_LIST
199 of any registers used within the LIBCALL. */
200 int consec; /* Number of consecutive following insns
201 that must be moved with this one. */
202 unsigned int regno; /* The register it sets */
203 short lifetime; /* lifetime of that register;
204 may be adjusted when matching movables
205 that load the same value are found. */
206 short savings; /* Number of insns we can move for this reg,
207 including other movables that force this
208 or match this one. */
209 unsigned int cond : 1; /* 1 if only conditionally movable */
210 unsigned int force : 1; /* 1 means MUST move this insn */
211 unsigned int global : 1; /* 1 means reg is live outside this loop */
212 /* If PARTIAL is 1, GLOBAL means something different:
213 that the reg is live outside the range from where it is set
214 to the following label. */
215 unsigned int done : 1; /* 1 inhibits further processing of this */
217 unsigned int partial : 1; /* 1 means this reg is used for zero-extending.
218 In particular, moving it does not make it
220 unsigned int move_insn : 1; /* 1 means that we call emit_move_insn to
221 load SRC, rather than copying INSN. */
222 unsigned int move_insn_first:1;/* Same as above, if this is necessary for the
223 first insn of a consecutive sets group. */
224 unsigned int is_equiv : 1; /* 1 means a REG_EQUIV is present on INSN. */
225 enum machine_mode savemode; /* Nonzero means it is a mode for a low part
226 that we should avoid changing when clearing
227 the rest of the reg. */
228 struct movable *match; /* First entry for same value */
229 struct movable *forces; /* An insn that must be moved if this is */
230 struct movable *next;
234 FILE *loop_dump_stream;
236 /* Forward declarations. */
238 static void invalidate_loops_containing_label PARAMS ((rtx));
239 static void find_and_verify_loops PARAMS ((rtx, struct loops *));
240 static void mark_loop_jump PARAMS ((rtx, struct loop *));
241 static void prescan_loop PARAMS ((struct loop *));
242 static int reg_in_basic_block_p PARAMS ((rtx, rtx));
243 static int consec_sets_invariant_p PARAMS ((const struct loop *,
245 static int labels_in_range_p PARAMS ((rtx, int));
246 static void count_one_set PARAMS ((struct loop_regs *, rtx, rtx, rtx *));
247 static void note_addr_stored PARAMS ((rtx, rtx, void *));
248 static void note_set_pseudo_multiple_uses PARAMS ((rtx, rtx, void *));
249 static int loop_reg_used_before_p PARAMS ((const struct loop *, rtx, rtx));
250 static void scan_loop PARAMS ((struct loop*, int));
252 static void replace_call_address PARAMS ((rtx, rtx, rtx));
254 static rtx skip_consec_insns PARAMS ((rtx, int));
255 static int libcall_benefit PARAMS ((rtx));
256 static void ignore_some_movables PARAMS ((struct loop_movables *));
257 static void force_movables PARAMS ((struct loop_movables *));
258 static void combine_movables PARAMS ((struct loop_movables *,
259 struct loop_regs *));
260 static int num_unmoved_movables PARAMS ((const struct loop *));
261 static int regs_match_p PARAMS ((rtx, rtx, struct loop_movables *));
262 static int rtx_equal_for_loop_p PARAMS ((rtx, rtx, struct loop_movables *,
263 struct loop_regs *));
264 static void add_label_notes PARAMS ((rtx, rtx));
265 static void move_movables PARAMS ((struct loop *loop, struct loop_movables *,
267 static void loop_movables_add PARAMS((struct loop_movables *,
269 static void loop_movables_free PARAMS((struct loop_movables *));
270 static int count_nonfixed_reads PARAMS ((const struct loop *, rtx));
271 static void loop_bivs_find PARAMS((struct loop *));
272 static void loop_bivs_init_find PARAMS((struct loop *));
273 static void loop_bivs_check PARAMS((struct loop *));
274 static void loop_givs_find PARAMS((struct loop *));
275 static void loop_givs_check PARAMS((struct loop *));
276 static int loop_biv_eliminable_p PARAMS((struct loop *, struct iv_class *,
278 static int loop_giv_reduce_benefit PARAMS((struct loop *, struct iv_class *,
279 struct induction *, rtx));
280 static void loop_givs_dead_check PARAMS((struct loop *, struct iv_class *));
281 static void loop_givs_reduce PARAMS((struct loop *, struct iv_class *));
282 static void loop_givs_rescan PARAMS((struct loop *, struct iv_class *,
284 static void loop_ivs_free PARAMS((struct loop *));
285 static void strength_reduce PARAMS ((struct loop *, int));
286 static void find_single_use_in_loop PARAMS ((struct loop_regs *, rtx, rtx));
287 static int valid_initial_value_p PARAMS ((rtx, rtx, int, rtx));
288 static void find_mem_givs PARAMS ((const struct loop *, rtx, rtx, int, int));
289 static void record_biv PARAMS ((struct loop *, struct induction *,
290 rtx, rtx, rtx, rtx, rtx *,
292 static void check_final_value PARAMS ((const struct loop *,
293 struct induction *));
294 static void loop_ivs_dump PARAMS((const struct loop *, FILE *, int));
295 static void loop_iv_class_dump PARAMS((const struct iv_class *, FILE *, int));
296 static void loop_biv_dump PARAMS((const struct induction *, FILE *, int));
297 static void loop_giv_dump PARAMS((const struct induction *, FILE *, int));
298 static void record_giv PARAMS ((const struct loop *, struct induction *,
299 rtx, rtx, rtx, rtx, rtx, rtx, int,
300 enum g_types, int, int, rtx *));
301 static void update_giv_derive PARAMS ((const struct loop *, rtx));
302 static void check_ext_dependent_givs PARAMS ((struct iv_class *,
303 struct loop_info *));
304 static int basic_induction_var PARAMS ((const struct loop *, rtx,
305 enum machine_mode, rtx, rtx,
306 rtx *, rtx *, rtx **));
307 static rtx simplify_giv_expr PARAMS ((const struct loop *, rtx, rtx *, int *));
308 static int general_induction_var PARAMS ((const struct loop *loop, rtx, rtx *,
309 rtx *, rtx *, rtx *, int, int *,
311 static int consec_sets_giv PARAMS ((const struct loop *, int, rtx,
312 rtx, rtx, rtx *, rtx *, rtx *, rtx *));
313 static int check_dbra_loop PARAMS ((struct loop *, int));
314 static rtx express_from_1 PARAMS ((rtx, rtx, rtx));
315 static rtx combine_givs_p PARAMS ((struct induction *, struct induction *));
316 static int cmp_combine_givs_stats PARAMS ((const PTR, const PTR));
317 static void combine_givs PARAMS ((struct loop_regs *, struct iv_class *));
318 static int product_cheap_p PARAMS ((rtx, rtx));
319 static int maybe_eliminate_biv PARAMS ((const struct loop *, struct iv_class *,
321 static int maybe_eliminate_biv_1 PARAMS ((const struct loop *, rtx, rtx,
322 struct iv_class *, int,
324 static int last_use_this_basic_block PARAMS ((rtx, rtx));
325 static void record_initial PARAMS ((rtx, rtx, void *));
326 static void update_reg_last_use PARAMS ((rtx, rtx));
327 static rtx next_insn_in_loop PARAMS ((const struct loop *, rtx));
328 static void loop_regs_scan PARAMS ((const struct loop *, int));
329 static int count_insns_in_loop PARAMS ((const struct loop *));
330 static void load_mems PARAMS ((const struct loop *));
331 static int insert_loop_mem PARAMS ((rtx *, void *));
332 static int replace_loop_mem PARAMS ((rtx *, void *));
333 static void replace_loop_mems PARAMS ((rtx, rtx, rtx));
334 static int replace_loop_reg PARAMS ((rtx *, void *));
335 static void replace_loop_regs PARAMS ((rtx insn, rtx, rtx));
336 static void note_reg_stored PARAMS ((rtx, rtx, void *));
337 static void try_copy_prop PARAMS ((const struct loop *, rtx, unsigned int));
338 static void try_swap_copy_prop PARAMS ((const struct loop *, rtx,
340 static int replace_label PARAMS ((rtx *, void *));
341 static rtx check_insn_for_givs PARAMS((struct loop *, rtx, int, int));
342 static rtx check_insn_for_bivs PARAMS((struct loop *, rtx, int, int));
343 static rtx gen_add_mult PARAMS ((rtx, rtx, rtx, rtx));
344 static void loop_regs_update PARAMS ((const struct loop *, rtx));
345 static int iv_add_mult_cost PARAMS ((rtx, rtx, rtx, rtx));
347 static rtx loop_insn_emit_after PARAMS((const struct loop *, basic_block,
349 static rtx loop_call_insn_emit_before PARAMS((const struct loop *,
350 basic_block, rtx, rtx));
351 static rtx loop_call_insn_hoist PARAMS((const struct loop *, rtx));
352 static rtx loop_insn_sink_or_swim PARAMS((const struct loop *, rtx));
354 static void loop_dump_aux PARAMS ((const struct loop *, FILE *, int));
355 static void loop_delete_insns PARAMS ((rtx, rtx));
356 static HOST_WIDE_INT remove_constant_addition PARAMS ((rtx *));
357 void debug_ivs PARAMS ((const struct loop *));
358 void debug_iv_class PARAMS ((const struct iv_class *));
359 void debug_biv PARAMS ((const struct induction *));
360 void debug_giv PARAMS ((const struct induction *));
361 void debug_loop PARAMS ((const struct loop *));
362 void debug_loops PARAMS ((const struct loops *));
364 typedef struct rtx_pair
370 typedef struct loop_replace_args
377 /* Nonzero iff INSN is between START and END, inclusive. */
378 #define INSN_IN_RANGE_P(INSN, START, END) \
379 (INSN_UID (INSN) < max_uid_for_loop \
380 && INSN_LUID (INSN) >= INSN_LUID (START) \
381 && INSN_LUID (INSN) <= INSN_LUID (END))
383 /* Indirect_jump_in_function is computed once per function. */
384 static int indirect_jump_in_function;
385 static int indirect_jump_in_function_p PARAMS ((rtx));
387 static int compute_luids PARAMS ((rtx, rtx, int));
389 static int biv_elimination_giv_has_0_offset PARAMS ((struct induction *,
393 /* Benefit penalty, if a giv is not replaceable, i.e. must emit an insn to
394 copy the value of the strength reduced giv to its original register. */
395 static int copy_cost;
397 /* Cost of using a register, to normalize the benefits of a giv. */
398 static int reg_address_cost;
403 rtx reg = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 1);
405 reg_address_cost = address_cost (reg, SImode);
407 copy_cost = COSTS_N_INSNS (1);
410 /* Compute the mapping from uids to luids.
411 LUIDs are numbers assigned to insns, like uids,
412 except that luids increase monotonically through the code.
413 Start at insn START and stop just before END. Assign LUIDs
414 starting with PREV_LUID + 1. Return the last assigned LUID + 1. */
416 compute_luids (start, end, prev_luid)
423 for (insn = start, i = prev_luid; insn != end; insn = NEXT_INSN (insn))
425 if (INSN_UID (insn) >= max_uid_for_loop)
427 /* Don't assign luids to line-number NOTEs, so that the distance in
428 luids between two insns is not affected by -g. */
429 if (GET_CODE (insn) != NOTE
430 || NOTE_LINE_NUMBER (insn) <= 0)
431 uid_luid[INSN_UID (insn)] = ++i;
433 /* Give a line number note the same luid as preceding insn. */
434 uid_luid[INSN_UID (insn)] = i;
439 /* Entry point of this file. Perform loop optimization
440 on the current function. F is the first insn of the function
441 and DUMPFILE is a stream for output of a trace of actions taken
442 (or 0 if none should be output). */
445 loop_optimize (f, dumpfile, flags)
446 /* f is the first instruction of a chain of insns for one function */
453 struct loops loops_data;
454 struct loops *loops = &loops_data;
455 struct loop_info *loops_info;
457 loop_dump_stream = dumpfile;
459 init_recog_no_volatile ();
461 max_reg_before_loop = max_reg_num ();
462 loop_max_reg = max_reg_before_loop;
466 /* Count the number of loops. */
469 for (insn = f; insn; insn = NEXT_INSN (insn))
471 if (GET_CODE (insn) == NOTE
472 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
476 /* Don't waste time if no loops. */
477 if (max_loop_num == 0)
480 loops->num = max_loop_num;
482 /* Get size to use for tables indexed by uids.
483 Leave some space for labels allocated by find_and_verify_loops. */
484 max_uid_for_loop = get_max_uid () + 1 + max_loop_num * 32;
486 uid_luid = (int *) xcalloc (max_uid_for_loop, sizeof (int));
487 uid_loop = (struct loop **) xcalloc (max_uid_for_loop,
488 sizeof (struct loop *));
490 /* Allocate storage for array of loops. */
491 loops->array = (struct loop *)
492 xcalloc (loops->num, sizeof (struct loop));
494 /* Find and process each loop.
495 First, find them, and record them in order of their beginnings. */
496 find_and_verify_loops (f, loops);
498 /* Allocate and initialize auxiliary loop information. */
499 loops_info = xcalloc (loops->num, sizeof (struct loop_info));
500 for (i = 0; i < loops->num; i++)
501 loops->array[i].aux = loops_info + i;
503 /* Now find all register lifetimes. This must be done after
504 find_and_verify_loops, because it might reorder the insns in the
506 reg_scan (f, max_reg_before_loop, 1);
508 /* This must occur after reg_scan so that registers created by gcse
509 will have entries in the register tables.
511 We could have added a call to reg_scan after gcse_main in toplev.c,
512 but moving this call to init_alias_analysis is more efficient. */
513 init_alias_analysis ();
515 /* See if we went too far. Note that get_max_uid already returns
516 one more that the maximum uid of all insn. */
517 if (get_max_uid () > max_uid_for_loop)
519 /* Now reset it to the actual size we need. See above. */
520 max_uid_for_loop = get_max_uid ();
522 /* find_and_verify_loops has already called compute_luids, but it
523 might have rearranged code afterwards, so we need to recompute
525 max_luid = compute_luids (f, NULL_RTX, 0);
527 /* Don't leave gaps in uid_luid for insns that have been
528 deleted. It is possible that the first or last insn
529 using some register has been deleted by cross-jumping.
530 Make sure that uid_luid for that former insn's uid
531 points to the general area where that insn used to be. */
532 for (i = 0; i < max_uid_for_loop; i++)
534 uid_luid[0] = uid_luid[i];
535 if (uid_luid[0] != 0)
538 for (i = 0; i < max_uid_for_loop; i++)
539 if (uid_luid[i] == 0)
540 uid_luid[i] = uid_luid[i - 1];
542 /* Determine if the function has indirect jump. On some systems
543 this prevents low overhead loop instructions from being used. */
544 indirect_jump_in_function = indirect_jump_in_function_p (f);
546 /* Now scan the loops, last ones first, since this means inner ones are done
547 before outer ones. */
548 for (i = max_loop_num - 1; i >= 0; i--)
550 struct loop *loop = &loops->array[i];
552 if (! loop->invalid && loop->end)
553 scan_loop (loop, flags);
556 /* If there were lexical blocks inside the loop, they have been
557 replicated. We will now have more than one NOTE_INSN_BLOCK_BEG
558 and NOTE_INSN_BLOCK_END for each such block. We must duplicate
559 the BLOCKs as well. */
560 if (write_symbols != NO_DEBUG)
563 end_alias_analysis ();
572 /* Returns the next insn, in execution order, after INSN. START and
573 END are the NOTE_INSN_LOOP_BEG and NOTE_INSN_LOOP_END for the loop,
574 respectively. LOOP->TOP, if non-NULL, is the top of the loop in the
575 insn-stream; it is used with loops that are entered near the
579 next_insn_in_loop (loop, insn)
580 const struct loop *loop;
583 insn = NEXT_INSN (insn);
585 if (insn == loop->end)
588 /* Go to the top of the loop, and continue there. */
595 if (insn == loop->scan_start)
602 /* Optimize one loop described by LOOP. */
604 /* ??? Could also move memory writes out of loops if the destination address
605 is invariant, the source is invariant, the memory write is not volatile,
606 and if we can prove that no read inside the loop can read this address
607 before the write occurs. If there is a read of this address after the
608 write, then we can also mark the memory read as invariant. */
611 scan_loop (loop, flags)
615 struct loop_info *loop_info = LOOP_INFO (loop);
616 struct loop_regs *regs = LOOP_REGS (loop);
618 rtx loop_start = loop->start;
619 rtx loop_end = loop->end;
621 /* 1 if we are scanning insns that could be executed zero times. */
623 /* 1 if we are scanning insns that might never be executed
624 due to a subroutine call which might exit before they are reached. */
626 /* Jump insn that enters the loop, or 0 if control drops in. */
627 rtx loop_entry_jump = 0;
628 /* Number of insns in the loop. */
631 rtx temp, update_start, update_end;
632 /* The SET from an insn, if it is the only SET in the insn. */
634 /* Chain describing insns movable in current loop. */
635 struct loop_movables *movables = LOOP_MOVABLES (loop);
636 /* Ratio of extra register life span we can justify
637 for saving an instruction. More if loop doesn't call subroutines
638 since in that case saving an insn makes more difference
639 and more registers are available. */
641 /* Nonzero if we are scanning instructions in a sub-loop. */
649 /* Determine whether this loop starts with a jump down to a test at
650 the end. This will occur for a small number of loops with a test
651 that is too complex to duplicate in front of the loop.
653 We search for the first insn or label in the loop, skipping NOTEs.
654 However, we must be careful not to skip past a NOTE_INSN_LOOP_BEG
655 (because we might have a loop executed only once that contains a
656 loop which starts with a jump to its exit test) or a NOTE_INSN_LOOP_END
657 (in case we have a degenerate loop).
659 Note that if we mistakenly think that a loop is entered at the top
660 when, in fact, it is entered at the exit test, the only effect will be
661 slightly poorer optimization. Making the opposite error can generate
662 incorrect code. Since very few loops now start with a jump to the
663 exit test, the code here to detect that case is very conservative. */
665 for (p = NEXT_INSN (loop_start);
667 && GET_CODE (p) != CODE_LABEL && ! INSN_P (p)
668 && (GET_CODE (p) != NOTE
669 || (NOTE_LINE_NUMBER (p) != NOTE_INSN_LOOP_BEG
670 && NOTE_LINE_NUMBER (p) != NOTE_INSN_LOOP_END));
674 loop->scan_start = p;
676 /* If loop end is the end of the current function, then emit a
677 NOTE_INSN_DELETED after loop_end and set loop->sink to the dummy
678 note insn. This is the position we use when sinking insns out of
680 if (NEXT_INSN (loop->end) != 0)
681 loop->sink = NEXT_INSN (loop->end);
683 loop->sink = emit_note_after (NOTE_INSN_DELETED, loop->end);
685 /* Set up variables describing this loop. */
687 threshold = (loop_info->has_call ? 1 : 2) * (1 + n_non_fixed_regs);
689 /* If loop has a jump before the first label,
690 the true entry is the target of that jump.
691 Start scan from there.
692 But record in LOOP->TOP the place where the end-test jumps
693 back to so we can scan that after the end of the loop. */
694 if (GET_CODE (p) == JUMP_INSN)
698 /* Loop entry must be unconditional jump (and not a RETURN) */
699 if (any_uncondjump_p (p)
700 && JUMP_LABEL (p) != 0
701 /* Check to see whether the jump actually
702 jumps out of the loop (meaning it's no loop).
703 This case can happen for things like
704 do {..} while (0). If this label was generated previously
705 by loop, we can't tell anything about it and have to reject
707 && INSN_IN_RANGE_P (JUMP_LABEL (p), loop_start, loop_end))
709 loop->top = next_label (loop->scan_start);
710 loop->scan_start = JUMP_LABEL (p);
714 /* If LOOP->SCAN_START was an insn created by loop, we don't know its luid
715 as required by loop_reg_used_before_p. So skip such loops. (This
716 test may never be true, but it's best to play it safe.)
718 Also, skip loops where we do not start scanning at a label. This
719 test also rejects loops starting with a JUMP_INSN that failed the
722 if (INSN_UID (loop->scan_start) >= max_uid_for_loop
723 || GET_CODE (loop->scan_start) != CODE_LABEL)
725 if (loop_dump_stream)
726 fprintf (loop_dump_stream, "\nLoop from %d to %d is phony.\n\n",
727 INSN_UID (loop_start), INSN_UID (loop_end));
731 /* Allocate extra space for REGs that might be created by load_mems.
732 We allocate a little extra slop as well, in the hopes that we
733 won't have to reallocate the regs array. */
734 loop_regs_scan (loop, loop_info->mems_idx + 16);
735 insn_count = count_insns_in_loop (loop);
737 if (loop_dump_stream)
739 fprintf (loop_dump_stream, "\nLoop from %d to %d: %d real insns.\n",
740 INSN_UID (loop_start), INSN_UID (loop_end), insn_count);
742 fprintf (loop_dump_stream, "Continue at insn %d.\n",
743 INSN_UID (loop->cont));
746 /* Scan through the loop finding insns that are safe to move.
747 Set REGS->ARRAY[I].SET_IN_LOOP negative for the reg I being set, so that
748 this reg will be considered invariant for subsequent insns.
749 We consider whether subsequent insns use the reg
750 in deciding whether it is worth actually moving.
752 MAYBE_NEVER is nonzero if we have passed a conditional jump insn
753 and therefore it is possible that the insns we are scanning
754 would never be executed. At such times, we must make sure
755 that it is safe to execute the insn once instead of zero times.
756 When MAYBE_NEVER is 0, all insns will be executed at least once
757 so that is not a problem. */
759 for (p = next_insn_in_loop (loop, loop->scan_start);
761 p = next_insn_in_loop (loop, p))
763 if (GET_CODE (p) == INSN
764 && (set = single_set (p))
765 && GET_CODE (SET_DEST (set)) == REG
766 #ifdef PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
767 && SET_DEST (set) != pic_offset_table_rtx
769 && ! regs->array[REGNO (SET_DEST (set))].may_not_optimize)
774 rtx src = SET_SRC (set);
775 rtx dependencies = 0;
777 /* Figure out what to use as a source of this insn. If a REG_EQUIV
778 note is given or if a REG_EQUAL note with a constant operand is
779 specified, use it as the source and mark that we should move
780 this insn by calling emit_move_insn rather that duplicating the
783 Otherwise, only use the REG_EQUAL contents if a REG_RETVAL note
785 temp = find_reg_note (p, REG_EQUIV, NULL_RTX);
787 src = XEXP (temp, 0), move_insn = 1;
790 temp = find_reg_note (p, REG_EQUAL, NULL_RTX);
791 if (temp && CONSTANT_P (XEXP (temp, 0)))
792 src = XEXP (temp, 0), move_insn = 1;
793 if (temp && find_reg_note (p, REG_RETVAL, NULL_RTX))
795 src = XEXP (temp, 0);
796 /* A libcall block can use regs that don't appear in
797 the equivalent expression. To move the libcall,
798 we must move those regs too. */
799 dependencies = libcall_other_reg (p, src);
803 /* For parallels, add any possible uses to the depencies, as we can't move
804 the insn without resolving them first. */
805 if (GET_CODE (PATTERN (p)) == PARALLEL)
807 for (i = 0; i < XVECLEN (PATTERN (p), 0); i++)
809 rtx x = XVECEXP (PATTERN (p), 0, i);
810 if (GET_CODE (x) == USE)
811 dependencies = gen_rtx_EXPR_LIST (VOIDmode, XEXP (x, 0), dependencies);
815 /* Don't try to optimize a register that was made
816 by loop-optimization for an inner loop.
817 We don't know its life-span, so we can't compute the benefit. */
818 if (REGNO (SET_DEST (set)) >= max_reg_before_loop)
820 else if (/* The register is used in basic blocks other
821 than the one where it is set (meaning that
822 something after this point in the loop might
823 depend on its value before the set). */
824 ! reg_in_basic_block_p (p, SET_DEST (set))
825 /* And the set is not guaranteed to be executed once
826 the loop starts, or the value before the set is
827 needed before the set occurs...
829 ??? Note we have quadratic behaviour here, mitigated
830 by the fact that the previous test will often fail for
831 large loops. Rather than re-scanning the entire loop
832 each time for register usage, we should build tables
833 of the register usage and use them here instead. */
835 || loop_reg_used_before_p (loop, set, p)))
836 /* It is unsafe to move the set.
838 This code used to consider it OK to move a set of a variable
839 which was not created by the user and not used in an exit test.
840 That behavior is incorrect and was removed. */
842 else if ((tem = loop_invariant_p (loop, src))
843 && (dependencies == 0
844 || (tem2 = loop_invariant_p (loop, dependencies)) != 0)
845 && (regs->array[REGNO (SET_DEST (set))].set_in_loop == 1
847 = consec_sets_invariant_p
848 (loop, SET_DEST (set),
849 regs->array[REGNO (SET_DEST (set))].set_in_loop,
851 /* If the insn can cause a trap (such as divide by zero),
852 can't move it unless it's guaranteed to be executed
853 once loop is entered. Even a function call might
854 prevent the trap insn from being reached
855 (since it might exit!) */
856 && ! ((maybe_never || call_passed)
857 && may_trap_p (src)))
860 int regno = REGNO (SET_DEST (set));
862 /* A potential lossage is where we have a case where two insns
863 can be combined as long as they are both in the loop, but
864 we move one of them outside the loop. For large loops,
865 this can lose. The most common case of this is the address
866 of a function being called.
868 Therefore, if this register is marked as being used exactly
869 once if we are in a loop with calls (a "large loop"), see if
870 we can replace the usage of this register with the source
871 of this SET. If we can, delete this insn.
873 Don't do this if P has a REG_RETVAL note or if we have
874 SMALL_REGISTER_CLASSES and SET_SRC is a hard register. */
876 if (loop_info->has_call
877 && regs->array[regno].single_usage != 0
878 && regs->array[regno].single_usage != const0_rtx
879 && REGNO_FIRST_UID (regno) == INSN_UID (p)
880 && (REGNO_LAST_UID (regno)
881 == INSN_UID (regs->array[regno].single_usage))
882 && regs->array[regno].set_in_loop == 1
883 && GET_CODE (SET_SRC (set)) != ASM_OPERANDS
884 && ! side_effects_p (SET_SRC (set))
885 && ! find_reg_note (p, REG_RETVAL, NULL_RTX)
886 && (! SMALL_REGISTER_CLASSES
887 || (! (GET_CODE (SET_SRC (set)) == REG
888 && REGNO (SET_SRC (set)) < FIRST_PSEUDO_REGISTER)))
889 /* This test is not redundant; SET_SRC (set) might be
890 a call-clobbered register and the life of REGNO
891 might span a call. */
892 && ! modified_between_p (SET_SRC (set), p,
893 regs->array[regno].single_usage)
894 && no_labels_between_p (p, regs->array[regno].single_usage)
895 && validate_replace_rtx (SET_DEST (set), SET_SRC (set),
896 regs->array[regno].single_usage))
898 /* Replace any usage in a REG_EQUAL note. Must copy the
899 new source, so that we don't get rtx sharing between the
900 SET_SOURCE and REG_NOTES of insn p. */
901 REG_NOTES (regs->array[regno].single_usage)
902 = replace_rtx (REG_NOTES (regs->array[regno].single_usage),
903 SET_DEST (set), copy_rtx (SET_SRC (set)));
906 for (i = 0; i < LOOP_REGNO_NREGS (regno, SET_DEST (set)); i++)
907 regs->array[regno+i].set_in_loop = 0;
911 m = (struct movable *) xmalloc (sizeof (struct movable));
915 m->dependencies = dependencies;
916 m->set_dest = SET_DEST (set);
918 m->consec = regs->array[REGNO (SET_DEST (set))].set_in_loop - 1;
922 m->move_insn = move_insn;
923 m->move_insn_first = 0;
924 m->is_equiv = (find_reg_note (p, REG_EQUIV, NULL_RTX) != 0);
925 m->savemode = VOIDmode;
927 /* Set M->cond if either loop_invariant_p
928 or consec_sets_invariant_p returned 2
929 (only conditionally invariant). */
930 m->cond = ((tem | tem1 | tem2) > 1);
931 m->global = LOOP_REG_GLOBAL_P (loop, regno);
933 m->lifetime = LOOP_REG_LIFETIME (loop, regno);
934 m->savings = regs->array[regno].n_times_set;
935 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
936 m->savings += libcall_benefit (p);
937 for (i = 0; i < LOOP_REGNO_NREGS (regno, SET_DEST (set)); i++)
938 regs->array[regno+i].set_in_loop = move_insn ? -2 : -1;
939 /* Add M to the end of the chain MOVABLES. */
940 loop_movables_add (movables, m);
944 /* It is possible for the first instruction to have a
945 REG_EQUAL note but a non-invariant SET_SRC, so we must
946 remember the status of the first instruction in case
947 the last instruction doesn't have a REG_EQUAL note. */
948 m->move_insn_first = m->move_insn;
950 /* Skip this insn, not checking REG_LIBCALL notes. */
951 p = next_nonnote_insn (p);
952 /* Skip the consecutive insns, if there are any. */
953 p = skip_consec_insns (p, m->consec);
954 /* Back up to the last insn of the consecutive group. */
955 p = prev_nonnote_insn (p);
957 /* We must now reset m->move_insn, m->is_equiv, and possibly
958 m->set_src to correspond to the effects of all the
960 temp = find_reg_note (p, REG_EQUIV, NULL_RTX);
962 m->set_src = XEXP (temp, 0), m->move_insn = 1;
965 temp = find_reg_note (p, REG_EQUAL, NULL_RTX);
966 if (temp && CONSTANT_P (XEXP (temp, 0)))
967 m->set_src = XEXP (temp, 0), m->move_insn = 1;
972 m->is_equiv = (find_reg_note (p, REG_EQUIV, NULL_RTX) != 0);
975 /* If this register is always set within a STRICT_LOW_PART
976 or set to zero, then its high bytes are constant.
977 So clear them outside the loop and within the loop
978 just load the low bytes.
979 We must check that the machine has an instruction to do so.
980 Also, if the value loaded into the register
981 depends on the same register, this cannot be done. */
982 else if (SET_SRC (set) == const0_rtx
983 && GET_CODE (NEXT_INSN (p)) == INSN
984 && (set1 = single_set (NEXT_INSN (p)))
985 && GET_CODE (set1) == SET
986 && (GET_CODE (SET_DEST (set1)) == STRICT_LOW_PART)
987 && (GET_CODE (XEXP (SET_DEST (set1), 0)) == SUBREG)
988 && (SUBREG_REG (XEXP (SET_DEST (set1), 0))
990 && !reg_mentioned_p (SET_DEST (set), SET_SRC (set1)))
992 int regno = REGNO (SET_DEST (set));
993 if (regs->array[regno].set_in_loop == 2)
996 m = (struct movable *) xmalloc (sizeof (struct movable));
999 m->set_dest = SET_DEST (set);
1000 m->dependencies = 0;
1006 m->move_insn_first = 0;
1008 /* If the insn may not be executed on some cycles,
1009 we can't clear the whole reg; clear just high part.
1010 Not even if the reg is used only within this loop.
1017 Clearing x before the inner loop could clobber a value
1018 being saved from the last time around the outer loop.
1019 However, if the reg is not used outside this loop
1020 and all uses of the register are in the same
1021 basic block as the store, there is no problem.
1023 If this insn was made by loop, we don't know its
1024 INSN_LUID and hence must make a conservative
1026 m->global = (INSN_UID (p) >= max_uid_for_loop
1027 || LOOP_REG_GLOBAL_P (loop, regno)
1028 || (labels_in_range_p
1029 (p, REGNO_FIRST_LUID (regno))));
1030 if (maybe_never && m->global)
1031 m->savemode = GET_MODE (SET_SRC (set1));
1033 m->savemode = VOIDmode;
1037 m->lifetime = LOOP_REG_LIFETIME (loop, regno);
1039 for (i = 0; i < LOOP_REGNO_NREGS (regno, SET_DEST (set)); i++)
1040 regs->array[regno+i].set_in_loop = -1;
1041 /* Add M to the end of the chain MOVABLES. */
1042 loop_movables_add (movables, m);
1046 /* Past a call insn, we get to insns which might not be executed
1047 because the call might exit. This matters for insns that trap.
1048 Constant and pure call insns always return, so they don't count. */
1049 else if (GET_CODE (p) == CALL_INSN && ! CONST_OR_PURE_CALL_P (p))
1051 /* Past a label or a jump, we get to insns for which we
1052 can't count on whether or how many times they will be
1053 executed during each iteration. Therefore, we can
1054 only move out sets of trivial variables
1055 (those not used after the loop). */
1056 /* Similar code appears twice in strength_reduce. */
1057 else if ((GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN)
1058 /* If we enter the loop in the middle, and scan around to the
1059 beginning, don't set maybe_never for that. This must be an
1060 unconditional jump, otherwise the code at the top of the
1061 loop might never be executed. Unconditional jumps are
1062 followed by a barrier then the loop_end. */
1063 && ! (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p) == loop->top
1064 && NEXT_INSN (NEXT_INSN (p)) == loop_end
1065 && any_uncondjump_p (p)))
1067 else if (GET_CODE (p) == NOTE)
1069 /* At the virtual top of a converted loop, insns are again known to
1070 be executed: logically, the loop begins here even though the exit
1071 code has been duplicated. */
1072 if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP && loop_depth == 0)
1073 maybe_never = call_passed = 0;
1074 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
1076 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
1081 /* If one movable subsumes another, ignore that other. */
1083 ignore_some_movables (movables);
1085 /* For each movable insn, see if the reg that it loads
1086 leads when it dies right into another conditionally movable insn.
1087 If so, record that the second insn "forces" the first one,
1088 since the second can be moved only if the first is. */
1090 force_movables (movables);
1092 /* See if there are multiple movable insns that load the same value.
1093 If there are, make all but the first point at the first one
1094 through the `match' field, and add the priorities of them
1095 all together as the priority of the first. */
1097 combine_movables (movables, regs);
1099 /* Now consider each movable insn to decide whether it is worth moving.
1100 Store 0 in regs->array[I].set_in_loop for each reg I that is moved.
1102 Generally this increases code size, so do not move moveables when
1103 optimizing for code size. */
1105 if (! optimize_size)
1107 move_movables (loop, movables, threshold, insn_count);
1109 /* Recalculate regs->array if move_movables has created new
1111 if (max_reg_num () > regs->num)
1113 loop_regs_scan (loop, 0);
1114 for (update_start = loop_start;
1115 PREV_INSN (update_start)
1116 && GET_CODE (PREV_INSN (update_start)) != CODE_LABEL;
1117 update_start = PREV_INSN (update_start))
1119 update_end = NEXT_INSN (loop_end);
1121 reg_scan_update (update_start, update_end, loop_max_reg);
1122 loop_max_reg = max_reg_num ();
1126 /* Now candidates that still are negative are those not moved.
1127 Change regs->array[I].set_in_loop to indicate that those are not actually
1129 for (i = 0; i < regs->num; i++)
1130 if (regs->array[i].set_in_loop < 0)
1131 regs->array[i].set_in_loop = regs->array[i].n_times_set;
1133 /* Now that we've moved some things out of the loop, we might be able to
1134 hoist even more memory references. */
1137 /* Recalculate regs->array if load_mems has created new registers. */
1138 if (max_reg_num () > regs->num)
1139 loop_regs_scan (loop, 0);
1141 for (update_start = loop_start;
1142 PREV_INSN (update_start)
1143 && GET_CODE (PREV_INSN (update_start)) != CODE_LABEL;
1144 update_start = PREV_INSN (update_start))
1146 update_end = NEXT_INSN (loop_end);
1148 reg_scan_update (update_start, update_end, loop_max_reg);
1149 loop_max_reg = max_reg_num ();
1151 if (flag_strength_reduce)
1153 if (update_end && GET_CODE (update_end) == CODE_LABEL)
1154 /* Ensure our label doesn't go away. */
1155 LABEL_NUSES (update_end)++;
1157 strength_reduce (loop, flags);
1159 reg_scan_update (update_start, update_end, loop_max_reg);
1160 loop_max_reg = max_reg_num ();
1162 if (update_end && GET_CODE (update_end) == CODE_LABEL
1163 && --LABEL_NUSES (update_end) == 0)
1164 delete_related_insns (update_end);
1168 /* The movable information is required for strength reduction. */
1169 loop_movables_free (movables);
1176 /* Add elements to *OUTPUT to record all the pseudo-regs
1177 mentioned in IN_THIS but not mentioned in NOT_IN_THIS. */
1180 record_excess_regs (in_this, not_in_this, output)
1181 rtx in_this, not_in_this;
1188 code = GET_CODE (in_this);
1202 if (REGNO (in_this) >= FIRST_PSEUDO_REGISTER
1203 && ! reg_mentioned_p (in_this, not_in_this))
1204 *output = gen_rtx_EXPR_LIST (VOIDmode, in_this, *output);
1211 fmt = GET_RTX_FORMAT (code);
1212 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1219 for (j = 0; j < XVECLEN (in_this, i); j++)
1220 record_excess_regs (XVECEXP (in_this, i, j), not_in_this, output);
1224 record_excess_regs (XEXP (in_this, i), not_in_this, output);
1230 /* Check what regs are referred to in the libcall block ending with INSN,
1231 aside from those mentioned in the equivalent value.
1232 If there are none, return 0.
1233 If there are one or more, return an EXPR_LIST containing all of them. */
1236 libcall_other_reg (insn, equiv)
1239 rtx note = find_reg_note (insn, REG_RETVAL, NULL_RTX);
1240 rtx p = XEXP (note, 0);
1243 /* First, find all the regs used in the libcall block
1244 that are not mentioned as inputs to the result. */
1248 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
1249 || GET_CODE (p) == CALL_INSN)
1250 record_excess_regs (PATTERN (p), equiv, &output);
1257 /* Return 1 if all uses of REG
1258 are between INSN and the end of the basic block. */
1261 reg_in_basic_block_p (insn, reg)
1264 int regno = REGNO (reg);
1267 if (REGNO_FIRST_UID (regno) != INSN_UID (insn))
1270 /* Search this basic block for the already recorded last use of the reg. */
1271 for (p = insn; p; p = NEXT_INSN (p))
1273 switch (GET_CODE (p))
1280 /* Ordinary insn: if this is the last use, we win. */
1281 if (REGNO_LAST_UID (regno) == INSN_UID (p))
1286 /* Jump insn: if this is the last use, we win. */
1287 if (REGNO_LAST_UID (regno) == INSN_UID (p))
1289 /* Otherwise, it's the end of the basic block, so we lose. */
1294 /* It's the end of the basic block, so we lose. */
1302 /* The "last use" that was recorded can't be found after the first
1303 use. This can happen when the last use was deleted while
1304 processing an inner loop, this inner loop was then completely
1305 unrolled, and the outer loop is always exited after the inner loop,
1306 so that everything after the first use becomes a single basic block. */
1310 /* Compute the benefit of eliminating the insns in the block whose
1311 last insn is LAST. This may be a group of insns used to compute a
1312 value directly or can contain a library call. */
1315 libcall_benefit (last)
1321 for (insn = XEXP (find_reg_note (last, REG_RETVAL, NULL_RTX), 0);
1322 insn != last; insn = NEXT_INSN (insn))
1324 if (GET_CODE (insn) == CALL_INSN)
1325 benefit += 10; /* Assume at least this many insns in a library
1327 else if (GET_CODE (insn) == INSN
1328 && GET_CODE (PATTERN (insn)) != USE
1329 && GET_CODE (PATTERN (insn)) != CLOBBER)
1336 /* Skip COUNT insns from INSN, counting library calls as 1 insn. */
1339 skip_consec_insns (insn, count)
1343 for (; count > 0; count--)
1347 /* If first insn of libcall sequence, skip to end. */
1348 /* Do this at start of loop, since INSN is guaranteed to
1350 if (GET_CODE (insn) != NOTE
1351 && (temp = find_reg_note (insn, REG_LIBCALL, NULL_RTX)))
1352 insn = XEXP (temp, 0);
1355 insn = NEXT_INSN (insn);
1356 while (GET_CODE (insn) == NOTE);
1362 /* Ignore any movable whose insn falls within a libcall
1363 which is part of another movable.
1364 We make use of the fact that the movable for the libcall value
1365 was made later and so appears later on the chain. */
1368 ignore_some_movables (movables)
1369 struct loop_movables *movables;
1371 struct movable *m, *m1;
1373 for (m = movables->head; m; m = m->next)
1375 /* Is this a movable for the value of a libcall? */
1376 rtx note = find_reg_note (m->insn, REG_RETVAL, NULL_RTX);
1380 /* Check for earlier movables inside that range,
1381 and mark them invalid. We cannot use LUIDs here because
1382 insns created by loop.c for prior loops don't have LUIDs.
1383 Rather than reject all such insns from movables, we just
1384 explicitly check each insn in the libcall (since invariant
1385 libcalls aren't that common). */
1386 for (insn = XEXP (note, 0); insn != m->insn; insn = NEXT_INSN (insn))
1387 for (m1 = movables->head; m1 != m; m1 = m1->next)
1388 if (m1->insn == insn)
1394 /* For each movable insn, see if the reg that it loads
1395 leads when it dies right into another conditionally movable insn.
1396 If so, record that the second insn "forces" the first one,
1397 since the second can be moved only if the first is. */
1400 force_movables (movables)
1401 struct loop_movables *movables;
1403 struct movable *m, *m1;
1405 for (m1 = movables->head; m1; m1 = m1->next)
1406 /* Omit this if moving just the (SET (REG) 0) of a zero-extend. */
1407 if (!m1->partial && !m1->done)
1409 int regno = m1->regno;
1410 for (m = m1->next; m; m = m->next)
1411 /* ??? Could this be a bug? What if CSE caused the
1412 register of M1 to be used after this insn?
1413 Since CSE does not update regno_last_uid,
1414 this insn M->insn might not be where it dies.
1415 But very likely this doesn't matter; what matters is
1416 that M's reg is computed from M1's reg. */
1417 if (INSN_UID (m->insn) == REGNO_LAST_UID (regno)
1420 if (m != 0 && m->set_src == m1->set_dest
1421 /* If m->consec, m->set_src isn't valid. */
1425 /* Increase the priority of the moving the first insn
1426 since it permits the second to be moved as well. */
1430 m1->lifetime += m->lifetime;
1431 m1->savings += m->savings;
1436 /* Find invariant expressions that are equal and can be combined into
1440 combine_movables (movables, regs)
1441 struct loop_movables *movables;
1442 struct loop_regs *regs;
1445 char *matched_regs = (char *) xmalloc (regs->num);
1446 enum machine_mode mode;
1448 /* Regs that are set more than once are not allowed to match
1449 or be matched. I'm no longer sure why not. */
1450 /* Perhaps testing m->consec_sets would be more appropriate here? */
1452 for (m = movables->head; m; m = m->next)
1453 if (m->match == 0 && regs->array[m->regno].n_times_set == 1
1457 int regno = m->regno;
1459 memset (matched_regs, 0, regs->num);
1460 matched_regs[regno] = 1;
1462 /* We want later insns to match the first one. Don't make the first
1463 one match any later ones. So start this loop at m->next. */
1464 for (m1 = m->next; m1; m1 = m1->next)
1465 /* ??? HACK! move_movables does not verify that the replacement
1466 is valid, which can have disasterous effects with hard regs
1467 and match_dup. Turn combination off for now. */
1468 if (0 && m != m1 && m1->match == 0
1469 && regs->array[m1->regno].n_times_set == 1
1470 /* A reg used outside the loop mustn't be eliminated. */
1472 /* A reg used for zero-extending mustn't be eliminated. */
1474 && (matched_regs[m1->regno]
1477 /* Can combine regs with different modes loaded from the
1478 same constant only if the modes are the same or
1479 if both are integer modes with M wider or the same
1480 width as M1. The check for integer is redundant, but
1481 safe, since the only case of differing destination
1482 modes with equal sources is when both sources are
1483 VOIDmode, i.e., CONST_INT. */
1484 (GET_MODE (m->set_dest) == GET_MODE (m1->set_dest)
1485 || (GET_MODE_CLASS (GET_MODE (m->set_dest)) == MODE_INT
1486 && GET_MODE_CLASS (GET_MODE (m1->set_dest)) == MODE_INT
1487 && (GET_MODE_BITSIZE (GET_MODE (m->set_dest))
1488 >= GET_MODE_BITSIZE (GET_MODE (m1->set_dest)))))
1489 /* See if the source of M1 says it matches M. */
1490 && ((GET_CODE (m1->set_src) == REG
1491 && matched_regs[REGNO (m1->set_src)])
1492 || rtx_equal_for_loop_p (m->set_src, m1->set_src,
1494 && ((m->dependencies == m1->dependencies)
1495 || rtx_equal_p (m->dependencies, m1->dependencies)))
1497 m->lifetime += m1->lifetime;
1498 m->savings += m1->savings;
1501 matched_regs[m1->regno] = 1;
1505 /* Now combine the regs used for zero-extension.
1506 This can be done for those not marked `global'
1507 provided their lives don't overlap. */
1509 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
1510 mode = GET_MODE_WIDER_MODE (mode))
1512 struct movable *m0 = 0;
1514 /* Combine all the registers for extension from mode MODE.
1515 Don't combine any that are used outside this loop. */
1516 for (m = movables->head; m; m = m->next)
1517 if (m->partial && ! m->global
1518 && mode == GET_MODE (SET_SRC (PATTERN (NEXT_INSN (m->insn)))))
1522 int first = REGNO_FIRST_LUID (m->regno);
1523 int last = REGNO_LAST_LUID (m->regno);
1527 /* First one: don't check for overlap, just record it. */
1532 /* Make sure they extend to the same mode.
1533 (Almost always true.) */
1534 if (GET_MODE (m->set_dest) != GET_MODE (m0->set_dest))
1537 /* We already have one: check for overlap with those
1538 already combined together. */
1539 for (m1 = movables->head; m1 != m; m1 = m1->next)
1540 if (m1 == m0 || (m1->partial && m1->match == m0))
1541 if (! (REGNO_FIRST_LUID (m1->regno) > last
1542 || REGNO_LAST_LUID (m1->regno) < first))
1545 /* No overlap: we can combine this with the others. */
1546 m0->lifetime += m->lifetime;
1547 m0->savings += m->savings;
1557 free (matched_regs);
1560 /* Returns the number of movable instructions in LOOP that were not
1561 moved outside the loop. */
1564 num_unmoved_movables (loop)
1565 const struct loop *loop;
1570 for (m = LOOP_MOVABLES (loop)->head; m; m = m->next)
1578 /* Return 1 if regs X and Y will become the same if moved. */
1581 regs_match_p (x, y, movables)
1583 struct loop_movables *movables;
1585 unsigned int xn = REGNO (x);
1586 unsigned int yn = REGNO (y);
1587 struct movable *mx, *my;
1589 for (mx = movables->head; mx; mx = mx->next)
1590 if (mx->regno == xn)
1593 for (my = movables->head; my; my = my->next)
1594 if (my->regno == yn)
1598 && ((mx->match == my->match && mx->match != 0)
1600 || mx == my->match));
1603 /* Return 1 if X and Y are identical-looking rtx's.
1604 This is the Lisp function EQUAL for rtx arguments.
1606 If two registers are matching movables or a movable register and an
1607 equivalent constant, consider them equal. */
1610 rtx_equal_for_loop_p (x, y, movables, regs)
1612 struct loop_movables *movables;
1613 struct loop_regs *regs;
1623 if (x == 0 || y == 0)
1626 code = GET_CODE (x);
1628 /* If we have a register and a constant, they may sometimes be
1630 if (GET_CODE (x) == REG && regs->array[REGNO (x)].set_in_loop == -2
1633 for (m = movables->head; m; m = m->next)
1634 if (m->move_insn && m->regno == REGNO (x)
1635 && rtx_equal_p (m->set_src, y))
1638 else if (GET_CODE (y) == REG && regs->array[REGNO (y)].set_in_loop == -2
1641 for (m = movables->head; m; m = m->next)
1642 if (m->move_insn && m->regno == REGNO (y)
1643 && rtx_equal_p (m->set_src, x))
1647 /* Otherwise, rtx's of different codes cannot be equal. */
1648 if (code != GET_CODE (y))
1651 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
1652 (REG:SI x) and (REG:HI x) are NOT equivalent. */
1654 if (GET_MODE (x) != GET_MODE (y))
1657 /* These three types of rtx's can be compared nonrecursively. */
1659 return (REGNO (x) == REGNO (y) || regs_match_p (x, y, movables));
1661 if (code == LABEL_REF)
1662 return XEXP (x, 0) == XEXP (y, 0);
1663 if (code == SYMBOL_REF)
1664 return XSTR (x, 0) == XSTR (y, 0);
1666 /* Compare the elements. If any pair of corresponding elements
1667 fail to match, return 0 for the whole things. */
1669 fmt = GET_RTX_FORMAT (code);
1670 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1675 if (XWINT (x, i) != XWINT (y, i))
1680 if (XINT (x, i) != XINT (y, i))
1685 /* Two vectors must have the same length. */
1686 if (XVECLEN (x, i) != XVECLEN (y, i))
1689 /* And the corresponding elements must match. */
1690 for (j = 0; j < XVECLEN (x, i); j++)
1691 if (rtx_equal_for_loop_p (XVECEXP (x, i, j), XVECEXP (y, i, j),
1692 movables, regs) == 0)
1697 if (rtx_equal_for_loop_p (XEXP (x, i), XEXP (y, i), movables, regs)
1703 if (strcmp (XSTR (x, i), XSTR (y, i)))
1708 /* These are just backpointers, so they don't matter. */
1714 /* It is believed that rtx's at this level will never
1715 contain anything but integers and other rtx's,
1716 except for within LABEL_REFs and SYMBOL_REFs. */
1724 /* If X contains any LABEL_REF's, add REG_LABEL notes for them to all
1725 insns in INSNS which use the reference. LABEL_NUSES for CODE_LABEL
1726 references is incremented once for each added note. */
1729 add_label_notes (x, insns)
1733 enum rtx_code code = GET_CODE (x);
1738 if (code == LABEL_REF && !LABEL_REF_NONLOCAL_P (x))
1740 /* This code used to ignore labels that referred to dispatch tables to
1741 avoid flow generating (slighly) worse code.
1743 We no longer ignore such label references (see LABEL_REF handling in
1744 mark_jump_label for additional information). */
1745 for (insn = insns; insn; insn = NEXT_INSN (insn))
1746 if (reg_mentioned_p (XEXP (x, 0), insn))
1748 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_LABEL, XEXP (x, 0),
1750 if (LABEL_P (XEXP (x, 0)))
1751 LABEL_NUSES (XEXP (x, 0))++;
1755 fmt = GET_RTX_FORMAT (code);
1756 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1759 add_label_notes (XEXP (x, i), insns);
1760 else if (fmt[i] == 'E')
1761 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1762 add_label_notes (XVECEXP (x, i, j), insns);
1766 /* Scan MOVABLES, and move the insns that deserve to be moved.
1767 If two matching movables are combined, replace one reg with the
1768 other throughout. */
1771 move_movables (loop, movables, threshold, insn_count)
1773 struct loop_movables *movables;
1777 struct loop_regs *regs = LOOP_REGS (loop);
1778 int nregs = regs->num;
1782 rtx loop_start = loop->start;
1783 rtx loop_end = loop->end;
1784 /* Map of pseudo-register replacements to handle combining
1785 when we move several insns that load the same value
1786 into different pseudo-registers. */
1787 rtx *reg_map = (rtx *) xcalloc (nregs, sizeof (rtx));
1788 char *already_moved = (char *) xcalloc (nregs, sizeof (char));
1790 for (m = movables->head; m; m = m->next)
1792 /* Describe this movable insn. */
1794 if (loop_dump_stream)
1796 fprintf (loop_dump_stream, "Insn %d: regno %d (life %d), ",
1797 INSN_UID (m->insn), m->regno, m->lifetime);
1799 fprintf (loop_dump_stream, "consec %d, ", m->consec);
1801 fprintf (loop_dump_stream, "cond ");
1803 fprintf (loop_dump_stream, "force ");
1805 fprintf (loop_dump_stream, "global ");
1807 fprintf (loop_dump_stream, "done ");
1809 fprintf (loop_dump_stream, "move-insn ");
1811 fprintf (loop_dump_stream, "matches %d ",
1812 INSN_UID (m->match->insn));
1814 fprintf (loop_dump_stream, "forces %d ",
1815 INSN_UID (m->forces->insn));
1818 /* Ignore the insn if it's already done (it matched something else).
1819 Otherwise, see if it is now safe to move. */
1823 || (1 == loop_invariant_p (loop, m->set_src)
1824 && (m->dependencies == 0
1825 || 1 == loop_invariant_p (loop, m->dependencies))
1827 || 1 == consec_sets_invariant_p (loop, m->set_dest,
1830 && (! m->forces || m->forces->done))
1834 int savings = m->savings;
1836 /* We have an insn that is safe to move.
1837 Compute its desirability. */
1842 if (loop_dump_stream)
1843 fprintf (loop_dump_stream, "savings %d ", savings);
1845 if (regs->array[regno].moved_once && loop_dump_stream)
1846 fprintf (loop_dump_stream, "halved since already moved ");
1848 /* An insn MUST be moved if we already moved something else
1849 which is safe only if this one is moved too: that is,
1850 if already_moved[REGNO] is nonzero. */
1852 /* An insn is desirable to move if the new lifetime of the
1853 register is no more than THRESHOLD times the old lifetime.
1854 If it's not desirable, it means the loop is so big
1855 that moving won't speed things up much,
1856 and it is liable to make register usage worse. */
1858 /* It is also desirable to move if it can be moved at no
1859 extra cost because something else was already moved. */
1861 if (already_moved[regno]
1862 || flag_move_all_movables
1863 || (threshold * savings * m->lifetime) >=
1864 (regs->array[regno].moved_once ? insn_count * 2 : insn_count)
1865 || (m->forces && m->forces->done
1866 && regs->array[m->forces->regno].n_times_set == 1))
1870 rtx first = NULL_RTX;
1872 /* Now move the insns that set the reg. */
1874 if (m->partial && m->match)
1878 /* Find the end of this chain of matching regs.
1879 Thus, we load each reg in the chain from that one reg.
1880 And that reg is loaded with 0 directly,
1881 since it has ->match == 0. */
1882 for (m1 = m; m1->match; m1 = m1->match);
1883 newpat = gen_move_insn (SET_DEST (PATTERN (m->insn)),
1884 SET_DEST (PATTERN (m1->insn)));
1885 i1 = loop_insn_hoist (loop, newpat);
1887 /* Mark the moved, invariant reg as being allowed to
1888 share a hard reg with the other matching invariant. */
1889 REG_NOTES (i1) = REG_NOTES (m->insn);
1890 r1 = SET_DEST (PATTERN (m->insn));
1891 r2 = SET_DEST (PATTERN (m1->insn));
1893 = gen_rtx_EXPR_LIST (VOIDmode, r1,
1894 gen_rtx_EXPR_LIST (VOIDmode, r2,
1896 delete_insn (m->insn);
1901 if (loop_dump_stream)
1902 fprintf (loop_dump_stream, " moved to %d", INSN_UID (i1));
1904 /* If we are to re-generate the item being moved with a
1905 new move insn, first delete what we have and then emit
1906 the move insn before the loop. */
1907 else if (m->move_insn)
1911 for (count = m->consec; count >= 0; count--)
1913 /* If this is the first insn of a library call sequence,
1915 if (GET_CODE (p) != NOTE
1916 && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
1919 /* If this is the last insn of a libcall sequence, then
1920 delete every insn in the sequence except the last.
1921 The last insn is handled in the normal manner. */
1922 if (GET_CODE (p) != NOTE
1923 && (temp = find_reg_note (p, REG_RETVAL, NULL_RTX)))
1925 temp = XEXP (temp, 0);
1927 temp = delete_insn (temp);
1931 p = delete_insn (p);
1933 /* simplify_giv_expr expects that it can walk the insns
1934 at m->insn forwards and see this old sequence we are
1935 tossing here. delete_insn does preserve the next
1936 pointers, but when we skip over a NOTE we must fix
1937 it up. Otherwise that code walks into the non-deleted
1939 while (p && GET_CODE (p) == NOTE)
1940 p = NEXT_INSN (temp) = NEXT_INSN (p);
1944 emit_move_insn (m->set_dest, m->set_src);
1945 temp = get_insns ();
1946 seq = gen_sequence ();
1949 add_label_notes (m->set_src, temp);
1951 i1 = loop_insn_hoist (loop, seq);
1952 if (! find_reg_note (i1, REG_EQUAL, NULL_RTX))
1953 set_unique_reg_note (i1,
1954 m->is_equiv ? REG_EQUIV : REG_EQUAL,
1957 if (loop_dump_stream)
1958 fprintf (loop_dump_stream, " moved to %d", INSN_UID (i1));
1960 /* The more regs we move, the less we like moving them. */
1965 for (count = m->consec; count >= 0; count--)
1969 /* If first insn of libcall sequence, skip to end. */
1970 /* Do this at start of loop, since p is guaranteed to
1972 if (GET_CODE (p) != NOTE
1973 && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
1976 /* If last insn of libcall sequence, move all
1977 insns except the last before the loop. The last
1978 insn is handled in the normal manner. */
1979 if (GET_CODE (p) != NOTE
1980 && (temp = find_reg_note (p, REG_RETVAL, NULL_RTX)))
1984 rtx fn_address_insn = 0;
1987 for (temp = XEXP (temp, 0); temp != p;
1988 temp = NEXT_INSN (temp))
1994 if (GET_CODE (temp) == NOTE)
1997 body = PATTERN (temp);
1999 /* Find the next insn after TEMP,
2000 not counting USE or NOTE insns. */
2001 for (next = NEXT_INSN (temp); next != p;
2002 next = NEXT_INSN (next))
2003 if (! (GET_CODE (next) == INSN
2004 && GET_CODE (PATTERN (next)) == USE)
2005 && GET_CODE (next) != NOTE)
2008 /* If that is the call, this may be the insn
2009 that loads the function address.
2011 Extract the function address from the insn
2012 that loads it into a register.
2013 If this insn was cse'd, we get incorrect code.
2015 So emit a new move insn that copies the
2016 function address into the register that the
2017 call insn will use. flow.c will delete any
2018 redundant stores that we have created. */
2019 if (GET_CODE (next) == CALL_INSN
2020 && GET_CODE (body) == SET
2021 && GET_CODE (SET_DEST (body)) == REG
2022 && (n = find_reg_note (temp, REG_EQUAL,
2025 fn_reg = SET_SRC (body);
2026 if (GET_CODE (fn_reg) != REG)
2027 fn_reg = SET_DEST (body);
2028 fn_address = XEXP (n, 0);
2029 fn_address_insn = temp;
2031 /* We have the call insn.
2032 If it uses the register we suspect it might,
2033 load it with the correct address directly. */
2034 if (GET_CODE (temp) == CALL_INSN
2036 && reg_referenced_p (fn_reg, body))
2037 loop_insn_emit_after (loop, 0, fn_address_insn,
2039 (fn_reg, fn_address));
2041 if (GET_CODE (temp) == CALL_INSN)
2043 i1 = loop_call_insn_hoist (loop, body);
2044 /* Because the USAGE information potentially
2045 contains objects other than hard registers
2046 we need to copy it. */
2047 if (CALL_INSN_FUNCTION_USAGE (temp))
2048 CALL_INSN_FUNCTION_USAGE (i1)
2049 = copy_rtx (CALL_INSN_FUNCTION_USAGE (temp));
2052 i1 = loop_insn_hoist (loop, body);
2055 if (temp == fn_address_insn)
2056 fn_address_insn = i1;
2057 REG_NOTES (i1) = REG_NOTES (temp);
2058 REG_NOTES (temp) = NULL;
2064 if (m->savemode != VOIDmode)
2066 /* P sets REG to zero; but we should clear only
2067 the bits that are not covered by the mode
2069 rtx reg = m->set_dest;
2074 tem = expand_simple_binop
2075 (GET_MODE (reg), AND, reg,
2076 GEN_INT ((((HOST_WIDE_INT) 1
2077 << GET_MODE_BITSIZE (m->savemode)))
2079 reg, 1, OPTAB_LIB_WIDEN);
2083 emit_move_insn (reg, tem);
2084 sequence = gen_sequence ();
2086 i1 = loop_insn_hoist (loop, sequence);
2088 else if (GET_CODE (p) == CALL_INSN)
2090 i1 = loop_call_insn_hoist (loop, PATTERN (p));
2091 /* Because the USAGE information potentially
2092 contains objects other than hard registers
2093 we need to copy it. */
2094 if (CALL_INSN_FUNCTION_USAGE (p))
2095 CALL_INSN_FUNCTION_USAGE (i1)
2096 = copy_rtx (CALL_INSN_FUNCTION_USAGE (p));
2098 else if (count == m->consec && m->move_insn_first)
2101 /* The SET_SRC might not be invariant, so we must
2102 use the REG_EQUAL note. */
2104 emit_move_insn (m->set_dest, m->set_src);
2105 temp = get_insns ();
2106 seq = gen_sequence ();
2109 add_label_notes (m->set_src, temp);
2111 i1 = loop_insn_hoist (loop, seq);
2112 if (! find_reg_note (i1, REG_EQUAL, NULL_RTX))
2113 set_unique_reg_note (i1, m->is_equiv ? REG_EQUIV
2114 : REG_EQUAL, m->set_src);
2117 i1 = loop_insn_hoist (loop, PATTERN (p));
2119 if (REG_NOTES (i1) == 0)
2121 REG_NOTES (i1) = REG_NOTES (p);
2122 REG_NOTES (p) = NULL;
2124 /* If there is a REG_EQUAL note present whose value
2125 is not loop invariant, then delete it, since it
2126 may cause problems with later optimization passes.
2127 It is possible for cse to create such notes
2128 like this as a result of record_jump_cond. */
2130 if ((temp = find_reg_note (i1, REG_EQUAL, NULL_RTX))
2131 && ! loop_invariant_p (loop, XEXP (temp, 0)))
2132 remove_note (i1, temp);
2138 if (loop_dump_stream)
2139 fprintf (loop_dump_stream, " moved to %d",
2142 /* If library call, now fix the REG_NOTES that contain
2143 insn pointers, namely REG_LIBCALL on FIRST
2144 and REG_RETVAL on I1. */
2145 if ((temp = find_reg_note (i1, REG_RETVAL, NULL_RTX)))
2147 XEXP (temp, 0) = first;
2148 temp = find_reg_note (first, REG_LIBCALL, NULL_RTX);
2149 XEXP (temp, 0) = i1;
2156 /* simplify_giv_expr expects that it can walk the insns
2157 at m->insn forwards and see this old sequence we are
2158 tossing here. delete_insn does preserve the next
2159 pointers, but when we skip over a NOTE we must fix
2160 it up. Otherwise that code walks into the non-deleted
2162 while (p && GET_CODE (p) == NOTE)
2163 p = NEXT_INSN (temp) = NEXT_INSN (p);
2166 /* The more regs we move, the less we like moving them. */
2170 /* Any other movable that loads the same register
2172 already_moved[regno] = 1;
2174 /* This reg has been moved out of one loop. */
2175 regs->array[regno].moved_once = 1;
2177 /* The reg set here is now invariant. */
2181 for (i = 0; i < LOOP_REGNO_NREGS (regno, m->set_dest); i++)
2182 regs->array[regno+i].set_in_loop = 0;
2187 /* Change the length-of-life info for the register
2188 to say it lives at least the full length of this loop.
2189 This will help guide optimizations in outer loops. */
2191 if (REGNO_FIRST_LUID (regno) > INSN_LUID (loop_start))
2192 /* This is the old insn before all the moved insns.
2193 We can't use the moved insn because it is out of range
2194 in uid_luid. Only the old insns have luids. */
2195 REGNO_FIRST_UID (regno) = INSN_UID (loop_start);
2196 if (REGNO_LAST_LUID (regno) < INSN_LUID (loop_end))
2197 REGNO_LAST_UID (regno) = INSN_UID (loop_end);
2199 /* Combine with this moved insn any other matching movables. */
2202 for (m1 = movables->head; m1; m1 = m1->next)
2207 /* Schedule the reg loaded by M1
2208 for replacement so that shares the reg of M.
2209 If the modes differ (only possible in restricted
2210 circumstances, make a SUBREG.
2212 Note this assumes that the target dependent files
2213 treat REG and SUBREG equally, including within
2214 GO_IF_LEGITIMATE_ADDRESS and in all the
2215 predicates since we never verify that replacing the
2216 original register with a SUBREG results in a
2217 recognizable insn. */
2218 if (GET_MODE (m->set_dest) == GET_MODE (m1->set_dest))
2219 reg_map[m1->regno] = m->set_dest;
2222 = gen_lowpart_common (GET_MODE (m1->set_dest),
2225 /* Get rid of the matching insn
2226 and prevent further processing of it. */
2229 /* if library call, delete all insns. */
2230 if ((temp = find_reg_note (m1->insn, REG_RETVAL,
2232 delete_insn_chain (XEXP (temp, 0), m1->insn);
2234 delete_insn (m1->insn);
2236 /* Any other movable that loads the same register
2238 already_moved[m1->regno] = 1;
2240 /* The reg merged here is now invariant,
2241 if the reg it matches is invariant. */
2246 i < LOOP_REGNO_NREGS (regno, m1->set_dest);
2248 regs->array[m1->regno+i].set_in_loop = 0;
2252 else if (loop_dump_stream)
2253 fprintf (loop_dump_stream, "not desirable");
2255 else if (loop_dump_stream && !m->match)
2256 fprintf (loop_dump_stream, "not safe");
2258 if (loop_dump_stream)
2259 fprintf (loop_dump_stream, "\n");
2263 new_start = loop_start;
2265 /* Go through all the instructions in the loop, making
2266 all the register substitutions scheduled in REG_MAP. */
2267 for (p = new_start; p != loop_end; p = NEXT_INSN (p))
2268 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
2269 || GET_CODE (p) == CALL_INSN)
2271 replace_regs (PATTERN (p), reg_map, nregs, 0);
2272 replace_regs (REG_NOTES (p), reg_map, nregs, 0);
2278 free (already_moved);
2283 loop_movables_add (movables, m)
2284 struct loop_movables *movables;
2287 if (movables->head == 0)
2290 movables->last->next = m;
2296 loop_movables_free (movables)
2297 struct loop_movables *movables;
2300 struct movable *m_next;
2302 for (m = movables->head; m; m = m_next)
2310 /* Scan X and replace the address of any MEM in it with ADDR.
2311 REG is the address that MEM should have before the replacement. */
2314 replace_call_address (x, reg, addr)
2323 code = GET_CODE (x);
2337 /* Short cut for very common case. */
2338 replace_call_address (XEXP (x, 1), reg, addr);
2342 /* Short cut for very common case. */
2343 replace_call_address (XEXP (x, 0), reg, addr);
2347 /* If this MEM uses a reg other than the one we expected,
2348 something is wrong. */
2349 if (XEXP (x, 0) != reg)
2358 fmt = GET_RTX_FORMAT (code);
2359 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2362 replace_call_address (XEXP (x, i), reg, addr);
2363 else if (fmt[i] == 'E')
2366 for (j = 0; j < XVECLEN (x, i); j++)
2367 replace_call_address (XVECEXP (x, i, j), reg, addr);
2373 /* Return the number of memory refs to addresses that vary
2377 count_nonfixed_reads (loop, x)
2378 const struct loop *loop;
2389 code = GET_CODE (x);
2403 return ((loop_invariant_p (loop, XEXP (x, 0)) != 1)
2404 + count_nonfixed_reads (loop, XEXP (x, 0)));
2411 fmt = GET_RTX_FORMAT (code);
2412 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2415 value += count_nonfixed_reads (loop, XEXP (x, i));
2419 for (j = 0; j < XVECLEN (x, i); j++)
2420 value += count_nonfixed_reads (loop, XVECEXP (x, i, j));
2426 /* Scan a loop setting the elements `cont', `vtop', `loops_enclosed',
2427 `has_call', `has_nonconst_call', `has_volatile', `has_tablejump',
2428 `unknown_address_altered', `unknown_constant_address_altered', and
2429 `num_mem_sets' in LOOP. Also, fill in the array `mems' and the
2430 list `store_mems' in LOOP. */
2438 struct loop_info *loop_info = LOOP_INFO (loop);
2439 rtx start = loop->start;
2440 rtx end = loop->end;
2441 /* The label after END. Jumping here is just like falling off the
2442 end of the loop. We use next_nonnote_insn instead of next_label
2443 as a hedge against the (pathological) case where some actual insn
2444 might end up between the two. */
2445 rtx exit_target = next_nonnote_insn (end);
2447 loop_info->has_indirect_jump = indirect_jump_in_function;
2448 loop_info->pre_header_has_call = 0;
2449 loop_info->has_call = 0;
2450 loop_info->has_nonconst_call = 0;
2451 loop_info->has_volatile = 0;
2452 loop_info->has_tablejump = 0;
2453 loop_info->has_multiple_exit_targets = 0;
2456 loop_info->unknown_address_altered = 0;
2457 loop_info->unknown_constant_address_altered = 0;
2458 loop_info->store_mems = NULL_RTX;
2459 loop_info->first_loop_store_insn = NULL_RTX;
2460 loop_info->mems_idx = 0;
2461 loop_info->num_mem_sets = 0;
2464 for (insn = start; insn && GET_CODE (insn) != CODE_LABEL;
2465 insn = PREV_INSN (insn))
2467 if (GET_CODE (insn) == CALL_INSN)
2469 loop_info->pre_header_has_call = 1;
2474 for (insn = NEXT_INSN (start); insn != NEXT_INSN (end);
2475 insn = NEXT_INSN (insn))
2477 switch (GET_CODE (insn))
2480 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
2483 /* Count number of loops contained in this one. */
2486 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END)
2491 if (! CONST_OR_PURE_CALL_P (insn))
2493 loop_info->unknown_address_altered = 1;
2494 loop_info->has_nonconst_call = 1;
2496 else if (pure_call_p (insn))
2497 loop_info->has_nonconst_call = 1;
2498 loop_info->has_call = 1;
2499 if (can_throw_internal (insn))
2500 loop_info->has_multiple_exit_targets = 1;
2504 if (! loop_info->has_multiple_exit_targets)
2506 rtx set = pc_set (insn);
2510 rtx src = SET_SRC (set);
2513 if (GET_CODE (src) == IF_THEN_ELSE)
2515 label1 = XEXP (src, 1);
2516 label2 = XEXP (src, 2);
2526 if (label1 && label1 != pc_rtx)
2528 if (GET_CODE (label1) != LABEL_REF)
2530 /* Something tricky. */
2531 loop_info->has_multiple_exit_targets = 1;
2534 else if (XEXP (label1, 0) != exit_target
2535 && LABEL_OUTSIDE_LOOP_P (label1))
2537 /* A jump outside the current loop. */
2538 loop_info->has_multiple_exit_targets = 1;
2550 /* A return, or something tricky. */
2551 loop_info->has_multiple_exit_targets = 1;
2557 if (volatile_refs_p (PATTERN (insn)))
2558 loop_info->has_volatile = 1;
2560 if (GET_CODE (insn) == JUMP_INSN
2561 && (GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC
2562 || GET_CODE (PATTERN (insn)) == ADDR_VEC))
2563 loop_info->has_tablejump = 1;
2565 note_stores (PATTERN (insn), note_addr_stored, loop_info);
2566 if (! loop_info->first_loop_store_insn && loop_info->store_mems)
2567 loop_info->first_loop_store_insn = insn;
2569 if (flag_non_call_exceptions && can_throw_internal (insn))
2570 loop_info->has_multiple_exit_targets = 1;
2578 /* Now, rescan the loop, setting up the LOOP_MEMS array. */
2579 if (/* An exception thrown by a called function might land us
2581 ! loop_info->has_nonconst_call
2582 /* We don't want loads for MEMs moved to a location before the
2583 one at which their stack memory becomes allocated. (Note
2584 that this is not a problem for malloc, etc., since those
2585 require actual function calls. */
2586 && ! current_function_calls_alloca
2587 /* There are ways to leave the loop other than falling off the
2589 && ! loop_info->has_multiple_exit_targets)
2590 for (insn = NEXT_INSN (start); insn != NEXT_INSN (end);
2591 insn = NEXT_INSN (insn))
2592 for_each_rtx (&insn, insert_loop_mem, loop_info);
2594 /* BLKmode MEMs are added to LOOP_STORE_MEM as necessary so
2595 that loop_invariant_p and load_mems can use true_dependence
2596 to determine what is really clobbered. */
2597 if (loop_info->unknown_address_altered)
2599 rtx mem = gen_rtx_MEM (BLKmode, const0_rtx);
2601 loop_info->store_mems
2602 = gen_rtx_EXPR_LIST (VOIDmode, mem, loop_info->store_mems);
2604 if (loop_info->unknown_constant_address_altered)
2606 rtx mem = gen_rtx_MEM (BLKmode, const0_rtx);
2608 RTX_UNCHANGING_P (mem) = 1;
2609 loop_info->store_mems
2610 = gen_rtx_EXPR_LIST (VOIDmode, mem, loop_info->store_mems);
2614 /* Invalidate all loops containing LABEL. */
2617 invalidate_loops_containing_label (label)
2621 for (loop = uid_loop[INSN_UID (label)]; loop; loop = loop->outer)
2625 /* Scan the function looking for loops. Record the start and end of each loop.
2626 Also mark as invalid loops any loops that contain a setjmp or are branched
2627 to from outside the loop. */
2630 find_and_verify_loops (f, loops)
2632 struct loops *loops;
2637 struct loop *current_loop;
2638 struct loop *next_loop;
2641 num_loops = loops->num;
2643 compute_luids (f, NULL_RTX, 0);
2645 /* If there are jumps to undefined labels,
2646 treat them as jumps out of any/all loops.
2647 This also avoids writing past end of tables when there are no loops. */
2650 /* Find boundaries of loops, mark which loops are contained within
2651 loops, and invalidate loops that have setjmp. */
2654 current_loop = NULL;
2655 for (insn = f; insn; insn = NEXT_INSN (insn))
2657 if (GET_CODE (insn) == NOTE)
2658 switch (NOTE_LINE_NUMBER (insn))
2660 case NOTE_INSN_LOOP_BEG:
2661 next_loop = loops->array + num_loops;
2662 next_loop->num = num_loops;
2664 next_loop->start = insn;
2665 next_loop->outer = current_loop;
2666 current_loop = next_loop;
2669 case NOTE_INSN_LOOP_CONT:
2670 current_loop->cont = insn;
2673 case NOTE_INSN_LOOP_VTOP:
2674 current_loop->vtop = insn;
2677 case NOTE_INSN_LOOP_END:
2681 current_loop->end = insn;
2682 current_loop = current_loop->outer;
2689 if (GET_CODE (insn) == CALL_INSN
2690 && find_reg_note (insn, REG_SETJMP, NULL))
2692 /* In this case, we must invalidate our current loop and any
2694 for (loop = current_loop; loop; loop = loop->outer)
2697 if (loop_dump_stream)
2698 fprintf (loop_dump_stream,
2699 "\nLoop at %d ignored due to setjmp.\n",
2700 INSN_UID (loop->start));
2704 /* Note that this will mark the NOTE_INSN_LOOP_END note as being in the
2705 enclosing loop, but this doesn't matter. */
2706 uid_loop[INSN_UID (insn)] = current_loop;
2709 /* Any loop containing a label used in an initializer must be invalidated,
2710 because it can be jumped into from anywhere. */
2711 for (label = forced_labels; label; label = XEXP (label, 1))
2712 invalidate_loops_containing_label (XEXP (label, 0));
2714 /* Any loop containing a label used for an exception handler must be
2715 invalidated, because it can be jumped into from anywhere. */
2716 for_each_eh_label (invalidate_loops_containing_label);
2718 /* Now scan all insn's in the function. If any JUMP_INSN branches into a
2719 loop that it is not contained within, that loop is marked invalid.
2720 If any INSN or CALL_INSN uses a label's address, then the loop containing
2721 that label is marked invalid, because it could be jumped into from
2724 Also look for blocks of code ending in an unconditional branch that
2725 exits the loop. If such a block is surrounded by a conditional
2726 branch around the block, move the block elsewhere (see below) and
2727 invert the jump to point to the code block. This may eliminate a
2728 label in our loop and will simplify processing by both us and a
2729 possible second cse pass. */
2731 for (insn = f; insn; insn = NEXT_INSN (insn))
2734 struct loop *this_loop = uid_loop[INSN_UID (insn)];
2736 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
2738 rtx note = find_reg_note (insn, REG_LABEL, NULL_RTX);
2740 invalidate_loops_containing_label (XEXP (note, 0));
2743 if (GET_CODE (insn) != JUMP_INSN)
2746 mark_loop_jump (PATTERN (insn), this_loop);
2748 /* See if this is an unconditional branch outside the loop. */
2750 && (GET_CODE (PATTERN (insn)) == RETURN
2751 || (any_uncondjump_p (insn)
2752 && onlyjump_p (insn)
2753 && (uid_loop[INSN_UID (JUMP_LABEL (insn))]
2755 && get_max_uid () < max_uid_for_loop)
2758 rtx our_next = next_real_insn (insn);
2759 rtx last_insn_to_move = NEXT_INSN (insn);
2760 struct loop *dest_loop;
2761 struct loop *outer_loop = NULL;
2763 /* Go backwards until we reach the start of the loop, a label,
2765 for (p = PREV_INSN (insn);
2766 GET_CODE (p) != CODE_LABEL
2767 && ! (GET_CODE (p) == NOTE
2768 && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
2769 && GET_CODE (p) != JUMP_INSN;
2773 /* Check for the case where we have a jump to an inner nested
2774 loop, and do not perform the optimization in that case. */
2776 if (JUMP_LABEL (insn))
2778 dest_loop = uid_loop[INSN_UID (JUMP_LABEL (insn))];
2781 for (outer_loop = dest_loop; outer_loop;
2782 outer_loop = outer_loop->outer)
2783 if (outer_loop == this_loop)
2788 /* Make sure that the target of P is within the current loop. */
2790 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p)
2791 && uid_loop[INSN_UID (JUMP_LABEL (p))] != this_loop)
2792 outer_loop = this_loop;
2794 /* If we stopped on a JUMP_INSN to the next insn after INSN,
2795 we have a block of code to try to move.
2797 We look backward and then forward from the target of INSN
2798 to find a BARRIER at the same loop depth as the target.
2799 If we find such a BARRIER, we make a new label for the start
2800 of the block, invert the jump in P and point it to that label,
2801 and move the block of code to the spot we found. */
2804 && GET_CODE (p) == JUMP_INSN
2805 && JUMP_LABEL (p) != 0
2806 /* Just ignore jumps to labels that were never emitted.
2807 These always indicate compilation errors. */
2808 && INSN_UID (JUMP_LABEL (p)) != 0
2809 && any_condjump_p (p) && onlyjump_p (p)
2810 && next_real_insn (JUMP_LABEL (p)) == our_next
2811 /* If it's not safe to move the sequence, then we
2813 && insns_safe_to_move_p (p, NEXT_INSN (insn),
2814 &last_insn_to_move))
2817 = JUMP_LABEL (insn) ? JUMP_LABEL (insn) : get_last_insn ();
2818 struct loop *target_loop = uid_loop[INSN_UID (target)];
2822 /* Search for possible garbage past the conditional jumps
2823 and look for the last barrier. */
2824 for (tmp = last_insn_to_move;
2825 tmp && GET_CODE (tmp) != CODE_LABEL; tmp = NEXT_INSN (tmp))
2826 if (GET_CODE (tmp) == BARRIER)
2827 last_insn_to_move = tmp;
2829 for (loc = target; loc; loc = PREV_INSN (loc))
2830 if (GET_CODE (loc) == BARRIER
2831 /* Don't move things inside a tablejump. */
2832 && ((loc2 = next_nonnote_insn (loc)) == 0
2833 || GET_CODE (loc2) != CODE_LABEL
2834 || (loc2 = next_nonnote_insn (loc2)) == 0
2835 || GET_CODE (loc2) != JUMP_INSN
2836 || (GET_CODE (PATTERN (loc2)) != ADDR_VEC
2837 && GET_CODE (PATTERN (loc2)) != ADDR_DIFF_VEC))
2838 && uid_loop[INSN_UID (loc)] == target_loop)
2842 for (loc = target; loc; loc = NEXT_INSN (loc))
2843 if (GET_CODE (loc) == BARRIER
2844 /* Don't move things inside a tablejump. */
2845 && ((loc2 = next_nonnote_insn (loc)) == 0
2846 || GET_CODE (loc2) != CODE_LABEL
2847 || (loc2 = next_nonnote_insn (loc2)) == 0
2848 || GET_CODE (loc2) != JUMP_INSN
2849 || (GET_CODE (PATTERN (loc2)) != ADDR_VEC
2850 && GET_CODE (PATTERN (loc2)) != ADDR_DIFF_VEC))
2851 && uid_loop[INSN_UID (loc)] == target_loop)
2856 rtx cond_label = JUMP_LABEL (p);
2857 rtx new_label = get_label_after (p);
2859 /* Ensure our label doesn't go away. */
2860 LABEL_NUSES (cond_label)++;
2862 /* Verify that uid_loop is large enough and that
2864 if (invert_jump (p, new_label, 1))
2868 /* If no suitable BARRIER was found, create a suitable
2869 one before TARGET. Since TARGET is a fall through
2870 path, we'll need to insert an jump around our block
2871 and add a BARRIER before TARGET.
2873 This creates an extra unconditional jump outside
2874 the loop. However, the benefits of removing rarely
2875 executed instructions from inside the loop usually
2876 outweighs the cost of the extra unconditional jump
2877 outside the loop. */
2882 temp = gen_jump (JUMP_LABEL (insn));
2883 temp = emit_jump_insn_before (temp, target);
2884 JUMP_LABEL (temp) = JUMP_LABEL (insn);
2885 LABEL_NUSES (JUMP_LABEL (insn))++;
2886 loc = emit_barrier_before (target);
2889 /* Include the BARRIER after INSN and copy the
2891 if (squeeze_notes (&new_label, &last_insn_to_move))
2893 reorder_insns (new_label, last_insn_to_move, loc);
2895 /* All those insns are now in TARGET_LOOP. */
2897 q != NEXT_INSN (last_insn_to_move);
2899 uid_loop[INSN_UID (q)] = target_loop;
2901 /* The label jumped to by INSN is no longer a loop
2902 exit. Unless INSN does not have a label (e.g.,
2903 it is a RETURN insn), search loop->exit_labels
2904 to find its label_ref, and remove it. Also turn
2905 off LABEL_OUTSIDE_LOOP_P bit. */
2906 if (JUMP_LABEL (insn))
2908 for (q = 0, r = this_loop->exit_labels;
2910 q = r, r = LABEL_NEXTREF (r))
2911 if (XEXP (r, 0) == JUMP_LABEL (insn))
2913 LABEL_OUTSIDE_LOOP_P (r) = 0;
2915 LABEL_NEXTREF (q) = LABEL_NEXTREF (r);
2917 this_loop->exit_labels = LABEL_NEXTREF (r);
2921 for (loop = this_loop; loop && loop != target_loop;
2925 /* If we didn't find it, then something is
2931 /* P is now a jump outside the loop, so it must be put
2932 in loop->exit_labels, and marked as such.
2933 The easiest way to do this is to just call
2934 mark_loop_jump again for P. */
2935 mark_loop_jump (PATTERN (p), this_loop);
2937 /* If INSN now jumps to the insn after it,
2939 if (JUMP_LABEL (insn) != 0
2940 && (next_real_insn (JUMP_LABEL (insn))
2941 == next_real_insn (insn)))
2942 delete_related_insns (insn);
2945 /* Continue the loop after where the conditional
2946 branch used to jump, since the only branch insn
2947 in the block (if it still remains) is an inter-loop
2948 branch and hence needs no processing. */
2949 insn = NEXT_INSN (cond_label);
2951 if (--LABEL_NUSES (cond_label) == 0)
2952 delete_related_insns (cond_label);
2954 /* This loop will be continued with NEXT_INSN (insn). */
2955 insn = PREV_INSN (insn);
2962 /* If any label in X jumps to a loop different from LOOP_NUM and any of the
2963 loops it is contained in, mark the target loop invalid.
2965 For speed, we assume that X is part of a pattern of a JUMP_INSN. */
2968 mark_loop_jump (x, loop)
2972 struct loop *dest_loop;
2973 struct loop *outer_loop;
2976 switch (GET_CODE (x))
2989 /* There could be a label reference in here. */
2990 mark_loop_jump (XEXP (x, 0), loop);
2996 mark_loop_jump (XEXP (x, 0), loop);
2997 mark_loop_jump (XEXP (x, 1), loop);
3001 /* This may refer to a LABEL_REF or SYMBOL_REF. */
3002 mark_loop_jump (XEXP (x, 1), loop);
3007 mark_loop_jump (XEXP (x, 0), loop);
3011 dest_loop = uid_loop[INSN_UID (XEXP (x, 0))];
3013 /* Link together all labels that branch outside the loop. This
3014 is used by final_[bg]iv_value and the loop unrolling code. Also
3015 mark this LABEL_REF so we know that this branch should predict
3018 /* A check to make sure the label is not in an inner nested loop,
3019 since this does not count as a loop exit. */
3022 for (outer_loop = dest_loop; outer_loop;
3023 outer_loop = outer_loop->outer)
3024 if (outer_loop == loop)
3030 if (loop && ! outer_loop)
3032 LABEL_OUTSIDE_LOOP_P (x) = 1;
3033 LABEL_NEXTREF (x) = loop->exit_labels;
3034 loop->exit_labels = x;
3036 for (outer_loop = loop;
3037 outer_loop && outer_loop != dest_loop;
3038 outer_loop = outer_loop->outer)
3039 outer_loop->exit_count++;
3042 /* If this is inside a loop, but not in the current loop or one enclosed
3043 by it, it invalidates at least one loop. */
3048 /* We must invalidate every nested loop containing the target of this
3049 label, except those that also contain the jump insn. */
3051 for (; dest_loop; dest_loop = dest_loop->outer)
3053 /* Stop when we reach a loop that also contains the jump insn. */
3054 for (outer_loop = loop; outer_loop; outer_loop = outer_loop->outer)
3055 if (dest_loop == outer_loop)
3058 /* If we get here, we know we need to invalidate a loop. */
3059 if (loop_dump_stream && ! dest_loop->invalid)
3060 fprintf (loop_dump_stream,
3061 "\nLoop at %d ignored due to multiple entry points.\n",
3062 INSN_UID (dest_loop->start));
3064 dest_loop->invalid = 1;
3069 /* If this is not setting pc, ignore. */
3070 if (SET_DEST (x) == pc_rtx)
3071 mark_loop_jump (SET_SRC (x), loop);
3075 mark_loop_jump (XEXP (x, 1), loop);
3076 mark_loop_jump (XEXP (x, 2), loop);
3081 for (i = 0; i < XVECLEN (x, 0); i++)
3082 mark_loop_jump (XVECEXP (x, 0, i), loop);
3086 for (i = 0; i < XVECLEN (x, 1); i++)
3087 mark_loop_jump (XVECEXP (x, 1, i), loop);
3091 /* Strictly speaking this is not a jump into the loop, only a possible
3092 jump out of the loop. However, we have no way to link the destination
3093 of this jump onto the list of exit labels. To be safe we mark this
3094 loop and any containing loops as invalid. */
3097 for (outer_loop = loop; outer_loop; outer_loop = outer_loop->outer)
3099 if (loop_dump_stream && ! outer_loop->invalid)
3100 fprintf (loop_dump_stream,
3101 "\nLoop at %d ignored due to unknown exit jump.\n",
3102 INSN_UID (outer_loop->start));
3103 outer_loop->invalid = 1;
3110 /* Return nonzero if there is a label in the range from
3111 insn INSN to and including the insn whose luid is END
3112 INSN must have an assigned luid (i.e., it must not have
3113 been previously created by loop.c). */
3116 labels_in_range_p (insn, end)
3120 while (insn && INSN_LUID (insn) <= end)
3122 if (GET_CODE (insn) == CODE_LABEL)
3124 insn = NEXT_INSN (insn);
3130 /* Record that a memory reference X is being set. */
3133 note_addr_stored (x, y, data)
3135 rtx y ATTRIBUTE_UNUSED;
3136 void *data ATTRIBUTE_UNUSED;
3138 struct loop_info *loop_info = data;
3140 if (x == 0 || GET_CODE (x) != MEM)
3143 /* Count number of memory writes.
3144 This affects heuristics in strength_reduce. */
3145 loop_info->num_mem_sets++;
3147 /* BLKmode MEM means all memory is clobbered. */
3148 if (GET_MODE (x) == BLKmode)
3150 if (RTX_UNCHANGING_P (x))
3151 loop_info->unknown_constant_address_altered = 1;
3153 loop_info->unknown_address_altered = 1;
3158 loop_info->store_mems = gen_rtx_EXPR_LIST (VOIDmode, x,
3159 loop_info->store_mems);
3162 /* X is a value modified by an INSN that references a biv inside a loop
3163 exit test (ie, X is somehow related to the value of the biv). If X
3164 is a pseudo that is used more than once, then the biv is (effectively)
3165 used more than once. DATA is a pointer to a loop_regs structure. */
3168 note_set_pseudo_multiple_uses (x, y, data)
3170 rtx y ATTRIBUTE_UNUSED;
3173 struct loop_regs *regs = (struct loop_regs *) data;
3178 while (GET_CODE (x) == STRICT_LOW_PART
3179 || GET_CODE (x) == SIGN_EXTRACT
3180 || GET_CODE (x) == ZERO_EXTRACT
3181 || GET_CODE (x) == SUBREG)
3184 if (GET_CODE (x) != REG || REGNO (x) < FIRST_PSEUDO_REGISTER)
3187 /* If we do not have usage information, or if we know the register
3188 is used more than once, note that fact for check_dbra_loop. */
3189 if (REGNO (x) >= max_reg_before_loop
3190 || ! regs->array[REGNO (x)].single_usage
3191 || regs->array[REGNO (x)].single_usage == const0_rtx)
3192 regs->multiple_uses = 1;
3195 /* Return nonzero if the rtx X is invariant over the current loop.
3197 The value is 2 if we refer to something only conditionally invariant.
3199 A memory ref is invariant if it is not volatile and does not conflict
3200 with anything stored in `loop_info->store_mems'. */
3203 loop_invariant_p (loop, x)
3204 const struct loop *loop;
3207 struct loop_info *loop_info = LOOP_INFO (loop);
3208 struct loop_regs *regs = LOOP_REGS (loop);
3212 int conditional = 0;
3217 code = GET_CODE (x);
3227 /* A LABEL_REF is normally invariant, however, if we are unrolling
3228 loops, and this label is inside the loop, then it isn't invariant.
3229 This is because each unrolled copy of the loop body will have
3230 a copy of this label. If this was invariant, then an insn loading
3231 the address of this label into a register might get moved outside
3232 the loop, and then each loop body would end up using the same label.
3234 We don't know the loop bounds here though, so just fail for all
3236 if (flag_unroll_loops)
3243 case UNSPEC_VOLATILE:
3247 /* We used to check RTX_UNCHANGING_P (x) here, but that is invalid
3248 since the reg might be set by initialization within the loop. */
3250 if ((x == frame_pointer_rtx || x == hard_frame_pointer_rtx
3251 || x == arg_pointer_rtx || x == pic_offset_table_rtx)
3252 && ! current_function_has_nonlocal_goto)
3255 if (LOOP_INFO (loop)->has_call
3256 && REGNO (x) < FIRST_PSEUDO_REGISTER && call_used_regs[REGNO (x)])
3259 if (regs->array[REGNO (x)].set_in_loop < 0)
3262 return regs->array[REGNO (x)].set_in_loop == 0;
3265 /* Volatile memory references must be rejected. Do this before
3266 checking for read-only items, so that volatile read-only items
3267 will be rejected also. */
3268 if (MEM_VOLATILE_P (x))
3271 /* See if there is any dependence between a store and this load. */
3272 mem_list_entry = loop_info->store_mems;
3273 while (mem_list_entry)
3275 if (true_dependence (XEXP (mem_list_entry, 0), VOIDmode,
3279 mem_list_entry = XEXP (mem_list_entry, 1);
3282 /* It's not invalidated by a store in memory
3283 but we must still verify the address is invariant. */
3287 /* Don't mess with insns declared volatile. */
3288 if (MEM_VOLATILE_P (x))
3296 fmt = GET_RTX_FORMAT (code);
3297 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3301 int tem = loop_invariant_p (loop, XEXP (x, i));
3307 else if (fmt[i] == 'E')
3310 for (j = 0; j < XVECLEN (x, i); j++)
3312 int tem = loop_invariant_p (loop, XVECEXP (x, i, j));
3322 return 1 + conditional;
3325 /* Return nonzero if all the insns in the loop that set REG
3326 are INSN and the immediately following insns,
3327 and if each of those insns sets REG in an invariant way
3328 (not counting uses of REG in them).
3330 The value is 2 if some of these insns are only conditionally invariant.
3332 We assume that INSN itself is the first set of REG
3333 and that its source is invariant. */
3336 consec_sets_invariant_p (loop, reg, n_sets, insn)
3337 const struct loop *loop;
3341 struct loop_regs *regs = LOOP_REGS (loop);
3343 unsigned int regno = REGNO (reg);
3345 /* Number of sets we have to insist on finding after INSN. */
3346 int count = n_sets - 1;
3347 int old = regs->array[regno].set_in_loop;
3351 /* If N_SETS hit the limit, we can't rely on its value. */
3355 regs->array[regno].set_in_loop = 0;
3363 code = GET_CODE (p);
3365 /* If library call, skip to end of it. */
3366 if (code == INSN && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
3371 && (set = single_set (p))
3372 && GET_CODE (SET_DEST (set)) == REG
3373 && REGNO (SET_DEST (set)) == regno)
3375 this = loop_invariant_p (loop, SET_SRC (set));
3378 else if ((temp = find_reg_note (p, REG_EQUAL, NULL_RTX)))
3380 /* If this is a libcall, then any invariant REG_EQUAL note is OK.
3381 If this is an ordinary insn, then only CONSTANT_P REG_EQUAL
3383 this = (CONSTANT_P (XEXP (temp, 0))
3384 || (find_reg_note (p, REG_RETVAL, NULL_RTX)
3385 && loop_invariant_p (loop, XEXP (temp, 0))));
3392 else if (code != NOTE)
3394 regs->array[regno].set_in_loop = old;
3399 regs->array[regno].set_in_loop = old;
3400 /* If loop_invariant_p ever returned 2, we return 2. */
3401 return 1 + (value & 2);
3405 /* I don't think this condition is sufficient to allow INSN
3406 to be moved, so we no longer test it. */
3408 /* Return 1 if all insns in the basic block of INSN and following INSN
3409 that set REG are invariant according to TABLE. */
3412 all_sets_invariant_p (reg, insn, table)
3417 int regno = REGNO (reg);
3423 code = GET_CODE (p);
3424 if (code == CODE_LABEL || code == JUMP_INSN)
3426 if (code == INSN && GET_CODE (PATTERN (p)) == SET
3427 && GET_CODE (SET_DEST (PATTERN (p))) == REG
3428 && REGNO (SET_DEST (PATTERN (p))) == regno)
3430 if (! loop_invariant_p (loop, SET_SRC (PATTERN (p)), table))
3437 /* Look at all uses (not sets) of registers in X. For each, if it is
3438 the single use, set USAGE[REGNO] to INSN; if there was a previous use in
3439 a different insn, set USAGE[REGNO] to const0_rtx. */
3442 find_single_use_in_loop (regs, insn, x)
3443 struct loop_regs *regs;
3447 enum rtx_code code = GET_CODE (x);
3448 const char *fmt = GET_RTX_FORMAT (code);
3452 regs->array[REGNO (x)].single_usage
3453 = (regs->array[REGNO (x)].single_usage != 0
3454 && regs->array[REGNO (x)].single_usage != insn)
3455 ? const0_rtx : insn;
3457 else if (code == SET)
3459 /* Don't count SET_DEST if it is a REG; otherwise count things
3460 in SET_DEST because if a register is partially modified, it won't
3461 show up as a potential movable so we don't care how USAGE is set
3463 if (GET_CODE (SET_DEST (x)) != REG)
3464 find_single_use_in_loop (regs, insn, SET_DEST (x));
3465 find_single_use_in_loop (regs, insn, SET_SRC (x));
3468 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3470 if (fmt[i] == 'e' && XEXP (x, i) != 0)
3471 find_single_use_in_loop (regs, insn, XEXP (x, i));
3472 else if (fmt[i] == 'E')
3473 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3474 find_single_use_in_loop (regs, insn, XVECEXP (x, i, j));
3478 /* Count and record any set in X which is contained in INSN. Update
3479 REGS->array[I].MAY_NOT_OPTIMIZE and LAST_SET for any register I set
3483 count_one_set (regs, insn, x, last_set)
3484 struct loop_regs *regs;
3488 if (GET_CODE (x) == CLOBBER && GET_CODE (XEXP (x, 0)) == REG)
3489 /* Don't move a reg that has an explicit clobber.
3490 It's not worth the pain to try to do it correctly. */
3491 regs->array[REGNO (XEXP (x, 0))].may_not_optimize = 1;
3493 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
3495 rtx dest = SET_DEST (x);
3496 while (GET_CODE (dest) == SUBREG
3497 || GET_CODE (dest) == ZERO_EXTRACT
3498 || GET_CODE (dest) == SIGN_EXTRACT
3499 || GET_CODE (dest) == STRICT_LOW_PART)
3500 dest = XEXP (dest, 0);
3501 if (GET_CODE (dest) == REG)
3504 int regno = REGNO (dest);
3505 for (i = 0; i < LOOP_REGNO_NREGS (regno, dest); i++)
3507 /* If this is the first setting of this reg
3508 in current basic block, and it was set before,
3509 it must be set in two basic blocks, so it cannot
3510 be moved out of the loop. */
3511 if (regs->array[regno].set_in_loop > 0
3513 regs->array[regno+i].may_not_optimize = 1;
3514 /* If this is not first setting in current basic block,
3515 see if reg was used in between previous one and this.
3516 If so, neither one can be moved. */
3517 if (last_set[regno] != 0
3518 && reg_used_between_p (dest, last_set[regno], insn))
3519 regs->array[regno+i].may_not_optimize = 1;
3520 if (regs->array[regno+i].set_in_loop < 127)
3521 ++regs->array[regno+i].set_in_loop;
3522 last_set[regno+i] = insn;
3528 /* Given a loop that is bounded by LOOP->START and LOOP->END and that
3529 is entered at LOOP->SCAN_START, return 1 if the register set in SET
3530 contained in insn INSN is used by any insn that precedes INSN in
3531 cyclic order starting from the loop entry point.
3533 We don't want to use INSN_LUID here because if we restrict INSN to those
3534 that have a valid INSN_LUID, it means we cannot move an invariant out
3535 from an inner loop past two loops. */
3538 loop_reg_used_before_p (loop, set, insn)
3539 const struct loop *loop;
3542 rtx reg = SET_DEST (set);
3545 /* Scan forward checking for register usage. If we hit INSN, we
3546 are done. Otherwise, if we hit LOOP->END, wrap around to LOOP->START. */
3547 for (p = loop->scan_start; p != insn; p = NEXT_INSN (p))
3549 if (INSN_P (p) && reg_overlap_mentioned_p (reg, PATTERN (p)))
3560 /* Information we collect about arrays that we might want to prefetch. */
3561 struct prefetch_info
3563 struct iv_class *class; /* Class this prefetch is based on. */
3564 struct induction *giv; /* GIV this prefetch is based on. */
3565 rtx base_address; /* Start prefetching from this address plus
3567 HOST_WIDE_INT index;
3568 HOST_WIDE_INT stride; /* Prefetch stride in bytes in each
3570 unsigned int bytes_accesed; /* Sum of sizes of all acceses to this
3571 prefetch area in one iteration. */
3572 unsigned int total_bytes; /* Total bytes loop will access in this block.
3573 This is set only for loops with known
3574 iteration counts and is 0xffffffff
3576 unsigned int write : 1; /* 1 for read/write prefetches. */
3577 unsigned int prefetch_in_loop : 1;
3578 /* 1 for those chosen for prefetching. */
3579 unsigned int prefetch_before_loop : 1;
3580 /* 1 for those chosen for prefetching. */
3583 /* Data used by check_store function. */
3584 struct check_store_data
3590 static void check_store PARAMS ((rtx, rtx, void *));
3591 static void emit_prefetch_instructions PARAMS ((struct loop *));
3592 static int rtx_equal_for_prefetch_p PARAMS ((rtx, rtx));
3594 /* Set mem_write when mem_address is found. Used as callback to
3597 check_store (x, pat, data)
3598 rtx x, pat ATTRIBUTE_UNUSED;
3601 struct check_store_data *d = (struct check_store_data *) data;
3603 if ((GET_CODE (x) == MEM) && rtx_equal_p (d->mem_address, XEXP (x, 0)))
3607 /* Like rtx_equal_p, but attempts to swap commutative operands. This is
3608 important to get some addresses combined. Later more sophisticated
3609 transformations can be added when necesary.
3611 ??? Same trick with swapping operand is done at several other places.
3612 It can be nice to develop some common way to handle this. */
3615 rtx_equal_for_prefetch_p (x, y)
3620 enum rtx_code code = GET_CODE (x);
3625 if (code != GET_CODE (y))
3628 code = GET_CODE (x);
3630 if (GET_RTX_CLASS (code) == 'c')
3632 return ((rtx_equal_for_prefetch_p (XEXP (x, 0), XEXP (y, 0))
3633 && rtx_equal_for_prefetch_p (XEXP (x, 1), XEXP (y, 1)))
3634 || (rtx_equal_for_prefetch_p (XEXP (x, 0), XEXP (y, 1))
3635 && rtx_equal_for_prefetch_p (XEXP (x, 1), XEXP (y, 0))));
3637 /* Compare the elements. If any pair of corresponding elements fails to
3638 match, return 0 for the whole thing. */
3640 fmt = GET_RTX_FORMAT (code);
3641 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3646 if (XWINT (x, i) != XWINT (y, i))
3651 if (XINT (x, i) != XINT (y, i))
3656 /* Two vectors must have the same length. */
3657 if (XVECLEN (x, i) != XVECLEN (y, i))
3660 /* And the corresponding elements must match. */
3661 for (j = 0; j < XVECLEN (x, i); j++)
3662 if (rtx_equal_for_prefetch_p (XVECEXP (x, i, j),
3663 XVECEXP (y, i, j)) == 0)
3668 if (rtx_equal_for_prefetch_p (XEXP (x, i), XEXP (y, i)) == 0)
3673 if (strcmp (XSTR (x, i), XSTR (y, i)))
3678 /* These are just backpointers, so they don't matter. */
3684 /* It is believed that rtx's at this level will never
3685 contain anything but integers and other rtx's,
3686 except for within LABEL_REFs and SYMBOL_REFs. */
3694 /* Remove constant addition value from the expression X (when present)
3697 static HOST_WIDE_INT
3698 remove_constant_addition (x)
3701 HOST_WIDE_INT addval = 0;
3704 /* Avoid clobbering a shared CONST expression. */
3705 if (GET_CODE (exp) == CONST)
3707 if (GET_CODE (XEXP (exp, 0)) == PLUS
3708 && GET_CODE (XEXP (XEXP (exp, 0), 0)) == SYMBOL_REF
3709 && GET_CODE (XEXP (XEXP (exp, 0), 1)) == CONST_INT)
3711 *x = XEXP (XEXP (exp, 0), 0);
3712 return INTVAL (XEXP (XEXP (exp, 0), 1));
3717 if (GET_CODE (exp) == CONST_INT)
3719 addval = INTVAL (exp);
3723 /* For plus expression recurse on ourself. */
3724 else if (GET_CODE (exp) == PLUS)
3726 addval += remove_constant_addition (&XEXP (exp, 0));
3727 addval += remove_constant_addition (&XEXP (exp, 1));
3729 /* In case our parameter was constant, remove extra zero from the
3731 if (XEXP (exp, 0) == const0_rtx)
3733 else if (XEXP (exp, 1) == const0_rtx)
3740 /* Attempt to identify accesses to arrays that are most likely to cause cache
3741 misses, and emit prefetch instructions a few prefetch blocks forward.
3743 To detect the arrays we use the GIV information that was collected by the
3744 strength reduction pass.
3746 The prefetch instructions are generated after the GIV information is done
3747 and before the strength reduction process. The new GIVs are injected into
3748 the strength reduction tables, so the prefetch addresses are optimized as
3751 GIVs are split into base address, stride, and constant addition values.
3752 GIVs with the same address, stride and close addition values are combined
3753 into a single prefetch. Also writes to GIVs are detected, so that prefetch
3754 for write instructions can be used for the block we write to, on machines
3755 that support write prefetches.
3757 Several heuristics are used to determine when to prefetch. They are
3758 controlled by defined symbols that can be overridden for each target. */
3761 emit_prefetch_instructions (loop)
3764 int num_prefetches = 0;
3765 int num_real_prefetches = 0;
3766 int num_real_write_prefetches = 0;
3769 struct iv_class *bl;
3770 struct induction *iv;
3771 struct prefetch_info info[MAX_PREFETCHES];
3772 struct loop_ivs *ivs = LOOP_IVS (loop);
3777 /* Consider only loops w/o calls. When a call is done, the loop is probably
3778 slow enough to read the memory. */
3779 if (PREFETCH_NO_CALL && LOOP_INFO (loop)->has_call)
3781 if (loop_dump_stream)
3782 fprintf (loop_dump_stream, "Prefetch: ignoring loop - has call.\n");
3787 if (PREFETCH_NO_LOW_LOOPCNT
3788 && LOOP_INFO (loop)->n_iterations
3789 && LOOP_INFO (loop)->n_iterations <= PREFETCH_LOW_LOOPCNT)
3791 if (loop_dump_stream)
3792 fprintf (loop_dump_stream,
3793 "Prefetch: ignoring loop - not enought iterations.\n");
3797 /* Search all induction variables and pick those interesting for the prefetch
3799 for (bl = ivs->list; bl; bl = bl->next)
3801 struct induction *biv = bl->biv, *biv1;
3806 /* Expect all BIVs to be executed in each iteration. This makes our
3807 analysis more conservative. */
3810 /* Discard non-constant additions that we can't handle well yet, and
3811 BIVs that are executed multiple times; such BIVs ought to be
3812 handled in the nested loop. We accept not_every_iteration BIVs,
3813 since these only result in larger strides and make our
3814 heuristics more conservative.
3815 ??? What does the last sentence mean? */
3816 if (GET_CODE (biv->add_val) != CONST_INT)
3818 if (loop_dump_stream)
3820 fprintf (loop_dump_stream,
3821 "Prefetch: biv %i ignored: non-constant addition at insn %i:",
3822 REGNO (biv->src_reg), INSN_UID (biv->insn));
3823 print_rtl (loop_dump_stream, biv->add_val);
3824 fprintf (loop_dump_stream, "\n");
3829 if (biv->maybe_multiple)
3831 if (loop_dump_stream)
3833 fprintf (loop_dump_stream,
3834 "Prefetch: biv %i ignored: maybe_multiple at insn %i:",
3835 REGNO (biv->src_reg), INSN_UID (biv->insn));
3836 print_rtl (loop_dump_stream, biv->add_val);
3837 fprintf (loop_dump_stream, "\n");
3842 basestride += INTVAL (biv1->add_val);
3843 biv1 = biv1->next_iv;
3846 if (biv1 || !basestride)
3849 for (iv = bl->giv; iv; iv = iv->next_iv)
3853 HOST_WIDE_INT index = 0;
3855 HOST_WIDE_INT stride;
3856 struct check_store_data d;
3857 int size = GET_MODE_SIZE (GET_MODE (iv));
3859 /* There are several reasons why an induction variable is not
3860 interesting to us. */
3861 if (iv->giv_type != DEST_ADDR
3862 /* We are interested only in constant stride memory references
3863 in order to be able to compute density easily. */
3864 || GET_CODE (iv->mult_val) != CONST_INT
3865 /* Don't handle reversed order prefetches, since they are usually
3866 ineffective. Later we may be able to reverse such BIVs. */
3867 || (PREFETCH_NO_REVERSE_ORDER
3868 && (stride = INTVAL (iv->mult_val) * basestride) < 0)
3869 /* Prefetching of accesses with such an extreme stride is probably
3870 not worthwhile, either. */
3871 || (PREFETCH_NO_EXTREME_STRIDE
3872 && stride > PREFETCH_EXTREME_STRIDE)
3873 /* Ignore GIVs with varying add values; we can't predict the
3874 value for the next iteration. */
3875 || !loop_invariant_p (loop, iv->add_val)
3876 /* Ignore GIVs in the nested loops; they ought to have been
3878 || iv->maybe_multiple)
3880 if (loop_dump_stream)
3881 fprintf (loop_dump_stream, "Prefetch: Ignoring giv at %i\n",
3882 INSN_UID (iv->insn));
3886 /* Determine the pointer to the basic array we are examining. It is
3887 the sum of the BIV's initial value and the GIV's add_val. */
3890 address = copy_rtx (iv->add_val);
3891 temp = copy_rtx (bl->initial_value);
3893 address = simplify_gen_binary (PLUS, Pmode, temp, address);
3894 index = remove_constant_addition (&address);
3898 d.mem_address = *iv->location;
3900 /* When the GIV is not always executed, we might be better off by
3901 not dirtying the cache pages. */
3902 if (PREFETCH_NOT_ALWAYS || iv->always_executed)
3903 note_stores (PATTERN (iv->insn), check_store, &d);
3905 /* Attempt to find another prefetch to the same array and see if we
3906 can merge this one. */
3907 for (i = 0; i < num_prefetches; i++)
3908 if (rtx_equal_for_prefetch_p (address, info[i].base_address)
3909 && stride == info[i].stride)
3911 /* In case both access same array (same location
3912 just with small difference in constant indexes), merge
3913 the prefetches. Just do the later and the earlier will
3914 get prefetched from previous iteration.
3915 4096 is artificial threshold. It should not be too small,
3916 but also not bigger than small portion of memory usually
3917 traversed by single loop. */
3918 if (index >= info[i].index && index - info[i].index < 4096)
3920 info[i].write |= d.mem_write;
3921 info[i].bytes_accesed += size;
3922 info[i].index = index;
3925 info[num_prefetches].base_address = address;
3930 if (index < info[i].index && info[i].index - index < 4096)
3932 info[i].write |= d.mem_write;
3933 info[i].bytes_accesed += size;
3939 /* Merging failed. */
3942 info[num_prefetches].giv = iv;
3943 info[num_prefetches].class = bl;
3944 info[num_prefetches].index = index;
3945 info[num_prefetches].stride = stride;
3946 info[num_prefetches].base_address = address;
3947 info[num_prefetches].write = d.mem_write;
3948 info[num_prefetches].bytes_accesed = size;
3950 if (num_prefetches >= MAX_PREFETCHES)
3952 if (loop_dump_stream)
3953 fprintf (loop_dump_stream,
3954 "Maximal number of prefetches exceeded.\n");
3961 for (i = 0; i < num_prefetches; i++)
3963 /* Attempt to calculate the number of bytes fetched by the loop.
3965 if (LOOP_INFO (loop)->n_iterations
3966 && ((unsigned HOST_WIDE_INT) (0xffffffff / info[i].stride)
3967 >= LOOP_INFO (loop)->n_iterations))
3968 info[i].total_bytes = info[i].stride * LOOP_INFO (loop)->n_iterations;
3970 info[i].total_bytes = 0xffffffff;
3972 /* Prefetch is worthwhile only when the loads/stores are dense. */
3973 if (PREFETCH_ONLY_DENSE_MEM
3974 && info[i].bytes_accesed * 256 / info[i].stride > PREFETCH_DENSE_MEM
3975 && (info[i].total_bytes / PREFETCH_BLOCK
3976 >= PREFETCH_BLOCKS_BEFORE_LOOP_MIN))
3978 info[i].prefetch_before_loop = 1;
3979 info[i].prefetch_in_loop
3980 = (info[i].total_bytes / PREFETCH_BLOCK
3981 > PREFETCH_BLOCKS_BEFORE_LOOP_MAX);
3984 info[i].prefetch_in_loop = 0, info[i].prefetch_before_loop = 0;
3986 if (info[i].prefetch_in_loop)
3988 num_real_prefetches += ((info[i].stride + PREFETCH_BLOCK - 1)
3991 num_real_write_prefetches
3992 += (info[i].stride + PREFETCH_BLOCK - 1) / PREFETCH_BLOCK;
3996 if (loop_dump_stream)
3998 for (i = 0; i < num_prefetches; i++)
4000 fprintf (loop_dump_stream, "Prefetch insn %i address: ",
4001 INSN_UID (info[i].giv->insn));
4002 print_rtl (loop_dump_stream, info[i].base_address);
4003 fprintf (loop_dump_stream, " Index: ");
4004 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, info[i].index);
4005 fprintf (loop_dump_stream, " stride: ");
4006 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, info[i].stride);
4007 fprintf (loop_dump_stream,
4008 " density: %i%% total_bytes: %u%sin loop: %s before: %s\n",
4009 (int) (info[i].bytes_accesed * 100 / info[i].stride),
4010 info[i].total_bytes,
4011 info[i].write ? " read/write " : " read only ",
4012 info[i].prefetch_in_loop ? "yes" : "no",
4013 info[i].prefetch_before_loop ? "yes" : "no");
4016 fprintf (loop_dump_stream, "Real prefetches needed: %i (write: %i)\n",
4017 num_real_prefetches, num_real_write_prefetches);
4020 if (!num_real_prefetches)
4023 ahead = SIMULTANEOUS_PREFETCHES / num_real_prefetches;
4028 for (i = 0; i < num_prefetches; i++)
4030 if (info[i].prefetch_in_loop)
4034 for (y = 0; y < ((info[i].stride + PREFETCH_BLOCK - 1)
4035 / PREFETCH_BLOCK); y++)
4037 rtx loc = copy_rtx (*info[i].giv->location);
4039 int bytes_ahead = PREFETCH_BLOCK * (ahead + y);
4040 rtx before_insn = info[i].giv->insn;
4041 rtx prev_insn = PREV_INSN (info[i].giv->insn);
4043 /* We can save some effort by offsetting the address on
4044 architectures with offsettable memory references. */
4045 if (offsettable_address_p (0, VOIDmode, loc))
4046 loc = plus_constant (loc, bytes_ahead);
4049 rtx reg = gen_reg_rtx (Pmode);
4050 loop_iv_add_mult_emit_before (loop, loc, const1_rtx,
4051 GEN_INT (bytes_ahead), reg,
4056 /* Make sure the address operand is valid for prefetch. */
4057 if (! (*insn_data[(int)CODE_FOR_prefetch].operand[0].predicate)
4059 insn_data[(int)CODE_FOR_prefetch].operand[0].mode))
4060 loc = force_reg (Pmode, loc);
4061 emit_insn_before (gen_prefetch (loc, GEN_INT (info[i].write),
4065 /* Check all insns emitted and record the new GIV
4067 insn = NEXT_INSN (prev_insn);
4068 while (insn != before_insn)
4070 insn = check_insn_for_givs (loop, insn,
4071 info[i].giv->always_executed,
4072 info[i].giv->maybe_multiple);
4073 insn = NEXT_INSN (insn);
4078 if (info[i].prefetch_before_loop)
4082 /* Emit INSNs before the loop to fetch the first cache lines. */
4084 (!info[i].prefetch_in_loop || y < ahead)
4085 && y * PREFETCH_BLOCK < (int) info[i].total_bytes; y ++)
4087 rtx reg = gen_reg_rtx (Pmode);
4088 rtx loop_start = loop->start;
4089 rtx add_val = simplify_gen_binary (PLUS, Pmode,
4090 info[i].giv->add_val,
4091 GEN_INT (y * PREFETCH_BLOCK));
4093 loop_iv_add_mult_emit_before (loop, info[i].class->initial_value,
4094 info[i].giv->mult_val,
4095 add_val, reg, 0, loop_start);
4096 emit_insn_before (gen_prefetch (reg, GEN_INT (info[i].write),
4106 /* A "basic induction variable" or biv is a pseudo reg that is set
4107 (within this loop) only by incrementing or decrementing it. */
4108 /* A "general induction variable" or giv is a pseudo reg whose
4109 value is a linear function of a biv. */
4111 /* Bivs are recognized by `basic_induction_var';
4112 Givs by `general_induction_var'. */
4114 /* Communication with routines called via `note_stores'. */
4116 static rtx note_insn;
4118 /* Dummy register to have non-zero DEST_REG for DEST_ADDR type givs. */
4120 static rtx addr_placeholder;
4122 /* ??? Unfinished optimizations, and possible future optimizations,
4123 for the strength reduction code. */
4125 /* ??? The interaction of biv elimination, and recognition of 'constant'
4126 bivs, may cause problems. */
4128 /* ??? Add heuristics so that DEST_ADDR strength reduction does not cause
4129 performance problems.
4131 Perhaps don't eliminate things that can be combined with an addressing
4132 mode. Find all givs that have the same biv, mult_val, and add_val;
4133 then for each giv, check to see if its only use dies in a following
4134 memory address. If so, generate a new memory address and check to see
4135 if it is valid. If it is valid, then store the modified memory address,
4136 otherwise, mark the giv as not done so that it will get its own iv. */
4138 /* ??? Could try to optimize branches when it is known that a biv is always
4141 /* ??? When replace a biv in a compare insn, we should replace with closest
4142 giv so that an optimized branch can still be recognized by the combiner,
4143 e.g. the VAX acb insn. */
4145 /* ??? Many of the checks involving uid_luid could be simplified if regscan
4146 was rerun in loop_optimize whenever a register was added or moved.
4147 Also, some of the optimizations could be a little less conservative. */
4149 /* Scan the loop body and call FNCALL for each insn. In the addition to the
4150 LOOP and INSN parameters pass MAYBE_MULTIPLE and NOT_EVERY_ITERATION to the
4153 NOT_EVERY_ITERATION if current insn is not executed at least once for every
4154 loop iteration except for the last one.
4156 MAYBE_MULTIPLE is 1 if current insn may be executed more than once for every
4160 for_each_insn_in_loop (loop, fncall)
4162 loop_insn_callback fncall;
4164 /* This is 1 if current insn is not executed at least once for every loop
4166 int not_every_iteration = 0;
4167 int maybe_multiple = 0;
4168 int past_loop_latch = 0;
4172 /* If loop_scan_start points to the loop exit test, we have to be wary of
4173 subversive use of gotos inside expression statements. */
4174 if (prev_nonnote_insn (loop->scan_start) != prev_nonnote_insn (loop->start))
4175 maybe_multiple = back_branch_in_range_p (loop, loop->scan_start);
4177 /* Scan through loop to find all possible bivs. */
4179 for (p = next_insn_in_loop (loop, loop->scan_start);
4181 p = next_insn_in_loop (loop, p))
4183 p = fncall (loop, p, not_every_iteration, maybe_multiple);
4185 /* Past CODE_LABEL, we get to insns that may be executed multiple
4186 times. The only way we can be sure that they can't is if every
4187 jump insn between here and the end of the loop either
4188 returns, exits the loop, is a jump to a location that is still
4189 behind the label, or is a jump to the loop start. */
4191 if (GET_CODE (p) == CODE_LABEL)
4199 insn = NEXT_INSN (insn);
4200 if (insn == loop->scan_start)
4202 if (insn == loop->end)
4208 if (insn == loop->scan_start)
4212 if (GET_CODE (insn) == JUMP_INSN
4213 && GET_CODE (PATTERN (insn)) != RETURN
4214 && (!any_condjump_p (insn)
4215 || (JUMP_LABEL (insn) != 0
4216 && JUMP_LABEL (insn) != loop->scan_start
4217 && !loop_insn_first_p (p, JUMP_LABEL (insn)))))
4225 /* Past a jump, we get to insns for which we can't count
4226 on whether they will be executed during each iteration. */
4227 /* This code appears twice in strength_reduce. There is also similar
4228 code in scan_loop. */
4229 if (GET_CODE (p) == JUMP_INSN
4230 /* If we enter the loop in the middle, and scan around to the
4231 beginning, don't set not_every_iteration for that.
4232 This can be any kind of jump, since we want to know if insns
4233 will be executed if the loop is executed. */
4234 && !(JUMP_LABEL (p) == loop->top
4235 && ((NEXT_INSN (NEXT_INSN (p)) == loop->end
4236 && any_uncondjump_p (p))
4237 || (NEXT_INSN (p) == loop->end && any_condjump_p (p)))))
4241 /* If this is a jump outside the loop, then it also doesn't
4242 matter. Check to see if the target of this branch is on the
4243 loop->exits_labels list. */
4245 for (label = loop->exit_labels; label; label = LABEL_NEXTREF (label))
4246 if (XEXP (label, 0) == JUMP_LABEL (p))
4250 not_every_iteration = 1;
4253 else if (GET_CODE (p) == NOTE)
4255 /* At the virtual top of a converted loop, insns are again known to
4256 be executed each iteration: logically, the loop begins here
4257 even though the exit code has been duplicated.
4259 Insns are also again known to be executed each iteration at
4260 the LOOP_CONT note. */
4261 if ((NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP
4262 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_CONT)
4264 not_every_iteration = 0;
4265 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
4267 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
4271 /* Note if we pass a loop latch. If we do, then we can not clear
4272 NOT_EVERY_ITERATION below when we pass the last CODE_LABEL in
4273 a loop since a jump before the last CODE_LABEL may have started
4274 a new loop iteration.
4276 Note that LOOP_TOP is only set for rotated loops and we need
4277 this check for all loops, so compare against the CODE_LABEL
4278 which immediately follows LOOP_START. */
4279 if (GET_CODE (p) == JUMP_INSN
4280 && JUMP_LABEL (p) == NEXT_INSN (loop->start))
4281 past_loop_latch = 1;
4283 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
4284 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
4285 or not an insn is known to be executed each iteration of the
4286 loop, whether or not any iterations are known to occur.
4288 Therefore, if we have just passed a label and have no more labels
4289 between here and the test insn of the loop, and we have not passed
4290 a jump to the top of the loop, then we know these insns will be
4291 executed each iteration. */
4293 if (not_every_iteration
4295 && GET_CODE (p) == CODE_LABEL
4296 && no_labels_between_p (p, loop->end)
4297 && loop_insn_first_p (p, loop->cont))
4298 not_every_iteration = 0;
4303 loop_bivs_find (loop)
4306 struct loop_regs *regs = LOOP_REGS (loop);
4307 struct loop_ivs *ivs = LOOP_IVS (loop);
4308 /* Temporary list pointers for traversing ivs->list. */
4309 struct iv_class *bl, **backbl;
4313 for_each_insn_in_loop (loop, check_insn_for_bivs);
4315 /* Scan ivs->list to remove all regs that proved not to be bivs.
4316 Make a sanity check against regs->n_times_set. */
4317 for (backbl = &ivs->list, bl = *backbl; bl; bl = bl->next)
4319 if (REG_IV_TYPE (ivs, bl->regno) != BASIC_INDUCT
4320 /* Above happens if register modified by subreg, etc. */
4321 /* Make sure it is not recognized as a basic induction var: */
4322 || regs->array[bl->regno].n_times_set != bl->biv_count
4323 /* If never incremented, it is invariant that we decided not to
4324 move. So leave it alone. */
4325 || ! bl->incremented)
4327 if (loop_dump_stream)
4328 fprintf (loop_dump_stream, "Biv %d: discarded, %s\n",
4330 (REG_IV_TYPE (ivs, bl->regno) != BASIC_INDUCT
4331 ? "not induction variable"
4332 : (! bl->incremented ? "never incremented"
4335 REG_IV_TYPE (ivs, bl->regno) = NOT_BASIC_INDUCT;
4342 if (loop_dump_stream)
4343 fprintf (loop_dump_stream, "Biv %d: verified\n", bl->regno);
4349 /* Determine how BIVS are initialised by looking through pre-header
4350 extended basic block. */
4352 loop_bivs_init_find (loop)
4355 struct loop_ivs *ivs = LOOP_IVS (loop);
4356 /* Temporary list pointers for traversing ivs->list. */
4357 struct iv_class *bl;
4361 /* Find initial value for each biv by searching backwards from loop_start,
4362 halting at first label. Also record any test condition. */
4365 for (p = loop->start; p && GET_CODE (p) != CODE_LABEL; p = PREV_INSN (p))
4371 if (GET_CODE (p) == CALL_INSN)
4375 note_stores (PATTERN (p), record_initial, ivs);
4377 /* Record any test of a biv that branches around the loop if no store
4378 between it and the start of loop. We only care about tests with
4379 constants and registers and only certain of those. */
4380 if (GET_CODE (p) == JUMP_INSN
4381 && JUMP_LABEL (p) != 0
4382 && next_real_insn (JUMP_LABEL (p)) == next_real_insn (loop->end)
4383 && (test = get_condition_for_loop (loop, p)) != 0
4384 && GET_CODE (XEXP (test, 0)) == REG
4385 && REGNO (XEXP (test, 0)) < max_reg_before_loop
4386 && (bl = REG_IV_CLASS (ivs, REGNO (XEXP (test, 0)))) != 0
4387 && valid_initial_value_p (XEXP (test, 1), p, call_seen, loop->start)
4388 && bl->init_insn == 0)
4390 /* If an NE test, we have an initial value! */
4391 if (GET_CODE (test) == NE)
4394 bl->init_set = gen_rtx_SET (VOIDmode,
4395 XEXP (test, 0), XEXP (test, 1));
4398 bl->initial_test = test;
4404 /* Look at the each biv and see if we can say anything better about its
4405 initial value from any initializing insns set up above. (This is done
4406 in two passes to avoid missing SETs in a PARALLEL.) */
4408 loop_bivs_check (loop)
4411 struct loop_ivs *ivs = LOOP_IVS (loop);
4412 /* Temporary list pointers for traversing ivs->list. */
4413 struct iv_class *bl;
4414 struct iv_class **backbl;
4416 for (backbl = &ivs->list; (bl = *backbl); backbl = &bl->next)
4421 if (! bl->init_insn)
4424 /* IF INIT_INSN has a REG_EQUAL or REG_EQUIV note and the value
4425 is a constant, use the value of that. */
4426 if (((note = find_reg_note (bl->init_insn, REG_EQUAL, 0)) != NULL
4427 && CONSTANT_P (XEXP (note, 0)))
4428 || ((note = find_reg_note (bl->init_insn, REG_EQUIV, 0)) != NULL
4429 && CONSTANT_P (XEXP (note, 0))))
4430 src = XEXP (note, 0);
4432 src = SET_SRC (bl->init_set);
4434 if (loop_dump_stream)
4435 fprintf (loop_dump_stream,
4436 "Biv %d: initialized at insn %d: initial value ",
4437 bl->regno, INSN_UID (bl->init_insn));
4439 if ((GET_MODE (src) == GET_MODE (regno_reg_rtx[bl->regno])
4440 || GET_MODE (src) == VOIDmode)
4441 && valid_initial_value_p (src, bl->init_insn,
4442 LOOP_INFO (loop)->pre_header_has_call,
4445 bl->initial_value = src;
4447 if (loop_dump_stream)
4449 print_simple_rtl (loop_dump_stream, src);
4450 fputc ('\n', loop_dump_stream);
4453 /* If we can't make it a giv,
4454 let biv keep initial value of "itself". */
4455 else if (loop_dump_stream)
4456 fprintf (loop_dump_stream, "is complex\n");
4461 /* Search the loop for general induction variables. */
4464 loop_givs_find (loop)
4467 for_each_insn_in_loop (loop, check_insn_for_givs);
4471 /* For each giv for which we still don't know whether or not it is
4472 replaceable, check to see if it is replaceable because its final value
4473 can be calculated. */
4476 loop_givs_check (loop)
4479 struct loop_ivs *ivs = LOOP_IVS (loop);
4480 struct iv_class *bl;
4482 for (bl = ivs->list; bl; bl = bl->next)
4484 struct induction *v;
4486 for (v = bl->giv; v; v = v->next_iv)
4487 if (! v->replaceable && ! v->not_replaceable)
4488 check_final_value (loop, v);
4493 /* Return non-zero if it is possible to eliminate the biv BL provided
4494 all givs are reduced. This is possible if either the reg is not
4495 used outside the loop, or we can compute what its final value will
4499 loop_biv_eliminable_p (loop, bl, threshold, insn_count)
4501 struct iv_class *bl;
4505 /* For architectures with a decrement_and_branch_until_zero insn,
4506 don't do this if we put a REG_NONNEG note on the endtest for this
4509 #ifdef HAVE_decrement_and_branch_until_zero
4512 if (loop_dump_stream)
4513 fprintf (loop_dump_stream,
4514 "Cannot eliminate nonneg biv %d.\n", bl->regno);
4519 /* Check that biv is used outside loop or if it has a final value.
4520 Compare against bl->init_insn rather than loop->start. We aren't
4521 concerned with any uses of the biv between init_insn and
4522 loop->start since these won't be affected by the value of the biv
4523 elsewhere in the function, so long as init_insn doesn't use the
4526 if ((REGNO_LAST_LUID (bl->regno) < INSN_LUID (loop->end)
4528 && INSN_UID (bl->init_insn) < max_uid_for_loop
4529 && REGNO_FIRST_LUID (bl->regno) >= INSN_LUID (bl->init_insn)
4530 && ! reg_mentioned_p (bl->biv->dest_reg, SET_SRC (bl->init_set)))
4531 || (bl->final_value = final_biv_value (loop, bl)))
4532 return maybe_eliminate_biv (loop, bl, 0, threshold, insn_count);
4534 if (loop_dump_stream)
4536 fprintf (loop_dump_stream,
4537 "Cannot eliminate biv %d.\n",
4539 fprintf (loop_dump_stream,
4540 "First use: insn %d, last use: insn %d.\n",
4541 REGNO_FIRST_UID (bl->regno),
4542 REGNO_LAST_UID (bl->regno));
4548 /* Reduce each giv of BL that we have decided to reduce. */
4551 loop_givs_reduce (loop, bl)
4553 struct iv_class *bl;
4555 struct induction *v;
4557 for (v = bl->giv; v; v = v->next_iv)
4559 struct induction *tv;
4560 if (! v->ignore && v->same == 0)
4562 int auto_inc_opt = 0;
4564 /* If the code for derived givs immediately below has already
4565 allocated a new_reg, we must keep it. */
4567 v->new_reg = gen_reg_rtx (v->mode);
4570 /* If the target has auto-increment addressing modes, and
4571 this is an address giv, then try to put the increment
4572 immediately after its use, so that flow can create an
4573 auto-increment addressing mode. */
4574 if (v->giv_type == DEST_ADDR && bl->biv_count == 1
4575 && bl->biv->always_executed && ! bl->biv->maybe_multiple
4576 /* We don't handle reversed biv's because bl->biv->insn
4577 does not have a valid INSN_LUID. */
4579 && v->always_executed && ! v->maybe_multiple
4580 && INSN_UID (v->insn) < max_uid_for_loop)
4582 /* If other giv's have been combined with this one, then
4583 this will work only if all uses of the other giv's occur
4584 before this giv's insn. This is difficult to check.
4586 We simplify this by looking for the common case where
4587 there is one DEST_REG giv, and this giv's insn is the
4588 last use of the dest_reg of that DEST_REG giv. If the
4589 increment occurs after the address giv, then we can
4590 perform the optimization. (Otherwise, the increment
4591 would have to go before other_giv, and we would not be
4592 able to combine it with the address giv to get an
4593 auto-inc address.) */
4594 if (v->combined_with)
4596 struct induction *other_giv = 0;
4598 for (tv = bl->giv; tv; tv = tv->next_iv)
4606 if (! tv && other_giv
4607 && REGNO (other_giv->dest_reg) < max_reg_before_loop
4608 && (REGNO_LAST_UID (REGNO (other_giv->dest_reg))
4609 == INSN_UID (v->insn))
4610 && INSN_LUID (v->insn) < INSN_LUID (bl->biv->insn))
4613 /* Check for case where increment is before the address
4614 giv. Do this test in "loop order". */
4615 else if ((INSN_LUID (v->insn) > INSN_LUID (bl->biv->insn)
4616 && (INSN_LUID (v->insn) < INSN_LUID (loop->scan_start)
4617 || (INSN_LUID (bl->biv->insn)
4618 > INSN_LUID (loop->scan_start))))
4619 || (INSN_LUID (v->insn) < INSN_LUID (loop->scan_start)
4620 && (INSN_LUID (loop->scan_start)
4621 < INSN_LUID (bl->biv->insn))))
4630 /* We can't put an insn immediately after one setting
4631 cc0, or immediately before one using cc0. */
4632 if ((auto_inc_opt == 1 && sets_cc0_p (PATTERN (v->insn)))
4633 || (auto_inc_opt == -1
4634 && (prev = prev_nonnote_insn (v->insn)) != 0
4636 && sets_cc0_p (PATTERN (prev))))
4642 v->auto_inc_opt = 1;
4646 /* For each place where the biv is incremented, add an insn
4647 to increment the new, reduced reg for the giv. */
4648 for (tv = bl->biv; tv; tv = tv->next_iv)
4653 insert_before = tv->insn;
4654 else if (auto_inc_opt == 1)
4655 insert_before = NEXT_INSN (v->insn);
4657 insert_before = v->insn;
4659 if (tv->mult_val == const1_rtx)
4660 loop_iv_add_mult_emit_before (loop, tv->add_val, v->mult_val,
4661 v->new_reg, v->new_reg,
4663 else /* tv->mult_val == const0_rtx */
4664 /* A multiply is acceptable here
4665 since this is presumed to be seldom executed. */
4666 loop_iv_add_mult_emit_before (loop, tv->add_val, v->mult_val,
4667 v->add_val, v->new_reg,
4671 /* Add code at loop start to initialize giv's reduced reg. */
4673 loop_iv_add_mult_hoist (loop,
4674 extend_value_for_giv (v, bl->initial_value),
4675 v->mult_val, v->add_val, v->new_reg);
4681 /* Check for givs whose first use is their definition and whose
4682 last use is the definition of another giv. If so, it is likely
4683 dead and should not be used to derive another giv nor to
4687 loop_givs_dead_check (loop, bl)
4688 struct loop *loop ATTRIBUTE_UNUSED;
4689 struct iv_class *bl;
4691 struct induction *v;
4693 for (v = bl->giv; v; v = v->next_iv)
4696 || (v->same && v->same->ignore))
4699 if (v->giv_type == DEST_REG
4700 && REGNO_FIRST_UID (REGNO (v->dest_reg)) == INSN_UID (v->insn))
4702 struct induction *v1;
4704 for (v1 = bl->giv; v1; v1 = v1->next_iv)
4705 if (REGNO_LAST_UID (REGNO (v->dest_reg)) == INSN_UID (v1->insn))
4713 loop_givs_rescan (loop, bl, reg_map)
4715 struct iv_class *bl;
4718 struct induction *v;
4720 for (v = bl->giv; v; v = v->next_iv)
4722 if (v->same && v->same->ignore)
4728 /* Update expression if this was combined, in case other giv was
4731 v->new_reg = replace_rtx (v->new_reg,
4732 v->same->dest_reg, v->same->new_reg);
4734 /* See if this register is known to be a pointer to something. If
4735 so, see if we can find the alignment. First see if there is a
4736 destination register that is a pointer. If so, this shares the
4737 alignment too. Next see if we can deduce anything from the
4738 computational information. If not, and this is a DEST_ADDR
4739 giv, at least we know that it's a pointer, though we don't know
4741 if (GET_CODE (v->new_reg) == REG
4742 && v->giv_type == DEST_REG
4743 && REG_POINTER (v->dest_reg))
4744 mark_reg_pointer (v->new_reg,
4745 REGNO_POINTER_ALIGN (REGNO (v->dest_reg)));
4746 else if (GET_CODE (v->new_reg) == REG
4747 && REG_POINTER (v->src_reg))
4749 unsigned int align = REGNO_POINTER_ALIGN (REGNO (v->src_reg));
4752 || GET_CODE (v->add_val) != CONST_INT
4753 || INTVAL (v->add_val) % (align / BITS_PER_UNIT) != 0)
4756 mark_reg_pointer (v->new_reg, align);
4758 else if (GET_CODE (v->new_reg) == REG
4759 && GET_CODE (v->add_val) == REG
4760 && REG_POINTER (v->add_val))
4762 unsigned int align = REGNO_POINTER_ALIGN (REGNO (v->add_val));
4764 if (align == 0 || GET_CODE (v->mult_val) != CONST_INT
4765 || INTVAL (v->mult_val) % (align / BITS_PER_UNIT) != 0)
4768 mark_reg_pointer (v->new_reg, align);
4770 else if (GET_CODE (v->new_reg) == REG && v->giv_type == DEST_ADDR)
4771 mark_reg_pointer (v->new_reg, 0);
4773 if (v->giv_type == DEST_ADDR)
4774 /* Store reduced reg as the address in the memref where we found
4776 validate_change (v->insn, v->location, v->new_reg, 0);
4777 else if (v->replaceable)
4779 reg_map[REGNO (v->dest_reg)] = v->new_reg;
4783 /* Not replaceable; emit an insn to set the original giv reg from
4784 the reduced giv, same as above. */
4785 loop_insn_emit_after (loop, 0, v->insn,
4786 gen_move_insn (v->dest_reg, v->new_reg));
4789 /* When a loop is reversed, givs which depend on the reversed
4790 biv, and which are live outside the loop, must be set to their
4791 correct final value. This insn is only needed if the giv is
4792 not replaceable. The correct final value is the same as the
4793 value that the giv starts the reversed loop with. */
4794 if (bl->reversed && ! v->replaceable)
4795 loop_iv_add_mult_sink (loop,
4796 extend_value_for_giv (v, bl->initial_value),
4797 v->mult_val, v->add_val, v->dest_reg);
4798 else if (v->final_value)
4799 loop_insn_sink_or_swim (loop,
4800 gen_move_insn (v->dest_reg, v->final_value));
4802 if (loop_dump_stream)
4804 fprintf (loop_dump_stream, "giv at %d reduced to ",
4805 INSN_UID (v->insn));
4806 print_simple_rtl (loop_dump_stream, v->new_reg);
4807 fprintf (loop_dump_stream, "\n");
4814 loop_giv_reduce_benefit (loop, bl, v, test_reg)
4815 struct loop *loop ATTRIBUTE_UNUSED;
4816 struct iv_class *bl;
4817 struct induction *v;
4823 benefit = v->benefit;
4824 PUT_MODE (test_reg, v->mode);
4825 add_cost = iv_add_mult_cost (bl->biv->add_val, v->mult_val,
4826 test_reg, test_reg);
4828 /* Reduce benefit if not replaceable, since we will insert a
4829 move-insn to replace the insn that calculates this giv. Don't do
4830 this unless the giv is a user variable, since it will often be
4831 marked non-replaceable because of the duplication of the exit
4832 code outside the loop. In such a case, the copies we insert are
4833 dead and will be deleted. So they don't have a cost. Similar
4834 situations exist. */
4835 /* ??? The new final_[bg]iv_value code does a much better job of
4836 finding replaceable giv's, and hence this code may no longer be
4838 if (! v->replaceable && ! bl->eliminable
4839 && REG_USERVAR_P (v->dest_reg))
4840 benefit -= copy_cost;
4842 /* Decrease the benefit to count the add-insns that we will insert
4843 to increment the reduced reg for the giv. ??? This can
4844 overestimate the run-time cost of the additional insns, e.g. if
4845 there are multiple basic blocks that increment the biv, but only
4846 one of these blocks is executed during each iteration. There is
4847 no good way to detect cases like this with the current structure
4848 of the loop optimizer. This code is more accurate for
4849 determining code size than run-time benefits. */
4850 benefit -= add_cost * bl->biv_count;
4852 /* Decide whether to strength-reduce this giv or to leave the code
4853 unchanged (recompute it from the biv each time it is used). This
4854 decision can be made independently for each giv. */
4857 /* Attempt to guess whether autoincrement will handle some of the
4858 new add insns; if so, increase BENEFIT (undo the subtraction of
4859 add_cost that was done above). */
4860 if (v->giv_type == DEST_ADDR
4861 /* Increasing the benefit is risky, since this is only a guess.
4862 Avoid increasing register pressure in cases where there would
4863 be no other benefit from reducing this giv. */
4865 && GET_CODE (v->mult_val) == CONST_INT)
4867 int size = GET_MODE_SIZE (GET_MODE (v->mem));
4869 if (HAVE_POST_INCREMENT
4870 && INTVAL (v->mult_val) == size)
4871 benefit += add_cost * bl->biv_count;
4872 else if (HAVE_PRE_INCREMENT
4873 && INTVAL (v->mult_val) == size)
4874 benefit += add_cost * bl->biv_count;
4875 else if (HAVE_POST_DECREMENT
4876 && -INTVAL (v->mult_val) == size)
4877 benefit += add_cost * bl->biv_count;
4878 else if (HAVE_PRE_DECREMENT
4879 && -INTVAL (v->mult_val) == size)
4880 benefit += add_cost * bl->biv_count;
4888 /* Free IV structures for LOOP. */
4891 loop_ivs_free (loop)
4894 struct loop_ivs *ivs = LOOP_IVS (loop);
4895 struct iv_class *iv = ivs->list;
4901 struct iv_class *next = iv->next;
4902 struct induction *induction;
4903 struct induction *next_induction;
4905 for (induction = iv->biv; induction; induction = next_induction)
4907 next_induction = induction->next_iv;
4910 for (induction = iv->giv; induction; induction = next_induction)
4912 next_induction = induction->next_iv;
4922 /* Perform strength reduction and induction variable elimination.
4924 Pseudo registers created during this function will be beyond the
4925 last valid index in several tables including
4926 REGS->ARRAY[I].N_TIMES_SET and REGNO_LAST_UID. This does not cause a
4927 problem here, because the added registers cannot be givs outside of
4928 their loop, and hence will never be reconsidered. But scan_loop
4929 must check regnos to make sure they are in bounds. */
4932 strength_reduce (loop, flags)
4936 struct loop_info *loop_info = LOOP_INFO (loop);
4937 struct loop_regs *regs = LOOP_REGS (loop);
4938 struct loop_ivs *ivs = LOOP_IVS (loop);
4940 /* Temporary list pointer for traversing ivs->list. */
4941 struct iv_class *bl;
4942 /* Ratio of extra register life span we can justify
4943 for saving an instruction. More if loop doesn't call subroutines
4944 since in that case saving an insn makes more difference
4945 and more registers are available. */
4946 /* ??? could set this to last value of threshold in move_movables */
4947 int threshold = (loop_info->has_call ? 1 : 2) * (3 + n_non_fixed_regs);
4948 /* Map of pseudo-register replacements. */
4949 rtx *reg_map = NULL;
4951 int unrolled_insn_copies = 0;
4952 rtx test_reg = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 1);
4953 int insn_count = count_insns_in_loop (loop);
4955 addr_placeholder = gen_reg_rtx (Pmode);
4957 ivs->n_regs = max_reg_before_loop;
4958 ivs->regs = (struct iv *) xcalloc (ivs->n_regs, sizeof (struct iv));
4960 /* Find all BIVs in loop. */
4961 loop_bivs_find (loop);
4963 /* Exit if there are no bivs. */
4966 /* Can still unroll the loop anyways, but indicate that there is no
4967 strength reduction info available. */
4968 if (flags & LOOP_UNROLL)
4969 unroll_loop (loop, insn_count, 0);
4971 loop_ivs_free (loop);
4975 /* Determine how BIVS are initialised by looking through pre-header
4976 extended basic block. */
4977 loop_bivs_init_find (loop);
4979 /* Look at the each biv and see if we can say anything better about its
4980 initial value from any initializing insns set up above. */
4981 loop_bivs_check (loop);
4983 /* Search the loop for general induction variables. */
4984 loop_givs_find (loop);
4986 /* Try to calculate and save the number of loop iterations. This is
4987 set to zero if the actual number can not be calculated. This must
4988 be called after all giv's have been identified, since otherwise it may
4989 fail if the iteration variable is a giv. */
4990 loop_iterations (loop);
4992 #ifdef HAVE_prefetch
4993 if (flags & LOOP_PREFETCH)
4994 emit_prefetch_instructions (loop);
4997 /* Now for each giv for which we still don't know whether or not it is
4998 replaceable, check to see if it is replaceable because its final value
4999 can be calculated. This must be done after loop_iterations is called,
5000 so that final_giv_value will work correctly. */
5001 loop_givs_check (loop);
5003 /* Try to prove that the loop counter variable (if any) is always
5004 nonnegative; if so, record that fact with a REG_NONNEG note
5005 so that "decrement and branch until zero" insn can be used. */
5006 check_dbra_loop (loop, insn_count);
5008 /* Create reg_map to hold substitutions for replaceable giv regs.
5009 Some givs might have been made from biv increments, so look at
5010 ivs->reg_iv_type for a suitable size. */
5011 reg_map_size = ivs->n_regs;
5012 reg_map = (rtx *) xcalloc (reg_map_size, sizeof (rtx));
5014 /* Examine each iv class for feasibility of strength reduction/induction
5015 variable elimination. */
5017 for (bl = ivs->list; bl; bl = bl->next)
5019 struct induction *v;
5022 /* Test whether it will be possible to eliminate this biv
5023 provided all givs are reduced. */
5024 bl->eliminable = loop_biv_eliminable_p (loop, bl, threshold, insn_count);
5026 /* This will be true at the end, if all givs which depend on this
5027 biv have been strength reduced.
5028 We can't (currently) eliminate the biv unless this is so. */
5029 bl->all_reduced = 1;
5031 /* Check each extension dependent giv in this class to see if its
5032 root biv is safe from wrapping in the interior mode. */
5033 check_ext_dependent_givs (bl, loop_info);
5035 /* Combine all giv's for this iv_class. */
5036 combine_givs (regs, bl);
5038 for (v = bl->giv; v; v = v->next_iv)
5040 struct induction *tv;
5042 if (v->ignore || v->same)
5045 benefit = loop_giv_reduce_benefit (loop, bl, v, test_reg);
5047 /* If an insn is not to be strength reduced, then set its ignore
5048 flag, and clear bl->all_reduced. */
5050 /* A giv that depends on a reversed biv must be reduced if it is
5051 used after the loop exit, otherwise, it would have the wrong
5052 value after the loop exit. To make it simple, just reduce all
5053 of such giv's whether or not we know they are used after the loop
5056 if (! flag_reduce_all_givs
5057 && v->lifetime * threshold * benefit < insn_count
5060 if (loop_dump_stream)
5061 fprintf (loop_dump_stream,
5062 "giv of insn %d not worth while, %d vs %d.\n",
5064 v->lifetime * threshold * benefit, insn_count);
5066 bl->all_reduced = 0;
5070 /* Check that we can increment the reduced giv without a
5071 multiply insn. If not, reject it. */
5073 for (tv = bl->biv; tv; tv = tv->next_iv)
5074 if (tv->mult_val == const1_rtx
5075 && ! product_cheap_p (tv->add_val, v->mult_val))
5077 if (loop_dump_stream)
5078 fprintf (loop_dump_stream,
5079 "giv of insn %d: would need a multiply.\n",
5080 INSN_UID (v->insn));
5082 bl->all_reduced = 0;
5088 /* Check for givs whose first use is their definition and whose
5089 last use is the definition of another giv. If so, it is likely
5090 dead and should not be used to derive another giv nor to
5092 loop_givs_dead_check (loop, bl);
5094 /* Reduce each giv that we decided to reduce. */
5095 loop_givs_reduce (loop, bl);
5097 /* Rescan all givs. If a giv is the same as a giv not reduced, mark it
5100 For each giv register that can be reduced now: if replaceable,
5101 substitute reduced reg wherever the old giv occurs;
5102 else add new move insn "giv_reg = reduced_reg". */
5103 loop_givs_rescan (loop, bl, reg_map);
5105 /* All the givs based on the biv bl have been reduced if they
5108 /* For each giv not marked as maybe dead that has been combined with a
5109 second giv, clear any "maybe dead" mark on that second giv.
5110 v->new_reg will either be or refer to the register of the giv it
5113 Doing this clearing avoids problems in biv elimination where
5114 a giv's new_reg is a complex value that can't be put in the
5115 insn but the giv combined with (with a reg as new_reg) is
5116 marked maybe_dead. Since the register will be used in either
5117 case, we'd prefer it be used from the simpler giv. */
5119 for (v = bl->giv; v; v = v->next_iv)
5120 if (! v->maybe_dead && v->same)
5121 v->same->maybe_dead = 0;
5123 /* Try to eliminate the biv, if it is a candidate.
5124 This won't work if ! bl->all_reduced,
5125 since the givs we planned to use might not have been reduced.
5127 We have to be careful that we didn't initially think we could
5128 eliminate this biv because of a giv that we now think may be
5129 dead and shouldn't be used as a biv replacement.
5131 Also, there is the possibility that we may have a giv that looks
5132 like it can be used to eliminate a biv, but the resulting insn
5133 isn't valid. This can happen, for example, on the 88k, where a
5134 JUMP_INSN can compare a register only with zero. Attempts to
5135 replace it with a compare with a constant will fail.
5137 Note that in cases where this call fails, we may have replaced some
5138 of the occurrences of the biv with a giv, but no harm was done in
5139 doing so in the rare cases where it can occur. */
5141 if (bl->all_reduced == 1 && bl->eliminable
5142 && maybe_eliminate_biv (loop, bl, 1, threshold, insn_count))
5144 /* ?? If we created a new test to bypass the loop entirely,
5145 or otherwise drop straight in, based on this test, then
5146 we might want to rewrite it also. This way some later
5147 pass has more hope of removing the initialization of this
5150 /* If final_value != 0, then the biv may be used after loop end
5151 and we must emit an insn to set it just in case.
5153 Reversed bivs already have an insn after the loop setting their
5154 value, so we don't need another one. We can't calculate the
5155 proper final value for such a biv here anyways. */
5156 if (bl->final_value && ! bl->reversed)
5157 loop_insn_sink_or_swim (loop, gen_move_insn
5158 (bl->biv->dest_reg, bl->final_value));
5160 if (loop_dump_stream)
5161 fprintf (loop_dump_stream, "Reg %d: biv eliminated\n",
5164 /* See above note wrt final_value. But since we couldn't eliminate
5165 the biv, we must set the value after the loop instead of before. */
5166 else if (bl->final_value && ! bl->reversed)
5167 loop_insn_sink (loop, gen_move_insn (bl->biv->dest_reg,
5171 /* Go through all the instructions in the loop, making all the
5172 register substitutions scheduled in REG_MAP. */
5174 for (p = loop->start; p != loop->end; p = NEXT_INSN (p))
5175 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
5176 || GET_CODE (p) == CALL_INSN)
5178 replace_regs (PATTERN (p), reg_map, reg_map_size, 0);
5179 replace_regs (REG_NOTES (p), reg_map, reg_map_size, 0);
5183 if (loop_info->n_iterations > 0)
5185 /* When we completely unroll a loop we will likely not need the increment
5186 of the loop BIV and we will not need the conditional branch at the
5188 unrolled_insn_copies = insn_count - 2;
5191 /* When we completely unroll a loop on a HAVE_cc0 machine we will not
5192 need the comparison before the conditional branch at the end of the
5194 unrolled_insn_copies -= 1;
5197 /* We'll need one copy for each loop iteration. */
5198 unrolled_insn_copies *= loop_info->n_iterations;
5200 /* A little slop to account for the ability to remove initialization
5201 code, better CSE, and other secondary benefits of completely
5202 unrolling some loops. */
5203 unrolled_insn_copies -= 1;
5205 /* Clamp the value. */
5206 if (unrolled_insn_copies < 0)
5207 unrolled_insn_copies = 0;
5210 /* Unroll loops from within strength reduction so that we can use the
5211 induction variable information that strength_reduce has already
5212 collected. Always unroll loops that would be as small or smaller
5213 unrolled than when rolled. */
5214 if ((flags & LOOP_UNROLL)
5215 || (!(flags & LOOP_FIRST_PASS)
5216 && loop_info->n_iterations > 0
5217 && unrolled_insn_copies <= insn_count))
5218 unroll_loop (loop, insn_count, 1);
5220 #ifdef HAVE_doloop_end
5221 if (HAVE_doloop_end && (flags & LOOP_BCT) && flag_branch_on_count_reg)
5222 doloop_optimize (loop);
5223 #endif /* HAVE_doloop_end */
5225 /* In case number of iterations is known, drop branch prediction note
5226 in the branch. Do that only in second loop pass, as loop unrolling
5227 may change the number of iterations performed. */
5228 if ((flags & LOOP_BCT)
5229 && loop_info->n_iterations / loop_info->unroll_number > 1)
5231 int n = loop_info->n_iterations / loop_info->unroll_number;
5232 predict_insn (PREV_INSN (loop->end),
5233 PRED_LOOP_ITERATIONS,
5234 REG_BR_PROB_BASE - REG_BR_PROB_BASE / n);
5237 if (loop_dump_stream)
5238 fprintf (loop_dump_stream, "\n");
5240 loop_ivs_free (loop);
5245 /*Record all basic induction variables calculated in the insn. */
5247 check_insn_for_bivs (loop, p, not_every_iteration, maybe_multiple)
5250 int not_every_iteration;
5253 struct loop_ivs *ivs = LOOP_IVS (loop);
5260 if (GET_CODE (p) == INSN
5261 && (set = single_set (p))
5262 && GET_CODE (SET_DEST (set)) == REG)
5264 dest_reg = SET_DEST (set);
5265 if (REGNO (dest_reg) < max_reg_before_loop
5266 && REGNO (dest_reg) >= FIRST_PSEUDO_REGISTER
5267 && REG_IV_TYPE (ivs, REGNO (dest_reg)) != NOT_BASIC_INDUCT)
5269 if (basic_induction_var (loop, SET_SRC (set),
5270 GET_MODE (SET_SRC (set)),
5271 dest_reg, p, &inc_val, &mult_val,
5274 /* It is a possible basic induction variable.
5275 Create and initialize an induction structure for it. */
5278 = (struct induction *) xmalloc (sizeof (struct induction));
5280 record_biv (loop, v, p, dest_reg, inc_val, mult_val, location,
5281 not_every_iteration, maybe_multiple);
5282 REG_IV_TYPE (ivs, REGNO (dest_reg)) = BASIC_INDUCT;
5284 else if (REGNO (dest_reg) < ivs->n_regs)
5285 REG_IV_TYPE (ivs, REGNO (dest_reg)) = NOT_BASIC_INDUCT;
5291 /* Record all givs calculated in the insn.
5292 A register is a giv if: it is only set once, it is a function of a
5293 biv and a constant (or invariant), and it is not a biv. */
5295 check_insn_for_givs (loop, p, not_every_iteration, maybe_multiple)
5298 int not_every_iteration;
5301 struct loop_regs *regs = LOOP_REGS (loop);
5304 /* Look for a general induction variable in a register. */
5305 if (GET_CODE (p) == INSN
5306 && (set = single_set (p))
5307 && GET_CODE (SET_DEST (set)) == REG
5308 && ! regs->array[REGNO (SET_DEST (set))].may_not_optimize)
5317 rtx last_consec_insn;
5319 dest_reg = SET_DEST (set);
5320 if (REGNO (dest_reg) < FIRST_PSEUDO_REGISTER)
5323 if (/* SET_SRC is a giv. */
5324 (general_induction_var (loop, SET_SRC (set), &src_reg, &add_val,
5325 &mult_val, &ext_val, 0, &benefit, VOIDmode)
5326 /* Equivalent expression is a giv. */
5327 || ((regnote = find_reg_note (p, REG_EQUAL, NULL_RTX))
5328 && general_induction_var (loop, XEXP (regnote, 0), &src_reg,
5329 &add_val, &mult_val, &ext_val, 0,
5330 &benefit, VOIDmode)))
5331 /* Don't try to handle any regs made by loop optimization.
5332 We have nothing on them in regno_first_uid, etc. */
5333 && REGNO (dest_reg) < max_reg_before_loop
5334 /* Don't recognize a BASIC_INDUCT_VAR here. */
5335 && dest_reg != src_reg
5336 /* This must be the only place where the register is set. */
5337 && (regs->array[REGNO (dest_reg)].n_times_set == 1
5338 /* or all sets must be consecutive and make a giv. */
5339 || (benefit = consec_sets_giv (loop, benefit, p,
5341 &add_val, &mult_val, &ext_val,
5342 &last_consec_insn))))
5345 = (struct induction *) xmalloc (sizeof (struct induction));
5347 /* If this is a library call, increase benefit. */
5348 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
5349 benefit += libcall_benefit (p);
5351 /* Skip the consecutive insns, if there are any. */
5352 if (regs->array[REGNO (dest_reg)].n_times_set != 1)
5353 p = last_consec_insn;
5355 record_giv (loop, v, p, src_reg, dest_reg, mult_val, add_val,
5356 ext_val, benefit, DEST_REG, not_every_iteration,
5357 maybe_multiple, (rtx*) 0);
5362 #ifndef DONT_REDUCE_ADDR
5363 /* Look for givs which are memory addresses. */
5364 /* This resulted in worse code on a VAX 8600. I wonder if it
5366 if (GET_CODE (p) == INSN)
5367 find_mem_givs (loop, PATTERN (p), p, not_every_iteration,
5371 /* Update the status of whether giv can derive other givs. This can
5372 change when we pass a label or an insn that updates a biv. */
5373 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
5374 || GET_CODE (p) == CODE_LABEL)
5375 update_giv_derive (loop, p);
5379 /* Return 1 if X is a valid source for an initial value (or as value being
5380 compared against in an initial test).
5382 X must be either a register or constant and must not be clobbered between
5383 the current insn and the start of the loop.
5385 INSN is the insn containing X. */
5388 valid_initial_value_p (x, insn, call_seen, loop_start)
5397 /* Only consider pseudos we know about initialized in insns whose luids
5399 if (GET_CODE (x) != REG
5400 || REGNO (x) >= max_reg_before_loop)
5403 /* Don't use call-clobbered registers across a call which clobbers it. On
5404 some machines, don't use any hard registers at all. */
5405 if (REGNO (x) < FIRST_PSEUDO_REGISTER
5406 && (SMALL_REGISTER_CLASSES
5407 || (call_used_regs[REGNO (x)] && call_seen)))
5410 /* Don't use registers that have been clobbered before the start of the
5412 if (reg_set_between_p (x, insn, loop_start))
5418 /* Scan X for memory refs and check each memory address
5419 as a possible giv. INSN is the insn whose pattern X comes from.
5420 NOT_EVERY_ITERATION is 1 if the insn might not be executed during
5421 every loop iteration. MAYBE_MULTIPLE is 1 if the insn might be executed
5422 more thanonce in each loop iteration. */
5425 find_mem_givs (loop, x, insn, not_every_iteration, maybe_multiple)
5426 const struct loop *loop;
5429 int not_every_iteration, maybe_multiple;
5438 code = GET_CODE (x);
5463 /* This code used to disable creating GIVs with mult_val == 1 and
5464 add_val == 0. However, this leads to lost optimizations when
5465 it comes time to combine a set of related DEST_ADDR GIVs, since
5466 this one would not be seen. */
5468 if (general_induction_var (loop, XEXP (x, 0), &src_reg, &add_val,
5469 &mult_val, &ext_val, 1, &benefit,
5472 /* Found one; record it. */
5474 = (struct induction *) xmalloc (sizeof (struct induction));
5476 record_giv (loop, v, insn, src_reg, addr_placeholder, mult_val,
5477 add_val, ext_val, benefit, DEST_ADDR,
5478 not_every_iteration, maybe_multiple, &XEXP (x, 0));
5489 /* Recursively scan the subexpressions for other mem refs. */
5491 fmt = GET_RTX_FORMAT (code);
5492 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5494 find_mem_givs (loop, XEXP (x, i), insn, not_every_iteration,
5496 else if (fmt[i] == 'E')
5497 for (j = 0; j < XVECLEN (x, i); j++)
5498 find_mem_givs (loop, XVECEXP (x, i, j), insn, not_every_iteration,
5502 /* Fill in the data about one biv update.
5503 V is the `struct induction' in which we record the biv. (It is
5504 allocated by the caller, with alloca.)
5505 INSN is the insn that sets it.
5506 DEST_REG is the biv's reg.
5508 MULT_VAL is const1_rtx if the biv is being incremented here, in which case
5509 INC_VAL is the increment. Otherwise, MULT_VAL is const0_rtx and the biv is
5510 being set to INC_VAL.
5512 NOT_EVERY_ITERATION is nonzero if this biv update is not know to be
5513 executed every iteration; MAYBE_MULTIPLE is nonzero if this biv update
5514 can be executed more than once per iteration. If MAYBE_MULTIPLE
5515 and NOT_EVERY_ITERATION are both zero, we know that the biv update is
5516 executed exactly once per iteration. */
5519 record_biv (loop, v, insn, dest_reg, inc_val, mult_val, location,
5520 not_every_iteration, maybe_multiple)
5522 struct induction *v;
5528 int not_every_iteration;
5531 struct loop_ivs *ivs = LOOP_IVS (loop);
5532 struct iv_class *bl;
5535 v->src_reg = dest_reg;
5536 v->dest_reg = dest_reg;
5537 v->mult_val = mult_val;
5538 v->add_val = inc_val;
5539 v->ext_dependent = NULL_RTX;
5540 v->location = location;
5541 v->mode = GET_MODE (dest_reg);
5542 v->always_computable = ! not_every_iteration;
5543 v->always_executed = ! not_every_iteration;
5544 v->maybe_multiple = maybe_multiple;
5546 /* Add this to the reg's iv_class, creating a class
5547 if this is the first incrementation of the reg. */
5549 bl = REG_IV_CLASS (ivs, REGNO (dest_reg));
5552 /* Create and initialize new iv_class. */
5554 bl = (struct iv_class *) xmalloc (sizeof (struct iv_class));
5556 bl->regno = REGNO (dest_reg);
5562 /* Set initial value to the reg itself. */
5563 bl->initial_value = dest_reg;
5564 bl->final_value = 0;
5565 /* We haven't seen the initializing insn yet */
5568 bl->initial_test = 0;
5569 bl->incremented = 0;
5573 bl->total_benefit = 0;
5575 /* Add this class to ivs->list. */
5576 bl->next = ivs->list;
5579 /* Put it in the array of biv register classes. */
5580 REG_IV_CLASS (ivs, REGNO (dest_reg)) = bl;
5583 /* Update IV_CLASS entry for this biv. */
5584 v->next_iv = bl->biv;
5587 if (mult_val == const1_rtx)
5588 bl->incremented = 1;
5590 if (loop_dump_stream)
5591 loop_biv_dump (v, loop_dump_stream, 0);
5594 /* Fill in the data about one giv.
5595 V is the `struct induction' in which we record the giv. (It is
5596 allocated by the caller, with alloca.)
5597 INSN is the insn that sets it.
5598 BENEFIT estimates the savings from deleting this insn.
5599 TYPE is DEST_REG or DEST_ADDR; it says whether the giv is computed
5600 into a register or is used as a memory address.
5602 SRC_REG is the biv reg which the giv is computed from.
5603 DEST_REG is the giv's reg (if the giv is stored in a reg).
5604 MULT_VAL and ADD_VAL are the coefficients used to compute the giv.
5605 LOCATION points to the place where this giv's value appears in INSN. */
5608 record_giv (loop, v, insn, src_reg, dest_reg, mult_val, add_val, ext_val,
5609 benefit, type, not_every_iteration, maybe_multiple, location)
5610 const struct loop *loop;
5611 struct induction *v;
5615 rtx mult_val, add_val, ext_val;
5618 int not_every_iteration, maybe_multiple;
5621 struct loop_ivs *ivs = LOOP_IVS (loop);
5622 struct induction *b;
5623 struct iv_class *bl;
5624 rtx set = single_set (insn);
5627 /* Attempt to prove constantness of the values. Don't let simplity_rtx
5628 undo the MULT canonicalization that we performed earlier. */
5629 temp = simplify_rtx (add_val);
5631 && ! (GET_CODE (add_val) == MULT
5632 && GET_CODE (temp) == ASHIFT))
5636 v->src_reg = src_reg;
5638 v->dest_reg = dest_reg;
5639 v->mult_val = mult_val;
5640 v->add_val = add_val;
5641 v->ext_dependent = ext_val;
5642 v->benefit = benefit;
5643 v->location = location;
5645 v->combined_with = 0;
5646 v->maybe_multiple = maybe_multiple;
5648 v->derive_adjustment = 0;
5654 v->auto_inc_opt = 0;
5658 /* The v->always_computable field is used in update_giv_derive, to
5659 determine whether a giv can be used to derive another giv. For a
5660 DEST_REG giv, INSN computes a new value for the giv, so its value
5661 isn't computable if INSN insn't executed every iteration.
5662 However, for a DEST_ADDR giv, INSN merely uses the value of the giv;
5663 it does not compute a new value. Hence the value is always computable
5664 regardless of whether INSN is executed each iteration. */
5666 if (type == DEST_ADDR)
5667 v->always_computable = 1;
5669 v->always_computable = ! not_every_iteration;
5671 v->always_executed = ! not_every_iteration;
5673 if (type == DEST_ADDR)
5675 v->mode = GET_MODE (*location);
5678 else /* type == DEST_REG */
5680 v->mode = GET_MODE (SET_DEST (set));
5682 v->lifetime = LOOP_REG_LIFETIME (loop, REGNO (dest_reg));
5684 /* If the lifetime is zero, it means that this register is
5685 really a dead store. So mark this as a giv that can be
5686 ignored. This will not prevent the biv from being eliminated. */
5687 if (v->lifetime == 0)
5690 REG_IV_TYPE (ivs, REGNO (dest_reg)) = GENERAL_INDUCT;
5691 REG_IV_INFO (ivs, REGNO (dest_reg)) = v;
5694 /* Add the giv to the class of givs computed from one biv. */
5696 bl = REG_IV_CLASS (ivs, REGNO (src_reg));
5699 v->next_iv = bl->giv;
5701 /* Don't count DEST_ADDR. This is supposed to count the number of
5702 insns that calculate givs. */
5703 if (type == DEST_REG)
5705 bl->total_benefit += benefit;
5708 /* Fatal error, biv missing for this giv? */
5711 if (type == DEST_ADDR)
5715 /* The giv can be replaced outright by the reduced register only if all
5716 of the following conditions are true:
5717 - the insn that sets the giv is always executed on any iteration
5718 on which the giv is used at all
5719 (there are two ways to deduce this:
5720 either the insn is executed on every iteration,
5721 or all uses follow that insn in the same basic block),
5722 - the giv is not used outside the loop
5723 - no assignments to the biv occur during the giv's lifetime. */
5725 if (REGNO_FIRST_UID (REGNO (dest_reg)) == INSN_UID (insn)
5726 /* Previous line always fails if INSN was moved by loop opt. */
5727 && REGNO_LAST_LUID (REGNO (dest_reg))
5728 < INSN_LUID (loop->end)
5729 && (! not_every_iteration
5730 || last_use_this_basic_block (dest_reg, insn)))
5732 /* Now check that there are no assignments to the biv within the
5733 giv's lifetime. This requires two separate checks. */
5735 /* Check each biv update, and fail if any are between the first
5736 and last use of the giv.
5738 If this loop contains an inner loop that was unrolled, then
5739 the insn modifying the biv may have been emitted by the loop
5740 unrolling code, and hence does not have a valid luid. Just
5741 mark the biv as not replaceable in this case. It is not very
5742 useful as a biv, because it is used in two different loops.
5743 It is very unlikely that we would be able to optimize the giv
5744 using this biv anyways. */
5747 for (b = bl->biv; b; b = b->next_iv)
5749 if (INSN_UID (b->insn) >= max_uid_for_loop
5750 || ((INSN_LUID (b->insn)
5751 >= REGNO_FIRST_LUID (REGNO (dest_reg)))
5752 && (INSN_LUID (b->insn)
5753 <= REGNO_LAST_LUID (REGNO (dest_reg)))))
5756 v->not_replaceable = 1;
5761 /* If there are any backwards branches that go from after the
5762 biv update to before it, then this giv is not replaceable. */
5764 for (b = bl->biv; b; b = b->next_iv)
5765 if (back_branch_in_range_p (loop, b->insn))
5768 v->not_replaceable = 1;
5774 /* May still be replaceable, we don't have enough info here to
5777 v->not_replaceable = 0;
5781 /* Record whether the add_val contains a const_int, for later use by
5786 v->no_const_addval = 1;
5787 if (tem == const0_rtx)
5789 else if (CONSTANT_P (add_val))
5790 v->no_const_addval = 0;
5791 if (GET_CODE (tem) == PLUS)
5795 if (GET_CODE (XEXP (tem, 0)) == PLUS)
5796 tem = XEXP (tem, 0);
5797 else if (GET_CODE (XEXP (tem, 1)) == PLUS)
5798 tem = XEXP (tem, 1);
5802 if (CONSTANT_P (XEXP (tem, 1)))
5803 v->no_const_addval = 0;
5807 if (loop_dump_stream)
5808 loop_giv_dump (v, loop_dump_stream, 0);
5811 /* All this does is determine whether a giv can be made replaceable because
5812 its final value can be calculated. This code can not be part of record_giv
5813 above, because final_giv_value requires that the number of loop iterations
5814 be known, and that can not be accurately calculated until after all givs
5815 have been identified. */
5818 check_final_value (loop, v)
5819 const struct loop *loop;
5820 struct induction *v;
5822 struct loop_ivs *ivs = LOOP_IVS (loop);
5823 struct iv_class *bl;
5824 rtx final_value = 0;
5826 bl = REG_IV_CLASS (ivs, REGNO (v->src_reg));
5828 /* DEST_ADDR givs will never reach here, because they are always marked
5829 replaceable above in record_giv. */
5831 /* The giv can be replaced outright by the reduced register only if all
5832 of the following conditions are true:
5833 - the insn that sets the giv is always executed on any iteration
5834 on which the giv is used at all
5835 (there are two ways to deduce this:
5836 either the insn is executed on every iteration,
5837 or all uses follow that insn in the same basic block),
5838 - its final value can be calculated (this condition is different
5839 than the one above in record_giv)
5840 - it's not used before the it's set
5841 - no assignments to the biv occur during the giv's lifetime. */
5844 /* This is only called now when replaceable is known to be false. */
5845 /* Clear replaceable, so that it won't confuse final_giv_value. */
5849 if ((final_value = final_giv_value (loop, v))
5850 && (v->always_computable || last_use_this_basic_block (v->dest_reg, v->insn)))
5852 int biv_increment_seen = 0, before_giv_insn = 0;
5858 /* When trying to determine whether or not a biv increment occurs
5859 during the lifetime of the giv, we can ignore uses of the variable
5860 outside the loop because final_value is true. Hence we can not
5861 use regno_last_uid and regno_first_uid as above in record_giv. */
5863 /* Search the loop to determine whether any assignments to the
5864 biv occur during the giv's lifetime. Start with the insn
5865 that sets the giv, and search around the loop until we come
5866 back to that insn again.
5868 Also fail if there is a jump within the giv's lifetime that jumps
5869 to somewhere outside the lifetime but still within the loop. This
5870 catches spaghetti code where the execution order is not linear, and
5871 hence the above test fails. Here we assume that the giv lifetime
5872 does not extend from one iteration of the loop to the next, so as
5873 to make the test easier. Since the lifetime isn't known yet,
5874 this requires two loops. See also record_giv above. */
5876 last_giv_use = v->insn;
5883 before_giv_insn = 1;
5884 p = NEXT_INSN (loop->start);
5889 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
5890 || GET_CODE (p) == CALL_INSN)
5892 /* It is possible for the BIV increment to use the GIV if we
5893 have a cycle. Thus we must be sure to check each insn for
5894 both BIV and GIV uses, and we must check for BIV uses
5897 if (! biv_increment_seen
5898 && reg_set_p (v->src_reg, PATTERN (p)))
5899 biv_increment_seen = 1;
5901 if (reg_mentioned_p (v->dest_reg, PATTERN (p)))
5903 if (biv_increment_seen || before_giv_insn)
5906 v->not_replaceable = 1;
5914 /* Now that the lifetime of the giv is known, check for branches
5915 from within the lifetime to outside the lifetime if it is still
5925 p = NEXT_INSN (loop->start);
5926 if (p == last_giv_use)
5929 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p)
5930 && LABEL_NAME (JUMP_LABEL (p))
5931 && ((loop_insn_first_p (JUMP_LABEL (p), v->insn)
5932 && loop_insn_first_p (loop->start, JUMP_LABEL (p)))
5933 || (loop_insn_first_p (last_giv_use, JUMP_LABEL (p))
5934 && loop_insn_first_p (JUMP_LABEL (p), loop->end))))
5937 v->not_replaceable = 1;
5939 if (loop_dump_stream)
5940 fprintf (loop_dump_stream,
5941 "Found branch outside giv lifetime.\n");
5948 /* If it is replaceable, then save the final value. */
5950 v->final_value = final_value;
5953 if (loop_dump_stream && v->replaceable)
5954 fprintf (loop_dump_stream, "Insn %d: giv reg %d final_value replaceable\n",
5955 INSN_UID (v->insn), REGNO (v->dest_reg));
5958 /* Update the status of whether a giv can derive other givs.
5960 We need to do something special if there is or may be an update to the biv
5961 between the time the giv is defined and the time it is used to derive
5964 In addition, a giv that is only conditionally set is not allowed to
5965 derive another giv once a label has been passed.
5967 The cases we look at are when a label or an update to a biv is passed. */
5970 update_giv_derive (loop, p)
5971 const struct loop *loop;
5974 struct loop_ivs *ivs = LOOP_IVS (loop);
5975 struct iv_class *bl;
5976 struct induction *biv, *giv;
5980 /* Search all IV classes, then all bivs, and finally all givs.
5982 There are three cases we are concerned with. First we have the situation
5983 of a giv that is only updated conditionally. In that case, it may not
5984 derive any givs after a label is passed.
5986 The second case is when a biv update occurs, or may occur, after the
5987 definition of a giv. For certain biv updates (see below) that are
5988 known to occur between the giv definition and use, we can adjust the
5989 giv definition. For others, or when the biv update is conditional,
5990 we must prevent the giv from deriving any other givs. There are two
5991 sub-cases within this case.
5993 If this is a label, we are concerned with any biv update that is done
5994 conditionally, since it may be done after the giv is defined followed by
5995 a branch here (actually, we need to pass both a jump and a label, but
5996 this extra tracking doesn't seem worth it).
5998 If this is a jump, we are concerned about any biv update that may be
5999 executed multiple times. We are actually only concerned about
6000 backward jumps, but it is probably not worth performing the test
6001 on the jump again here.
6003 If this is a biv update, we must adjust the giv status to show that a
6004 subsequent biv update was performed. If this adjustment cannot be done,
6005 the giv cannot derive further givs. */
6007 for (bl = ivs->list; bl; bl = bl->next)
6008 for (biv = bl->biv; biv; biv = biv->next_iv)
6009 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN
6012 for (giv = bl->giv; giv; giv = giv->next_iv)
6014 /* If cant_derive is already true, there is no point in
6015 checking all of these conditions again. */
6016 if (giv->cant_derive)
6019 /* If this giv is conditionally set and we have passed a label,
6020 it cannot derive anything. */
6021 if (GET_CODE (p) == CODE_LABEL && ! giv->always_computable)
6022 giv->cant_derive = 1;
6024 /* Skip givs that have mult_val == 0, since
6025 they are really invariants. Also skip those that are
6026 replaceable, since we know their lifetime doesn't contain
6028 else if (giv->mult_val == const0_rtx || giv->replaceable)
6031 /* The only way we can allow this giv to derive another
6032 is if this is a biv increment and we can form the product
6033 of biv->add_val and giv->mult_val. In this case, we will
6034 be able to compute a compensation. */
6035 else if (biv->insn == p)
6040 if (biv->mult_val == const1_rtx)
6041 tem = simplify_giv_expr (loop,
6042 gen_rtx_MULT (giv->mode,
6045 &ext_val_dummy, &dummy);
6047 if (tem && giv->derive_adjustment)
6048 tem = simplify_giv_expr
6050 gen_rtx_PLUS (giv->mode, tem, giv->derive_adjustment),
6051 &ext_val_dummy, &dummy);
6054 giv->derive_adjustment = tem;
6056 giv->cant_derive = 1;
6058 else if ((GET_CODE (p) == CODE_LABEL && ! biv->always_computable)
6059 || (GET_CODE (p) == JUMP_INSN && biv->maybe_multiple))
6060 giv->cant_derive = 1;
6065 /* Check whether an insn is an increment legitimate for a basic induction var.
6066 X is the source of insn P, or a part of it.
6067 MODE is the mode in which X should be interpreted.
6069 DEST_REG is the putative biv, also the destination of the insn.
6070 We accept patterns of these forms:
6071 REG = REG + INVARIANT (includes REG = REG - CONSTANT)
6072 REG = INVARIANT + REG
6074 If X is suitable, we return 1, set *MULT_VAL to CONST1_RTX,
6075 store the additive term into *INC_VAL, and store the place where
6076 we found the additive term into *LOCATION.
6078 If X is an assignment of an invariant into DEST_REG, we set
6079 *MULT_VAL to CONST0_RTX, and store the invariant into *INC_VAL.
6081 We also want to detect a BIV when it corresponds to a variable
6082 whose mode was promoted via PROMOTED_MODE. In that case, an increment
6083 of the variable may be a PLUS that adds a SUBREG of that variable to
6084 an invariant and then sign- or zero-extends the result of the PLUS
6087 Most GIVs in such cases will be in the promoted mode, since that is the
6088 probably the natural computation mode (and almost certainly the mode
6089 used for addresses) on the machine. So we view the pseudo-reg containing
6090 the variable as the BIV, as if it were simply incremented.
6092 Note that treating the entire pseudo as a BIV will result in making
6093 simple increments to any GIVs based on it. However, if the variable
6094 overflows in its declared mode but not its promoted mode, the result will
6095 be incorrect. This is acceptable if the variable is signed, since
6096 overflows in such cases are undefined, but not if it is unsigned, since
6097 those overflows are defined. So we only check for SIGN_EXTEND and
6100 If we cannot find a biv, we return 0. */
6103 basic_induction_var (loop, x, mode, dest_reg, p, inc_val, mult_val, location)
6104 const struct loop *loop;
6106 enum machine_mode mode;
6117 code = GET_CODE (x);
6122 if (rtx_equal_p (XEXP (x, 0), dest_reg)
6123 || (GET_CODE (XEXP (x, 0)) == SUBREG
6124 && SUBREG_PROMOTED_VAR_P (XEXP (x, 0))
6125 && SUBREG_REG (XEXP (x, 0)) == dest_reg))
6127 argp = &XEXP (x, 1);
6129 else if (rtx_equal_p (XEXP (x, 1), dest_reg)
6130 || (GET_CODE (XEXP (x, 1)) == SUBREG
6131 && SUBREG_PROMOTED_VAR_P (XEXP (x, 1))
6132 && SUBREG_REG (XEXP (x, 1)) == dest_reg))
6134 argp = &XEXP (x, 0);
6140 if (loop_invariant_p (loop, arg) != 1)
6143 *inc_val = convert_modes (GET_MODE (dest_reg), GET_MODE (x), arg, 0);
6144 *mult_val = const1_rtx;
6149 /* If what's inside the SUBREG is a BIV, then the SUBREG. This will
6150 handle addition of promoted variables.
6151 ??? The comment at the start of this function is wrong: promoted
6152 variable increments don't look like it says they do. */
6153 return basic_induction_var (loop, SUBREG_REG (x),
6154 GET_MODE (SUBREG_REG (x)),
6155 dest_reg, p, inc_val, mult_val, location);
6158 /* If this register is assigned in a previous insn, look at its
6159 source, but don't go outside the loop or past a label. */
6161 /* If this sets a register to itself, we would repeat any previous
6162 biv increment if we applied this strategy blindly. */
6163 if (rtx_equal_p (dest_reg, x))
6172 insn = PREV_INSN (insn);
6174 while (insn && GET_CODE (insn) == NOTE
6175 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG);
6179 set = single_set (insn);
6182 dest = SET_DEST (set);
6184 || (GET_CODE (dest) == SUBREG
6185 && (GET_MODE_SIZE (GET_MODE (dest)) <= UNITS_PER_WORD)
6186 && (GET_MODE_CLASS (GET_MODE (dest)) == MODE_INT)
6187 && SUBREG_REG (dest) == x))
6188 return basic_induction_var (loop, SET_SRC (set),
6189 (GET_MODE (SET_SRC (set)) == VOIDmode
6191 : GET_MODE (SET_SRC (set))),
6193 inc_val, mult_val, location);
6195 while (GET_CODE (dest) == SIGN_EXTRACT
6196 || GET_CODE (dest) == ZERO_EXTRACT
6197 || GET_CODE (dest) == SUBREG
6198 || GET_CODE (dest) == STRICT_LOW_PART)
6199 dest = XEXP (dest, 0);
6205 /* Can accept constant setting of biv only when inside inner most loop.
6206 Otherwise, a biv of an inner loop may be incorrectly recognized
6207 as a biv of the outer loop,
6208 causing code to be moved INTO the inner loop. */
6210 if (loop_invariant_p (loop, x) != 1)
6215 /* convert_modes aborts if we try to convert to or from CCmode, so just
6216 exclude that case. It is very unlikely that a condition code value
6217 would be a useful iterator anyways. convert_modes aborts if we try to
6218 convert a float mode to non-float or vice versa too. */
6219 if (loop->level == 1
6220 && GET_MODE_CLASS (mode) == GET_MODE_CLASS (GET_MODE (dest_reg))
6221 && GET_MODE_CLASS (mode) != MODE_CC)
6223 /* Possible bug here? Perhaps we don't know the mode of X. */
6224 *inc_val = convert_modes (GET_MODE (dest_reg), mode, x, 0);
6225 *mult_val = const0_rtx;
6232 return basic_induction_var (loop, XEXP (x, 0), GET_MODE (XEXP (x, 0)),
6233 dest_reg, p, inc_val, mult_val, location);
6236 /* Similar, since this can be a sign extension. */
6237 for (insn = PREV_INSN (p);
6238 (insn && GET_CODE (insn) == NOTE
6239 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG);
6240 insn = PREV_INSN (insn))
6244 set = single_set (insn);
6246 if (! rtx_equal_p (dest_reg, XEXP (x, 0))
6247 && set && SET_DEST (set) == XEXP (x, 0)
6248 && GET_CODE (XEXP (x, 1)) == CONST_INT
6249 && INTVAL (XEXP (x, 1)) >= 0
6250 && GET_CODE (SET_SRC (set)) == ASHIFT
6251 && XEXP (x, 1) == XEXP (SET_SRC (set), 1))
6252 return basic_induction_var (loop, XEXP (SET_SRC (set), 0),
6253 GET_MODE (XEXP (x, 0)),
6254 dest_reg, insn, inc_val, mult_val,
6263 /* A general induction variable (giv) is any quantity that is a linear
6264 function of a basic induction variable,
6265 i.e. giv = biv * mult_val + add_val.
6266 The coefficients can be any loop invariant quantity.
6267 A giv need not be computed directly from the biv;
6268 it can be computed by way of other givs. */
6270 /* Determine whether X computes a giv.
6271 If it does, return a nonzero value
6272 which is the benefit from eliminating the computation of X;
6273 set *SRC_REG to the register of the biv that it is computed from;
6274 set *ADD_VAL and *MULT_VAL to the coefficients,
6275 such that the value of X is biv * mult + add; */
6278 general_induction_var (loop, x, src_reg, add_val, mult_val, ext_val,
6279 is_addr, pbenefit, addr_mode)
6280 const struct loop *loop;
6288 enum machine_mode addr_mode;
6290 struct loop_ivs *ivs = LOOP_IVS (loop);
6293 /* If this is an invariant, forget it, it isn't a giv. */
6294 if (loop_invariant_p (loop, x) == 1)
6298 *ext_val = NULL_RTX;
6299 x = simplify_giv_expr (loop, x, ext_val, pbenefit);
6303 switch (GET_CODE (x))
6307 /* Since this is now an invariant and wasn't before, it must be a giv
6308 with MULT_VAL == 0. It doesn't matter which BIV we associate this
6310 *src_reg = ivs->list->biv->dest_reg;
6311 *mult_val = const0_rtx;
6316 /* This is equivalent to a BIV. */
6318 *mult_val = const1_rtx;
6319 *add_val = const0_rtx;
6323 /* Either (plus (biv) (invar)) or
6324 (plus (mult (biv) (invar_1)) (invar_2)). */
6325 if (GET_CODE (XEXP (x, 0)) == MULT)
6327 *src_reg = XEXP (XEXP (x, 0), 0);
6328 *mult_val = XEXP (XEXP (x, 0), 1);
6332 *src_reg = XEXP (x, 0);
6333 *mult_val = const1_rtx;
6335 *add_val = XEXP (x, 1);
6339 /* ADD_VAL is zero. */
6340 *src_reg = XEXP (x, 0);
6341 *mult_val = XEXP (x, 1);
6342 *add_val = const0_rtx;
6349 /* Remove any enclosing USE from ADD_VAL and MULT_VAL (there will be
6350 unless they are CONST_INT). */
6351 if (GET_CODE (*add_val) == USE)
6352 *add_val = XEXP (*add_val, 0);
6353 if (GET_CODE (*mult_val) == USE)
6354 *mult_val = XEXP (*mult_val, 0);
6357 *pbenefit += address_cost (orig_x, addr_mode) - reg_address_cost;
6359 *pbenefit += rtx_cost (orig_x, SET);
6361 /* Always return true if this is a giv so it will be detected as such,
6362 even if the benefit is zero or negative. This allows elimination
6363 of bivs that might otherwise not be eliminated. */
6367 /* Given an expression, X, try to form it as a linear function of a biv.
6368 We will canonicalize it to be of the form
6369 (plus (mult (BIV) (invar_1))
6371 with possible degeneracies.
6373 The invariant expressions must each be of a form that can be used as a
6374 machine operand. We surround then with a USE rtx (a hack, but localized
6375 and certainly unambiguous!) if not a CONST_INT for simplicity in this
6376 routine; it is the caller's responsibility to strip them.
6378 If no such canonicalization is possible (i.e., two biv's are used or an
6379 expression that is neither invariant nor a biv or giv), this routine
6382 For a non-zero return, the result will have a code of CONST_INT, USE,
6383 REG (for a BIV), PLUS, or MULT. No other codes will occur.
6385 *BENEFIT will be incremented by the benefit of any sub-giv encountered. */
6387 static rtx sge_plus PARAMS ((enum machine_mode, rtx, rtx));
6388 static rtx sge_plus_constant PARAMS ((rtx, rtx));
6391 simplify_giv_expr (loop, x, ext_val, benefit)
6392 const struct loop *loop;
6397 struct loop_ivs *ivs = LOOP_IVS (loop);
6398 struct loop_regs *regs = LOOP_REGS (loop);
6399 enum machine_mode mode = GET_MODE (x);
6403 /* If this is not an integer mode, or if we cannot do arithmetic in this
6404 mode, this can't be a giv. */
6405 if (mode != VOIDmode
6406 && (GET_MODE_CLASS (mode) != MODE_INT
6407 || GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT))
6410 switch (GET_CODE (x))
6413 arg0 = simplify_giv_expr (loop, XEXP (x, 0), ext_val, benefit);
6414 arg1 = simplify_giv_expr (loop, XEXP (x, 1), ext_val, benefit);
6415 if (arg0 == 0 || arg1 == 0)
6418 /* Put constant last, CONST_INT last if both constant. */
6419 if ((GET_CODE (arg0) == USE
6420 || GET_CODE (arg0) == CONST_INT)
6421 && ! ((GET_CODE (arg0) == USE
6422 && GET_CODE (arg1) == USE)
6423 || GET_CODE (arg1) == CONST_INT))
6424 tem = arg0, arg0 = arg1, arg1 = tem;
6426 /* Handle addition of zero, then addition of an invariant. */
6427 if (arg1 == const0_rtx)
6429 else if (GET_CODE (arg1) == CONST_INT || GET_CODE (arg1) == USE)
6430 switch (GET_CODE (arg0))
6434 /* Adding two invariants must result in an invariant, so enclose
6435 addition operation inside a USE and return it. */
6436 if (GET_CODE (arg0) == USE)
6437 arg0 = XEXP (arg0, 0);
6438 if (GET_CODE (arg1) == USE)
6439 arg1 = XEXP (arg1, 0);
6441 if (GET_CODE (arg0) == CONST_INT)
6442 tem = arg0, arg0 = arg1, arg1 = tem;
6443 if (GET_CODE (arg1) == CONST_INT)
6444 tem = sge_plus_constant (arg0, arg1);
6446 tem = sge_plus (mode, arg0, arg1);
6448 if (GET_CODE (tem) != CONST_INT)
6449 tem = gen_rtx_USE (mode, tem);
6454 /* biv + invar or mult + invar. Return sum. */
6455 return gen_rtx_PLUS (mode, arg0, arg1);
6458 /* (a + invar_1) + invar_2. Associate. */
6460 simplify_giv_expr (loop,
6472 /* Each argument must be either REG, PLUS, or MULT. Convert REG to
6473 MULT to reduce cases. */
6474 if (GET_CODE (arg0) == REG)
6475 arg0 = gen_rtx_MULT (mode, arg0, const1_rtx);
6476 if (GET_CODE (arg1) == REG)
6477 arg1 = gen_rtx_MULT (mode, arg1, const1_rtx);
6479 /* Now have PLUS + PLUS, PLUS + MULT, MULT + PLUS, or MULT + MULT.
6480 Put a MULT first, leaving PLUS + PLUS, MULT + PLUS, or MULT + MULT.
6481 Recurse to associate the second PLUS. */
6482 if (GET_CODE (arg1) == MULT)
6483 tem = arg0, arg0 = arg1, arg1 = tem;
6485 if (GET_CODE (arg1) == PLUS)
6487 simplify_giv_expr (loop,
6489 gen_rtx_PLUS (mode, arg0,
6494 /* Now must have MULT + MULT. Distribute if same biv, else not giv. */
6495 if (GET_CODE (arg0) != MULT || GET_CODE (arg1) != MULT)
6498 if (!rtx_equal_p (arg0, arg1))
6501 return simplify_giv_expr (loop,
6510 /* Handle "a - b" as "a + b * (-1)". */
6511 return simplify_giv_expr (loop,
6520 arg0 = simplify_giv_expr (loop, XEXP (x, 0), ext_val, benefit);
6521 arg1 = simplify_giv_expr (loop, XEXP (x, 1), ext_val, benefit);
6522 if (arg0 == 0 || arg1 == 0)
6525 /* Put constant last, CONST_INT last if both constant. */
6526 if ((GET_CODE (arg0) == USE || GET_CODE (arg0) == CONST_INT)
6527 && GET_CODE (arg1) != CONST_INT)
6528 tem = arg0, arg0 = arg1, arg1 = tem;
6530 /* If second argument is not now constant, not giv. */
6531 if (GET_CODE (arg1) != USE && GET_CODE (arg1) != CONST_INT)
6534 /* Handle multiply by 0 or 1. */
6535 if (arg1 == const0_rtx)
6538 else if (arg1 == const1_rtx)
6541 switch (GET_CODE (arg0))
6544 /* biv * invar. Done. */
6545 return gen_rtx_MULT (mode, arg0, arg1);
6548 /* Product of two constants. */
6549 return GEN_INT (INTVAL (arg0) * INTVAL (arg1));
6552 /* invar * invar is a giv, but attempt to simplify it somehow. */
6553 if (GET_CODE (arg1) != CONST_INT)
6556 arg0 = XEXP (arg0, 0);
6557 if (GET_CODE (arg0) == MULT)
6559 /* (invar_0 * invar_1) * invar_2. Associate. */
6560 return simplify_giv_expr (loop,
6569 /* Porpagate the MULT expressions to the intermost nodes. */
6570 else if (GET_CODE (arg0) == PLUS)
6572 /* (invar_0 + invar_1) * invar_2. Distribute. */
6573 return simplify_giv_expr (loop,
6585 return gen_rtx_USE (mode, gen_rtx_MULT (mode, arg0, arg1));
6588 /* (a * invar_1) * invar_2. Associate. */
6589 return simplify_giv_expr (loop,
6598 /* (a + invar_1) * invar_2. Distribute. */
6599 return simplify_giv_expr (loop,
6614 /* Shift by constant is multiply by power of two. */
6615 if (GET_CODE (XEXP (x, 1)) != CONST_INT)
6619 simplify_giv_expr (loop,
6622 GEN_INT ((HOST_WIDE_INT) 1
6623 << INTVAL (XEXP (x, 1)))),
6627 /* "-a" is "a * (-1)" */
6628 return simplify_giv_expr (loop,
6629 gen_rtx_MULT (mode, XEXP (x, 0), constm1_rtx),
6633 /* "~a" is "-a - 1". Silly, but easy. */
6634 return simplify_giv_expr (loop,
6635 gen_rtx_MINUS (mode,
6636 gen_rtx_NEG (mode, XEXP (x, 0)),
6641 /* Already in proper form for invariant. */
6647 /* Conditionally recognize extensions of simple IVs. After we've
6648 computed loop traversal counts and verified the range of the
6649 source IV, we'll reevaluate this as a GIV. */
6650 if (*ext_val == NULL_RTX)
6652 arg0 = simplify_giv_expr (loop, XEXP (x, 0), ext_val, benefit);
6653 if (arg0 && *ext_val == NULL_RTX && GET_CODE (arg0) == REG)
6655 *ext_val = gen_rtx_fmt_e (GET_CODE (x), mode, arg0);
6662 /* If this is a new register, we can't deal with it. */
6663 if (REGNO (x) >= max_reg_before_loop)
6666 /* Check for biv or giv. */
6667 switch (REG_IV_TYPE (ivs, REGNO (x)))
6671 case GENERAL_INDUCT:
6673 struct induction *v = REG_IV_INFO (ivs, REGNO (x));
6675 /* Form expression from giv and add benefit. Ensure this giv
6676 can derive another and subtract any needed adjustment if so. */
6678 /* Increasing the benefit here is risky. The only case in which it
6679 is arguably correct is if this is the only use of V. In other
6680 cases, this will artificially inflate the benefit of the current
6681 giv, and lead to suboptimal code. Thus, it is disabled, since
6682 potentially not reducing an only marginally beneficial giv is
6683 less harmful than reducing many givs that are not really
6686 rtx single_use = regs->array[REGNO (x)].single_usage;
6687 if (single_use && single_use != const0_rtx)
6688 *benefit += v->benefit;
6694 tem = gen_rtx_PLUS (mode, gen_rtx_MULT (mode,
6695 v->src_reg, v->mult_val),
6698 if (v->derive_adjustment)
6699 tem = gen_rtx_MINUS (mode, tem, v->derive_adjustment);
6700 arg0 = simplify_giv_expr (loop, tem, ext_val, benefit);
6703 if (!v->ext_dependent)
6708 *ext_val = v->ext_dependent;
6716 /* If it isn't an induction variable, and it is invariant, we
6717 may be able to simplify things further by looking through
6718 the bits we just moved outside the loop. */
6719 if (loop_invariant_p (loop, x) == 1)
6722 struct loop_movables *movables = LOOP_MOVABLES (loop);
6724 for (m = movables->head; m; m = m->next)
6725 if (rtx_equal_p (x, m->set_dest))
6727 /* Ok, we found a match. Substitute and simplify. */
6729 /* If we match another movable, we must use that, as
6730 this one is going away. */
6732 return simplify_giv_expr (loop, m->match->set_dest,
6735 /* If consec is non-zero, this is a member of a group of
6736 instructions that were moved together. We handle this
6737 case only to the point of seeking to the last insn and
6738 looking for a REG_EQUAL. Fail if we don't find one. */
6745 tem = NEXT_INSN (tem);
6749 tem = find_reg_note (tem, REG_EQUAL, NULL_RTX);
6751 tem = XEXP (tem, 0);
6755 tem = single_set (m->insn);
6757 tem = SET_SRC (tem);
6762 /* What we are most interested in is pointer
6763 arithmetic on invariants -- only take
6764 patterns we may be able to do something with. */
6765 if (GET_CODE (tem) == PLUS
6766 || GET_CODE (tem) == MULT
6767 || GET_CODE (tem) == ASHIFT
6768 || GET_CODE (tem) == CONST_INT
6769 || GET_CODE (tem) == SYMBOL_REF)
6771 tem = simplify_giv_expr (loop, tem, ext_val,
6776 else if (GET_CODE (tem) == CONST
6777 && GET_CODE (XEXP (tem, 0)) == PLUS
6778 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == SYMBOL_REF
6779 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)
6781 tem = simplify_giv_expr (loop, XEXP (tem, 0),
6793 /* Fall through to general case. */
6795 /* If invariant, return as USE (unless CONST_INT).
6796 Otherwise, not giv. */
6797 if (GET_CODE (x) == USE)
6800 if (loop_invariant_p (loop, x) == 1)
6802 if (GET_CODE (x) == CONST_INT)
6804 if (GET_CODE (x) == CONST
6805 && GET_CODE (XEXP (x, 0)) == PLUS
6806 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
6807 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
6809 return gen_rtx_USE (mode, x);
6816 /* This routine folds invariants such that there is only ever one
6817 CONST_INT in the summation. It is only used by simplify_giv_expr. */
6820 sge_plus_constant (x, c)
6823 if (GET_CODE (x) == CONST_INT)
6824 return GEN_INT (INTVAL (x) + INTVAL (c));
6825 else if (GET_CODE (x) != PLUS)
6826 return gen_rtx_PLUS (GET_MODE (x), x, c);
6827 else if (GET_CODE (XEXP (x, 1)) == CONST_INT)
6829 return gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0),
6830 GEN_INT (INTVAL (XEXP (x, 1)) + INTVAL (c)));
6832 else if (GET_CODE (XEXP (x, 0)) == PLUS
6833 || GET_CODE (XEXP (x, 1)) != PLUS)
6835 return gen_rtx_PLUS (GET_MODE (x),
6836 sge_plus_constant (XEXP (x, 0), c), XEXP (x, 1));
6840 return gen_rtx_PLUS (GET_MODE (x),
6841 sge_plus_constant (XEXP (x, 1), c), XEXP (x, 0));
6846 sge_plus (mode, x, y)
6847 enum machine_mode mode;
6850 while (GET_CODE (y) == PLUS)
6852 rtx a = XEXP (y, 0);
6853 if (GET_CODE (a) == CONST_INT)
6854 x = sge_plus_constant (x, a);
6856 x = gen_rtx_PLUS (mode, x, a);
6859 if (GET_CODE (y) == CONST_INT)
6860 x = sge_plus_constant (x, y);
6862 x = gen_rtx_PLUS (mode, x, y);
6866 /* Help detect a giv that is calculated by several consecutive insns;
6870 The caller has already identified the first insn P as having a giv as dest;
6871 we check that all other insns that set the same register follow
6872 immediately after P, that they alter nothing else,
6873 and that the result of the last is still a giv.
6875 The value is 0 if the reg set in P is not really a giv.
6876 Otherwise, the value is the amount gained by eliminating
6877 all the consecutive insns that compute the value.
6879 FIRST_BENEFIT is the amount gained by eliminating the first insn, P.
6880 SRC_REG is the reg of the biv; DEST_REG is the reg of the giv.
6882 The coefficients of the ultimate giv value are stored in
6883 *MULT_VAL and *ADD_VAL. */
6886 consec_sets_giv (loop, first_benefit, p, src_reg, dest_reg,
6887 add_val, mult_val, ext_val, last_consec_insn)
6888 const struct loop *loop;
6896 rtx *last_consec_insn;
6898 struct loop_ivs *ivs = LOOP_IVS (loop);
6899 struct loop_regs *regs = LOOP_REGS (loop);
6906 /* Indicate that this is a giv so that we can update the value produced in
6907 each insn of the multi-insn sequence.
6909 This induction structure will be used only by the call to
6910 general_induction_var below, so we can allocate it on our stack.
6911 If this is a giv, our caller will replace the induct var entry with
6912 a new induction structure. */
6913 struct induction *v;
6915 if (REG_IV_TYPE (ivs, REGNO (dest_reg)) != UNKNOWN_INDUCT)
6918 v = (struct induction *) alloca (sizeof (struct induction));
6919 v->src_reg = src_reg;
6920 v->mult_val = *mult_val;
6921 v->add_val = *add_val;
6922 v->benefit = first_benefit;
6924 v->derive_adjustment = 0;
6925 v->ext_dependent = NULL_RTX;
6927 REG_IV_TYPE (ivs, REGNO (dest_reg)) = GENERAL_INDUCT;
6928 REG_IV_INFO (ivs, REGNO (dest_reg)) = v;
6930 count = regs->array[REGNO (dest_reg)].n_times_set - 1;
6935 code = GET_CODE (p);
6937 /* If libcall, skip to end of call sequence. */
6938 if (code == INSN && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
6942 && (set = single_set (p))
6943 && GET_CODE (SET_DEST (set)) == REG
6944 && SET_DEST (set) == dest_reg
6945 && (general_induction_var (loop, SET_SRC (set), &src_reg,
6946 add_val, mult_val, ext_val, 0,
6948 /* Giv created by equivalent expression. */
6949 || ((temp = find_reg_note (p, REG_EQUAL, NULL_RTX))
6950 && general_induction_var (loop, XEXP (temp, 0), &src_reg,
6951 add_val, mult_val, ext_val, 0,
6952 &benefit, VOIDmode)))
6953 && src_reg == v->src_reg)
6955 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
6956 benefit += libcall_benefit (p);
6959 v->mult_val = *mult_val;
6960 v->add_val = *add_val;
6961 v->benefit += benefit;
6963 else if (code != NOTE)
6965 /* Allow insns that set something other than this giv to a
6966 constant. Such insns are needed on machines which cannot
6967 include long constants and should not disqualify a giv. */
6969 && (set = single_set (p))
6970 && SET_DEST (set) != dest_reg
6971 && CONSTANT_P (SET_SRC (set)))
6974 REG_IV_TYPE (ivs, REGNO (dest_reg)) = UNKNOWN_INDUCT;
6979 REG_IV_TYPE (ivs, REGNO (dest_reg)) = UNKNOWN_INDUCT;
6980 *last_consec_insn = p;
6984 /* Return an rtx, if any, that expresses giv G2 as a function of the register
6985 represented by G1. If no such expression can be found, or it is clear that
6986 it cannot possibly be a valid address, 0 is returned.
6988 To perform the computation, we note that
6991 where `v' is the biv.
6993 So G2 = (y/b) * G1 + (b - a*y/x).
6995 Note that MULT = y/x.
6997 Update: A and B are now allowed to be additive expressions such that
6998 B contains all variables in A. That is, computing B-A will not require
6999 subtracting variables. */
7002 express_from_1 (a, b, mult)
7005 /* If MULT is zero, then A*MULT is zero, and our expression is B. */
7007 if (mult == const0_rtx)
7010 /* If MULT is not 1, we cannot handle A with non-constants, since we
7011 would then be required to subtract multiples of the registers in A.
7012 This is theoretically possible, and may even apply to some Fortran
7013 constructs, but it is a lot of work and we do not attempt it here. */
7015 if (mult != const1_rtx && GET_CODE (a) != CONST_INT)
7018 /* In general these structures are sorted top to bottom (down the PLUS
7019 chain), but not left to right across the PLUS. If B is a higher
7020 order giv than A, we can strip one level and recurse. If A is higher
7021 order, we'll eventually bail out, but won't know that until the end.
7022 If they are the same, we'll strip one level around this loop. */
7024 while (GET_CODE (a) == PLUS && GET_CODE (b) == PLUS)
7026 rtx ra, rb, oa, ob, tmp;
7028 ra = XEXP (a, 0), oa = XEXP (a, 1);
7029 if (GET_CODE (ra) == PLUS)
7030 tmp = ra, ra = oa, oa = tmp;
7032 rb = XEXP (b, 0), ob = XEXP (b, 1);
7033 if (GET_CODE (rb) == PLUS)
7034 tmp = rb, rb = ob, ob = tmp;
7036 if (rtx_equal_p (ra, rb))
7037 /* We matched: remove one reg completely. */
7039 else if (GET_CODE (ob) != PLUS && rtx_equal_p (ra, ob))
7040 /* An alternate match. */
7042 else if (GET_CODE (oa) != PLUS && rtx_equal_p (oa, rb))
7043 /* An alternate match. */
7047 /* Indicates an extra register in B. Strip one level from B and
7048 recurse, hoping B was the higher order expression. */
7049 ob = express_from_1 (a, ob, mult);
7052 return gen_rtx_PLUS (GET_MODE (b), rb, ob);
7056 /* Here we are at the last level of A, go through the cases hoping to
7057 get rid of everything but a constant. */
7059 if (GET_CODE (a) == PLUS)
7063 ra = XEXP (a, 0), oa = XEXP (a, 1);
7064 if (rtx_equal_p (oa, b))
7066 else if (!rtx_equal_p (ra, b))
7069 if (GET_CODE (oa) != CONST_INT)
7072 return GEN_INT (-INTVAL (oa) * INTVAL (mult));
7074 else if (GET_CODE (a) == CONST_INT)
7076 return plus_constant (b, -INTVAL (a) * INTVAL (mult));
7078 else if (CONSTANT_P (a))
7080 enum machine_mode mode_a = GET_MODE (a);
7081 enum machine_mode mode_b = GET_MODE (b);
7082 enum machine_mode mode = mode_b == VOIDmode ? mode_a : mode_b;
7083 return simplify_gen_binary (MINUS, mode, b, a);
7085 else if (GET_CODE (b) == PLUS)
7087 if (rtx_equal_p (a, XEXP (b, 0)))
7089 else if (rtx_equal_p (a, XEXP (b, 1)))
7094 else if (rtx_equal_p (a, b))
7101 express_from (g1, g2)
7102 struct induction *g1, *g2;
7106 /* The value that G1 will be multiplied by must be a constant integer. Also,
7107 the only chance we have of getting a valid address is if b*c/a (see above
7108 for notation) is also an integer. */
7109 if (GET_CODE (g1->mult_val) == CONST_INT
7110 && GET_CODE (g2->mult_val) == CONST_INT)
7112 if (g1->mult_val == const0_rtx
7113 || INTVAL (g2->mult_val) % INTVAL (g1->mult_val) != 0)
7115 mult = GEN_INT (INTVAL (g2->mult_val) / INTVAL (g1->mult_val));
7117 else if (rtx_equal_p (g1->mult_val, g2->mult_val))
7121 /* ??? Find out if the one is a multiple of the other? */
7125 add = express_from_1 (g1->add_val, g2->add_val, mult);
7126 if (add == NULL_RTX)
7128 /* Failed. If we've got a multiplication factor between G1 and G2,
7129 scale G1's addend and try again. */
7130 if (INTVAL (mult) > 1)
7132 rtx g1_add_val = g1->add_val;
7133 if (GET_CODE (g1_add_val) == MULT
7134 && GET_CODE (XEXP (g1_add_val, 1)) == CONST_INT)
7137 m = INTVAL (mult) * INTVAL (XEXP (g1_add_val, 1));
7138 g1_add_val = gen_rtx_MULT (GET_MODE (g1_add_val),
7139 XEXP (g1_add_val, 0), GEN_INT (m));
7143 g1_add_val = gen_rtx_MULT (GET_MODE (g1_add_val), g1_add_val,
7147 add = express_from_1 (g1_add_val, g2->add_val, const1_rtx);
7150 if (add == NULL_RTX)
7153 /* Form simplified final result. */
7154 if (mult == const0_rtx)
7156 else if (mult == const1_rtx)
7157 mult = g1->dest_reg;
7159 mult = gen_rtx_MULT (g2->mode, g1->dest_reg, mult);
7161 if (add == const0_rtx)
7165 if (GET_CODE (add) == PLUS
7166 && CONSTANT_P (XEXP (add, 1)))
7168 rtx tem = XEXP (add, 1);
7169 mult = gen_rtx_PLUS (g2->mode, mult, XEXP (add, 0));
7173 return gen_rtx_PLUS (g2->mode, mult, add);
7177 /* Return an rtx, if any, that expresses giv G2 as a function of the register
7178 represented by G1. This indicates that G2 should be combined with G1 and
7179 that G2 can use (either directly or via an address expression) a register
7180 used to represent G1. */
7183 combine_givs_p (g1, g2)
7184 struct induction *g1, *g2;
7188 /* With the introduction of ext dependent givs, we must care for modes.
7189 G2 must not use a wider mode than G1. */
7190 if (GET_MODE_SIZE (g1->mode) < GET_MODE_SIZE (g2->mode))
7193 ret = comb = express_from (g1, g2);
7194 if (comb == NULL_RTX)
7196 if (g1->mode != g2->mode)
7197 ret = gen_lowpart (g2->mode, comb);
7199 /* If these givs are identical, they can be combined. We use the results
7200 of express_from because the addends are not in a canonical form, so
7201 rtx_equal_p is a weaker test. */
7202 /* But don't combine a DEST_REG giv with a DEST_ADDR giv; we want the
7203 combination to be the other way round. */
7204 if (comb == g1->dest_reg
7205 && (g1->giv_type == DEST_REG || g2->giv_type == DEST_ADDR))
7210 /* If G2 can be expressed as a function of G1 and that function is valid
7211 as an address and no more expensive than using a register for G2,
7212 the expression of G2 in terms of G1 can be used. */
7214 && g2->giv_type == DEST_ADDR
7215 && memory_address_p (GET_MODE (g2->mem), ret)
7216 /* ??? Looses, especially with -fforce-addr, where *g2->location
7217 will always be a register, and so anything more complicated
7221 && ADDRESS_COST (tem) <= ADDRESS_COST (*g2->location)
7223 && rtx_cost (tem, MEM) <= rtx_cost (*g2->location, MEM)
7234 /* Check each extension dependent giv in this class to see if its
7235 root biv is safe from wrapping in the interior mode, which would
7236 make the giv illegal. */
7239 check_ext_dependent_givs (bl, loop_info)
7240 struct iv_class *bl;
7241 struct loop_info *loop_info;
7243 int ze_ok = 0, se_ok = 0, info_ok = 0;
7244 enum machine_mode biv_mode = GET_MODE (bl->biv->src_reg);
7245 HOST_WIDE_INT start_val;
7246 unsigned HOST_WIDE_INT u_end_val = 0;
7247 unsigned HOST_WIDE_INT u_start_val = 0;
7249 struct induction *v;
7251 /* Make sure the iteration data is available. We must have
7252 constants in order to be certain of no overflow. */
7253 /* ??? An unknown iteration count with an increment of +-1
7254 combined with friendly exit tests of against an invariant
7255 value is also ameanable to optimization. Not implemented. */
7256 if (loop_info->n_iterations > 0
7257 && bl->initial_value
7258 && GET_CODE (bl->initial_value) == CONST_INT
7259 && (incr = biv_total_increment (bl))
7260 && GET_CODE (incr) == CONST_INT
7261 /* Make sure the host can represent the arithmetic. */
7262 && HOST_BITS_PER_WIDE_INT >= GET_MODE_BITSIZE (biv_mode))
7264 unsigned HOST_WIDE_INT abs_incr, total_incr;
7265 HOST_WIDE_INT s_end_val;
7269 start_val = INTVAL (bl->initial_value);
7270 u_start_val = start_val;
7272 neg_incr = 0, abs_incr = INTVAL (incr);
7273 if (INTVAL (incr) < 0)
7274 neg_incr = 1, abs_incr = -abs_incr;
7275 total_incr = abs_incr * loop_info->n_iterations;
7277 /* Check for host arithmatic overflow. */
7278 if (total_incr / loop_info->n_iterations == abs_incr)
7280 unsigned HOST_WIDE_INT u_max;
7281 HOST_WIDE_INT s_max;
7283 u_end_val = start_val + (neg_incr ? -total_incr : total_incr);
7284 s_end_val = u_end_val;
7285 u_max = GET_MODE_MASK (biv_mode);
7288 /* Check zero extension of biv ok. */
7290 /* Check for host arithmatic overflow. */
7292 ? u_end_val < u_start_val
7293 : u_end_val > u_start_val)
7294 /* Check for target arithmetic overflow. */
7296 ? 1 /* taken care of with host overflow */
7297 : u_end_val <= u_max))
7302 /* Check sign extension of biv ok. */
7303 /* ??? While it is true that overflow with signed and pointer
7304 arithmetic is undefined, I fear too many programmers don't
7305 keep this fact in mind -- myself included on occasion.
7306 So leave alone with the signed overflow optimizations. */
7307 if (start_val >= -s_max - 1
7308 /* Check for host arithmatic overflow. */
7310 ? s_end_val < start_val
7311 : s_end_val > start_val)
7312 /* Check for target arithmetic overflow. */
7314 ? s_end_val >= -s_max - 1
7315 : s_end_val <= s_max))
7322 /* Invalidate givs that fail the tests. */
7323 for (v = bl->giv; v; v = v->next_iv)
7324 if (v->ext_dependent)
7326 enum rtx_code code = GET_CODE (v->ext_dependent);
7339 /* We don't know whether this value is being used as either
7340 signed or unsigned, so to safely truncate we must satisfy
7341 both. The initial check here verifies the BIV itself;
7342 once that is successful we may check its range wrt the
7346 enum machine_mode outer_mode = GET_MODE (v->ext_dependent);
7347 unsigned HOST_WIDE_INT max = GET_MODE_MASK (outer_mode) >> 1;
7349 /* We know from the above that both endpoints are nonnegative,
7350 and that there is no wrapping. Verify that both endpoints
7351 are within the (signed) range of the outer mode. */
7352 if (u_start_val <= max && u_end_val <= max)
7363 if (loop_dump_stream)
7365 fprintf (loop_dump_stream,
7366 "Verified ext dependent giv at %d of reg %d\n",
7367 INSN_UID (v->insn), bl->regno);
7372 if (loop_dump_stream)
7377 why = "biv iteration values overflowed";
7381 incr = biv_total_increment (bl);
7382 if (incr == const1_rtx)
7383 why = "biv iteration info incomplete; incr by 1";
7385 why = "biv iteration info incomplete";
7388 fprintf (loop_dump_stream,
7389 "Failed ext dependent giv at %d, %s\n",
7390 INSN_UID (v->insn), why);
7393 bl->all_reduced = 0;
7398 /* Generate a version of VALUE in a mode appropriate for initializing V. */
7401 extend_value_for_giv (v, value)
7402 struct induction *v;
7405 rtx ext_dep = v->ext_dependent;
7410 /* Recall that check_ext_dependent_givs verified that the known bounds
7411 of a biv did not overflow or wrap with respect to the extension for
7412 the giv. Therefore, constants need no additional adjustment. */
7413 if (CONSTANT_P (value) && GET_MODE (value) == VOIDmode)
7416 /* Otherwise, we must adjust the value to compensate for the
7417 differing modes of the biv and the giv. */
7418 return gen_rtx_fmt_e (GET_CODE (ext_dep), GET_MODE (ext_dep), value);
7421 struct combine_givs_stats
7428 cmp_combine_givs_stats (xp, yp)
7432 const struct combine_givs_stats * const x =
7433 (const struct combine_givs_stats *) xp;
7434 const struct combine_givs_stats * const y =
7435 (const struct combine_givs_stats *) yp;
7437 d = y->total_benefit - x->total_benefit;
7438 /* Stabilize the sort. */
7440 d = x->giv_number - y->giv_number;
7444 /* Check all pairs of givs for iv_class BL and see if any can be combined with
7445 any other. If so, point SAME to the giv combined with and set NEW_REG to
7446 be an expression (in terms of the other giv's DEST_REG) equivalent to the
7447 giv. Also, update BENEFIT and related fields for cost/benefit analysis. */
7450 combine_givs (regs, bl)
7451 struct loop_regs *regs;
7452 struct iv_class *bl;
7454 /* Additional benefit to add for being combined multiple times. */
7455 const int extra_benefit = 3;
7457 struct induction *g1, *g2, **giv_array;
7458 int i, j, k, giv_count;
7459 struct combine_givs_stats *stats;
7462 /* Count givs, because bl->giv_count is incorrect here. */
7464 for (g1 = bl->giv; g1; g1 = g1->next_iv)
7469 = (struct induction **) alloca (giv_count * sizeof (struct induction *));
7471 for (g1 = bl->giv; g1; g1 = g1->next_iv)
7473 giv_array[i++] = g1;
7475 stats = (struct combine_givs_stats *) xcalloc (giv_count, sizeof (*stats));
7476 can_combine = (rtx *) xcalloc (giv_count, giv_count * sizeof (rtx));
7478 for (i = 0; i < giv_count; i++)
7484 stats[i].giv_number = i;
7486 /* If a DEST_REG GIV is used only once, do not allow it to combine
7487 with anything, for in doing so we will gain nothing that cannot
7488 be had by simply letting the GIV with which we would have combined
7489 to be reduced on its own. The losage shows up in particular with
7490 DEST_ADDR targets on hosts with reg+reg addressing, though it can
7491 be seen elsewhere as well. */
7492 if (g1->giv_type == DEST_REG
7493 && (single_use = regs->array[REGNO (g1->dest_reg)].single_usage)
7494 && single_use != const0_rtx)
7497 this_benefit = g1->benefit;
7498 /* Add an additional weight for zero addends. */
7499 if (g1->no_const_addval)
7502 for (j = 0; j < giv_count; j++)
7508 && (this_combine = combine_givs_p (g1, g2)) != NULL_RTX)
7510 can_combine[i * giv_count + j] = this_combine;
7511 this_benefit += g2->benefit + extra_benefit;
7514 stats[i].total_benefit = this_benefit;
7517 /* Iterate, combining until we can't. */
7519 qsort (stats, giv_count, sizeof (*stats), cmp_combine_givs_stats);
7521 if (loop_dump_stream)
7523 fprintf (loop_dump_stream, "Sorted combine statistics:\n");
7524 for (k = 0; k < giv_count; k++)
7526 g1 = giv_array[stats[k].giv_number];
7527 if (!g1->combined_with && !g1->same)
7528 fprintf (loop_dump_stream, " {%d, %d}",
7529 INSN_UID (giv_array[stats[k].giv_number]->insn),
7530 stats[k].total_benefit);
7532 putc ('\n', loop_dump_stream);
7535 for (k = 0; k < giv_count; k++)
7537 int g1_add_benefit = 0;
7539 i = stats[k].giv_number;
7542 /* If it has already been combined, skip. */
7543 if (g1->combined_with || g1->same)
7546 for (j = 0; j < giv_count; j++)
7549 if (g1 != g2 && can_combine[i * giv_count + j]
7550 /* If it has already been combined, skip. */
7551 && ! g2->same && ! g2->combined_with)
7555 g2->new_reg = can_combine[i * giv_count + j];
7557 /* For destination, we now may replace by mem expression instead
7558 of register. This changes the costs considerably, so add the
7560 if (g2->giv_type == DEST_ADDR)
7561 g2->benefit = (g2->benefit + reg_address_cost
7562 - address_cost (g2->new_reg,
7563 GET_MODE (g2->mem)));
7564 g1->combined_with++;
7565 g1->lifetime += g2->lifetime;
7567 g1_add_benefit += g2->benefit;
7569 /* ??? The new final_[bg]iv_value code does a much better job
7570 of finding replaceable giv's, and hence this code may no
7571 longer be necessary. */
7572 if (! g2->replaceable && REG_USERVAR_P (g2->dest_reg))
7573 g1_add_benefit -= copy_cost;
7575 /* To help optimize the next set of combinations, remove
7576 this giv from the benefits of other potential mates. */
7577 for (l = 0; l < giv_count; ++l)
7579 int m = stats[l].giv_number;
7580 if (can_combine[m * giv_count + j])
7581 stats[l].total_benefit -= g2->benefit + extra_benefit;
7584 if (loop_dump_stream)
7585 fprintf (loop_dump_stream,
7586 "giv at %d combined with giv at %d; new benefit %d + %d, lifetime %d\n",
7587 INSN_UID (g2->insn), INSN_UID (g1->insn),
7588 g1->benefit, g1_add_benefit, g1->lifetime);
7592 /* To help optimize the next set of combinations, remove
7593 this giv from the benefits of other potential mates. */
7594 if (g1->combined_with)
7596 for (j = 0; j < giv_count; ++j)
7598 int m = stats[j].giv_number;
7599 if (can_combine[m * giv_count + i])
7600 stats[j].total_benefit -= g1->benefit + extra_benefit;
7603 g1->benefit += g1_add_benefit;
7605 /* We've finished with this giv, and everything it touched.
7606 Restart the combination so that proper weights for the
7607 rest of the givs are properly taken into account. */
7608 /* ??? Ideally we would compact the arrays at this point, so
7609 as to not cover old ground. But sanely compacting
7610 can_combine is tricky. */
7620 /* Generate sequence for REG = B * M + A. */
7623 gen_add_mult (b, m, a, reg)
7624 rtx b; /* initial value of basic induction variable */
7625 rtx m; /* multiplicative constant */
7626 rtx a; /* additive constant */
7627 rtx reg; /* destination register */
7633 /* Use unsigned arithmetic. */
7634 result = expand_mult_add (b, reg, m, a, GET_MODE (reg), 1);
7636 emit_move_insn (reg, result);
7637 seq = gen_sequence ();
7644 /* Update registers created in insn sequence SEQ. */
7647 loop_regs_update (loop, seq)
7648 const struct loop *loop ATTRIBUTE_UNUSED;
7651 /* Update register info for alias analysis. */
7653 if (GET_CODE (seq) == SEQUENCE)
7656 for (i = 0; i < XVECLEN (seq, 0); ++i)
7658 rtx set = single_set (XVECEXP (seq, 0, i));
7659 if (set && GET_CODE (SET_DEST (set)) == REG)
7660 record_base_value (REGNO (SET_DEST (set)), SET_SRC (set), 0);
7665 if (GET_CODE (seq) == SET
7666 && GET_CODE (SET_DEST (seq)) == REG)
7667 record_base_value (REGNO (SET_DEST (seq)), SET_SRC (seq), 0);
7672 /* EMIT code before BEFORE_BB/BEFORE_INSN to set REG = B * M + A. */
7675 loop_iv_add_mult_emit_before (loop, b, m, a, reg, before_bb, before_insn)
7676 const struct loop *loop;
7677 rtx b; /* initial value of basic induction variable */
7678 rtx m; /* multiplicative constant */
7679 rtx a; /* additive constant */
7680 rtx reg; /* destination register */
7681 basic_block before_bb;
7688 loop_iv_add_mult_hoist (loop, b, m, a, reg);
7692 /* Use copy_rtx to prevent unexpected sharing of these rtx. */
7693 seq = gen_add_mult (copy_rtx (b), copy_rtx (m), copy_rtx (a), reg);
7695 /* Increase the lifetime of any invariants moved further in code. */
7696 update_reg_last_use (a, before_insn);
7697 update_reg_last_use (b, before_insn);
7698 update_reg_last_use (m, before_insn);
7700 loop_insn_emit_before (loop, before_bb, before_insn, seq);
7702 /* It is possible that the expansion created lots of new registers.
7703 Iterate over the sequence we just created and record them all. */
7704 loop_regs_update (loop, seq);
7708 /* Emit insns in loop pre-header to set REG = B * M + A. */
7711 loop_iv_add_mult_sink (loop, b, m, a, reg)
7712 const struct loop *loop;
7713 rtx b; /* initial value of basic induction variable */
7714 rtx m; /* multiplicative constant */
7715 rtx a; /* additive constant */
7716 rtx reg; /* destination register */
7720 /* Use copy_rtx to prevent unexpected sharing of these rtx. */
7721 seq = gen_add_mult (copy_rtx (b), copy_rtx (m), copy_rtx (a), reg);
7723 /* Increase the lifetime of any invariants moved further in code.
7724 ???? Is this really necessary? */
7725 update_reg_last_use (a, loop->sink);
7726 update_reg_last_use (b, loop->sink);
7727 update_reg_last_use (m, loop->sink);
7729 loop_insn_sink (loop, seq);
7731 /* It is possible that the expansion created lots of new registers.
7732 Iterate over the sequence we just created and record them all. */
7733 loop_regs_update (loop, seq);
7737 /* Emit insns after loop to set REG = B * M + A. */
7740 loop_iv_add_mult_hoist (loop, b, m, a, reg)
7741 const struct loop *loop;
7742 rtx b; /* initial value of basic induction variable */
7743 rtx m; /* multiplicative constant */
7744 rtx a; /* additive constant */
7745 rtx reg; /* destination register */
7749 /* Use copy_rtx to prevent unexpected sharing of these rtx. */
7750 seq = gen_add_mult (copy_rtx (b), copy_rtx (m), copy_rtx (a), reg);
7752 loop_insn_hoist (loop, seq);
7754 /* It is possible that the expansion created lots of new registers.
7755 Iterate over the sequence we just created and record them all. */
7756 loop_regs_update (loop, seq);
7761 /* Similar to gen_add_mult, but compute cost rather than generating
7765 iv_add_mult_cost (b, m, a, reg)
7766 rtx b; /* initial value of basic induction variable */
7767 rtx m; /* multiplicative constant */
7768 rtx a; /* additive constant */
7769 rtx reg; /* destination register */
7775 result = expand_mult_add (b, reg, m, a, GET_MODE (reg), 1);
7777 emit_move_insn (reg, result);
7778 last = get_last_insn ();
7781 rtx t = single_set (last);
7783 cost += rtx_cost (SET_SRC (t), SET);
7784 last = PREV_INSN (last);
7790 /* Test whether A * B can be computed without
7791 an actual multiply insn. Value is 1 if so. */
7794 product_cheap_p (a, b)
7802 /* If only one is constant, make it B. */
7803 if (GET_CODE (a) == CONST_INT)
7804 tmp = a, a = b, b = tmp;
7806 /* If first constant, both constant, so don't need multiply. */
7807 if (GET_CODE (a) == CONST_INT)
7810 /* If second not constant, neither is constant, so would need multiply. */
7811 if (GET_CODE (b) != CONST_INT)
7814 /* One operand is constant, so might not need multiply insn. Generate the
7815 code for the multiply and see if a call or multiply, or long sequence
7816 of insns is generated. */
7819 expand_mult (GET_MODE (a), a, b, NULL_RTX, 1);
7820 tmp = gen_sequence ();
7823 if (GET_CODE (tmp) == SEQUENCE)
7825 if (XVEC (tmp, 0) == 0)
7827 else if (XVECLEN (tmp, 0) > 3)
7830 for (i = 0; i < XVECLEN (tmp, 0); i++)
7832 rtx insn = XVECEXP (tmp, 0, i);
7834 if (GET_CODE (insn) != INSN
7835 || (GET_CODE (PATTERN (insn)) == SET
7836 && GET_CODE (SET_SRC (PATTERN (insn))) == MULT)
7837 || (GET_CODE (PATTERN (insn)) == PARALLEL
7838 && GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == SET
7839 && GET_CODE (SET_SRC (XVECEXP (PATTERN (insn), 0, 0))) == MULT))
7846 else if (GET_CODE (tmp) == SET
7847 && GET_CODE (SET_SRC (tmp)) == MULT)
7849 else if (GET_CODE (tmp) == PARALLEL
7850 && GET_CODE (XVECEXP (tmp, 0, 0)) == SET
7851 && GET_CODE (SET_SRC (XVECEXP (tmp, 0, 0))) == MULT)
7857 /* Check to see if loop can be terminated by a "decrement and branch until
7858 zero" instruction. If so, add a REG_NONNEG note to the branch insn if so.
7859 Also try reversing an increment loop to a decrement loop
7860 to see if the optimization can be performed.
7861 Value is nonzero if optimization was performed. */
7863 /* This is useful even if the architecture doesn't have such an insn,
7864 because it might change a loops which increments from 0 to n to a loop
7865 which decrements from n to 0. A loop that decrements to zero is usually
7866 faster than one that increments from zero. */
7868 /* ??? This could be rewritten to use some of the loop unrolling procedures,
7869 such as approx_final_value, biv_total_increment, loop_iterations, and
7870 final_[bg]iv_value. */
7873 check_dbra_loop (loop, insn_count)
7877 struct loop_info *loop_info = LOOP_INFO (loop);
7878 struct loop_regs *regs = LOOP_REGS (loop);
7879 struct loop_ivs *ivs = LOOP_IVS (loop);
7880 struct iv_class *bl;
7887 rtx before_comparison;
7891 int compare_and_branch;
7892 rtx loop_start = loop->start;
7893 rtx loop_end = loop->end;
7895 /* If last insn is a conditional branch, and the insn before tests a
7896 register value, try to optimize it. Otherwise, we can't do anything. */
7898 jump = PREV_INSN (loop_end);
7899 comparison = get_condition_for_loop (loop, jump);
7900 if (comparison == 0)
7902 if (!onlyjump_p (jump))
7905 /* Try to compute whether the compare/branch at the loop end is one or
7906 two instructions. */
7907 get_condition (jump, &first_compare);
7908 if (first_compare == jump)
7909 compare_and_branch = 1;
7910 else if (first_compare == prev_nonnote_insn (jump))
7911 compare_and_branch = 2;
7916 /* If more than one condition is present to control the loop, then
7917 do not proceed, as this function does not know how to rewrite
7918 loop tests with more than one condition.
7920 Look backwards from the first insn in the last comparison
7921 sequence and see if we've got another comparison sequence. */
7924 if ((jump1 = prev_nonnote_insn (first_compare)) != loop->cont)
7925 if (GET_CODE (jump1) == JUMP_INSN)
7929 /* Check all of the bivs to see if the compare uses one of them.
7930 Skip biv's set more than once because we can't guarantee that
7931 it will be zero on the last iteration. Also skip if the biv is
7932 used between its update and the test insn. */
7934 for (bl = ivs->list; bl; bl = bl->next)
7936 if (bl->biv_count == 1
7937 && ! bl->biv->maybe_multiple
7938 && bl->biv->dest_reg == XEXP (comparison, 0)
7939 && ! reg_used_between_p (regno_reg_rtx[bl->regno], bl->biv->insn,
7947 /* Look for the case where the basic induction variable is always
7948 nonnegative, and equals zero on the last iteration.
7949 In this case, add a reg_note REG_NONNEG, which allows the
7950 m68k DBRA instruction to be used. */
7952 if (((GET_CODE (comparison) == GT
7953 && GET_CODE (XEXP (comparison, 1)) == CONST_INT
7954 && INTVAL (XEXP (comparison, 1)) == -1)
7955 || (GET_CODE (comparison) == NE && XEXP (comparison, 1) == const0_rtx))
7956 && GET_CODE (bl->biv->add_val) == CONST_INT
7957 && INTVAL (bl->biv->add_val) < 0)
7959 /* Initial value must be greater than 0,
7960 init_val % -dec_value == 0 to ensure that it equals zero on
7961 the last iteration */
7963 if (GET_CODE (bl->initial_value) == CONST_INT
7964 && INTVAL (bl->initial_value) > 0
7965 && (INTVAL (bl->initial_value)
7966 % (-INTVAL (bl->biv->add_val))) == 0)
7968 /* register always nonnegative, add REG_NOTE to branch */
7969 if (! find_reg_note (jump, REG_NONNEG, NULL_RTX))
7971 = gen_rtx_EXPR_LIST (REG_NONNEG, bl->biv->dest_reg,
7978 /* If the decrement is 1 and the value was tested as >= 0 before
7979 the loop, then we can safely optimize. */
7980 for (p = loop_start; p; p = PREV_INSN (p))
7982 if (GET_CODE (p) == CODE_LABEL)
7984 if (GET_CODE (p) != JUMP_INSN)
7987 before_comparison = get_condition_for_loop (loop, p);
7988 if (before_comparison
7989 && XEXP (before_comparison, 0) == bl->biv->dest_reg
7990 && GET_CODE (before_comparison) == LT
7991 && XEXP (before_comparison, 1) == const0_rtx
7992 && ! reg_set_between_p (bl->biv->dest_reg, p, loop_start)
7993 && INTVAL (bl->biv->add_val) == -1)
7995 if (! find_reg_note (jump, REG_NONNEG, NULL_RTX))
7997 = gen_rtx_EXPR_LIST (REG_NONNEG, bl->biv->dest_reg,
8005 else if (GET_CODE (bl->biv->add_val) == CONST_INT
8006 && INTVAL (bl->biv->add_val) > 0)
8008 /* Try to change inc to dec, so can apply above optimization. */
8010 all registers modified are induction variables or invariant,
8011 all memory references have non-overlapping addresses
8012 (obviously true if only one write)
8013 allow 2 insns for the compare/jump at the end of the loop. */
8014 /* Also, we must avoid any instructions which use both the reversed
8015 biv and another biv. Such instructions will fail if the loop is
8016 reversed. We meet this condition by requiring that either
8017 no_use_except_counting is true, or else that there is only
8019 int num_nonfixed_reads = 0;
8020 /* 1 if the iteration var is used only to count iterations. */
8021 int no_use_except_counting = 0;
8022 /* 1 if the loop has no memory store, or it has a single memory store
8023 which is reversible. */
8024 int reversible_mem_store = 1;
8026 if (bl->giv_count == 0
8027 && !loop->exit_count
8028 && !loop_info->has_multiple_exit_targets)
8030 rtx bivreg = regno_reg_rtx[bl->regno];
8031 struct iv_class *blt;
8033 /* If there are no givs for this biv, and the only exit is the
8034 fall through at the end of the loop, then
8035 see if perhaps there are no uses except to count. */
8036 no_use_except_counting = 1;
8037 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
8040 rtx set = single_set (p);
8042 if (set && GET_CODE (SET_DEST (set)) == REG
8043 && REGNO (SET_DEST (set)) == bl->regno)
8044 /* An insn that sets the biv is okay. */
8046 else if ((p == prev_nonnote_insn (prev_nonnote_insn (loop_end))
8047 || p == prev_nonnote_insn (loop_end))
8048 && reg_mentioned_p (bivreg, PATTERN (p)))
8050 /* If either of these insns uses the biv and sets a pseudo
8051 that has more than one usage, then the biv has uses
8052 other than counting since it's used to derive a value
8053 that is used more than one time. */
8054 note_stores (PATTERN (p), note_set_pseudo_multiple_uses,
8056 if (regs->multiple_uses)
8058 no_use_except_counting = 0;
8062 else if (reg_mentioned_p (bivreg, PATTERN (p)))
8064 no_use_except_counting = 0;
8069 /* A biv has uses besides counting if it is used to set
8071 for (blt = ivs->list; blt; blt = blt->next)
8073 && reg_mentioned_p (bivreg, SET_SRC (blt->init_set)))
8075 no_use_except_counting = 0;
8080 if (no_use_except_counting)
8081 /* No need to worry about MEMs. */
8083 else if (loop_info->num_mem_sets <= 1)
8085 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
8087 num_nonfixed_reads += count_nonfixed_reads (loop, PATTERN (p));
8089 /* If the loop has a single store, and the destination address is
8090 invariant, then we can't reverse the loop, because this address
8091 might then have the wrong value at loop exit.
8092 This would work if the source was invariant also, however, in that
8093 case, the insn should have been moved out of the loop. */
8095 if (loop_info->num_mem_sets == 1)
8097 struct induction *v;
8099 /* If we could prove that each of the memory locations
8100 written to was different, then we could reverse the
8101 store -- but we don't presently have any way of
8103 reversible_mem_store = 0;
8105 /* If the store depends on a register that is set after the
8106 store, it depends on the initial value, and is thus not
8108 for (v = bl->giv; reversible_mem_store && v; v = v->next_iv)
8110 if (v->giv_type == DEST_REG
8111 && reg_mentioned_p (v->dest_reg,
8112 PATTERN (loop_info->first_loop_store_insn))
8113 && loop_insn_first_p (loop_info->first_loop_store_insn,
8115 reversible_mem_store = 0;
8122 /* This code only acts for innermost loops. Also it simplifies
8123 the memory address check by only reversing loops with
8124 zero or one memory access.
8125 Two memory accesses could involve parts of the same array,
8126 and that can't be reversed.
8127 If the biv is used only for counting, than we don't need to worry
8128 about all these things. */
8130 if ((num_nonfixed_reads <= 1
8131 && ! loop_info->has_nonconst_call
8132 && ! loop_info->has_volatile
8133 && reversible_mem_store
8134 && (bl->giv_count + bl->biv_count + loop_info->num_mem_sets
8135 + num_unmoved_movables (loop) + compare_and_branch == insn_count)
8136 && (bl == ivs->list && bl->next == 0))
8137 || no_use_except_counting)
8141 /* Loop can be reversed. */
8142 if (loop_dump_stream)
8143 fprintf (loop_dump_stream, "Can reverse loop\n");
8145 /* Now check other conditions:
8147 The increment must be a constant, as must the initial value,
8148 and the comparison code must be LT.
8150 This test can probably be improved since +/- 1 in the constant
8151 can be obtained by changing LT to LE and vice versa; this is
8155 /* for constants, LE gets turned into LT */
8156 && (GET_CODE (comparison) == LT
8157 || (GET_CODE (comparison) == LE
8158 && no_use_except_counting)))
8160 HOST_WIDE_INT add_val, add_adjust, comparison_val = 0;
8161 rtx initial_value, comparison_value;
8163 enum rtx_code cmp_code;
8164 int comparison_const_width;
8165 unsigned HOST_WIDE_INT comparison_sign_mask;
8167 add_val = INTVAL (bl->biv->add_val);
8168 comparison_value = XEXP (comparison, 1);
8169 if (GET_MODE (comparison_value) == VOIDmode)
8170 comparison_const_width
8171 = GET_MODE_BITSIZE (GET_MODE (XEXP (comparison, 0)));
8173 comparison_const_width
8174 = GET_MODE_BITSIZE (GET_MODE (comparison_value));
8175 if (comparison_const_width > HOST_BITS_PER_WIDE_INT)
8176 comparison_const_width = HOST_BITS_PER_WIDE_INT;
8177 comparison_sign_mask
8178 = (unsigned HOST_WIDE_INT) 1 << (comparison_const_width - 1);
8180 /* If the comparison value is not a loop invariant, then we
8181 can not reverse this loop.
8183 ??? If the insns which initialize the comparison value as
8184 a whole compute an invariant result, then we could move
8185 them out of the loop and proceed with loop reversal. */
8186 if (! loop_invariant_p (loop, comparison_value))
8189 if (GET_CODE (comparison_value) == CONST_INT)
8190 comparison_val = INTVAL (comparison_value);
8191 initial_value = bl->initial_value;
8193 /* Normalize the initial value if it is an integer and
8194 has no other use except as a counter. This will allow
8195 a few more loops to be reversed. */
8196 if (no_use_except_counting
8197 && GET_CODE (comparison_value) == CONST_INT
8198 && GET_CODE (initial_value) == CONST_INT)
8200 comparison_val = comparison_val - INTVAL (bl->initial_value);
8201 /* The code below requires comparison_val to be a multiple
8202 of add_val in order to do the loop reversal, so
8203 round up comparison_val to a multiple of add_val.
8204 Since comparison_value is constant, we know that the
8205 current comparison code is LT. */
8206 comparison_val = comparison_val + add_val - 1;
8208 -= (unsigned HOST_WIDE_INT) comparison_val % add_val;
8209 /* We postpone overflow checks for COMPARISON_VAL here;
8210 even if there is an overflow, we might still be able to
8211 reverse the loop, if converting the loop exit test to
8213 initial_value = const0_rtx;
8216 /* First check if we can do a vanilla loop reversal. */
8217 if (initial_value == const0_rtx
8218 /* If we have a decrement_and_branch_on_count,
8219 prefer the NE test, since this will allow that
8220 instruction to be generated. Note that we must
8221 use a vanilla loop reversal if the biv is used to
8222 calculate a giv or has a non-counting use. */
8223 #if ! defined (HAVE_decrement_and_branch_until_zero) \
8224 && defined (HAVE_decrement_and_branch_on_count)
8225 && (! (add_val == 1 && loop->vtop
8226 && (bl->biv_count == 0
8227 || no_use_except_counting)))
8229 && GET_CODE (comparison_value) == CONST_INT
8230 /* Now do postponed overflow checks on COMPARISON_VAL. */
8231 && ! (((comparison_val - add_val) ^ INTVAL (comparison_value))
8232 & comparison_sign_mask))
8234 /* Register will always be nonnegative, with value
8235 0 on last iteration */
8236 add_adjust = add_val;
8240 else if (add_val == 1 && loop->vtop
8241 && (bl->biv_count == 0
8242 || no_use_except_counting))
8250 if (GET_CODE (comparison) == LE)
8251 add_adjust -= add_val;
8253 /* If the initial value is not zero, or if the comparison
8254 value is not an exact multiple of the increment, then we
8255 can not reverse this loop. */
8256 if (initial_value == const0_rtx
8257 && GET_CODE (comparison_value) == CONST_INT)
8259 if (((unsigned HOST_WIDE_INT) comparison_val % add_val) != 0)
8264 if (! no_use_except_counting || add_val != 1)
8268 final_value = comparison_value;
8270 /* Reset these in case we normalized the initial value
8271 and comparison value above. */
8272 if (GET_CODE (comparison_value) == CONST_INT
8273 && GET_CODE (initial_value) == CONST_INT)
8275 comparison_value = GEN_INT (comparison_val);
8277 = GEN_INT (comparison_val + INTVAL (bl->initial_value));
8279 bl->initial_value = initial_value;
8281 /* Save some info needed to produce the new insns. */
8282 reg = bl->biv->dest_reg;
8283 jump_label = condjump_label (PREV_INSN (loop_end));
8284 new_add_val = GEN_INT (-INTVAL (bl->biv->add_val));
8286 /* Set start_value; if this is not a CONST_INT, we need
8288 Initialize biv to start_value before loop start.
8289 The old initializing insn will be deleted as a
8290 dead store by flow.c. */
8291 if (initial_value == const0_rtx
8292 && GET_CODE (comparison_value) == CONST_INT)
8294 start_value = GEN_INT (comparison_val - add_adjust);
8295 loop_insn_hoist (loop, gen_move_insn (reg, start_value));
8297 else if (GET_CODE (initial_value) == CONST_INT)
8299 enum machine_mode mode = GET_MODE (reg);
8300 rtx offset = GEN_INT (-INTVAL (initial_value) - add_adjust);
8301 rtx add_insn = gen_add3_insn (reg, comparison_value, offset);
8307 = gen_rtx_PLUS (mode, comparison_value, offset);
8308 loop_insn_hoist (loop, add_insn);
8309 if (GET_CODE (comparison) == LE)
8310 final_value = gen_rtx_PLUS (mode, comparison_value,
8313 else if (! add_adjust)
8315 enum machine_mode mode = GET_MODE (reg);
8316 rtx sub_insn = gen_sub3_insn (reg, comparison_value,
8322 = gen_rtx_MINUS (mode, comparison_value, initial_value);
8323 loop_insn_hoist (loop, sub_insn);
8326 /* We could handle the other cases too, but it'll be
8327 better to have a testcase first. */
8330 /* We may not have a single insn which can increment a reg, so
8331 create a sequence to hold all the insns from expand_inc. */
8333 expand_inc (reg, new_add_val);
8334 tem = gen_sequence ();
8337 p = loop_insn_emit_before (loop, 0, bl->biv->insn, tem);
8338 delete_insn (bl->biv->insn);
8340 /* Update biv info to reflect its new status. */
8342 bl->initial_value = start_value;
8343 bl->biv->add_val = new_add_val;
8345 /* Update loop info. */
8346 loop_info->initial_value = reg;
8347 loop_info->initial_equiv_value = reg;
8348 loop_info->final_value = const0_rtx;
8349 loop_info->final_equiv_value = const0_rtx;
8350 loop_info->comparison_value = const0_rtx;
8351 loop_info->comparison_code = cmp_code;
8352 loop_info->increment = new_add_val;
8354 /* Inc LABEL_NUSES so that delete_insn will
8355 not delete the label. */
8356 LABEL_NUSES (XEXP (jump_label, 0))++;
8358 /* Emit an insn after the end of the loop to set the biv's
8359 proper exit value if it is used anywhere outside the loop. */
8360 if ((REGNO_LAST_UID (bl->regno) != INSN_UID (first_compare))
8362 || REGNO_FIRST_UID (bl->regno) != INSN_UID (bl->init_insn))
8363 loop_insn_sink (loop, gen_move_insn (reg, final_value));
8365 /* Delete compare/branch at end of loop. */
8366 delete_related_insns (PREV_INSN (loop_end));
8367 if (compare_and_branch == 2)
8368 delete_related_insns (first_compare);
8370 /* Add new compare/branch insn at end of loop. */
8372 emit_cmp_and_jump_insns (reg, const0_rtx, cmp_code, NULL_RTX,
8374 XEXP (jump_label, 0));
8375 tem = gen_sequence ();
8377 emit_jump_insn_before (tem, loop_end);
8379 for (tem = PREV_INSN (loop_end);
8380 tem && GET_CODE (tem) != JUMP_INSN;
8381 tem = PREV_INSN (tem))
8385 JUMP_LABEL (tem) = XEXP (jump_label, 0);
8391 /* Increment of LABEL_NUSES done above. */
8392 /* Register is now always nonnegative,
8393 so add REG_NONNEG note to the branch. */
8394 REG_NOTES (tem) = gen_rtx_EXPR_LIST (REG_NONNEG, reg,
8400 /* No insn may reference both the reversed and another biv or it
8401 will fail (see comment near the top of the loop reversal
8403 Earlier on, we have verified that the biv has no use except
8404 counting, or it is the only biv in this function.
8405 However, the code that computes no_use_except_counting does
8406 not verify reg notes. It's possible to have an insn that
8407 references another biv, and has a REG_EQUAL note with an
8408 expression based on the reversed biv. To avoid this case,
8409 remove all REG_EQUAL notes based on the reversed biv
8411 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
8415 rtx set = single_set (p);
8416 /* If this is a set of a GIV based on the reversed biv, any
8417 REG_EQUAL notes should still be correct. */
8419 || GET_CODE (SET_DEST (set)) != REG
8420 || (size_t) REGNO (SET_DEST (set)) >= ivs->n_regs
8421 || REG_IV_TYPE (ivs, REGNO (SET_DEST (set))) != GENERAL_INDUCT
8422 || REG_IV_INFO (ivs, REGNO (SET_DEST (set)))->src_reg != bl->biv->src_reg)
8423 for (pnote = ®_NOTES (p); *pnote;)
8425 if (REG_NOTE_KIND (*pnote) == REG_EQUAL
8426 && reg_mentioned_p (regno_reg_rtx[bl->regno],
8428 *pnote = XEXP (*pnote, 1);
8430 pnote = &XEXP (*pnote, 1);
8434 /* Mark that this biv has been reversed. Each giv which depends
8435 on this biv, and which is also live past the end of the loop
8436 will have to be fixed up. */
8440 if (loop_dump_stream)
8442 fprintf (loop_dump_stream, "Reversed loop");
8444 fprintf (loop_dump_stream, " and added reg_nonneg\n");
8446 fprintf (loop_dump_stream, "\n");
8457 /* Verify whether the biv BL appears to be eliminable,
8458 based on the insns in the loop that refer to it.
8460 If ELIMINATE_P is non-zero, actually do the elimination.
8462 THRESHOLD and INSN_COUNT are from loop_optimize and are used to
8463 determine whether invariant insns should be placed inside or at the
8464 start of the loop. */
8467 maybe_eliminate_biv (loop, bl, eliminate_p, threshold, insn_count)
8468 const struct loop *loop;
8469 struct iv_class *bl;
8471 int threshold, insn_count;
8473 struct loop_ivs *ivs = LOOP_IVS (loop);
8474 rtx reg = bl->biv->dest_reg;
8477 /* Scan all insns in the loop, stopping if we find one that uses the
8478 biv in a way that we cannot eliminate. */
8480 for (p = loop->start; p != loop->end; p = NEXT_INSN (p))
8482 enum rtx_code code = GET_CODE (p);
8483 basic_block where_bb = 0;
8484 rtx where_insn = threshold >= insn_count ? 0 : p;
8486 /* If this is a libcall that sets a giv, skip ahead to its end. */
8487 if (GET_RTX_CLASS (code) == 'i')
8489 rtx note = find_reg_note (p, REG_LIBCALL, NULL_RTX);
8493 rtx last = XEXP (note, 0);
8494 rtx set = single_set (last);
8496 if (set && GET_CODE (SET_DEST (set)) == REG)
8498 unsigned int regno = REGNO (SET_DEST (set));
8500 if (regno < ivs->n_regs
8501 && REG_IV_TYPE (ivs, regno) == GENERAL_INDUCT
8502 && REG_IV_INFO (ivs, regno)->src_reg == bl->biv->src_reg)
8507 if ((code == INSN || code == JUMP_INSN || code == CALL_INSN)
8508 && reg_mentioned_p (reg, PATTERN (p))
8509 && ! maybe_eliminate_biv_1 (loop, PATTERN (p), p, bl,
8510 eliminate_p, where_bb, where_insn))
8512 if (loop_dump_stream)
8513 fprintf (loop_dump_stream,
8514 "Cannot eliminate biv %d: biv used in insn %d.\n",
8515 bl->regno, INSN_UID (p));
8522 if (loop_dump_stream)
8523 fprintf (loop_dump_stream, "biv %d %s eliminated.\n",
8524 bl->regno, eliminate_p ? "was" : "can be");
8531 /* INSN and REFERENCE are instructions in the same insn chain.
8532 Return non-zero if INSN is first. */
8535 loop_insn_first_p (insn, reference)
8536 rtx insn, reference;
8540 for (p = insn, q = reference;;)
8542 /* Start with test for not first so that INSN == REFERENCE yields not
8544 if (q == insn || ! p)
8546 if (p == reference || ! q)
8549 /* Either of P or Q might be a NOTE. Notes have the same LUID as the
8550 previous insn, hence the <= comparison below does not work if
8552 if (INSN_UID (p) < max_uid_for_loop
8553 && INSN_UID (q) < max_uid_for_loop
8554 && GET_CODE (p) != NOTE)
8555 return INSN_LUID (p) <= INSN_LUID (q);
8557 if (INSN_UID (p) >= max_uid_for_loop
8558 || GET_CODE (p) == NOTE)
8560 if (INSN_UID (q) >= max_uid_for_loop)
8565 /* We are trying to eliminate BIV in INSN using GIV. Return non-zero if
8566 the offset that we have to take into account due to auto-increment /
8567 div derivation is zero. */
8569 biv_elimination_giv_has_0_offset (biv, giv, insn)
8570 struct induction *biv, *giv;
8573 /* If the giv V had the auto-inc address optimization applied
8574 to it, and INSN occurs between the giv insn and the biv
8575 insn, then we'd have to adjust the value used here.
8576 This is rare, so we don't bother to make this possible. */
8577 if (giv->auto_inc_opt
8578 && ((loop_insn_first_p (giv->insn, insn)
8579 && loop_insn_first_p (insn, biv->insn))
8580 || (loop_insn_first_p (biv->insn, insn)
8581 && loop_insn_first_p (insn, giv->insn))))
8587 /* If BL appears in X (part of the pattern of INSN), see if we can
8588 eliminate its use. If so, return 1. If not, return 0.
8590 If BIV does not appear in X, return 1.
8592 If ELIMINATE_P is non-zero, actually do the elimination.
8593 WHERE_INSN/WHERE_BB indicate where extra insns should be added.
8594 Depending on how many items have been moved out of the loop, it
8595 will either be before INSN (when WHERE_INSN is non-zero) or at the
8596 start of the loop (when WHERE_INSN is zero). */
8599 maybe_eliminate_biv_1 (loop, x, insn, bl, eliminate_p, where_bb, where_insn)
8600 const struct loop *loop;
8602 struct iv_class *bl;
8604 basic_block where_bb;
8607 enum rtx_code code = GET_CODE (x);
8608 rtx reg = bl->biv->dest_reg;
8609 enum machine_mode mode = GET_MODE (reg);
8610 struct induction *v;
8622 /* If we haven't already been able to do something with this BIV,
8623 we can't eliminate it. */
8629 /* If this sets the BIV, it is not a problem. */
8630 if (SET_DEST (x) == reg)
8633 /* If this is an insn that defines a giv, it is also ok because
8634 it will go away when the giv is reduced. */
8635 for (v = bl->giv; v; v = v->next_iv)
8636 if (v->giv_type == DEST_REG && SET_DEST (x) == v->dest_reg)
8640 if (SET_DEST (x) == cc0_rtx && SET_SRC (x) == reg)
8642 /* Can replace with any giv that was reduced and
8643 that has (MULT_VAL != 0) and (ADD_VAL == 0).
8644 Require a constant for MULT_VAL, so we know it's nonzero.
8645 ??? We disable this optimization to avoid potential
8648 for (v = bl->giv; v; v = v->next_iv)
8649 if (GET_CODE (v->mult_val) == CONST_INT && v->mult_val != const0_rtx
8650 && v->add_val == const0_rtx
8651 && ! v->ignore && ! v->maybe_dead && v->always_computable
8655 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8661 /* If the giv has the opposite direction of change,
8662 then reverse the comparison. */
8663 if (INTVAL (v->mult_val) < 0)
8664 new = gen_rtx_COMPARE (GET_MODE (v->new_reg),
8665 const0_rtx, v->new_reg);
8669 /* We can probably test that giv's reduced reg. */
8670 if (validate_change (insn, &SET_SRC (x), new, 0))
8674 /* Look for a giv with (MULT_VAL != 0) and (ADD_VAL != 0);
8675 replace test insn with a compare insn (cmp REDUCED_GIV ADD_VAL).
8676 Require a constant for MULT_VAL, so we know it's nonzero.
8677 ??? Do this only if ADD_VAL is a pointer to avoid a potential
8678 overflow problem. */
8680 for (v = bl->giv; v; v = v->next_iv)
8681 if (GET_CODE (v->mult_val) == CONST_INT
8682 && v->mult_val != const0_rtx
8683 && ! v->ignore && ! v->maybe_dead && v->always_computable
8685 && (GET_CODE (v->add_val) == SYMBOL_REF
8686 || GET_CODE (v->add_val) == LABEL_REF
8687 || GET_CODE (v->add_val) == CONST
8688 || (GET_CODE (v->add_val) == REG
8689 && REG_POINTER (v->add_val))))
8691 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8697 /* If the giv has the opposite direction of change,
8698 then reverse the comparison. */
8699 if (INTVAL (v->mult_val) < 0)
8700 new = gen_rtx_COMPARE (VOIDmode, copy_rtx (v->add_val),
8703 new = gen_rtx_COMPARE (VOIDmode, v->new_reg,
8704 copy_rtx (v->add_val));
8706 /* Replace biv with the giv's reduced register. */
8707 update_reg_last_use (v->add_val, insn);
8708 if (validate_change (insn, &SET_SRC (PATTERN (insn)), new, 0))
8711 /* Insn doesn't support that constant or invariant. Copy it
8712 into a register (it will be a loop invariant.) */
8713 tem = gen_reg_rtx (GET_MODE (v->new_reg));
8715 loop_insn_emit_before (loop, 0, where_insn,
8717 copy_rtx (v->add_val)));
8719 /* Substitute the new register for its invariant value in
8720 the compare expression. */
8721 XEXP (new, (INTVAL (v->mult_val) < 0) ? 0 : 1) = tem;
8722 if (validate_change (insn, &SET_SRC (PATTERN (insn)), new, 0))
8731 case GT: case GE: case GTU: case GEU:
8732 case LT: case LE: case LTU: case LEU:
8733 /* See if either argument is the biv. */
8734 if (XEXP (x, 0) == reg)
8735 arg = XEXP (x, 1), arg_operand = 1;
8736 else if (XEXP (x, 1) == reg)
8737 arg = XEXP (x, 0), arg_operand = 0;
8741 if (CONSTANT_P (arg))
8743 /* First try to replace with any giv that has constant positive
8744 mult_val and constant add_val. We might be able to support
8745 negative mult_val, but it seems complex to do it in general. */
8747 for (v = bl->giv; v; v = v->next_iv)
8748 if (GET_CODE (v->mult_val) == CONST_INT
8749 && INTVAL (v->mult_val) > 0
8750 && (GET_CODE (v->add_val) == SYMBOL_REF
8751 || GET_CODE (v->add_val) == LABEL_REF
8752 || GET_CODE (v->add_val) == CONST
8753 || (GET_CODE (v->add_val) == REG
8754 && REG_POINTER (v->add_val)))
8755 && ! v->ignore && ! v->maybe_dead && v->always_computable
8758 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8764 /* Replace biv with the giv's reduced reg. */
8765 validate_change (insn, &XEXP (x, 1 - arg_operand), v->new_reg, 1);
8767 /* If all constants are actually constant integers and
8768 the derived constant can be directly placed in the COMPARE,
8770 if (GET_CODE (arg) == CONST_INT
8771 && GET_CODE (v->mult_val) == CONST_INT
8772 && GET_CODE (v->add_val) == CONST_INT)
8774 validate_change (insn, &XEXP (x, arg_operand),
8775 GEN_INT (INTVAL (arg)
8776 * INTVAL (v->mult_val)
8777 + INTVAL (v->add_val)), 1);
8781 /* Otherwise, load it into a register. */
8782 tem = gen_reg_rtx (mode);
8783 loop_iv_add_mult_emit_before (loop, arg,
8784 v->mult_val, v->add_val,
8785 tem, where_bb, where_insn);
8786 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
8788 if (apply_change_group ())
8792 /* Look for giv with positive constant mult_val and nonconst add_val.
8793 Insert insns to calculate new compare value.
8794 ??? Turn this off due to possible overflow. */
8796 for (v = bl->giv; v; v = v->next_iv)
8797 if (GET_CODE (v->mult_val) == CONST_INT
8798 && INTVAL (v->mult_val) > 0
8799 && ! v->ignore && ! v->maybe_dead && v->always_computable
8805 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8811 tem = gen_reg_rtx (mode);
8813 /* Replace biv with giv's reduced register. */
8814 validate_change (insn, &XEXP (x, 1 - arg_operand),
8817 /* Compute value to compare against. */
8818 loop_iv_add_mult_emit_before (loop, arg,
8819 v->mult_val, v->add_val,
8820 tem, where_bb, where_insn);
8821 /* Use it in this insn. */
8822 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
8823 if (apply_change_group ())
8827 else if (GET_CODE (arg) == REG || GET_CODE (arg) == MEM)
8829 if (loop_invariant_p (loop, arg) == 1)
8831 /* Look for giv with constant positive mult_val and nonconst
8832 add_val. Insert insns to compute new compare value.
8833 ??? Turn this off due to possible overflow. */
8835 for (v = bl->giv; v; v = v->next_iv)
8836 if (GET_CODE (v->mult_val) == CONST_INT && INTVAL (v->mult_val) > 0
8837 && ! v->ignore && ! v->maybe_dead && v->always_computable
8843 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8849 tem = gen_reg_rtx (mode);
8851 /* Replace biv with giv's reduced register. */
8852 validate_change (insn, &XEXP (x, 1 - arg_operand),
8855 /* Compute value to compare against. */
8856 loop_iv_add_mult_emit_before (loop, arg,
8857 v->mult_val, v->add_val,
8858 tem, where_bb, where_insn);
8859 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
8860 if (apply_change_group ())
8865 /* This code has problems. Basically, you can't know when
8866 seeing if we will eliminate BL, whether a particular giv
8867 of ARG will be reduced. If it isn't going to be reduced,
8868 we can't eliminate BL. We can try forcing it to be reduced,
8869 but that can generate poor code.
8871 The problem is that the benefit of reducing TV, below should
8872 be increased if BL can actually be eliminated, but this means
8873 we might have to do a topological sort of the order in which
8874 we try to process biv. It doesn't seem worthwhile to do
8875 this sort of thing now. */
8878 /* Otherwise the reg compared with had better be a biv. */
8879 if (GET_CODE (arg) != REG
8880 || REG_IV_TYPE (ivs, REGNO (arg)) != BASIC_INDUCT)
8883 /* Look for a pair of givs, one for each biv,
8884 with identical coefficients. */
8885 for (v = bl->giv; v; v = v->next_iv)
8887 struct induction *tv;
8889 if (v->ignore || v->maybe_dead || v->mode != mode)
8892 for (tv = REG_IV_CLASS (ivs, REGNO (arg))->giv; tv;
8894 if (! tv->ignore && ! tv->maybe_dead
8895 && rtx_equal_p (tv->mult_val, v->mult_val)
8896 && rtx_equal_p (tv->add_val, v->add_val)
8897 && tv->mode == mode)
8899 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8905 /* Replace biv with its giv's reduced reg. */
8906 XEXP (x, 1 - arg_operand) = v->new_reg;
8907 /* Replace other operand with the other giv's
8909 XEXP (x, arg_operand) = tv->new_reg;
8916 /* If we get here, the biv can't be eliminated. */
8920 /* If this address is a DEST_ADDR giv, it doesn't matter if the
8921 biv is used in it, since it will be replaced. */
8922 for (v = bl->giv; v; v = v->next_iv)
8923 if (v->giv_type == DEST_ADDR && v->location == &XEXP (x, 0))
8931 /* See if any subexpression fails elimination. */
8932 fmt = GET_RTX_FORMAT (code);
8933 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
8938 if (! maybe_eliminate_biv_1 (loop, XEXP (x, i), insn, bl,
8939 eliminate_p, where_bb, where_insn))
8944 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
8945 if (! maybe_eliminate_biv_1 (loop, XVECEXP (x, i, j), insn, bl,
8946 eliminate_p, where_bb, where_insn))
8955 /* Return nonzero if the last use of REG
8956 is in an insn following INSN in the same basic block. */
8959 last_use_this_basic_block (reg, insn)
8965 n && GET_CODE (n) != CODE_LABEL && GET_CODE (n) != JUMP_INSN;
8968 if (REGNO_LAST_UID (REGNO (reg)) == INSN_UID (n))
8974 /* Called via `note_stores' to record the initial value of a biv. Here we
8975 just record the location of the set and process it later. */
8978 record_initial (dest, set, data)
8981 void *data ATTRIBUTE_UNUSED;
8983 struct loop_ivs *ivs = (struct loop_ivs *) data;
8984 struct iv_class *bl;
8986 if (GET_CODE (dest) != REG
8987 || REGNO (dest) >= ivs->n_regs
8988 || REG_IV_TYPE (ivs, REGNO (dest)) != BASIC_INDUCT)
8991 bl = REG_IV_CLASS (ivs, REGNO (dest));
8993 /* If this is the first set found, record it. */
8994 if (bl->init_insn == 0)
8996 bl->init_insn = note_insn;
9001 /* If any of the registers in X are "old" and currently have a last use earlier
9002 than INSN, update them to have a last use of INSN. Their actual last use
9003 will be the previous insn but it will not have a valid uid_luid so we can't
9004 use it. X must be a source expression only. */
9007 update_reg_last_use (x, insn)
9011 /* Check for the case where INSN does not have a valid luid. In this case,
9012 there is no need to modify the regno_last_uid, as this can only happen
9013 when code is inserted after the loop_end to set a pseudo's final value,
9014 and hence this insn will never be the last use of x.
9015 ???? This comment is not correct. See for example loop_givs_reduce.
9016 This may insert an insn before another new insn. */
9017 if (GET_CODE (x) == REG && REGNO (x) < max_reg_before_loop
9018 && INSN_UID (insn) < max_uid_for_loop
9019 && REGNO_LAST_LUID (REGNO (x)) < INSN_LUID (insn))
9021 REGNO_LAST_UID (REGNO (x)) = INSN_UID (insn);
9026 const char *fmt = GET_RTX_FORMAT (GET_CODE (x));
9027 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
9030 update_reg_last_use (XEXP (x, i), insn);
9031 else if (fmt[i] == 'E')
9032 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
9033 update_reg_last_use (XVECEXP (x, i, j), insn);
9038 /* Given an insn INSN and condition COND, return the condition in a
9039 canonical form to simplify testing by callers. Specifically:
9041 (1) The code will always be a comparison operation (EQ, NE, GT, etc.).
9042 (2) Both operands will be machine operands; (cc0) will have been replaced.
9043 (3) If an operand is a constant, it will be the second operand.
9044 (4) (LE x const) will be replaced with (LT x <const+1>) and similarly
9045 for GE, GEU, and LEU.
9047 If the condition cannot be understood, or is an inequality floating-point
9048 comparison which needs to be reversed, 0 will be returned.
9050 If REVERSE is non-zero, then reverse the condition prior to canonizing it.
9052 If EARLIEST is non-zero, it is a pointer to a place where the earliest
9053 insn used in locating the condition was found. If a replacement test
9054 of the condition is desired, it should be placed in front of that
9055 insn and we will be sure that the inputs are still valid.
9057 If WANT_REG is non-zero, we wish the condition to be relative to that
9058 register, if possible. Therefore, do not canonicalize the condition
9062 canonicalize_condition (insn, cond, reverse, earliest, want_reg)
9074 int reverse_code = 0;
9075 enum machine_mode mode;
9077 code = GET_CODE (cond);
9078 mode = GET_MODE (cond);
9079 op0 = XEXP (cond, 0);
9080 op1 = XEXP (cond, 1);
9083 code = reversed_comparison_code (cond, insn);
9084 if (code == UNKNOWN)
9090 /* If we are comparing a register with zero, see if the register is set
9091 in the previous insn to a COMPARE or a comparison operation. Perform
9092 the same tests as a function of STORE_FLAG_VALUE as find_comparison_args
9095 while (GET_RTX_CLASS (code) == '<'
9096 && op1 == CONST0_RTX (GET_MODE (op0))
9099 /* Set non-zero when we find something of interest. */
9103 /* If comparison with cc0, import actual comparison from compare
9107 if ((prev = prev_nonnote_insn (prev)) == 0
9108 || GET_CODE (prev) != INSN
9109 || (set = single_set (prev)) == 0
9110 || SET_DEST (set) != cc0_rtx)
9113 op0 = SET_SRC (set);
9114 op1 = CONST0_RTX (GET_MODE (op0));
9120 /* If this is a COMPARE, pick up the two things being compared. */
9121 if (GET_CODE (op0) == COMPARE)
9123 op1 = XEXP (op0, 1);
9124 op0 = XEXP (op0, 0);
9127 else if (GET_CODE (op0) != REG)
9130 /* Go back to the previous insn. Stop if it is not an INSN. We also
9131 stop if it isn't a single set or if it has a REG_INC note because
9132 we don't want to bother dealing with it. */
9134 if ((prev = prev_nonnote_insn (prev)) == 0
9135 || GET_CODE (prev) != INSN
9136 || FIND_REG_INC_NOTE (prev, NULL_RTX))
9139 set = set_of (op0, prev);
9142 && (GET_CODE (set) != SET
9143 || !rtx_equal_p (SET_DEST (set), op0)))
9146 /* If this is setting OP0, get what it sets it to if it looks
9150 enum machine_mode inner_mode = GET_MODE (SET_DEST (set));
9152 /* ??? We may not combine comparisons done in a CCmode with
9153 comparisons not done in a CCmode. This is to aid targets
9154 like Alpha that have an IEEE compliant EQ instruction, and
9155 a non-IEEE compliant BEQ instruction. The use of CCmode is
9156 actually artificial, simply to prevent the combination, but
9157 should not affect other platforms.
9159 However, we must allow VOIDmode comparisons to match either
9160 CCmode or non-CCmode comparison, because some ports have
9161 modeless comparisons inside branch patterns.
9163 ??? This mode check should perhaps look more like the mode check
9164 in simplify_comparison in combine. */
9166 if ((GET_CODE (SET_SRC (set)) == COMPARE
9169 && GET_MODE_CLASS (inner_mode) == MODE_INT
9170 && (GET_MODE_BITSIZE (inner_mode)
9171 <= HOST_BITS_PER_WIDE_INT)
9172 && (STORE_FLAG_VALUE
9173 & ((HOST_WIDE_INT) 1
9174 << (GET_MODE_BITSIZE (inner_mode) - 1))))
9175 #ifdef FLOAT_STORE_FLAG_VALUE
9177 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
9178 && (REAL_VALUE_NEGATIVE
9179 (FLOAT_STORE_FLAG_VALUE (inner_mode))))
9182 && GET_RTX_CLASS (GET_CODE (SET_SRC (set))) == '<'))
9183 && (((GET_MODE_CLASS (mode) == MODE_CC)
9184 == (GET_MODE_CLASS (inner_mode) == MODE_CC))
9185 || mode == VOIDmode || inner_mode == VOIDmode))
9187 else if (((code == EQ
9189 && (GET_MODE_BITSIZE (inner_mode)
9190 <= HOST_BITS_PER_WIDE_INT)
9191 && GET_MODE_CLASS (inner_mode) == MODE_INT
9192 && (STORE_FLAG_VALUE
9193 & ((HOST_WIDE_INT) 1
9194 << (GET_MODE_BITSIZE (inner_mode) - 1))))
9195 #ifdef FLOAT_STORE_FLAG_VALUE
9197 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
9198 && (REAL_VALUE_NEGATIVE
9199 (FLOAT_STORE_FLAG_VALUE (inner_mode))))
9202 && GET_RTX_CLASS (GET_CODE (SET_SRC (set))) == '<'
9203 && (((GET_MODE_CLASS (mode) == MODE_CC)
9204 == (GET_MODE_CLASS (inner_mode) == MODE_CC))
9205 || mode == VOIDmode || inner_mode == VOIDmode))
9215 else if (reg_set_p (op0, prev))
9216 /* If this sets OP0, but not directly, we have to give up. */
9221 if (GET_RTX_CLASS (GET_CODE (x)) == '<')
9222 code = GET_CODE (x);
9225 code = reversed_comparison_code (x, prev);
9226 if (code == UNKNOWN)
9231 op0 = XEXP (x, 0), op1 = XEXP (x, 1);
9237 /* If constant is first, put it last. */
9238 if (CONSTANT_P (op0))
9239 code = swap_condition (code), tem = op0, op0 = op1, op1 = tem;
9241 /* If OP0 is the result of a comparison, we weren't able to find what
9242 was really being compared, so fail. */
9243 if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_CC)
9246 /* Canonicalize any ordered comparison with integers involving equality
9247 if we can do computations in the relevant mode and we do not
9250 if (GET_CODE (op1) == CONST_INT
9251 && GET_MODE (op0) != VOIDmode
9252 && GET_MODE_BITSIZE (GET_MODE (op0)) <= HOST_BITS_PER_WIDE_INT)
9254 HOST_WIDE_INT const_val = INTVAL (op1);
9255 unsigned HOST_WIDE_INT uconst_val = const_val;
9256 unsigned HOST_WIDE_INT max_val
9257 = (unsigned HOST_WIDE_INT) GET_MODE_MASK (GET_MODE (op0));
9262 if ((unsigned HOST_WIDE_INT) const_val != max_val >> 1)
9263 code = LT, op1 = GEN_INT (const_val + 1);
9266 /* When cross-compiling, const_val might be sign-extended from
9267 BITS_PER_WORD to HOST_BITS_PER_WIDE_INT */
9269 if ((HOST_WIDE_INT) (const_val & max_val)
9270 != (((HOST_WIDE_INT) 1
9271 << (GET_MODE_BITSIZE (GET_MODE (op0)) - 1))))
9272 code = GT, op1 = GEN_INT (const_val - 1);
9276 if (uconst_val < max_val)
9277 code = LTU, op1 = GEN_INT (uconst_val + 1);
9281 if (uconst_val != 0)
9282 code = GTU, op1 = GEN_INT (uconst_val - 1);
9291 /* Never return CC0; return zero instead. */
9296 return gen_rtx_fmt_ee (code, VOIDmode, op0, op1);
9299 /* Given a jump insn JUMP, return the condition that will cause it to branch
9300 to its JUMP_LABEL. If the condition cannot be understood, or is an
9301 inequality floating-point comparison which needs to be reversed, 0 will
9304 If EARLIEST is non-zero, it is a pointer to a place where the earliest
9305 insn used in locating the condition was found. If a replacement test
9306 of the condition is desired, it should be placed in front of that
9307 insn and we will be sure that the inputs are still valid. */
9310 get_condition (jump, earliest)
9318 /* If this is not a standard conditional jump, we can't parse it. */
9319 if (GET_CODE (jump) != JUMP_INSN
9320 || ! any_condjump_p (jump))
9322 set = pc_set (jump);
9324 cond = XEXP (SET_SRC (set), 0);
9326 /* If this branches to JUMP_LABEL when the condition is false, reverse
9329 = GET_CODE (XEXP (SET_SRC (set), 2)) == LABEL_REF
9330 && XEXP (XEXP (SET_SRC (set), 2), 0) == JUMP_LABEL (jump);
9332 return canonicalize_condition (jump, cond, reverse, earliest, NULL_RTX);
9335 /* Similar to above routine, except that we also put an invariant last
9336 unless both operands are invariants. */
9339 get_condition_for_loop (loop, x)
9340 const struct loop *loop;
9343 rtx comparison = get_condition (x, (rtx*) 0);
9346 || ! loop_invariant_p (loop, XEXP (comparison, 0))
9347 || loop_invariant_p (loop, XEXP (comparison, 1)))
9350 return gen_rtx_fmt_ee (swap_condition (GET_CODE (comparison)), VOIDmode,
9351 XEXP (comparison, 1), XEXP (comparison, 0));
9354 /* Scan the function and determine whether it has indirect (computed) jumps.
9356 This is taken mostly from flow.c; similar code exists elsewhere
9357 in the compiler. It may be useful to put this into rtlanal.c. */
9359 indirect_jump_in_function_p (start)
9364 for (insn = start; insn; insn = NEXT_INSN (insn))
9365 if (computed_jump_p (insn))
9371 /* Add MEM to the LOOP_MEMS array, if appropriate. See the
9372 documentation for LOOP_MEMS for the definition of `appropriate'.
9373 This function is called from prescan_loop via for_each_rtx. */
9376 insert_loop_mem (mem, data)
9378 void *data ATTRIBUTE_UNUSED;
9380 struct loop_info *loop_info = data;
9387 switch (GET_CODE (m))
9393 /* We're not interested in MEMs that are only clobbered. */
9397 /* We're not interested in the MEM associated with a
9398 CONST_DOUBLE, so there's no need to traverse into this. */
9402 /* We're not interested in any MEMs that only appear in notes. */
9406 /* This is not a MEM. */
9410 /* See if we've already seen this MEM. */
9411 for (i = 0; i < loop_info->mems_idx; ++i)
9412 if (rtx_equal_p (m, loop_info->mems[i].mem))
9414 if (GET_MODE (m) != GET_MODE (loop_info->mems[i].mem))
9415 /* The modes of the two memory accesses are different. If
9416 this happens, something tricky is going on, and we just
9417 don't optimize accesses to this MEM. */
9418 loop_info->mems[i].optimize = 0;
9423 /* Resize the array, if necessary. */
9424 if (loop_info->mems_idx == loop_info->mems_allocated)
9426 if (loop_info->mems_allocated != 0)
9427 loop_info->mems_allocated *= 2;
9429 loop_info->mems_allocated = 32;
9431 loop_info->mems = (loop_mem_info *)
9432 xrealloc (loop_info->mems,
9433 loop_info->mems_allocated * sizeof (loop_mem_info));
9436 /* Actually insert the MEM. */
9437 loop_info->mems[loop_info->mems_idx].mem = m;
9438 /* We can't hoist this MEM out of the loop if it's a BLKmode MEM
9439 because we can't put it in a register. We still store it in the
9440 table, though, so that if we see the same address later, but in a
9441 non-BLK mode, we'll not think we can optimize it at that point. */
9442 loop_info->mems[loop_info->mems_idx].optimize = (GET_MODE (m) != BLKmode);
9443 loop_info->mems[loop_info->mems_idx].reg = NULL_RTX;
9444 ++loop_info->mems_idx;
9450 /* Allocate REGS->ARRAY or reallocate it if it is too small.
9452 Increment REGS->ARRAY[I].SET_IN_LOOP at the index I of each
9453 register that is modified by an insn between FROM and TO. If the
9454 value of an element of REGS->array[I].SET_IN_LOOP becomes 127 or
9455 more, stop incrementing it, to avoid overflow.
9457 Store in REGS->ARRAY[I].SINGLE_USAGE the single insn in which
9458 register I is used, if it is only used once. Otherwise, it is set
9459 to 0 (for no uses) or const0_rtx for more than one use. This
9460 parameter may be zero, in which case this processing is not done.
9462 Set REGS->ARRAY[I].MAY_NOT_OPTIMIZE nonzero if we should not
9463 optimize register I. */
9466 loop_regs_scan (loop, extra_size)
9467 const struct loop *loop;
9470 struct loop_regs *regs = LOOP_REGS (loop);
9472 /* last_set[n] is nonzero iff reg n has been set in the current
9473 basic block. In that case, it is the insn that last set reg n. */
9478 old_nregs = regs->num;
9479 regs->num = max_reg_num ();
9481 /* Grow the regs array if not allocated or too small. */
9482 if (regs->num >= regs->size)
9484 regs->size = regs->num + extra_size;
9486 regs->array = (struct loop_reg *)
9487 xrealloc (regs->array, regs->size * sizeof (*regs->array));
9489 /* Zero the new elements. */
9490 memset (regs->array + old_nregs, 0,
9491 (regs->size - old_nregs) * sizeof (*regs->array));
9494 /* Clear previously scanned fields but do not clear n_times_set. */
9495 for (i = 0; i < old_nregs; i++)
9497 regs->array[i].set_in_loop = 0;
9498 regs->array[i].may_not_optimize = 0;
9499 regs->array[i].single_usage = NULL_RTX;
9502 last_set = (rtx *) xcalloc (regs->num, sizeof (rtx));
9504 /* Scan the loop, recording register usage. */
9505 for (insn = loop->top ? loop->top : loop->start; insn != loop->end;
9506 insn = NEXT_INSN (insn))
9510 /* Record registers that have exactly one use. */
9511 find_single_use_in_loop (regs, insn, PATTERN (insn));
9513 /* Include uses in REG_EQUAL notes. */
9514 if (REG_NOTES (insn))
9515 find_single_use_in_loop (regs, insn, REG_NOTES (insn));
9517 if (GET_CODE (PATTERN (insn)) == SET
9518 || GET_CODE (PATTERN (insn)) == CLOBBER)
9519 count_one_set (regs, insn, PATTERN (insn), last_set);
9520 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
9523 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
9524 count_one_set (regs, insn, XVECEXP (PATTERN (insn), 0, i),
9529 if (GET_CODE (insn) == CODE_LABEL || GET_CODE (insn) == JUMP_INSN)
9530 memset (last_set, 0, regs->num * sizeof (rtx));
9533 /* Invalidate all hard registers clobbered by calls. With one exception:
9534 a call-clobbered PIC register is still function-invariant for our
9535 purposes, since we can hoist any PIC calculations out of the loop.
9536 Thus the call to rtx_varies_p. */
9537 if (LOOP_INFO (loop)->has_call)
9538 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
9539 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i)
9540 && rtx_varies_p (gen_rtx_REG (Pmode, i), /*for_alias=*/1))
9542 regs->array[i].may_not_optimize = 1;
9543 regs->array[i].set_in_loop = 1;
9546 #ifdef AVOID_CCMODE_COPIES
9547 /* Don't try to move insns which set CC registers if we should not
9548 create CCmode register copies. */
9549 for (i = regs->num - 1; i >= FIRST_PSEUDO_REGISTER; i--)
9550 if (GET_MODE_CLASS (GET_MODE (regno_reg_rtx[i])) == MODE_CC)
9551 regs->array[i].may_not_optimize = 1;
9554 /* Set regs->array[I].n_times_set for the new registers. */
9555 for (i = old_nregs; i < regs->num; i++)
9556 regs->array[i].n_times_set = regs->array[i].set_in_loop;
9561 /* Returns the number of real INSNs in the LOOP. */
9564 count_insns_in_loop (loop)
9565 const struct loop *loop;
9570 for (insn = loop->top ? loop->top : loop->start; insn != loop->end;
9571 insn = NEXT_INSN (insn))
9578 /* Move MEMs into registers for the duration of the loop. */
9582 const struct loop *loop;
9584 struct loop_info *loop_info = LOOP_INFO (loop);
9585 struct loop_regs *regs = LOOP_REGS (loop);
9586 int maybe_never = 0;
9588 rtx p, prev_ebb_head;
9589 rtx label = NULL_RTX;
9591 /* Nonzero if the next instruction may never be executed. */
9592 int next_maybe_never = 0;
9593 unsigned int last_max_reg = max_reg_num ();
9595 if (loop_info->mems_idx == 0)
9598 /* We cannot use next_label here because it skips over normal insns. */
9599 end_label = next_nonnote_insn (loop->end);
9600 if (end_label && GET_CODE (end_label) != CODE_LABEL)
9601 end_label = NULL_RTX;
9603 /* Check to see if it's possible that some instructions in the loop are
9604 never executed. Also check if there is a goto out of the loop other
9605 than right after the end of the loop. */
9606 for (p = next_insn_in_loop (loop, loop->scan_start);
9608 p = next_insn_in_loop (loop, p))
9610 if (GET_CODE (p) == CODE_LABEL)
9612 else if (GET_CODE (p) == JUMP_INSN
9613 /* If we enter the loop in the middle, and scan
9614 around to the beginning, don't set maybe_never
9615 for that. This must be an unconditional jump,
9616 otherwise the code at the top of the loop might
9617 never be executed. Unconditional jumps are
9618 followed a by barrier then loop end. */
9619 && ! (GET_CODE (p) == JUMP_INSN
9620 && JUMP_LABEL (p) == loop->top
9621 && NEXT_INSN (NEXT_INSN (p)) == loop->end
9622 && any_uncondjump_p (p)))
9624 /* If this is a jump outside of the loop but not right
9625 after the end of the loop, we would have to emit new fixup
9626 sequences for each such label. */
9627 if (/* If we can't tell where control might go when this
9628 JUMP_INSN is executed, we must be conservative. */
9630 || (JUMP_LABEL (p) != end_label
9631 && (INSN_UID (JUMP_LABEL (p)) >= max_uid_for_loop
9632 || INSN_LUID (JUMP_LABEL (p)) < INSN_LUID (loop->start)
9633 || INSN_LUID (JUMP_LABEL (p)) > INSN_LUID (loop->end))))
9636 if (!any_condjump_p (p))
9637 /* Something complicated. */
9640 /* If there are any more instructions in the loop, they
9641 might not be reached. */
9642 next_maybe_never = 1;
9644 else if (next_maybe_never)
9648 /* Find start of the extended basic block that enters the loop. */
9649 for (p = loop->start;
9650 PREV_INSN (p) && GET_CODE (p) != CODE_LABEL;
9657 /* Build table of mems that get set to constant values before the
9659 for (; p != loop->start; p = NEXT_INSN (p))
9660 cselib_process_insn (p);
9662 /* Actually move the MEMs. */
9663 for (i = 0; i < loop_info->mems_idx; ++i)
9665 regset_head load_copies;
9666 regset_head store_copies;
9669 rtx mem = loop_info->mems[i].mem;
9672 if (MEM_VOLATILE_P (mem)
9673 || loop_invariant_p (loop, XEXP (mem, 0)) != 1)
9674 /* There's no telling whether or not MEM is modified. */
9675 loop_info->mems[i].optimize = 0;
9677 /* Go through the MEMs written to in the loop to see if this
9678 one is aliased by one of them. */
9679 mem_list_entry = loop_info->store_mems;
9680 while (mem_list_entry)
9682 if (rtx_equal_p (mem, XEXP (mem_list_entry, 0)))
9684 else if (true_dependence (XEXP (mem_list_entry, 0), VOIDmode,
9687 /* MEM is indeed aliased by this store. */
9688 loop_info->mems[i].optimize = 0;
9691 mem_list_entry = XEXP (mem_list_entry, 1);
9694 if (flag_float_store && written
9695 && GET_MODE_CLASS (GET_MODE (mem)) == MODE_FLOAT)
9696 loop_info->mems[i].optimize = 0;
9698 /* If this MEM is written to, we must be sure that there
9699 are no reads from another MEM that aliases this one. */
9700 if (loop_info->mems[i].optimize && written)
9704 for (j = 0; j < loop_info->mems_idx; ++j)
9708 else if (true_dependence (mem,
9710 loop_info->mems[j].mem,
9713 /* It's not safe to hoist loop_info->mems[i] out of
9714 the loop because writes to it might not be
9715 seen by reads from loop_info->mems[j]. */
9716 loop_info->mems[i].optimize = 0;
9722 if (maybe_never && may_trap_p (mem))
9723 /* We can't access the MEM outside the loop; it might
9724 cause a trap that wouldn't have happened otherwise. */
9725 loop_info->mems[i].optimize = 0;
9727 if (!loop_info->mems[i].optimize)
9728 /* We thought we were going to lift this MEM out of the
9729 loop, but later discovered that we could not. */
9732 INIT_REG_SET (&load_copies);
9733 INIT_REG_SET (&store_copies);
9735 /* Allocate a pseudo for this MEM. We set REG_USERVAR_P in
9736 order to keep scan_loop from moving stores to this MEM
9737 out of the loop just because this REG is neither a
9738 user-variable nor used in the loop test. */
9739 reg = gen_reg_rtx (GET_MODE (mem));
9740 REG_USERVAR_P (reg) = 1;
9741 loop_info->mems[i].reg = reg;
9743 /* Now, replace all references to the MEM with the
9744 corresponding pseudos. */
9746 for (p = next_insn_in_loop (loop, loop->scan_start);
9748 p = next_insn_in_loop (loop, p))
9754 set = single_set (p);
9756 /* See if this copies the mem into a register that isn't
9757 modified afterwards. We'll try to do copy propagation
9758 a little further on. */
9760 /* @@@ This test is _way_ too conservative. */
9762 && GET_CODE (SET_DEST (set)) == REG
9763 && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER
9764 && REGNO (SET_DEST (set)) < last_max_reg
9765 && regs->array[REGNO (SET_DEST (set))].n_times_set == 1
9766 && rtx_equal_p (SET_SRC (set), mem))
9767 SET_REGNO_REG_SET (&load_copies, REGNO (SET_DEST (set)));
9769 /* See if this copies the mem from a register that isn't
9770 modified afterwards. We'll try to remove the
9771 redundant copy later on by doing a little register
9772 renaming and copy propagation. This will help
9773 to untangle things for the BIV detection code. */
9776 && GET_CODE (SET_SRC (set)) == REG
9777 && REGNO (SET_SRC (set)) >= FIRST_PSEUDO_REGISTER
9778 && REGNO (SET_SRC (set)) < last_max_reg
9779 && regs->array[REGNO (SET_SRC (set))].n_times_set == 1
9780 && rtx_equal_p (SET_DEST (set), mem))
9781 SET_REGNO_REG_SET (&store_copies, REGNO (SET_SRC (set)));
9783 /* Replace the memory reference with the shadow register. */
9784 replace_loop_mems (p, loop_info->mems[i].mem,
9785 loop_info->mems[i].reg);
9788 if (GET_CODE (p) == CODE_LABEL
9789 || GET_CODE (p) == JUMP_INSN)
9793 if (! apply_change_group ())
9794 /* We couldn't replace all occurrences of the MEM. */
9795 loop_info->mems[i].optimize = 0;
9798 /* Load the memory immediately before LOOP->START, which is
9799 the NOTE_LOOP_BEG. */
9800 cselib_val *e = cselib_lookup (mem, VOIDmode, 0);
9804 struct elt_loc_list *const_equiv = 0;
9808 struct elt_loc_list *equiv;
9809 struct elt_loc_list *best_equiv = 0;
9810 for (equiv = e->locs; equiv; equiv = equiv->next)
9812 if (CONSTANT_P (equiv->loc))
9813 const_equiv = equiv;
9814 else if (GET_CODE (equiv->loc) == REG
9815 /* Extending hard register lifetimes causes crash
9816 on SRC targets. Doing so on non-SRC is
9817 probably also not good idea, since we most
9818 probably have pseudoregister equivalence as
9820 && REGNO (equiv->loc) >= FIRST_PSEUDO_REGISTER)
9823 /* Use the constant equivalence if that is cheap enough. */
9825 best_equiv = const_equiv;
9826 else if (const_equiv
9827 && (rtx_cost (const_equiv->loc, SET)
9828 <= rtx_cost (best_equiv->loc, SET)))
9830 best_equiv = const_equiv;
9834 /* If best_equiv is nonzero, we know that MEM is set to a
9835 constant or register before the loop. We will use this
9836 knowledge to initialize the shadow register with that
9837 constant or reg rather than by loading from MEM. */
9839 best = copy_rtx (best_equiv->loc);
9842 set = gen_move_insn (reg, best);
9843 set = loop_insn_hoist (loop, set);
9846 for (p = prev_ebb_head; p != loop->start; p = NEXT_INSN (p))
9847 if (REGNO_LAST_UID (REGNO (best)) == INSN_UID (p))
9849 REGNO_LAST_UID (REGNO (best)) = INSN_UID (set);
9855 set_unique_reg_note (set, REG_EQUAL, copy_rtx (const_equiv->loc));
9859 if (label == NULL_RTX)
9861 label = gen_label_rtx ();
9862 emit_label_after (label, loop->end);
9865 /* Store the memory immediately after END, which is
9866 the NOTE_LOOP_END. */
9867 set = gen_move_insn (copy_rtx (mem), reg);
9868 loop_insn_emit_after (loop, 0, label, set);
9871 if (loop_dump_stream)
9873 fprintf (loop_dump_stream, "Hoisted regno %d %s from ",
9874 REGNO (reg), (written ? "r/w" : "r/o"));
9875 print_rtl (loop_dump_stream, mem);
9876 fputc ('\n', loop_dump_stream);
9879 /* Attempt a bit of copy propagation. This helps untangle the
9880 data flow, and enables {basic,general}_induction_var to find
9882 EXECUTE_IF_SET_IN_REG_SET
9883 (&load_copies, FIRST_PSEUDO_REGISTER, j,
9885 try_copy_prop (loop, reg, j);
9887 CLEAR_REG_SET (&load_copies);
9889 EXECUTE_IF_SET_IN_REG_SET
9890 (&store_copies, FIRST_PSEUDO_REGISTER, j,
9892 try_swap_copy_prop (loop, reg, j);
9894 CLEAR_REG_SET (&store_copies);
9898 if (label != NULL_RTX && end_label != NULL_RTX)
9900 /* Now, we need to replace all references to the previous exit
9901 label with the new one. */
9906 for (p = loop->start; p != loop->end; p = NEXT_INSN (p))
9908 for_each_rtx (&p, replace_label, &rr);
9910 /* If this is a JUMP_INSN, then we also need to fix the JUMP_LABEL
9911 field. This is not handled by for_each_rtx because it doesn't
9912 handle unprinted ('0') fields. We need to update JUMP_LABEL
9913 because the immediately following unroll pass will use it.
9914 replace_label would not work anyways, because that only handles
9916 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p) == end_label)
9917 JUMP_LABEL (p) = label;
9924 /* For communication between note_reg_stored and its caller. */
9925 struct note_reg_stored_arg
9931 /* Called via note_stores, record in SET_SEEN whether X, which is written,
9934 note_reg_stored (x, setter, arg)
9935 rtx x, setter ATTRIBUTE_UNUSED;
9938 struct note_reg_stored_arg *t = (struct note_reg_stored_arg *) arg;
9943 /* Try to replace every occurrence of pseudo REGNO with REPLACEMENT.
9944 There must be exactly one insn that sets this pseudo; it will be
9945 deleted if all replacements succeed and we can prove that the register
9946 is not used after the loop. */
9949 try_copy_prop (loop, replacement, regno)
9950 const struct loop *loop;
9954 /* This is the reg that we are copying from. */
9955 rtx reg_rtx = regno_reg_rtx[regno];
9958 /* These help keep track of whether we replaced all uses of the reg. */
9959 int replaced_last = 0;
9960 int store_is_first = 0;
9962 for (insn = next_insn_in_loop (loop, loop->scan_start);
9964 insn = next_insn_in_loop (loop, insn))
9968 /* Only substitute within one extended basic block from the initializing
9970 if (GET_CODE (insn) == CODE_LABEL && init_insn)
9973 if (! INSN_P (insn))
9976 /* Is this the initializing insn? */
9977 set = single_set (insn);
9979 && GET_CODE (SET_DEST (set)) == REG
9980 && REGNO (SET_DEST (set)) == regno)
9986 if (REGNO_FIRST_UID (regno) == INSN_UID (insn))
9990 /* Only substitute after seeing the initializing insn. */
9991 if (init_insn && insn != init_insn)
9993 struct note_reg_stored_arg arg;
9995 replace_loop_regs (insn, reg_rtx, replacement);
9996 if (REGNO_LAST_UID (regno) == INSN_UID (insn))
9999 /* Stop replacing when REPLACEMENT is modified. */
10000 arg.reg = replacement;
10002 note_stores (PATTERN (insn), note_reg_stored, &arg);
10005 rtx note = find_reg_note (insn, REG_EQUAL, NULL);
10007 /* It is possible that we've turned previously valid REG_EQUAL to
10008 invalid, as we change the REGNO to REPLACEMENT and unlike REGNO,
10009 REPLACEMENT is modified, we get different meaning. */
10010 if (note && reg_mentioned_p (replacement, XEXP (note, 0)))
10011 remove_note (insn, note);
10018 if (apply_change_group ())
10020 if (loop_dump_stream)
10021 fprintf (loop_dump_stream, " Replaced reg %d", regno);
10022 if (store_is_first && replaced_last)
10027 /* Assume we're just deleting INIT_INSN. */
10029 /* Look for REG_RETVAL note. If we're deleting the end of
10030 the libcall sequence, the whole sequence can go. */
10031 retval_note = find_reg_note (init_insn, REG_RETVAL, NULL_RTX);
10032 /* If we found a REG_RETVAL note, find the first instruction
10033 in the sequence. */
10035 first = XEXP (retval_note, 0);
10037 /* Delete the instructions. */
10038 loop_delete_insns (first, init_insn);
10040 if (loop_dump_stream)
10041 fprintf (loop_dump_stream, ".\n");
10045 /* Replace all the instructions from FIRST up to and including LAST
10046 with NOTE_INSN_DELETED notes. */
10049 loop_delete_insns (first, last)
10055 if (loop_dump_stream)
10056 fprintf (loop_dump_stream, ", deleting init_insn (%d)",
10058 delete_insn (first);
10060 /* If this was the LAST instructions we're supposed to delete,
10065 first = NEXT_INSN (first);
10069 /* Try to replace occurrences of pseudo REGNO with REPLACEMENT within
10070 loop LOOP if the order of the sets of these registers can be
10071 swapped. There must be exactly one insn within the loop that sets
10072 this pseudo followed immediately by a move insn that sets
10073 REPLACEMENT with REGNO. */
10075 try_swap_copy_prop (loop, replacement, regno)
10076 const struct loop *loop;
10078 unsigned int regno;
10081 rtx set = NULL_RTX;
10082 unsigned int new_regno;
10084 new_regno = REGNO (replacement);
10086 for (insn = next_insn_in_loop (loop, loop->scan_start);
10088 insn = next_insn_in_loop (loop, insn))
10090 /* Search for the insn that copies REGNO to NEW_REGNO? */
10092 && (set = single_set (insn))
10093 && GET_CODE (SET_DEST (set)) == REG
10094 && REGNO (SET_DEST (set)) == new_regno
10095 && GET_CODE (SET_SRC (set)) == REG
10096 && REGNO (SET_SRC (set)) == regno)
10100 if (insn != NULL_RTX)
10105 /* Some DEF-USE info would come in handy here to make this
10106 function more general. For now, just check the previous insn
10107 which is the most likely candidate for setting REGNO. */
10109 prev_insn = PREV_INSN (insn);
10112 && (prev_set = single_set (prev_insn))
10113 && GET_CODE (SET_DEST (prev_set)) == REG
10114 && REGNO (SET_DEST (prev_set)) == regno)
10117 (set (reg regno) (expr))
10118 (set (reg new_regno) (reg regno))
10120 so try converting this to:
10121 (set (reg new_regno) (expr))
10122 (set (reg regno) (reg new_regno))
10124 The former construct is often generated when a global
10125 variable used for an induction variable is shadowed by a
10126 register (NEW_REGNO). The latter construct improves the
10127 chances of GIV replacement and BIV elimination. */
10129 validate_change (prev_insn, &SET_DEST (prev_set),
10131 validate_change (insn, &SET_DEST (set),
10133 validate_change (insn, &SET_SRC (set),
10136 if (apply_change_group ())
10138 if (loop_dump_stream)
10139 fprintf (loop_dump_stream,
10140 " Swapped set of reg %d at %d with reg %d at %d.\n",
10141 regno, INSN_UID (insn),
10142 new_regno, INSN_UID (prev_insn));
10144 /* Update first use of REGNO. */
10145 if (REGNO_FIRST_UID (regno) == INSN_UID (prev_insn))
10146 REGNO_FIRST_UID (regno) = INSN_UID (insn);
10148 /* Now perform copy propagation to hopefully
10149 remove all uses of REGNO within the loop. */
10150 try_copy_prop (loop, replacement, regno);
10156 /* Replace MEM with its associated pseudo register. This function is
10157 called from load_mems via for_each_rtx. DATA is actually a pointer
10158 to a structure describing the instruction currently being scanned
10159 and the MEM we are currently replacing. */
10162 replace_loop_mem (mem, data)
10166 loop_replace_args *args = (loop_replace_args *) data;
10172 switch (GET_CODE (m))
10178 /* We're not interested in the MEM associated with a
10179 CONST_DOUBLE, so there's no need to traverse into one. */
10183 /* This is not a MEM. */
10187 if (!rtx_equal_p (args->match, m))
10188 /* This is not the MEM we are currently replacing. */
10191 /* Actually replace the MEM. */
10192 validate_change (args->insn, mem, args->replacement, 1);
10198 replace_loop_mems (insn, mem, reg)
10203 loop_replace_args args;
10207 args.replacement = reg;
10209 for_each_rtx (&insn, replace_loop_mem, &args);
10212 /* Replace one register with another. Called through for_each_rtx; PX points
10213 to the rtx being scanned. DATA is actually a pointer to
10214 a structure of arguments. */
10217 replace_loop_reg (px, data)
10222 loop_replace_args *args = (loop_replace_args *) data;
10227 if (x == args->match)
10228 validate_change (args->insn, px, args->replacement, 1);
10234 replace_loop_regs (insn, reg, replacement)
10239 loop_replace_args args;
10243 args.replacement = replacement;
10245 for_each_rtx (&insn, replace_loop_reg, &args);
10248 /* Replace occurrences of the old exit label for the loop with the new
10249 one. DATA is an rtx_pair containing the old and new labels,
10253 replace_label (x, data)
10258 rtx old_label = ((rtx_pair *) data)->r1;
10259 rtx new_label = ((rtx_pair *) data)->r2;
10264 if (GET_CODE (l) != LABEL_REF)
10267 if (XEXP (l, 0) != old_label)
10270 XEXP (l, 0) = new_label;
10271 ++LABEL_NUSES (new_label);
10272 --LABEL_NUSES (old_label);
10277 /* Emit insn for PATTERN after WHERE_INSN in basic block WHERE_BB
10278 (ignored in the interim). */
10281 loop_insn_emit_after (loop, where_bb, where_insn, pattern)
10282 const struct loop *loop ATTRIBUTE_UNUSED;
10283 basic_block where_bb ATTRIBUTE_UNUSED;
10287 return emit_insn_after (pattern, where_insn);
10291 /* If WHERE_INSN is non-zero emit insn for PATTERN before WHERE_INSN
10292 in basic block WHERE_BB (ignored in the interim) within the loop
10293 otherwise hoist PATTERN into the loop pre-header. */
10296 loop_insn_emit_before (loop, where_bb, where_insn, pattern)
10297 const struct loop *loop;
10298 basic_block where_bb ATTRIBUTE_UNUSED;
10303 return loop_insn_hoist (loop, pattern);
10304 return emit_insn_before (pattern, where_insn);
10308 /* Emit call insn for PATTERN before WHERE_INSN in basic block
10309 WHERE_BB (ignored in the interim) within the loop. */
10312 loop_call_insn_emit_before (loop, where_bb, where_insn, pattern)
10313 const struct loop *loop ATTRIBUTE_UNUSED;
10314 basic_block where_bb ATTRIBUTE_UNUSED;
10318 return emit_call_insn_before (pattern, where_insn);
10322 /* Hoist insn for PATTERN into the loop pre-header. */
10325 loop_insn_hoist (loop, pattern)
10326 const struct loop *loop;
10329 return loop_insn_emit_before (loop, 0, loop->start, pattern);
10333 /* Hoist call insn for PATTERN into the loop pre-header. */
10336 loop_call_insn_hoist (loop, pattern)
10337 const struct loop *loop;
10340 return loop_call_insn_emit_before (loop, 0, loop->start, pattern);
10344 /* Sink insn for PATTERN after the loop end. */
10347 loop_insn_sink (loop, pattern)
10348 const struct loop *loop;
10351 return loop_insn_emit_before (loop, 0, loop->sink, pattern);
10355 /* If the loop has multiple exits, emit insn for PATTERN before the
10356 loop to ensure that it will always be executed no matter how the
10357 loop exits. Otherwise, emit the insn for PATTERN after the loop,
10358 since this is slightly more efficient. */
10361 loop_insn_sink_or_swim (loop, pattern)
10362 const struct loop *loop;
10365 if (loop->exit_count)
10366 return loop_insn_hoist (loop, pattern);
10368 return loop_insn_sink (loop, pattern);
10372 loop_ivs_dump (loop, file, verbose)
10373 const struct loop *loop;
10377 struct iv_class *bl;
10380 if (! loop || ! file)
10383 for (bl = LOOP_IVS (loop)->list; bl; bl = bl->next)
10386 fprintf (file, "Loop %d: %d IV classes\n", loop->num, iv_num);
10388 for (bl = LOOP_IVS (loop)->list; bl; bl = bl->next)
10390 loop_iv_class_dump (bl, file, verbose);
10391 fputc ('\n', file);
10397 loop_iv_class_dump (bl, file, verbose)
10398 const struct iv_class *bl;
10400 int verbose ATTRIBUTE_UNUSED;
10402 struct induction *v;
10406 if (! bl || ! file)
10409 fprintf (file, "IV class for reg %d, benefit %d\n",
10410 bl->regno, bl->total_benefit);
10412 fprintf (file, " Init insn %d", INSN_UID (bl->init_insn));
10413 if (bl->initial_value)
10415 fprintf (file, ", init val: ");
10416 print_simple_rtl (file, bl->initial_value);
10418 if (bl->initial_test)
10420 fprintf (file, ", init test: ");
10421 print_simple_rtl (file, bl->initial_test);
10423 fputc ('\n', file);
10425 if (bl->final_value)
10427 fprintf (file, " Final val: ");
10428 print_simple_rtl (file, bl->final_value);
10429 fputc ('\n', file);
10432 if ((incr = biv_total_increment (bl)))
10434 fprintf (file, " Total increment: ");
10435 print_simple_rtl (file, incr);
10436 fputc ('\n', file);
10439 /* List the increments. */
10440 for (i = 0, v = bl->biv; v; v = v->next_iv, i++)
10442 fprintf (file, " Inc%d: insn %d, incr: ", i, INSN_UID (v->insn));
10443 print_simple_rtl (file, v->add_val);
10444 fputc ('\n', file);
10447 /* List the givs. */
10448 for (i = 0, v = bl->giv; v; v = v->next_iv, i++)
10450 fprintf (file, " Giv%d: insn %d, benefit %d, ",
10451 i, INSN_UID (v->insn), v->benefit);
10452 if (v->giv_type == DEST_ADDR)
10453 print_simple_rtl (file, v->mem);
10455 print_simple_rtl (file, single_set (v->insn));
10456 fputc ('\n', file);
10462 loop_biv_dump (v, file, verbose)
10463 const struct induction *v;
10472 REGNO (v->dest_reg), INSN_UID (v->insn));
10473 fprintf (file, " const ");
10474 print_simple_rtl (file, v->add_val);
10476 if (verbose && v->final_value)
10478 fputc ('\n', file);
10479 fprintf (file, " final ");
10480 print_simple_rtl (file, v->final_value);
10483 fputc ('\n', file);
10488 loop_giv_dump (v, file, verbose)
10489 const struct induction *v;
10496 if (v->giv_type == DEST_REG)
10497 fprintf (file, "Giv %d: insn %d",
10498 REGNO (v->dest_reg), INSN_UID (v->insn));
10500 fprintf (file, "Dest address: insn %d",
10501 INSN_UID (v->insn));
10503 fprintf (file, " src reg %d benefit %d",
10504 REGNO (v->src_reg), v->benefit);
10505 fprintf (file, " lifetime %d",
10508 if (v->replaceable)
10509 fprintf (file, " replaceable");
10511 if (v->no_const_addval)
10512 fprintf (file, " ncav");
10514 if (v->ext_dependent)
10516 switch (GET_CODE (v->ext_dependent))
10519 fprintf (file, " ext se");
10522 fprintf (file, " ext ze");
10525 fprintf (file, " ext tr");
10532 fputc ('\n', file);
10533 fprintf (file, " mult ");
10534 print_simple_rtl (file, v->mult_val);
10536 fputc ('\n', file);
10537 fprintf (file, " add ");
10538 print_simple_rtl (file, v->add_val);
10540 if (verbose && v->final_value)
10542 fputc ('\n', file);
10543 fprintf (file, " final ");
10544 print_simple_rtl (file, v->final_value);
10547 fputc ('\n', file);
10553 const struct loop *loop;
10555 loop_ivs_dump (loop, stderr, 1);
10560 debug_iv_class (bl)
10561 const struct iv_class *bl;
10563 loop_iv_class_dump (bl, stderr, 1);
10569 const struct induction *v;
10571 loop_biv_dump (v, stderr, 1);
10577 const struct induction *v;
10579 loop_giv_dump (v, stderr, 1);
10583 #define LOOP_BLOCK_NUM_1(INSN) \
10584 ((INSN) ? (BLOCK_FOR_INSN (INSN) ? BLOCK_NUM (INSN) : - 1) : -1)
10586 /* The notes do not have an assigned block, so look at the next insn. */
10587 #define LOOP_BLOCK_NUM(INSN) \
10588 ((INSN) ? (GET_CODE (INSN) == NOTE \
10589 ? LOOP_BLOCK_NUM_1 (next_nonnote_insn (INSN)) \
10590 : LOOP_BLOCK_NUM_1 (INSN)) \
10593 #define LOOP_INSN_UID(INSN) ((INSN) ? INSN_UID (INSN) : -1)
10596 loop_dump_aux (loop, file, verbose)
10597 const struct loop *loop;
10599 int verbose ATTRIBUTE_UNUSED;
10603 if (! loop || ! file)
10606 /* Print diagnostics to compare our concept of a loop with
10607 what the loop notes say. */
10608 if (! PREV_INSN (loop->first->head)
10609 || GET_CODE (PREV_INSN (loop->first->head)) != NOTE
10610 || NOTE_LINE_NUMBER (PREV_INSN (loop->first->head))
10611 != NOTE_INSN_LOOP_BEG)
10612 fprintf (file, ";; No NOTE_INSN_LOOP_BEG at %d\n",
10613 INSN_UID (PREV_INSN (loop->first->head)));
10614 if (! NEXT_INSN (loop->last->end)
10615 || GET_CODE (NEXT_INSN (loop->last->end)) != NOTE
10616 || NOTE_LINE_NUMBER (NEXT_INSN (loop->last->end))
10617 != NOTE_INSN_LOOP_END)
10618 fprintf (file, ";; No NOTE_INSN_LOOP_END at %d\n",
10619 INSN_UID (NEXT_INSN (loop->last->end)));
10624 ";; start %d (%d), cont dom %d (%d), cont %d (%d), vtop %d (%d), end %d (%d)\n",
10625 LOOP_BLOCK_NUM (loop->start),
10626 LOOP_INSN_UID (loop->start),
10627 LOOP_BLOCK_NUM (loop->cont),
10628 LOOP_INSN_UID (loop->cont),
10629 LOOP_BLOCK_NUM (loop->cont),
10630 LOOP_INSN_UID (loop->cont),
10631 LOOP_BLOCK_NUM (loop->vtop),
10632 LOOP_INSN_UID (loop->vtop),
10633 LOOP_BLOCK_NUM (loop->end),
10634 LOOP_INSN_UID (loop->end));
10635 fprintf (file, ";; top %d (%d), scan start %d (%d)\n",
10636 LOOP_BLOCK_NUM (loop->top),
10637 LOOP_INSN_UID (loop->top),
10638 LOOP_BLOCK_NUM (loop->scan_start),
10639 LOOP_INSN_UID (loop->scan_start));
10640 fprintf (file, ";; exit_count %d", loop->exit_count);
10641 if (loop->exit_count)
10643 fputs (", labels:", file);
10644 for (label = loop->exit_labels; label; label = LABEL_NEXTREF (label))
10646 fprintf (file, " %d ",
10647 LOOP_INSN_UID (XEXP (label, 0)));
10650 fputs ("\n", file);
10652 /* This can happen when a marked loop appears as two nested loops,
10653 say from while (a || b) {}. The inner loop won't match
10654 the loop markers but the outer one will. */
10655 if (LOOP_BLOCK_NUM (loop->cont) != loop->latch->index)
10656 fprintf (file, ";; NOTE_INSN_LOOP_CONT not in loop latch\n");
10660 /* Call this function from the debugger to dump LOOP. */
10664 const struct loop *loop;
10666 flow_loop_dump (loop, stderr, loop_dump_aux, 1);
10669 /* Call this function from the debugger to dump LOOPS. */
10672 debug_loops (loops)
10673 const struct loops *loops;
10675 flow_loops_dump (loops, stderr, loop_dump_aux, 1);