1 /* Expand the basic unary and binary arithmetic operations, for GNU compiler.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
27 /* Include insn-config.h before expr.h so that HAVE_conditional_move
28 is properly defined. */
29 #include "insn-config.h"
44 /* Each optab contains info on how this target machine
45 can perform a particular operation
46 for all sizes and kinds of operands.
48 The operation to be performed is often specified
49 by passing one of these optabs as an argument.
51 See expr.h for documentation of these optabs. */
53 optab optab_table[OTI_MAX];
55 rtx libfunc_table[LTI_MAX];
57 /* Tables of patterns for extending one integer mode to another. */
58 enum insn_code extendtab[MAX_MACHINE_MODE][MAX_MACHINE_MODE][2];
60 /* Tables of patterns for converting between fixed and floating point. */
61 enum insn_code fixtab[NUM_MACHINE_MODES][NUM_MACHINE_MODES][2];
62 enum insn_code fixtrunctab[NUM_MACHINE_MODES][NUM_MACHINE_MODES][2];
63 enum insn_code floattab[NUM_MACHINE_MODES][NUM_MACHINE_MODES][2];
65 /* Contains the optab used for each rtx code. */
66 optab code_to_optab[NUM_RTX_CODE + 1];
68 /* Indexed by the rtx-code for a conditional (eg. EQ, LT,...)
69 gives the gen_function to make a branch to test that condition. */
71 rtxfun bcc_gen_fctn[NUM_RTX_CODE];
73 /* Indexed by the rtx-code for a conditional (eg. EQ, LT,...)
74 gives the insn code to make a store-condition insn
75 to test that condition. */
77 enum insn_code setcc_gen_code[NUM_RTX_CODE];
79 #ifdef HAVE_conditional_move
80 /* Indexed by the machine mode, gives the insn code to make a conditional
81 move insn. This is not indexed by the rtx-code like bcc_gen_fctn and
82 setcc_gen_code to cut down on the number of named patterns. Consider a day
83 when a lot more rtx codes are conditional (eg: for the ARM). */
85 enum insn_code movcc_gen_code[NUM_MACHINE_MODES];
88 static int add_equal_note PARAMS ((rtx, rtx, enum rtx_code, rtx, rtx));
89 static rtx widen_operand PARAMS ((rtx, enum machine_mode,
90 enum machine_mode, int, int));
91 static int expand_cmplxdiv_straight PARAMS ((rtx, rtx, rtx, rtx,
92 rtx, rtx, enum machine_mode,
93 int, enum optab_methods,
94 enum mode_class, optab));
95 static int expand_cmplxdiv_wide PARAMS ((rtx, rtx, rtx, rtx,
96 rtx, rtx, enum machine_mode,
97 int, enum optab_methods,
98 enum mode_class, optab));
99 static void prepare_cmp_insn PARAMS ((rtx *, rtx *, enum rtx_code *, rtx,
100 enum machine_mode *, int *,
101 enum can_compare_purpose));
102 static enum insn_code can_fix_p PARAMS ((enum machine_mode, enum machine_mode,
104 static enum insn_code can_float_p PARAMS ((enum machine_mode,
107 static rtx ftruncify PARAMS ((rtx));
108 static optab new_optab PARAMS ((void));
109 static inline optab init_optab PARAMS ((enum rtx_code));
110 static inline optab init_optabv PARAMS ((enum rtx_code));
111 static void init_libfuncs PARAMS ((optab, int, int, const char *, int));
112 static void init_integral_libfuncs PARAMS ((optab, const char *, int));
113 static void init_floating_libfuncs PARAMS ((optab, const char *, int));
114 #ifdef HAVE_conditional_trap
115 static void init_traps PARAMS ((void));
117 static void emit_cmp_and_jump_insn_1 PARAMS ((rtx, rtx, enum machine_mode,
118 enum rtx_code, int, rtx));
119 static void prepare_float_lib_cmp PARAMS ((rtx *, rtx *, enum rtx_code *,
120 enum machine_mode *, int *));
122 /* Add a REG_EQUAL note to the last insn in SEQ. TARGET is being set to
123 the result of operation CODE applied to OP0 (and OP1 if it is a binary
126 If the last insn does not set TARGET, don't do anything, but return 1.
128 If a previous insn sets TARGET and TARGET is one of OP0 or OP1,
129 don't add the REG_EQUAL note but return 0. Our caller can then try
130 again, ensuring that TARGET is not one of the operands. */
133 add_equal_note (seq, target, code, op0, op1)
143 if ((GET_RTX_CLASS (code) != '1' && GET_RTX_CLASS (code) != '2'
144 && GET_RTX_CLASS (code) != 'c' && GET_RTX_CLASS (code) != '<')
145 || GET_CODE (seq) != SEQUENCE
146 || (set = single_set (XVECEXP (seq, 0, XVECLEN (seq, 0) - 1))) == 0
147 || GET_CODE (target) == ZERO_EXTRACT
148 || (! rtx_equal_p (SET_DEST (set), target)
149 /* For a STRICT_LOW_PART, the REG_NOTE applies to what is inside the
151 && (GET_CODE (SET_DEST (set)) != STRICT_LOW_PART
152 || ! rtx_equal_p (SUBREG_REG (XEXP (SET_DEST (set), 0)),
156 /* If TARGET is in OP0 or OP1, check if anything in SEQ sets TARGET
157 besides the last insn. */
158 if (reg_overlap_mentioned_p (target, op0)
159 || (op1 && reg_overlap_mentioned_p (target, op1)))
160 for (i = XVECLEN (seq, 0) - 2; i >= 0; i--)
161 if (reg_set_p (target, XVECEXP (seq, 0, i)))
164 if (GET_RTX_CLASS (code) == '1')
165 note = gen_rtx_fmt_e (code, GET_MODE (target), copy_rtx (op0));
167 note = gen_rtx_fmt_ee (code, GET_MODE (target), copy_rtx (op0), copy_rtx (op1));
169 set_unique_reg_note (XVECEXP (seq, 0, XVECLEN (seq, 0) - 1), REG_EQUAL, note);
174 /* Widen OP to MODE and return the rtx for the widened operand. UNSIGNEDP
175 says whether OP is signed or unsigned. NO_EXTEND is nonzero if we need
176 not actually do a sign-extend or zero-extend, but can leave the
177 higher-order bits of the result rtx undefined, for example, in the case
178 of logical operations, but not right shifts. */
181 widen_operand (op, mode, oldmode, unsignedp, no_extend)
183 enum machine_mode mode, oldmode;
189 /* If we don't have to extend and this is a constant, return it. */
190 if (no_extend && GET_MODE (op) == VOIDmode)
193 /* If we must extend do so. If OP is a SUBREG for a promoted object, also
194 extend since it will be more efficient to do so unless the signedness of
195 a promoted object differs from our extension. */
197 || (GET_CODE (op) == SUBREG && SUBREG_PROMOTED_VAR_P (op)
198 && SUBREG_PROMOTED_UNSIGNED_P (op) == unsignedp))
199 return convert_modes (mode, oldmode, op, unsignedp);
201 /* If MODE is no wider than a single word, we return a paradoxical
203 if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD)
204 return gen_rtx_SUBREG (mode, force_reg (GET_MODE (op), op), 0);
206 /* Otherwise, get an object of MODE, clobber it, and set the low-order
209 result = gen_reg_rtx (mode);
210 emit_insn (gen_rtx_CLOBBER (VOIDmode, result));
211 emit_move_insn (gen_lowpart (GET_MODE (op), result), op);
215 /* Generate code to perform a straightforward complex divide. */
218 expand_cmplxdiv_straight (real0, real1, imag0, imag1, realr, imagr, submode,
219 unsignedp, methods, class, binoptab)
220 rtx real0, real1, imag0, imag1, realr, imagr;
221 enum machine_mode submode;
223 enum optab_methods methods;
224 enum mode_class class;
231 optab this_add_optab = add_optab;
232 optab this_sub_optab = sub_optab;
233 optab this_neg_optab = neg_optab;
234 optab this_mul_optab = smul_optab;
236 if (binoptab == sdivv_optab)
238 this_add_optab = addv_optab;
239 this_sub_optab = subv_optab;
240 this_neg_optab = negv_optab;
241 this_mul_optab = smulv_optab;
244 /* Don't fetch these from memory more than once. */
245 real0 = force_reg (submode, real0);
246 real1 = force_reg (submode, real1);
249 imag0 = force_reg (submode, imag0);
251 imag1 = force_reg (submode, imag1);
253 /* Divisor: c*c + d*d. */
254 temp1 = expand_binop (submode, this_mul_optab, real1, real1,
255 NULL_RTX, unsignedp, methods);
257 temp2 = expand_binop (submode, this_mul_optab, imag1, imag1,
258 NULL_RTX, unsignedp, methods);
260 if (temp1 == 0 || temp2 == 0)
263 divisor = expand_binop (submode, this_add_optab, temp1, temp2,
264 NULL_RTX, unsignedp, methods);
270 /* Mathematically, ((a)(c-id))/divisor. */
271 /* Computationally, (a+i0) / (c+id) = (ac/(cc+dd)) + i(-ad/(cc+dd)). */
273 /* Calculate the dividend. */
274 real_t = expand_binop (submode, this_mul_optab, real0, real1,
275 NULL_RTX, unsignedp, methods);
277 imag_t = expand_binop (submode, this_mul_optab, real0, imag1,
278 NULL_RTX, unsignedp, methods);
280 if (real_t == 0 || imag_t == 0)
283 imag_t = expand_unop (submode, this_neg_optab, imag_t,
284 NULL_RTX, unsignedp);
288 /* Mathematically, ((a+ib)(c-id))/divider. */
289 /* Calculate the dividend. */
290 temp1 = expand_binop (submode, this_mul_optab, real0, real1,
291 NULL_RTX, unsignedp, methods);
293 temp2 = expand_binop (submode, this_mul_optab, imag0, imag1,
294 NULL_RTX, unsignedp, methods);
296 if (temp1 == 0 || temp2 == 0)
299 real_t = expand_binop (submode, this_add_optab, temp1, temp2,
300 NULL_RTX, unsignedp, methods);
302 temp1 = expand_binop (submode, this_mul_optab, imag0, real1,
303 NULL_RTX, unsignedp, methods);
305 temp2 = expand_binop (submode, this_mul_optab, real0, imag1,
306 NULL_RTX, unsignedp, methods);
308 if (temp1 == 0 || temp2 == 0)
311 imag_t = expand_binop (submode, this_sub_optab, temp1, temp2,
312 NULL_RTX, unsignedp, methods);
314 if (real_t == 0 || imag_t == 0)
318 if (class == MODE_COMPLEX_FLOAT)
319 res = expand_binop (submode, binoptab, real_t, divisor,
320 realr, unsignedp, methods);
322 res = expand_divmod (0, TRUNC_DIV_EXPR, submode,
323 real_t, divisor, realr, unsignedp);
329 emit_move_insn (realr, res);
331 if (class == MODE_COMPLEX_FLOAT)
332 res = expand_binop (submode, binoptab, imag_t, divisor,
333 imagr, unsignedp, methods);
335 res = expand_divmod (0, TRUNC_DIV_EXPR, submode,
336 imag_t, divisor, imagr, unsignedp);
342 emit_move_insn (imagr, res);
347 /* Generate code to perform a wide-input-range-acceptable complex divide. */
350 expand_cmplxdiv_wide (real0, real1, imag0, imag1, realr, imagr, submode,
351 unsignedp, methods, class, binoptab)
352 rtx real0, real1, imag0, imag1, realr, imagr;
353 enum machine_mode submode;
355 enum optab_methods methods;
356 enum mode_class class;
361 rtx temp1, temp2, lab1, lab2;
362 enum machine_mode mode;
364 optab this_add_optab = add_optab;
365 optab this_sub_optab = sub_optab;
366 optab this_neg_optab = neg_optab;
367 optab this_mul_optab = smul_optab;
369 if (binoptab == sdivv_optab)
371 this_add_optab = addv_optab;
372 this_sub_optab = subv_optab;
373 this_neg_optab = negv_optab;
374 this_mul_optab = smulv_optab;
377 /* Don't fetch these from memory more than once. */
378 real0 = force_reg (submode, real0);
379 real1 = force_reg (submode, real1);
382 imag0 = force_reg (submode, imag0);
384 imag1 = force_reg (submode, imag1);
386 /* XXX What's an "unsigned" complex number? */
394 temp1 = expand_abs (submode, real1, NULL_RTX, unsignedp, 1);
395 temp2 = expand_abs (submode, imag1, NULL_RTX, unsignedp, 1);
398 if (temp1 == 0 || temp2 == 0)
401 mode = GET_MODE (temp1);
402 lab1 = gen_label_rtx ();
403 emit_cmp_and_jump_insns (temp1, temp2, LT, NULL_RTX,
404 mode, unsignedp, lab1);
406 /* |c| >= |d|; use ratio d/c to scale dividend and divisor. */
408 if (class == MODE_COMPLEX_FLOAT)
409 ratio = expand_binop (submode, binoptab, imag1, real1,
410 NULL_RTX, unsignedp, methods);
412 ratio = expand_divmod (0, TRUNC_DIV_EXPR, submode,
413 imag1, real1, NULL_RTX, unsignedp);
418 /* Calculate divisor. */
420 temp1 = expand_binop (submode, this_mul_optab, imag1, ratio,
421 NULL_RTX, unsignedp, methods);
426 divisor = expand_binop (submode, this_add_optab, temp1, real1,
427 NULL_RTX, unsignedp, methods);
432 /* Calculate dividend. */
438 /* Compute a / (c+id) as a / (c+d(d/c)) + i (-a(d/c)) / (c+d(d/c)). */
440 imag_t = expand_binop (submode, this_mul_optab, real0, ratio,
441 NULL_RTX, unsignedp, methods);
446 imag_t = expand_unop (submode, this_neg_optab, imag_t,
447 NULL_RTX, unsignedp);
449 if (real_t == 0 || imag_t == 0)
454 /* Compute (a+ib)/(c+id) as
455 (a+b(d/c))/(c+d(d/c) + i(b-a(d/c))/(c+d(d/c)). */
457 temp1 = expand_binop (submode, this_mul_optab, imag0, ratio,
458 NULL_RTX, unsignedp, methods);
463 real_t = expand_binop (submode, this_add_optab, temp1, real0,
464 NULL_RTX, unsignedp, methods);
466 temp1 = expand_binop (submode, this_mul_optab, real0, ratio,
467 NULL_RTX, unsignedp, methods);
472 imag_t = expand_binop (submode, this_sub_optab, imag0, temp1,
473 NULL_RTX, unsignedp, methods);
475 if (real_t == 0 || imag_t == 0)
479 if (class == MODE_COMPLEX_FLOAT)
480 res = expand_binop (submode, binoptab, real_t, divisor,
481 realr, unsignedp, methods);
483 res = expand_divmod (0, TRUNC_DIV_EXPR, submode,
484 real_t, divisor, realr, unsignedp);
490 emit_move_insn (realr, res);
492 if (class == MODE_COMPLEX_FLOAT)
493 res = expand_binop (submode, binoptab, imag_t, divisor,
494 imagr, unsignedp, methods);
496 res = expand_divmod (0, TRUNC_DIV_EXPR, submode,
497 imag_t, divisor, imagr, unsignedp);
503 emit_move_insn (imagr, res);
505 lab2 = gen_label_rtx ();
506 emit_jump_insn (gen_jump (lab2));
511 /* |d| > |c|; use ratio c/d to scale dividend and divisor. */
513 if (class == MODE_COMPLEX_FLOAT)
514 ratio = expand_binop (submode, binoptab, real1, imag1,
515 NULL_RTX, unsignedp, methods);
517 ratio = expand_divmod (0, TRUNC_DIV_EXPR, submode,
518 real1, imag1, NULL_RTX, unsignedp);
523 /* Calculate divisor. */
525 temp1 = expand_binop (submode, this_mul_optab, real1, ratio,
526 NULL_RTX, unsignedp, methods);
531 divisor = expand_binop (submode, this_add_optab, temp1, imag1,
532 NULL_RTX, unsignedp, methods);
537 /* Calculate dividend. */
541 /* Compute a / (c+id) as a(c/d) / (c(c/d)+d) + i (-a) / (c(c/d)+d). */
543 real_t = expand_binop (submode, this_mul_optab, real0, ratio,
544 NULL_RTX, unsignedp, methods);
546 imag_t = expand_unop (submode, this_neg_optab, real0,
547 NULL_RTX, unsignedp);
549 if (real_t == 0 || imag_t == 0)
554 /* Compute (a+ib)/(c+id) as
555 (a(c/d)+b)/(c(c/d)+d) + i (b(c/d)-a)/(c(c/d)+d). */
557 temp1 = expand_binop (submode, this_mul_optab, real0, ratio,
558 NULL_RTX, unsignedp, methods);
563 real_t = expand_binop (submode, this_add_optab, temp1, imag0,
564 NULL_RTX, unsignedp, methods);
566 temp1 = expand_binop (submode, this_mul_optab, imag0, ratio,
567 NULL_RTX, unsignedp, methods);
572 imag_t = expand_binop (submode, this_sub_optab, temp1, real0,
573 NULL_RTX, unsignedp, methods);
575 if (real_t == 0 || imag_t == 0)
579 if (class == MODE_COMPLEX_FLOAT)
580 res = expand_binop (submode, binoptab, real_t, divisor,
581 realr, unsignedp, methods);
583 res = expand_divmod (0, TRUNC_DIV_EXPR, submode,
584 real_t, divisor, realr, unsignedp);
590 emit_move_insn (realr, res);
592 if (class == MODE_COMPLEX_FLOAT)
593 res = expand_binop (submode, binoptab, imag_t, divisor,
594 imagr, unsignedp, methods);
596 res = expand_divmod (0, TRUNC_DIV_EXPR, submode,
597 imag_t, divisor, imagr, unsignedp);
603 emit_move_insn (imagr, res);
610 /* Wrapper around expand_binop which takes an rtx code to specify
611 the operation to perform, not an optab pointer. All other
612 arguments are the same. */
614 expand_simple_binop (mode, code, op0, op1, target, unsignedp, methods)
615 enum machine_mode mode;
620 enum optab_methods methods;
622 optab binop = code_to_optab [(int) code];
626 return expand_binop (mode, binop, op0, op1, target, unsignedp, methods);
629 /* Generate code to perform an operation specified by BINOPTAB
630 on operands OP0 and OP1, with result having machine-mode MODE.
632 UNSIGNEDP is for the case where we have to widen the operands
633 to perform the operation. It says to use zero-extension.
635 If TARGET is nonzero, the value
636 is generated there, if it is convenient to do so.
637 In all cases an rtx is returned for the locus of the value;
638 this may or may not be TARGET. */
641 expand_binop (mode, binoptab, op0, op1, target, unsignedp, methods)
642 enum machine_mode mode;
647 enum optab_methods methods;
649 enum optab_methods next_methods
650 = (methods == OPTAB_LIB || methods == OPTAB_LIB_WIDEN
651 ? OPTAB_WIDEN : methods);
652 enum mode_class class;
653 enum machine_mode wider_mode;
655 int commutative_op = 0;
656 int shift_op = (binoptab->code == ASHIFT
657 || binoptab->code == ASHIFTRT
658 || binoptab->code == LSHIFTRT
659 || binoptab->code == ROTATE
660 || binoptab->code == ROTATERT);
661 rtx entry_last = get_last_insn ();
664 class = GET_MODE_CLASS (mode);
666 op0 = protect_from_queue (op0, 0);
667 op1 = protect_from_queue (op1, 0);
669 target = protect_from_queue (target, 1);
673 op0 = force_not_mem (op0);
674 op1 = force_not_mem (op1);
677 /* If subtracting an integer constant, convert this into an addition of
678 the negated constant. */
680 if (binoptab == sub_optab && GET_CODE (op1) == CONST_INT)
682 op1 = negate_rtx (mode, op1);
683 binoptab = add_optab;
686 /* If we are inside an appropriately-short loop and one operand is an
687 expensive constant, force it into a register. */
688 if (CONSTANT_P (op0) && preserve_subexpressions_p ()
689 && rtx_cost (op0, binoptab->code) > COSTS_N_INSNS (1))
690 op0 = force_reg (mode, op0);
692 if (CONSTANT_P (op1) && preserve_subexpressions_p ()
693 && ! shift_op && rtx_cost (op1, binoptab->code) > COSTS_N_INSNS (1))
694 op1 = force_reg (mode, op1);
696 /* Record where to delete back to if we backtrack. */
697 last = get_last_insn ();
699 /* If operation is commutative,
700 try to make the first operand a register.
701 Even better, try to make it the same as the target.
702 Also try to make the last operand a constant. */
703 if (GET_RTX_CLASS (binoptab->code) == 'c'
704 || binoptab == smul_widen_optab
705 || binoptab == umul_widen_optab
706 || binoptab == smul_highpart_optab
707 || binoptab == umul_highpart_optab)
711 if (((target == 0 || GET_CODE (target) == REG)
712 ? ((GET_CODE (op1) == REG
713 && GET_CODE (op0) != REG)
715 : rtx_equal_p (op1, target))
716 || GET_CODE (op0) == CONST_INT)
724 /* If we can do it with a three-operand insn, do so. */
726 if (methods != OPTAB_MUST_WIDEN
727 && binoptab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
729 int icode = (int) binoptab->handlers[(int) mode].insn_code;
730 enum machine_mode mode0 = insn_data[icode].operand[1].mode;
731 enum machine_mode mode1 = insn_data[icode].operand[2].mode;
733 rtx xop0 = op0, xop1 = op1;
738 temp = gen_reg_rtx (mode);
740 /* If it is a commutative operator and the modes would match
741 if we would swap the operands, we can save the conversions. */
744 if (GET_MODE (op0) != mode0 && GET_MODE (op1) != mode1
745 && GET_MODE (op0) == mode1 && GET_MODE (op1) == mode0)
749 tmp = op0; op0 = op1; op1 = tmp;
750 tmp = xop0; xop0 = xop1; xop1 = tmp;
754 /* In case the insn wants input operands in modes different from
755 the result, convert the operands. It would seem that we
756 don't need to convert CONST_INTs, but we do, so that they're
757 a properly sign-extended for their modes; we choose the
758 widest mode between mode and mode[01], so that, in a widening
759 operation, we call convert_modes with different FROM and TO
760 modes, which ensures the value is sign-extended. Shift
761 operations are an exception, because the second operand needs
762 not be extended to the mode of the result. */
764 if (GET_MODE (op0) != mode0
765 && mode0 != VOIDmode)
766 xop0 = convert_modes (mode0,
767 GET_MODE (op0) != VOIDmode
769 : GET_MODE_SIZE (mode) > GET_MODE_SIZE (mode0)
774 if (GET_MODE (xop1) != mode1
775 && mode1 != VOIDmode)
776 xop1 = convert_modes (mode1,
777 GET_MODE (op1) != VOIDmode
779 : (GET_MODE_SIZE (mode) > GET_MODE_SIZE (mode1)
785 /* Now, if insn's predicates don't allow our operands, put them into
788 if (! (*insn_data[icode].operand[1].predicate) (xop0, mode0)
789 && mode0 != VOIDmode)
790 xop0 = copy_to_mode_reg (mode0, xop0);
792 if (! (*insn_data[icode].operand[2].predicate) (xop1, mode1)
793 && mode1 != VOIDmode)
794 xop1 = copy_to_mode_reg (mode1, xop1);
796 if (! (*insn_data[icode].operand[0].predicate) (temp, mode))
797 temp = gen_reg_rtx (mode);
799 pat = GEN_FCN (icode) (temp, xop0, xop1);
802 /* If PAT is a multi-insn sequence, try to add an appropriate
803 REG_EQUAL note to it. If we can't because TEMP conflicts with an
804 operand, call ourselves again, this time without a target. */
805 if (GET_CODE (pat) == SEQUENCE
806 && ! add_equal_note (pat, temp, binoptab->code, xop0, xop1))
808 delete_insns_since (last);
809 return expand_binop (mode, binoptab, op0, op1, NULL_RTX,
817 delete_insns_since (last);
820 /* If this is a multiply, see if we can do a widening operation that
821 takes operands of this mode and makes a wider mode. */
823 if (binoptab == smul_optab && GET_MODE_WIDER_MODE (mode) != VOIDmode
824 && (((unsignedp ? umul_widen_optab : smul_widen_optab)
825 ->handlers[(int) GET_MODE_WIDER_MODE (mode)].insn_code)
826 != CODE_FOR_nothing))
828 temp = expand_binop (GET_MODE_WIDER_MODE (mode),
829 unsignedp ? umul_widen_optab : smul_widen_optab,
830 op0, op1, NULL_RTX, unsignedp, OPTAB_DIRECT);
834 if (GET_MODE_CLASS (mode) == MODE_INT)
835 return gen_lowpart (mode, temp);
837 return convert_to_mode (mode, temp, unsignedp);
841 /* Look for a wider mode of the same class for which we think we
842 can open-code the operation. Check for a widening multiply at the
843 wider mode as well. */
845 if ((class == MODE_INT || class == MODE_FLOAT || class == MODE_COMPLEX_FLOAT)
846 && methods != OPTAB_DIRECT && methods != OPTAB_LIB)
847 for (wider_mode = GET_MODE_WIDER_MODE (mode); wider_mode != VOIDmode;
848 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
850 if (binoptab->handlers[(int) wider_mode].insn_code != CODE_FOR_nothing
851 || (binoptab == smul_optab
852 && GET_MODE_WIDER_MODE (wider_mode) != VOIDmode
853 && (((unsignedp ? umul_widen_optab : smul_widen_optab)
854 ->handlers[(int) GET_MODE_WIDER_MODE (wider_mode)].insn_code)
855 != CODE_FOR_nothing)))
857 rtx xop0 = op0, xop1 = op1;
860 /* For certain integer operations, we need not actually extend
861 the narrow operands, as long as we will truncate
862 the results to the same narrowness. */
864 if ((binoptab == ior_optab || binoptab == and_optab
865 || binoptab == xor_optab
866 || binoptab == add_optab || binoptab == sub_optab
867 || binoptab == smul_optab || binoptab == ashl_optab)
868 && class == MODE_INT)
871 xop0 = widen_operand (xop0, wider_mode, mode, unsignedp, no_extend);
873 /* The second operand of a shift must always be extended. */
874 xop1 = widen_operand (xop1, wider_mode, mode, unsignedp,
875 no_extend && binoptab != ashl_optab);
877 temp = expand_binop (wider_mode, binoptab, xop0, xop1, NULL_RTX,
878 unsignedp, OPTAB_DIRECT);
881 if (class != MODE_INT)
884 target = gen_reg_rtx (mode);
885 convert_move (target, temp, 0);
889 return gen_lowpart (mode, temp);
892 delete_insns_since (last);
896 /* These can be done a word at a time. */
897 if ((binoptab == and_optab || binoptab == ior_optab || binoptab == xor_optab)
899 && GET_MODE_SIZE (mode) > UNITS_PER_WORD
900 && binoptab->handlers[(int) word_mode].insn_code != CODE_FOR_nothing)
906 /* If TARGET is the same as one of the operands, the REG_EQUAL note
907 won't be accurate, so use a new target. */
908 if (target == 0 || target == op0 || target == op1)
909 target = gen_reg_rtx (mode);
913 /* Do the actual arithmetic. */
914 for (i = 0; i < GET_MODE_BITSIZE (mode) / BITS_PER_WORD; i++)
916 rtx target_piece = operand_subword (target, i, 1, mode);
917 rtx x = expand_binop (word_mode, binoptab,
918 operand_subword_force (op0, i, mode),
919 operand_subword_force (op1, i, mode),
920 target_piece, unsignedp, next_methods);
925 if (target_piece != x)
926 emit_move_insn (target_piece, x);
929 insns = get_insns ();
932 if (i == GET_MODE_BITSIZE (mode) / BITS_PER_WORD)
934 if (binoptab->code != UNKNOWN)
936 = gen_rtx_fmt_ee (binoptab->code, mode,
937 copy_rtx (op0), copy_rtx (op1));
941 emit_no_conflict_block (insns, target, op0, op1, equiv_value);
946 /* Synthesize double word shifts from single word shifts. */
947 if ((binoptab == lshr_optab || binoptab == ashl_optab
948 || binoptab == ashr_optab)
950 && GET_CODE (op1) == CONST_INT
951 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
952 && binoptab->handlers[(int) word_mode].insn_code != CODE_FOR_nothing
953 && ashl_optab->handlers[(int) word_mode].insn_code != CODE_FOR_nothing
954 && lshr_optab->handlers[(int) word_mode].insn_code != CODE_FOR_nothing)
956 rtx insns, inter, equiv_value;
957 rtx into_target, outof_target;
958 rtx into_input, outof_input;
959 int shift_count, left_shift, outof_word;
961 /* If TARGET is the same as one of the operands, the REG_EQUAL note
962 won't be accurate, so use a new target. */
963 if (target == 0 || target == op0 || target == op1)
964 target = gen_reg_rtx (mode);
968 shift_count = INTVAL (op1);
970 /* OUTOF_* is the word we are shifting bits away from, and
971 INTO_* is the word that we are shifting bits towards, thus
972 they differ depending on the direction of the shift and
975 left_shift = binoptab == ashl_optab;
976 outof_word = left_shift ^ ! WORDS_BIG_ENDIAN;
978 outof_target = operand_subword (target, outof_word, 1, mode);
979 into_target = operand_subword (target, 1 - outof_word, 1, mode);
981 outof_input = operand_subword_force (op0, outof_word, mode);
982 into_input = operand_subword_force (op0, 1 - outof_word, mode);
984 if (shift_count >= BITS_PER_WORD)
986 inter = expand_binop (word_mode, binoptab,
988 GEN_INT (shift_count - BITS_PER_WORD),
989 into_target, unsignedp, next_methods);
991 if (inter != 0 && inter != into_target)
992 emit_move_insn (into_target, inter);
994 /* For a signed right shift, we must fill the word we are shifting
995 out of with copies of the sign bit. Otherwise it is zeroed. */
996 if (inter != 0 && binoptab != ashr_optab)
997 inter = CONST0_RTX (word_mode);
999 inter = expand_binop (word_mode, binoptab,
1001 GEN_INT (BITS_PER_WORD - 1),
1002 outof_target, unsignedp, next_methods);
1004 if (inter != 0 && inter != outof_target)
1005 emit_move_insn (outof_target, inter);
1010 optab reverse_unsigned_shift, unsigned_shift;
1012 /* For a shift of less then BITS_PER_WORD, to compute the carry,
1013 we must do a logical shift in the opposite direction of the
1016 reverse_unsigned_shift = (left_shift ? lshr_optab : ashl_optab);
1018 /* For a shift of less than BITS_PER_WORD, to compute the word
1019 shifted towards, we need to unsigned shift the orig value of
1022 unsigned_shift = (left_shift ? ashl_optab : lshr_optab);
1024 carries = expand_binop (word_mode, reverse_unsigned_shift,
1026 GEN_INT (BITS_PER_WORD - shift_count),
1027 0, unsignedp, next_methods);
1032 inter = expand_binop (word_mode, unsigned_shift, into_input,
1033 op1, 0, unsignedp, next_methods);
1036 inter = expand_binop (word_mode, ior_optab, carries, inter,
1037 into_target, unsignedp, next_methods);
1039 if (inter != 0 && inter != into_target)
1040 emit_move_insn (into_target, inter);
1043 inter = expand_binop (word_mode, binoptab, outof_input,
1044 op1, outof_target, unsignedp, next_methods);
1046 if (inter != 0 && inter != outof_target)
1047 emit_move_insn (outof_target, inter);
1050 insns = get_insns ();
1055 if (binoptab->code != UNKNOWN)
1056 equiv_value = gen_rtx_fmt_ee (binoptab->code, mode, op0, op1);
1060 emit_no_conflict_block (insns, target, op0, op1, equiv_value);
1065 /* Synthesize double word rotates from single word shifts. */
1066 if ((binoptab == rotl_optab || binoptab == rotr_optab)
1067 && class == MODE_INT
1068 && GET_CODE (op1) == CONST_INT
1069 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
1070 && ashl_optab->handlers[(int) word_mode].insn_code != CODE_FOR_nothing
1071 && lshr_optab->handlers[(int) word_mode].insn_code != CODE_FOR_nothing)
1073 rtx insns, equiv_value;
1074 rtx into_target, outof_target;
1075 rtx into_input, outof_input;
1077 int shift_count, left_shift, outof_word;
1079 /* If TARGET is the same as one of the operands, the REG_EQUAL note
1080 won't be accurate, so use a new target. */
1081 if (target == 0 || target == op0 || target == op1)
1082 target = gen_reg_rtx (mode);
1086 shift_count = INTVAL (op1);
1088 /* OUTOF_* is the word we are shifting bits away from, and
1089 INTO_* is the word that we are shifting bits towards, thus
1090 they differ depending on the direction of the shift and
1091 WORDS_BIG_ENDIAN. */
1093 left_shift = (binoptab == rotl_optab);
1094 outof_word = left_shift ^ ! WORDS_BIG_ENDIAN;
1096 outof_target = operand_subword (target, outof_word, 1, mode);
1097 into_target = operand_subword (target, 1 - outof_word, 1, mode);
1099 outof_input = operand_subword_force (op0, outof_word, mode);
1100 into_input = operand_subword_force (op0, 1 - outof_word, mode);
1102 if (shift_count == BITS_PER_WORD)
1104 /* This is just a word swap. */
1105 emit_move_insn (outof_target, into_input);
1106 emit_move_insn (into_target, outof_input);
1111 rtx into_temp1, into_temp2, outof_temp1, outof_temp2;
1112 rtx first_shift_count, second_shift_count;
1113 optab reverse_unsigned_shift, unsigned_shift;
1115 reverse_unsigned_shift = (left_shift ^ (shift_count < BITS_PER_WORD)
1116 ? lshr_optab : ashl_optab);
1118 unsigned_shift = (left_shift ^ (shift_count < BITS_PER_WORD)
1119 ? ashl_optab : lshr_optab);
1121 if (shift_count > BITS_PER_WORD)
1123 first_shift_count = GEN_INT (shift_count - BITS_PER_WORD);
1124 second_shift_count = GEN_INT (2*BITS_PER_WORD - shift_count);
1128 first_shift_count = GEN_INT (BITS_PER_WORD - shift_count);
1129 second_shift_count = GEN_INT (shift_count);
1132 into_temp1 = expand_binop (word_mode, unsigned_shift,
1133 outof_input, first_shift_count,
1134 NULL_RTX, unsignedp, next_methods);
1135 into_temp2 = expand_binop (word_mode, reverse_unsigned_shift,
1136 into_input, second_shift_count,
1137 into_target, unsignedp, next_methods);
1139 if (into_temp1 != 0 && into_temp2 != 0)
1140 inter = expand_binop (word_mode, ior_optab, into_temp1, into_temp2,
1141 into_target, unsignedp, next_methods);
1145 if (inter != 0 && inter != into_target)
1146 emit_move_insn (into_target, inter);
1148 outof_temp1 = expand_binop (word_mode, unsigned_shift,
1149 into_input, first_shift_count,
1150 NULL_RTX, unsignedp, next_methods);
1151 outof_temp2 = expand_binop (word_mode, reverse_unsigned_shift,
1152 outof_input, second_shift_count,
1153 outof_target, unsignedp, next_methods);
1155 if (inter != 0 && outof_temp1 != 0 && outof_temp2 != 0)
1156 inter = expand_binop (word_mode, ior_optab,
1157 outof_temp1, outof_temp2,
1158 outof_target, unsignedp, next_methods);
1160 if (inter != 0 && inter != outof_target)
1161 emit_move_insn (outof_target, inter);
1164 insns = get_insns ();
1169 if (binoptab->code != UNKNOWN)
1170 equiv_value = gen_rtx_fmt_ee (binoptab->code, mode, op0, op1);
1174 /* We can't make this a no conflict block if this is a word swap,
1175 because the word swap case fails if the input and output values
1176 are in the same register. */
1177 if (shift_count != BITS_PER_WORD)
1178 emit_no_conflict_block (insns, target, op0, op1, equiv_value);
1187 /* These can be done a word at a time by propagating carries. */
1188 if ((binoptab == add_optab || binoptab == sub_optab)
1189 && class == MODE_INT
1190 && GET_MODE_SIZE (mode) >= 2 * UNITS_PER_WORD
1191 && binoptab->handlers[(int) word_mode].insn_code != CODE_FOR_nothing)
1194 optab otheroptab = binoptab == add_optab ? sub_optab : add_optab;
1195 int nwords = GET_MODE_BITSIZE (mode) / BITS_PER_WORD;
1196 rtx carry_in = NULL_RTX, carry_out = NULL_RTX;
1197 rtx xop0, xop1, xtarget;
1199 /* We can handle either a 1 or -1 value for the carry. If STORE_FLAG
1200 value is one of those, use it. Otherwise, use 1 since it is the
1201 one easiest to get. */
1202 #if STORE_FLAG_VALUE == 1 || STORE_FLAG_VALUE == -1
1203 int normalizep = STORE_FLAG_VALUE;
1208 /* Prepare the operands. */
1209 xop0 = force_reg (mode, op0);
1210 xop1 = force_reg (mode, op1);
1212 xtarget = gen_reg_rtx (mode);
1214 if (target == 0 || GET_CODE (target) != REG)
1217 /* Indicate for flow that the entire target reg is being set. */
1218 if (GET_CODE (target) == REG)
1219 emit_insn (gen_rtx_CLOBBER (VOIDmode, xtarget));
1221 /* Do the actual arithmetic. */
1222 for (i = 0; i < nwords; i++)
1224 int index = (WORDS_BIG_ENDIAN ? nwords - i - 1 : i);
1225 rtx target_piece = operand_subword (xtarget, index, 1, mode);
1226 rtx op0_piece = operand_subword_force (xop0, index, mode);
1227 rtx op1_piece = operand_subword_force (xop1, index, mode);
1230 /* Main add/subtract of the input operands. */
1231 x = expand_binop (word_mode, binoptab,
1232 op0_piece, op1_piece,
1233 target_piece, unsignedp, next_methods);
1239 /* Store carry from main add/subtract. */
1240 carry_out = gen_reg_rtx (word_mode);
1241 carry_out = emit_store_flag_force (carry_out,
1242 (binoptab == add_optab
1245 word_mode, 1, normalizep);
1252 /* Add/subtract previous carry to main result. */
1253 newx = expand_binop (word_mode,
1254 normalizep == 1 ? binoptab : otheroptab,
1256 NULL_RTX, 1, next_methods);
1260 /* Get out carry from adding/subtracting carry in. */
1261 rtx carry_tmp = gen_reg_rtx (word_mode);
1262 carry_tmp = emit_store_flag_force (carry_tmp,
1263 (binoptab == add_optab
1266 word_mode, 1, normalizep);
1268 /* Logical-ior the two poss. carry together. */
1269 carry_out = expand_binop (word_mode, ior_optab,
1270 carry_out, carry_tmp,
1271 carry_out, 0, next_methods);
1275 emit_move_insn (target_piece, newx);
1278 carry_in = carry_out;
1281 if (i == GET_MODE_BITSIZE (mode) / BITS_PER_WORD)
1283 if (mov_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
1285 rtx temp = emit_move_insn (target, xtarget);
1287 set_unique_reg_note (temp,
1289 gen_rtx_fmt_ee (binoptab->code, mode,
1298 delete_insns_since (last);
1301 /* If we want to multiply two two-word values and have normal and widening
1302 multiplies of single-word values, we can do this with three smaller
1303 multiplications. Note that we do not make a REG_NO_CONFLICT block here
1304 because we are not operating on one word at a time.
1306 The multiplication proceeds as follows:
1307 _______________________
1308 [__op0_high_|__op0_low__]
1309 _______________________
1310 * [__op1_high_|__op1_low__]
1311 _______________________________________________
1312 _______________________
1313 (1) [__op0_low__*__op1_low__]
1314 _______________________
1315 (2a) [__op0_low__*__op1_high_]
1316 _______________________
1317 (2b) [__op0_high_*__op1_low__]
1318 _______________________
1319 (3) [__op0_high_*__op1_high_]
1322 This gives a 4-word result. Since we are only interested in the
1323 lower 2 words, partial result (3) and the upper words of (2a) and
1324 (2b) don't need to be calculated. Hence (2a) and (2b) can be
1325 calculated using non-widening multiplication.
1327 (1), however, needs to be calculated with an unsigned widening
1328 multiplication. If this operation is not directly supported we
1329 try using a signed widening multiplication and adjust the result.
1330 This adjustment works as follows:
1332 If both operands are positive then no adjustment is needed.
1334 If the operands have different signs, for example op0_low < 0 and
1335 op1_low >= 0, the instruction treats the most significant bit of
1336 op0_low as a sign bit instead of a bit with significance
1337 2**(BITS_PER_WORD-1), i.e. the instruction multiplies op1_low
1338 with 2**BITS_PER_WORD - op0_low, and two's complements the
1339 result. Conclusion: We need to add op1_low * 2**BITS_PER_WORD to
1342 Similarly, if both operands are negative, we need to add
1343 (op0_low + op1_low) * 2**BITS_PER_WORD.
1345 We use a trick to adjust quickly. We logically shift op0_low right
1346 (op1_low) BITS_PER_WORD-1 steps to get 0 or 1, and add this to
1347 op0_high (op1_high) before it is used to calculate 2b (2a). If no
1348 logical shift exists, we do an arithmetic right shift and subtract
1351 if (binoptab == smul_optab
1352 && class == MODE_INT
1353 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
1354 && smul_optab->handlers[(int) word_mode].insn_code != CODE_FOR_nothing
1355 && add_optab->handlers[(int) word_mode].insn_code != CODE_FOR_nothing
1356 && ((umul_widen_optab->handlers[(int) mode].insn_code
1357 != CODE_FOR_nothing)
1358 || (smul_widen_optab->handlers[(int) mode].insn_code
1359 != CODE_FOR_nothing)))
1361 int low = (WORDS_BIG_ENDIAN ? 1 : 0);
1362 int high = (WORDS_BIG_ENDIAN ? 0 : 1);
1363 rtx op0_high = operand_subword_force (op0, high, mode);
1364 rtx op0_low = operand_subword_force (op0, low, mode);
1365 rtx op1_high = operand_subword_force (op1, high, mode);
1366 rtx op1_low = operand_subword_force (op1, low, mode);
1368 rtx op0_xhigh = NULL_RTX;
1369 rtx op1_xhigh = NULL_RTX;
1371 /* If the target is the same as one of the inputs, don't use it. This
1372 prevents problems with the REG_EQUAL note. */
1373 if (target == op0 || target == op1
1374 || (target != 0 && GET_CODE (target) != REG))
1377 /* Multiply the two lower words to get a double-word product.
1378 If unsigned widening multiplication is available, use that;
1379 otherwise use the signed form and compensate. */
1381 if (umul_widen_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
1383 product = expand_binop (mode, umul_widen_optab, op0_low, op1_low,
1384 target, 1, OPTAB_DIRECT);
1386 /* If we didn't succeed, delete everything we did so far. */
1388 delete_insns_since (last);
1390 op0_xhigh = op0_high, op1_xhigh = op1_high;
1394 && smul_widen_optab->handlers[(int) mode].insn_code
1395 != CODE_FOR_nothing)
1397 rtx wordm1 = GEN_INT (BITS_PER_WORD - 1);
1398 product = expand_binop (mode, smul_widen_optab, op0_low, op1_low,
1399 target, 1, OPTAB_DIRECT);
1400 op0_xhigh = expand_binop (word_mode, lshr_optab, op0_low, wordm1,
1401 NULL_RTX, 1, next_methods);
1403 op0_xhigh = expand_binop (word_mode, add_optab, op0_high,
1404 op0_xhigh, op0_xhigh, 0, next_methods);
1407 op0_xhigh = expand_binop (word_mode, ashr_optab, op0_low, wordm1,
1408 NULL_RTX, 0, next_methods);
1410 op0_xhigh = expand_binop (word_mode, sub_optab, op0_high,
1411 op0_xhigh, op0_xhigh, 0,
1415 op1_xhigh = expand_binop (word_mode, lshr_optab, op1_low, wordm1,
1416 NULL_RTX, 1, next_methods);
1418 op1_xhigh = expand_binop (word_mode, add_optab, op1_high,
1419 op1_xhigh, op1_xhigh, 0, next_methods);
1422 op1_xhigh = expand_binop (word_mode, ashr_optab, op1_low, wordm1,
1423 NULL_RTX, 0, next_methods);
1425 op1_xhigh = expand_binop (word_mode, sub_optab, op1_high,
1426 op1_xhigh, op1_xhigh, 0,
1431 /* If we have been able to directly compute the product of the
1432 low-order words of the operands and perform any required adjustments
1433 of the operands, we proceed by trying two more multiplications
1434 and then computing the appropriate sum.
1436 We have checked above that the required addition is provided.
1437 Full-word addition will normally always succeed, especially if
1438 it is provided at all, so we don't worry about its failure. The
1439 multiplication may well fail, however, so we do handle that. */
1441 if (product && op0_xhigh && op1_xhigh)
1443 rtx product_high = operand_subword (product, high, 1, mode);
1444 rtx temp = expand_binop (word_mode, binoptab, op0_low, op1_xhigh,
1445 NULL_RTX, 0, OPTAB_DIRECT);
1447 if (!REG_P (product_high))
1448 product_high = force_reg (word_mode, product_high);
1451 temp = expand_binop (word_mode, add_optab, temp, product_high,
1452 product_high, 0, next_methods);
1454 if (temp != 0 && temp != product_high)
1455 emit_move_insn (product_high, temp);
1458 temp = expand_binop (word_mode, binoptab, op1_low, op0_xhigh,
1459 NULL_RTX, 0, OPTAB_DIRECT);
1462 temp = expand_binop (word_mode, add_optab, temp,
1463 product_high, product_high,
1466 if (temp != 0 && temp != product_high)
1467 emit_move_insn (product_high, temp);
1469 emit_move_insn (operand_subword (product, high, 1, mode), product_high);
1473 if (mov_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
1475 temp = emit_move_insn (product, product);
1476 set_unique_reg_note (temp,
1478 gen_rtx_fmt_ee (MULT, mode,
1487 /* If we get here, we couldn't do it for some reason even though we
1488 originally thought we could. Delete anything we've emitted in
1491 delete_insns_since (last);
1494 /* We need to open-code the complex type operations: '+, -, * and /' */
1496 /* At this point we allow operations between two similar complex
1497 numbers, and also if one of the operands is not a complex number
1498 but rather of MODE_FLOAT or MODE_INT. However, the caller
1499 must make sure that the MODE of the non-complex operand matches
1500 the SUBMODE of the complex operand. */
1502 if (class == MODE_COMPLEX_FLOAT || class == MODE_COMPLEX_INT)
1504 rtx real0 = 0, imag0 = 0;
1505 rtx real1 = 0, imag1 = 0;
1506 rtx realr, imagr, res;
1511 /* Find the correct mode for the real and imaginary parts */
1512 enum machine_mode submode
1513 = mode_for_size (GET_MODE_UNIT_SIZE (mode) * BITS_PER_UNIT,
1514 class == MODE_COMPLEX_INT ? MODE_INT : MODE_FLOAT,
1517 if (submode == BLKmode)
1521 target = gen_reg_rtx (mode);
1525 realr = gen_realpart (submode, target);
1526 imagr = gen_imagpart (submode, target);
1528 if (GET_MODE (op0) == mode)
1530 real0 = gen_realpart (submode, op0);
1531 imag0 = gen_imagpart (submode, op0);
1536 if (GET_MODE (op1) == mode)
1538 real1 = gen_realpart (submode, op1);
1539 imag1 = gen_imagpart (submode, op1);
1544 if (real0 == 0 || real1 == 0 || ! (imag0 != 0|| imag1 != 0))
1547 switch (binoptab->code)
1550 /* (a+ib) + (c+id) = (a+c) + i(b+d) */
1552 /* (a+ib) - (c+id) = (a-c) + i(b-d) */
1553 res = expand_binop (submode, binoptab, real0, real1,
1554 realr, unsignedp, methods);
1558 else if (res != realr)
1559 emit_move_insn (realr, res);
1562 res = expand_binop (submode, binoptab, imag0, imag1,
1563 imagr, unsignedp, methods);
1566 else if (binoptab->code == MINUS)
1567 res = expand_unop (submode,
1568 binoptab == subv_optab ? negv_optab : neg_optab,
1569 imag1, imagr, unsignedp);
1575 else if (res != imagr)
1576 emit_move_insn (imagr, res);
1582 /* (a+ib) * (c+id) = (ac-bd) + i(ad+cb) */
1588 /* Don't fetch these from memory more than once. */
1589 real0 = force_reg (submode, real0);
1590 real1 = force_reg (submode, real1);
1591 imag0 = force_reg (submode, imag0);
1592 imag1 = force_reg (submode, imag1);
1594 temp1 = expand_binop (submode, binoptab, real0, real1, NULL_RTX,
1595 unsignedp, methods);
1597 temp2 = expand_binop (submode, binoptab, imag0, imag1, NULL_RTX,
1598 unsignedp, methods);
1600 if (temp1 == 0 || temp2 == 0)
1605 binoptab == smulv_optab ? subv_optab : sub_optab,
1606 temp1, temp2, realr, unsignedp, methods));
1610 else if (res != realr)
1611 emit_move_insn (realr, res);
1613 temp1 = expand_binop (submode, binoptab, real0, imag1,
1614 NULL_RTX, unsignedp, methods);
1616 temp2 = expand_binop (submode, binoptab, real1, imag0,
1617 NULL_RTX, unsignedp, methods);
1619 if (temp1 == 0 || temp2 == 0)
1624 binoptab == smulv_optab ? addv_optab : add_optab,
1625 temp1, temp2, imagr, unsignedp, methods));
1629 else if (res != imagr)
1630 emit_move_insn (imagr, res);
1636 /* Don't fetch these from memory more than once. */
1637 real0 = force_reg (submode, real0);
1638 real1 = force_reg (submode, real1);
1640 res = expand_binop (submode, binoptab, real0, real1,
1641 realr, unsignedp, methods);
1644 else if (res != realr)
1645 emit_move_insn (realr, res);
1648 res = expand_binop (submode, binoptab,
1649 real1, imag0, imagr, unsignedp, methods);
1651 res = expand_binop (submode, binoptab,
1652 real0, imag1, imagr, unsignedp, methods);
1656 else if (res != imagr)
1657 emit_move_insn (imagr, res);
1664 /* (a+ib) / (c+id) = ((ac+bd)/(cc+dd)) + i((bc-ad)/(cc+dd)) */
1668 /* (a+ib) / (c+i0) = (a/c) + i(b/c) */
1670 /* Don't fetch these from memory more than once. */
1671 real1 = force_reg (submode, real1);
1673 /* Simply divide the real and imaginary parts by `c' */
1674 if (class == MODE_COMPLEX_FLOAT)
1675 res = expand_binop (submode, binoptab, real0, real1,
1676 realr, unsignedp, methods);
1678 res = expand_divmod (0, TRUNC_DIV_EXPR, submode,
1679 real0, real1, realr, unsignedp);
1683 else if (res != realr)
1684 emit_move_insn (realr, res);
1686 if (class == MODE_COMPLEX_FLOAT)
1687 res = expand_binop (submode, binoptab, imag0, real1,
1688 imagr, unsignedp, methods);
1690 res = expand_divmod (0, TRUNC_DIV_EXPR, submode,
1691 imag0, real1, imagr, unsignedp);
1695 else if (res != imagr)
1696 emit_move_insn (imagr, res);
1702 switch (flag_complex_divide_method)
1705 ok = expand_cmplxdiv_straight (real0, real1, imag0, imag1,
1706 realr, imagr, submode,
1712 ok = expand_cmplxdiv_wide (real0, real1, imag0, imag1,
1713 realr, imagr, submode,
1733 if (binoptab->code != UNKNOWN)
1735 = gen_rtx_fmt_ee (binoptab->code, mode,
1736 copy_rtx (op0), copy_rtx (op1));
1740 emit_no_conflict_block (seq, target, op0, op1, equiv_value);
1746 /* It can't be open-coded in this mode.
1747 Use a library call if one is available and caller says that's ok. */
1749 if (binoptab->handlers[(int) mode].libfunc
1750 && (methods == OPTAB_LIB || methods == OPTAB_LIB_WIDEN))
1754 enum machine_mode op1_mode = mode;
1761 op1_mode = word_mode;
1762 /* Specify unsigned here,
1763 since negative shift counts are meaningless. */
1764 op1x = convert_to_mode (word_mode, op1, 1);
1767 if (GET_MODE (op0) != VOIDmode
1768 && GET_MODE (op0) != mode)
1769 op0 = convert_to_mode (mode, op0, unsignedp);
1771 /* Pass 1 for NO_QUEUE so we don't lose any increments
1772 if the libcall is cse'd or moved. */
1773 value = emit_library_call_value (binoptab->handlers[(int) mode].libfunc,
1774 NULL_RTX, LCT_CONST, mode, 2,
1775 op0, mode, op1x, op1_mode);
1777 insns = get_insns ();
1780 target = gen_reg_rtx (mode);
1781 emit_libcall_block (insns, target, value,
1782 gen_rtx_fmt_ee (binoptab->code, mode, op0, op1));
1787 delete_insns_since (last);
1789 /* It can't be done in this mode. Can we do it in a wider mode? */
1791 if (! (methods == OPTAB_WIDEN || methods == OPTAB_LIB_WIDEN
1792 || methods == OPTAB_MUST_WIDEN))
1794 /* Caller says, don't even try. */
1795 delete_insns_since (entry_last);
1799 /* Compute the value of METHODS to pass to recursive calls.
1800 Don't allow widening to be tried recursively. */
1802 methods = (methods == OPTAB_LIB_WIDEN ? OPTAB_LIB : OPTAB_DIRECT);
1804 /* Look for a wider mode of the same class for which it appears we can do
1807 if (class == MODE_INT || class == MODE_FLOAT || class == MODE_COMPLEX_FLOAT)
1809 for (wider_mode = GET_MODE_WIDER_MODE (mode); wider_mode != VOIDmode;
1810 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
1812 if ((binoptab->handlers[(int) wider_mode].insn_code
1813 != CODE_FOR_nothing)
1814 || (methods == OPTAB_LIB
1815 && binoptab->handlers[(int) wider_mode].libfunc))
1817 rtx xop0 = op0, xop1 = op1;
1820 /* For certain integer operations, we need not actually extend
1821 the narrow operands, as long as we will truncate
1822 the results to the same narrowness. */
1824 if ((binoptab == ior_optab || binoptab == and_optab
1825 || binoptab == xor_optab
1826 || binoptab == add_optab || binoptab == sub_optab
1827 || binoptab == smul_optab || binoptab == ashl_optab)
1828 && class == MODE_INT)
1831 xop0 = widen_operand (xop0, wider_mode, mode,
1832 unsignedp, no_extend);
1834 /* The second operand of a shift must always be extended. */
1835 xop1 = widen_operand (xop1, wider_mode, mode, unsignedp,
1836 no_extend && binoptab != ashl_optab);
1838 temp = expand_binop (wider_mode, binoptab, xop0, xop1, NULL_RTX,
1839 unsignedp, methods);
1842 if (class != MODE_INT)
1845 target = gen_reg_rtx (mode);
1846 convert_move (target, temp, 0);
1850 return gen_lowpart (mode, temp);
1853 delete_insns_since (last);
1858 delete_insns_since (entry_last);
1862 /* Expand a binary operator which has both signed and unsigned forms.
1863 UOPTAB is the optab for unsigned operations, and SOPTAB is for
1866 If we widen unsigned operands, we may use a signed wider operation instead
1867 of an unsigned wider operation, since the result would be the same. */
1870 sign_expand_binop (mode, uoptab, soptab, op0, op1, target, unsignedp, methods)
1871 enum machine_mode mode;
1872 optab uoptab, soptab;
1873 rtx op0, op1, target;
1875 enum optab_methods methods;
1878 optab direct_optab = unsignedp ? uoptab : soptab;
1879 struct optab wide_soptab;
1881 /* Do it without widening, if possible. */
1882 temp = expand_binop (mode, direct_optab, op0, op1, target,
1883 unsignedp, OPTAB_DIRECT);
1884 if (temp || methods == OPTAB_DIRECT)
1887 /* Try widening to a signed int. Make a fake signed optab that
1888 hides any signed insn for direct use. */
1889 wide_soptab = *soptab;
1890 wide_soptab.handlers[(int) mode].insn_code = CODE_FOR_nothing;
1891 wide_soptab.handlers[(int) mode].libfunc = 0;
1893 temp = expand_binop (mode, &wide_soptab, op0, op1, target,
1894 unsignedp, OPTAB_WIDEN);
1896 /* For unsigned operands, try widening to an unsigned int. */
1897 if (temp == 0 && unsignedp)
1898 temp = expand_binop (mode, uoptab, op0, op1, target,
1899 unsignedp, OPTAB_WIDEN);
1900 if (temp || methods == OPTAB_WIDEN)
1903 /* Use the right width lib call if that exists. */
1904 temp = expand_binop (mode, direct_optab, op0, op1, target, unsignedp, OPTAB_LIB);
1905 if (temp || methods == OPTAB_LIB)
1908 /* Must widen and use a lib call, use either signed or unsigned. */
1909 temp = expand_binop (mode, &wide_soptab, op0, op1, target,
1910 unsignedp, methods);
1914 return expand_binop (mode, uoptab, op0, op1, target,
1915 unsignedp, methods);
1919 /* Generate code to perform an operation specified by BINOPTAB
1920 on operands OP0 and OP1, with two results to TARG1 and TARG2.
1921 We assume that the order of the operands for the instruction
1922 is TARG0, OP0, OP1, TARG1, which would fit a pattern like
1923 [(set TARG0 (operate OP0 OP1)) (set TARG1 (operate ...))].
1925 Either TARG0 or TARG1 may be zero, but what that means is that
1926 the result is not actually wanted. We will generate it into
1927 a dummy pseudo-reg and discard it. They may not both be zero.
1929 Returns 1 if this operation can be performed; 0 if not. */
1932 expand_twoval_binop (binoptab, op0, op1, targ0, targ1, unsignedp)
1938 enum machine_mode mode = GET_MODE (targ0 ? targ0 : targ1);
1939 enum mode_class class;
1940 enum machine_mode wider_mode;
1941 rtx entry_last = get_last_insn ();
1944 class = GET_MODE_CLASS (mode);
1946 op0 = protect_from_queue (op0, 0);
1947 op1 = protect_from_queue (op1, 0);
1951 op0 = force_not_mem (op0);
1952 op1 = force_not_mem (op1);
1955 /* If we are inside an appropriately-short loop and one operand is an
1956 expensive constant, force it into a register. */
1957 if (CONSTANT_P (op0) && preserve_subexpressions_p ()
1958 && rtx_cost (op0, binoptab->code) > COSTS_N_INSNS (1))
1959 op0 = force_reg (mode, op0);
1961 if (CONSTANT_P (op1) && preserve_subexpressions_p ()
1962 && rtx_cost (op1, binoptab->code) > COSTS_N_INSNS (1))
1963 op1 = force_reg (mode, op1);
1966 targ0 = protect_from_queue (targ0, 1);
1968 targ0 = gen_reg_rtx (mode);
1970 targ1 = protect_from_queue (targ1, 1);
1972 targ1 = gen_reg_rtx (mode);
1974 /* Record where to go back to if we fail. */
1975 last = get_last_insn ();
1977 if (binoptab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
1979 int icode = (int) binoptab->handlers[(int) mode].insn_code;
1980 enum machine_mode mode0 = insn_data[icode].operand[1].mode;
1981 enum machine_mode mode1 = insn_data[icode].operand[2].mode;
1983 rtx xop0 = op0, xop1 = op1;
1985 /* In case this insn wants input operands in modes different from the
1986 result, convert the operands. */
1987 if (GET_MODE (op0) != VOIDmode && GET_MODE (op0) != mode0)
1988 xop0 = convert_to_mode (mode0, xop0, unsignedp);
1990 if (GET_MODE (op1) != VOIDmode && GET_MODE (op1) != mode1)
1991 xop1 = convert_to_mode (mode1, xop1, unsignedp);
1993 /* Now, if insn doesn't accept these operands, put them into pseudos. */
1994 if (! (*insn_data[icode].operand[1].predicate) (xop0, mode0))
1995 xop0 = copy_to_mode_reg (mode0, xop0);
1997 if (! (*insn_data[icode].operand[2].predicate) (xop1, mode1))
1998 xop1 = copy_to_mode_reg (mode1, xop1);
2000 /* We could handle this, but we should always be called with a pseudo
2001 for our targets and all insns should take them as outputs. */
2002 if (! (*insn_data[icode].operand[0].predicate) (targ0, mode)
2003 || ! (*insn_data[icode].operand[3].predicate) (targ1, mode))
2006 pat = GEN_FCN (icode) (targ0, xop0, xop1, targ1);
2013 delete_insns_since (last);
2016 /* It can't be done in this mode. Can we do it in a wider mode? */
2018 if (class == MODE_INT || class == MODE_FLOAT || class == MODE_COMPLEX_FLOAT)
2020 for (wider_mode = GET_MODE_WIDER_MODE (mode); wider_mode != VOIDmode;
2021 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
2023 if (binoptab->handlers[(int) wider_mode].insn_code
2024 != CODE_FOR_nothing)
2026 rtx t0 = gen_reg_rtx (wider_mode);
2027 rtx t1 = gen_reg_rtx (wider_mode);
2028 rtx cop0 = convert_modes (wider_mode, mode, op0, unsignedp);
2029 rtx cop1 = convert_modes (wider_mode, mode, op1, unsignedp);
2031 if (expand_twoval_binop (binoptab, cop0, cop1,
2034 convert_move (targ0, t0, unsignedp);
2035 convert_move (targ1, t1, unsignedp);
2039 delete_insns_since (last);
2044 delete_insns_since (entry_last);
2048 /* Wrapper around expand_unop which takes an rtx code to specify
2049 the operation to perform, not an optab pointer. All other
2050 arguments are the same. */
2052 expand_simple_unop (mode, code, op0, target, unsignedp)
2053 enum machine_mode mode;
2059 optab unop = code_to_optab [(int) code];
2063 return expand_unop (mode, unop, op0, target, unsignedp);
2066 /* Generate code to perform an operation specified by UNOPTAB
2067 on operand OP0, with result having machine-mode MODE.
2069 UNSIGNEDP is for the case where we have to widen the operands
2070 to perform the operation. It says to use zero-extension.
2072 If TARGET is nonzero, the value
2073 is generated there, if it is convenient to do so.
2074 In all cases an rtx is returned for the locus of the value;
2075 this may or may not be TARGET. */
2078 expand_unop (mode, unoptab, op0, target, unsignedp)
2079 enum machine_mode mode;
2085 enum mode_class class;
2086 enum machine_mode wider_mode;
2088 rtx last = get_last_insn ();
2091 class = GET_MODE_CLASS (mode);
2093 op0 = protect_from_queue (op0, 0);
2097 op0 = force_not_mem (op0);
2101 target = protect_from_queue (target, 1);
2103 if (unoptab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
2105 int icode = (int) unoptab->handlers[(int) mode].insn_code;
2106 enum machine_mode mode0 = insn_data[icode].operand[1].mode;
2112 temp = gen_reg_rtx (mode);
2114 if (GET_MODE (xop0) != VOIDmode
2115 && GET_MODE (xop0) != mode0)
2116 xop0 = convert_to_mode (mode0, xop0, unsignedp);
2118 /* Now, if insn doesn't accept our operand, put it into a pseudo. */
2120 if (! (*insn_data[icode].operand[1].predicate) (xop0, mode0))
2121 xop0 = copy_to_mode_reg (mode0, xop0);
2123 if (! (*insn_data[icode].operand[0].predicate) (temp, mode))
2124 temp = gen_reg_rtx (mode);
2126 pat = GEN_FCN (icode) (temp, xop0);
2129 if (GET_CODE (pat) == SEQUENCE
2130 && ! add_equal_note (pat, temp, unoptab->code, xop0, NULL_RTX))
2132 delete_insns_since (last);
2133 return expand_unop (mode, unoptab, op0, NULL_RTX, unsignedp);
2141 delete_insns_since (last);
2144 /* It can't be done in this mode. Can we open-code it in a wider mode? */
2146 if (class == MODE_INT || class == MODE_FLOAT || class == MODE_COMPLEX_FLOAT)
2147 for (wider_mode = GET_MODE_WIDER_MODE (mode); wider_mode != VOIDmode;
2148 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
2150 if (unoptab->handlers[(int) wider_mode].insn_code != CODE_FOR_nothing)
2154 /* For certain operations, we need not actually extend
2155 the narrow operand, as long as we will truncate the
2156 results to the same narrowness. */
2158 xop0 = widen_operand (xop0, wider_mode, mode, unsignedp,
2159 (unoptab == neg_optab
2160 || unoptab == one_cmpl_optab)
2161 && class == MODE_INT);
2163 temp = expand_unop (wider_mode, unoptab, xop0, NULL_RTX,
2168 if (class != MODE_INT)
2171 target = gen_reg_rtx (mode);
2172 convert_move (target, temp, 0);
2176 return gen_lowpart (mode, temp);
2179 delete_insns_since (last);
2183 /* These can be done a word at a time. */
2184 if (unoptab == one_cmpl_optab
2185 && class == MODE_INT
2186 && GET_MODE_SIZE (mode) > UNITS_PER_WORD
2187 && unoptab->handlers[(int) word_mode].insn_code != CODE_FOR_nothing)
2192 if (target == 0 || target == op0)
2193 target = gen_reg_rtx (mode);
2197 /* Do the actual arithmetic. */
2198 for (i = 0; i < GET_MODE_BITSIZE (mode) / BITS_PER_WORD; i++)
2200 rtx target_piece = operand_subword (target, i, 1, mode);
2201 rtx x = expand_unop (word_mode, unoptab,
2202 operand_subword_force (op0, i, mode),
2203 target_piece, unsignedp);
2205 if (target_piece != x)
2206 emit_move_insn (target_piece, x);
2209 insns = get_insns ();
2212 emit_no_conflict_block (insns, target, op0, NULL_RTX,
2213 gen_rtx_fmt_e (unoptab->code, mode,
2218 /* Open-code the complex negation operation. */
2219 else if (unoptab->code == NEG
2220 && (class == MODE_COMPLEX_FLOAT || class == MODE_COMPLEX_INT))
2226 /* Find the correct mode for the real and imaginary parts */
2227 enum machine_mode submode
2228 = mode_for_size (GET_MODE_UNIT_SIZE (mode) * BITS_PER_UNIT,
2229 class == MODE_COMPLEX_INT ? MODE_INT : MODE_FLOAT,
2232 if (submode == BLKmode)
2236 target = gen_reg_rtx (mode);
2240 target_piece = gen_imagpart (submode, target);
2241 x = expand_unop (submode, unoptab,
2242 gen_imagpart (submode, op0),
2243 target_piece, unsignedp);
2244 if (target_piece != x)
2245 emit_move_insn (target_piece, x);
2247 target_piece = gen_realpart (submode, target);
2248 x = expand_unop (submode, unoptab,
2249 gen_realpart (submode, op0),
2250 target_piece, unsignedp);
2251 if (target_piece != x)
2252 emit_move_insn (target_piece, x);
2257 emit_no_conflict_block (seq, target, op0, 0,
2258 gen_rtx_fmt_e (unoptab->code, mode,
2263 /* Now try a library call in this mode. */
2264 if (unoptab->handlers[(int) mode].libfunc)
2271 /* Pass 1 for NO_QUEUE so we don't lose any increments
2272 if the libcall is cse'd or moved. */
2273 value = emit_library_call_value (unoptab->handlers[(int) mode].libfunc,
2274 NULL_RTX, LCT_CONST, mode, 1, op0, mode);
2275 insns = get_insns ();
2278 target = gen_reg_rtx (mode);
2279 emit_libcall_block (insns, target, value,
2280 gen_rtx_fmt_e (unoptab->code, mode, op0));
2285 /* It can't be done in this mode. Can we do it in a wider mode? */
2287 if (class == MODE_INT || class == MODE_FLOAT || class == MODE_COMPLEX_FLOAT)
2289 for (wider_mode = GET_MODE_WIDER_MODE (mode); wider_mode != VOIDmode;
2290 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
2292 if ((unoptab->handlers[(int) wider_mode].insn_code
2293 != CODE_FOR_nothing)
2294 || unoptab->handlers[(int) wider_mode].libfunc)
2298 /* For certain operations, we need not actually extend
2299 the narrow operand, as long as we will truncate the
2300 results to the same narrowness. */
2302 xop0 = widen_operand (xop0, wider_mode, mode, unsignedp,
2303 (unoptab == neg_optab
2304 || unoptab == one_cmpl_optab)
2305 && class == MODE_INT);
2307 temp = expand_unop (wider_mode, unoptab, xop0, NULL_RTX,
2312 if (class != MODE_INT)
2315 target = gen_reg_rtx (mode);
2316 convert_move (target, temp, 0);
2320 return gen_lowpart (mode, temp);
2323 delete_insns_since (last);
2328 /* If there is no negate operation, try doing a subtract from zero.
2329 The US Software GOFAST library needs this. */
2330 if (unoptab->code == NEG)
2333 temp = expand_binop (mode,
2334 unoptab == negv_optab ? subv_optab : sub_optab,
2335 CONST0_RTX (mode), op0,
2336 target, unsignedp, OPTAB_LIB_WIDEN);
2344 /* Emit code to compute the absolute value of OP0, with result to
2345 TARGET if convenient. (TARGET may be 0.) The return value says
2346 where the result actually is to be found.
2348 MODE is the mode of the operand; the mode of the result is
2349 different but can be deduced from MODE.
2354 expand_abs (mode, op0, target, result_unsignedp, safe)
2355 enum machine_mode mode;
2358 int result_unsignedp;
2364 result_unsignedp = 1;
2366 /* First try to do it with a special abs instruction. */
2367 temp = expand_unop (mode, result_unsignedp ? abs_optab : absv_optab,
2372 /* If we have a MAX insn, we can do this as MAX (x, -x). */
2373 if (smax_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
2375 rtx last = get_last_insn ();
2377 temp = expand_unop (mode, neg_optab, op0, NULL_RTX, 0);
2379 temp = expand_binop (mode, smax_optab, op0, temp, target, 0,
2385 delete_insns_since (last);
2388 /* If this machine has expensive jumps, we can do integer absolute
2389 value of X as (((signed) x >> (W-1)) ^ x) - ((signed) x >> (W-1)),
2390 where W is the width of MODE. */
2392 if (GET_MODE_CLASS (mode) == MODE_INT && BRANCH_COST >= 2)
2394 rtx extended = expand_shift (RSHIFT_EXPR, mode, op0,
2395 size_int (GET_MODE_BITSIZE (mode) - 1),
2398 temp = expand_binop (mode, xor_optab, extended, op0, target, 0,
2401 temp = expand_binop (mode, result_unsignedp ? sub_optab : subv_optab,
2402 temp, extended, target, 0, OPTAB_LIB_WIDEN);
2408 /* If that does not win, use conditional jump and negate. */
2410 /* It is safe to use the target if it is the same
2411 as the source if this is also a pseudo register */
2412 if (op0 == target && GET_CODE (op0) == REG
2413 && REGNO (op0) >= FIRST_PSEUDO_REGISTER)
2416 op1 = gen_label_rtx ();
2417 if (target == 0 || ! safe
2418 || GET_MODE (target) != mode
2419 || (GET_CODE (target) == MEM && MEM_VOLATILE_P (target))
2420 || (GET_CODE (target) == REG
2421 && REGNO (target) < FIRST_PSEUDO_REGISTER))
2422 target = gen_reg_rtx (mode);
2424 emit_move_insn (target, op0);
2427 /* If this mode is an integer too wide to compare properly,
2428 compare word by word. Rely on CSE to optimize constant cases. */
2429 if (GET_MODE_CLASS (mode) == MODE_INT
2430 && ! can_compare_p (GE, mode, ccp_jump))
2431 do_jump_by_parts_greater_rtx (mode, 0, target, const0_rtx,
2434 do_compare_rtx_and_jump (target, CONST0_RTX (mode), GE, 0, mode,
2435 NULL_RTX, NULL_RTX, op1);
2437 op0 = expand_unop (mode, result_unsignedp ? neg_optab : negv_optab,
2440 emit_move_insn (target, op0);
2446 /* Emit code to compute the absolute value of OP0, with result to
2447 TARGET if convenient. (TARGET may be 0.) The return value says
2448 where the result actually is to be found.
2450 MODE is the mode of the operand; the mode of the result is
2451 different but can be deduced from MODE.
2453 UNSIGNEDP is relevant for complex integer modes. */
2456 expand_complex_abs (mode, op0, target, unsignedp)
2457 enum machine_mode mode;
2462 enum mode_class class = GET_MODE_CLASS (mode);
2463 enum machine_mode wider_mode;
2465 rtx entry_last = get_last_insn ();
2468 optab this_abs_optab;
2470 /* Find the correct mode for the real and imaginary parts. */
2471 enum machine_mode submode
2472 = mode_for_size (GET_MODE_UNIT_SIZE (mode) * BITS_PER_UNIT,
2473 class == MODE_COMPLEX_INT ? MODE_INT : MODE_FLOAT,
2476 if (submode == BLKmode)
2479 op0 = protect_from_queue (op0, 0);
2483 op0 = force_not_mem (op0);
2486 last = get_last_insn ();
2489 target = protect_from_queue (target, 1);
2491 this_abs_optab = ! unsignedp && flag_trapv
2492 && (GET_MODE_CLASS(mode) == MODE_INT)
2493 ? absv_optab : abs_optab;
2495 if (this_abs_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
2497 int icode = (int) this_abs_optab->handlers[(int) mode].insn_code;
2498 enum machine_mode mode0 = insn_data[icode].operand[1].mode;
2504 temp = gen_reg_rtx (submode);
2506 if (GET_MODE (xop0) != VOIDmode
2507 && GET_MODE (xop0) != mode0)
2508 xop0 = convert_to_mode (mode0, xop0, unsignedp);
2510 /* Now, if insn doesn't accept our operand, put it into a pseudo. */
2512 if (! (*insn_data[icode].operand[1].predicate) (xop0, mode0))
2513 xop0 = copy_to_mode_reg (mode0, xop0);
2515 if (! (*insn_data[icode].operand[0].predicate) (temp, submode))
2516 temp = gen_reg_rtx (submode);
2518 pat = GEN_FCN (icode) (temp, xop0);
2521 if (GET_CODE (pat) == SEQUENCE
2522 && ! add_equal_note (pat, temp, this_abs_optab->code, xop0,
2525 delete_insns_since (last);
2526 return expand_unop (mode, this_abs_optab, op0, NULL_RTX,
2535 delete_insns_since (last);
2538 /* It can't be done in this mode. Can we open-code it in a wider mode? */
2540 for (wider_mode = GET_MODE_WIDER_MODE (mode); wider_mode != VOIDmode;
2541 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
2543 if (this_abs_optab->handlers[(int) wider_mode].insn_code
2544 != CODE_FOR_nothing)
2548 xop0 = convert_modes (wider_mode, mode, xop0, unsignedp);
2549 temp = expand_complex_abs (wider_mode, xop0, NULL_RTX, unsignedp);
2553 if (class != MODE_COMPLEX_INT)
2556 target = gen_reg_rtx (submode);
2557 convert_move (target, temp, 0);
2561 return gen_lowpart (submode, temp);
2564 delete_insns_since (last);
2568 /* Open-code the complex absolute-value operation
2569 if we can open-code sqrt. Otherwise it's not worth while. */
2570 if (sqrt_optab->handlers[(int) submode].insn_code != CODE_FOR_nothing
2573 rtx real, imag, total;
2575 real = gen_realpart (submode, op0);
2576 imag = gen_imagpart (submode, op0);
2578 /* Square both parts. */
2579 real = expand_mult (submode, real, real, NULL_RTX, 0);
2580 imag = expand_mult (submode, imag, imag, NULL_RTX, 0);
2582 /* Sum the parts. */
2583 total = expand_binop (submode, add_optab, real, imag, NULL_RTX,
2584 0, OPTAB_LIB_WIDEN);
2586 /* Get sqrt in TARGET. Set TARGET to where the result is. */
2587 target = expand_unop (submode, sqrt_optab, total, target, 0);
2589 delete_insns_since (last);
2594 /* Now try a library call in this mode. */
2595 if (this_abs_optab->handlers[(int) mode].libfunc)
2602 /* Pass 1 for NO_QUEUE so we don't lose any increments
2603 if the libcall is cse'd or moved. */
2604 value = emit_library_call_value (abs_optab->handlers[(int) mode].libfunc,
2605 NULL_RTX, LCT_CONST, submode, 1, op0, mode);
2606 insns = get_insns ();
2609 target = gen_reg_rtx (submode);
2610 emit_libcall_block (insns, target, value,
2611 gen_rtx_fmt_e (this_abs_optab->code, mode, op0));
2616 /* It can't be done in this mode. Can we do it in a wider mode? */
2618 for (wider_mode = GET_MODE_WIDER_MODE (mode); wider_mode != VOIDmode;
2619 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
2621 if ((this_abs_optab->handlers[(int) wider_mode].insn_code
2622 != CODE_FOR_nothing)
2623 || this_abs_optab->handlers[(int) wider_mode].libfunc)
2627 xop0 = convert_modes (wider_mode, mode, xop0, unsignedp);
2629 temp = expand_complex_abs (wider_mode, xop0, NULL_RTX, unsignedp);
2633 if (class != MODE_COMPLEX_INT)
2636 target = gen_reg_rtx (submode);
2637 convert_move (target, temp, 0);
2641 return gen_lowpart (submode, temp);
2644 delete_insns_since (last);
2648 delete_insns_since (entry_last);
2652 /* Generate an instruction whose insn-code is INSN_CODE,
2653 with two operands: an output TARGET and an input OP0.
2654 TARGET *must* be nonzero, and the output is always stored there.
2655 CODE is an rtx code such that (CODE OP0) is an rtx that describes
2656 the value that is stored into TARGET. */
2659 emit_unop_insn (icode, target, op0, code)
2666 enum machine_mode mode0 = insn_data[icode].operand[1].mode;
2669 temp = target = protect_from_queue (target, 1);
2671 op0 = protect_from_queue (op0, 0);
2673 /* Sign and zero extension from memory is often done specially on
2674 RISC machines, so forcing into a register here can pessimize
2676 if (flag_force_mem && code != SIGN_EXTEND && code != ZERO_EXTEND)
2677 op0 = force_not_mem (op0);
2679 /* Now, if insn does not accept our operands, put them into pseudos. */
2681 if (! (*insn_data[icode].operand[1].predicate) (op0, mode0))
2682 op0 = copy_to_mode_reg (mode0, op0);
2684 if (! (*insn_data[icode].operand[0].predicate) (temp, GET_MODE (temp))
2685 || (flag_force_mem && GET_CODE (temp) == MEM))
2686 temp = gen_reg_rtx (GET_MODE (temp));
2688 pat = GEN_FCN (icode) (temp, op0);
2690 if (GET_CODE (pat) == SEQUENCE && code != UNKNOWN)
2691 add_equal_note (pat, temp, code, op0, NULL_RTX);
2696 emit_move_insn (target, temp);
2699 /* Emit code to perform a series of operations on a multi-word quantity, one
2702 Such a block is preceded by a CLOBBER of the output, consists of multiple
2703 insns, each setting one word of the output, and followed by a SET copying
2704 the output to itself.
2706 Each of the insns setting words of the output receives a REG_NO_CONFLICT
2707 note indicating that it doesn't conflict with the (also multi-word)
2708 inputs. The entire block is surrounded by REG_LIBCALL and REG_RETVAL
2711 INSNS is a block of code generated to perform the operation, not including
2712 the CLOBBER and final copy. All insns that compute intermediate values
2713 are first emitted, followed by the block as described above.
2715 TARGET, OP0, and OP1 are the output and inputs of the operations,
2716 respectively. OP1 may be zero for a unary operation.
2718 EQUIV, if non-zero, is an expression to be placed into a REG_EQUAL note
2721 If TARGET is not a register, INSNS is simply emitted with no special
2722 processing. Likewise if anything in INSNS is not an INSN or if
2723 there is a libcall block inside INSNS.
2725 The final insn emitted is returned. */
2728 emit_no_conflict_block (insns, target, op0, op1, equiv)
2734 rtx prev, next, first, last, insn;
2736 if (GET_CODE (target) != REG || reload_in_progress)
2737 return emit_insns (insns);
2739 for (insn = insns; insn; insn = NEXT_INSN (insn))
2740 if (GET_CODE (insn) != INSN
2741 || find_reg_note (insn, REG_LIBCALL, NULL_RTX))
2742 return emit_insns (insns);
2744 /* First emit all insns that do not store into words of the output and remove
2745 these from the list. */
2746 for (insn = insns; insn; insn = next)
2751 next = NEXT_INSN (insn);
2753 /* Some ports (cris) create an libcall regions at their own. We must
2754 avoid any potential nesting of LIBCALLs. */
2755 if ((note = find_reg_note (insn, REG_LIBCALL, NULL)) != NULL)
2756 remove_note (insn, note);
2757 if ((note = find_reg_note (insn, REG_RETVAL, NULL)) != NULL)
2758 remove_note (insn, note);
2760 if (GET_CODE (PATTERN (insn)) == SET || GET_CODE (PATTERN (insn)) == USE
2761 || GET_CODE (PATTERN (insn)) == CLOBBER)
2762 set = PATTERN (insn);
2763 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
2765 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
2766 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET)
2768 set = XVECEXP (PATTERN (insn), 0, i);
2776 if (! reg_overlap_mentioned_p (target, SET_DEST (set)))
2778 if (PREV_INSN (insn))
2779 NEXT_INSN (PREV_INSN (insn)) = next;
2784 PREV_INSN (next) = PREV_INSN (insn);
2790 prev = get_last_insn ();
2792 /* Now write the CLOBBER of the output, followed by the setting of each
2793 of the words, followed by the final copy. */
2794 if (target != op0 && target != op1)
2795 emit_insn (gen_rtx_CLOBBER (VOIDmode, target));
2797 for (insn = insns; insn; insn = next)
2799 next = NEXT_INSN (insn);
2802 if (op1 && GET_CODE (op1) == REG)
2803 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_NO_CONFLICT, op1,
2806 if (op0 && GET_CODE (op0) == REG)
2807 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_NO_CONFLICT, op0,
2811 if (mov_optab->handlers[(int) GET_MODE (target)].insn_code
2812 != CODE_FOR_nothing)
2814 last = emit_move_insn (target, target);
2816 set_unique_reg_note (last, REG_EQUAL, equiv);
2820 last = get_last_insn ();
2822 /* Remove any existing REG_EQUAL note from "last", or else it will
2823 be mistaken for a note referring to the full contents of the
2824 alleged libcall value when found together with the REG_RETVAL
2825 note added below. An existing note can come from an insn
2826 expansion at "last". */
2827 remove_note (last, find_reg_note (last, REG_EQUAL, NULL_RTX));
2831 first = get_insns ();
2833 first = NEXT_INSN (prev);
2835 /* Encapsulate the block so it gets manipulated as a unit. */
2836 REG_NOTES (first) = gen_rtx_INSN_LIST (REG_LIBCALL, last,
2838 REG_NOTES (last) = gen_rtx_INSN_LIST (REG_RETVAL, first, REG_NOTES (last));
2843 /* Emit code to make a call to a constant function or a library call.
2845 INSNS is a list containing all insns emitted in the call.
2846 These insns leave the result in RESULT. Our block is to copy RESULT
2847 to TARGET, which is logically equivalent to EQUIV.
2849 We first emit any insns that set a pseudo on the assumption that these are
2850 loading constants into registers; doing so allows them to be safely cse'ed
2851 between blocks. Then we emit all the other insns in the block, followed by
2852 an insn to move RESULT to TARGET. This last insn will have a REQ_EQUAL
2853 note with an operand of EQUIV.
2855 Moving assignments to pseudos outside of the block is done to improve
2856 the generated code, but is not required to generate correct code,
2857 hence being unable to move an assignment is not grounds for not making
2858 a libcall block. There are two reasons why it is safe to leave these
2859 insns inside the block: First, we know that these pseudos cannot be
2860 used in generated RTL outside the block since they are created for
2861 temporary purposes within the block. Second, CSE will not record the
2862 values of anything set inside a libcall block, so we know they must
2863 be dead at the end of the block.
2865 Except for the first group of insns (the ones setting pseudos), the
2866 block is delimited by REG_RETVAL and REG_LIBCALL notes. */
2869 emit_libcall_block (insns, target, result, equiv)
2875 rtx final_dest = target;
2876 rtx prev, next, first, last, insn;
2878 /* If this is a reg with REG_USERVAR_P set, then it could possibly turn
2879 into a MEM later. Protect the libcall block from this change. */
2880 if (! REG_P (target) || REG_USERVAR_P (target))
2881 target = gen_reg_rtx (GET_MODE (target));
2883 /* If we're using non-call exceptions, a libcall corresponding to an
2884 operation that may trap may also trap. */
2885 if (flag_non_call_exceptions && may_trap_p (equiv))
2887 for (insn = insns; insn; insn = NEXT_INSN (insn))
2888 if (GET_CODE (insn) == CALL_INSN)
2890 rtx note = find_reg_note (insn, REG_EH_REGION, NULL_RTX);
2892 if (note != 0 && INTVAL (XEXP (note, 0)) <= 0)
2893 remove_note (insn, note);
2897 /* look for any CALL_INSNs in this sequence, and attach a REG_EH_REGION
2898 reg note to indicate that this call cannot throw or execute a nonlocal
2899 goto (unless there is already a REG_EH_REGION note, in which case
2901 for (insn = insns; insn; insn = NEXT_INSN (insn))
2902 if (GET_CODE (insn) == CALL_INSN)
2904 rtx note = find_reg_note (insn, REG_EH_REGION, NULL_RTX);
2907 XEXP (note, 0) = GEN_INT (-1);
2909 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_EH_REGION, GEN_INT (-1),
2913 /* First emit all insns that set pseudos. Remove them from the list as
2914 we go. Avoid insns that set pseudos which were referenced in previous
2915 insns. These can be generated by move_by_pieces, for example,
2916 to update an address. Similarly, avoid insns that reference things
2917 set in previous insns. */
2919 for (insn = insns; insn; insn = next)
2921 rtx set = single_set (insn);
2924 /* Some ports (cris) create an libcall regions at their own. We must
2925 avoid any potential nesting of LIBCALLs. */
2926 if ((note = find_reg_note (insn, REG_LIBCALL, NULL)) != NULL)
2927 remove_note (insn, note);
2928 if ((note = find_reg_note (insn, REG_RETVAL, NULL)) != NULL)
2929 remove_note (insn, note);
2931 next = NEXT_INSN (insn);
2933 if (set != 0 && GET_CODE (SET_DEST (set)) == REG
2934 && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER
2936 || ((! INSN_P(insns)
2937 || ! reg_mentioned_p (SET_DEST (set), PATTERN (insns)))
2938 && ! reg_used_between_p (SET_DEST (set), insns, insn)
2939 && ! modified_in_p (SET_SRC (set), insns)
2940 && ! modified_between_p (SET_SRC (set), insns, insn))))
2942 if (PREV_INSN (insn))
2943 NEXT_INSN (PREV_INSN (insn)) = next;
2948 PREV_INSN (next) = PREV_INSN (insn);
2954 prev = get_last_insn ();
2956 /* Write the remaining insns followed by the final copy. */
2958 for (insn = insns; insn; insn = next)
2960 next = NEXT_INSN (insn);
2965 last = emit_move_insn (target, result);
2966 if (mov_optab->handlers[(int) GET_MODE (target)].insn_code
2967 != CODE_FOR_nothing)
2968 set_unique_reg_note (last, REG_EQUAL, copy_rtx (equiv));
2971 /* Remove any existing REG_EQUAL note from "last", or else it will
2972 be mistaken for a note referring to the full contents of the
2973 libcall value when found together with the REG_RETVAL note added
2974 below. An existing note can come from an insn expansion at
2976 remove_note (last, find_reg_note (last, REG_EQUAL, NULL_RTX));
2979 if (final_dest != target)
2980 emit_move_insn (final_dest, target);
2983 first = get_insns ();
2985 first = NEXT_INSN (prev);
2987 /* Encapsulate the block so it gets manipulated as a unit. */
2988 if (!flag_non_call_exceptions || !may_trap_p (equiv))
2990 REG_NOTES (first) = gen_rtx_INSN_LIST (REG_LIBCALL, last,
2992 REG_NOTES (last) = gen_rtx_INSN_LIST (REG_RETVAL, first,
2997 /* Generate code to store zero in X. */
3003 emit_move_insn (x, const0_rtx);
3006 /* Generate code to store 1 in X
3007 assuming it contains zero beforehand. */
3010 emit_0_to_1_insn (x)
3013 emit_move_insn (x, const1_rtx);
3016 /* Nonzero if we can perform a comparison of mode MODE straightforwardly.
3017 PURPOSE describes how this comparison will be used. CODE is the rtx
3018 comparison code we will be using.
3020 ??? Actually, CODE is slightly weaker than that. A target is still
3021 required to implement all of the normal bcc operations, but not
3022 required to implement all (or any) of the unordered bcc operations. */
3025 can_compare_p (code, mode, purpose)
3027 enum machine_mode mode;
3028 enum can_compare_purpose purpose;
3032 if (cmp_optab->handlers[(int)mode].insn_code != CODE_FOR_nothing)
3034 if (purpose == ccp_jump)
3035 return bcc_gen_fctn[(int)code] != NULL;
3036 else if (purpose == ccp_store_flag)
3037 return setcc_gen_code[(int)code] != CODE_FOR_nothing;
3039 /* There's only one cmov entry point, and it's allowed to fail. */
3042 if (purpose == ccp_jump
3043 && cbranch_optab->handlers[(int)mode].insn_code != CODE_FOR_nothing)
3045 if (purpose == ccp_cmov
3046 && cmov_optab->handlers[(int)mode].insn_code != CODE_FOR_nothing)
3048 if (purpose == ccp_store_flag
3049 && cstore_optab->handlers[(int)mode].insn_code != CODE_FOR_nothing)
3052 mode = GET_MODE_WIDER_MODE (mode);
3054 while (mode != VOIDmode);
3059 /* This function is called when we are going to emit a compare instruction that
3060 compares the values found in *PX and *PY, using the rtl operator COMPARISON.
3062 *PMODE is the mode of the inputs (in case they are const_int).
3063 *PUNSIGNEDP nonzero says that the operands are unsigned;
3064 this matters if they need to be widened.
3066 If they have mode BLKmode, then SIZE specifies the size of both operands.
3068 This function performs all the setup necessary so that the caller only has
3069 to emit a single comparison insn. This setup can involve doing a BLKmode
3070 comparison or emitting a library call to perform the comparison if no insn
3071 is available to handle it.
3072 The values which are passed in through pointers can be modified; the caller
3073 should perform the comparison on the modified values. */
3076 prepare_cmp_insn (px, py, pcomparison, size, pmode, punsignedp, purpose)
3078 enum rtx_code *pcomparison;
3080 enum machine_mode *pmode;
3082 enum can_compare_purpose purpose;
3084 enum machine_mode mode = *pmode;
3085 rtx x = *px, y = *py;
3086 int unsignedp = *punsignedp;
3087 enum mode_class class;
3089 class = GET_MODE_CLASS (mode);
3091 /* They could both be VOIDmode if both args are immediate constants,
3092 but we should fold that at an earlier stage.
3093 With no special code here, this will call abort,
3094 reminding the programmer to implement such folding. */
3096 if (mode != BLKmode && flag_force_mem)
3098 x = force_not_mem (x);
3099 y = force_not_mem (y);
3102 /* If we are inside an appropriately-short loop and one operand is an
3103 expensive constant, force it into a register. */
3104 if (CONSTANT_P (x) && preserve_subexpressions_p ()
3105 && rtx_cost (x, COMPARE) > COSTS_N_INSNS (1))
3106 x = force_reg (mode, x);
3108 if (CONSTANT_P (y) && preserve_subexpressions_p ()
3109 && rtx_cost (y, COMPARE) > COSTS_N_INSNS (1))
3110 y = force_reg (mode, y);
3113 /* Abort if we have a non-canonical comparison. The RTL documentation
3114 states that canonical comparisons are required only for targets which
3116 if (CONSTANT_P (x) && ! CONSTANT_P (y))
3120 /* Don't let both operands fail to indicate the mode. */
3121 if (GET_MODE (x) == VOIDmode && GET_MODE (y) == VOIDmode)
3122 x = force_reg (mode, x);
3124 /* Handle all BLKmode compares. */
3126 if (mode == BLKmode)
3129 enum machine_mode result_mode;
3130 rtx opalign ATTRIBUTE_UNUSED
3131 = GEN_INT (MIN (MEM_ALIGN (x), MEM_ALIGN (y)) / BITS_PER_UNIT);
3134 x = protect_from_queue (x, 0);
3135 y = protect_from_queue (y, 0);
3139 #ifdef HAVE_cmpstrqi
3141 && GET_CODE (size) == CONST_INT
3142 && INTVAL (size) < (1 << GET_MODE_BITSIZE (QImode)))
3144 result_mode = insn_data[(int) CODE_FOR_cmpstrqi].operand[0].mode;
3145 result = gen_reg_rtx (result_mode);
3146 emit_insn (gen_cmpstrqi (result, x, y, size, opalign));
3150 #ifdef HAVE_cmpstrhi
3152 && GET_CODE (size) == CONST_INT
3153 && INTVAL (size) < (1 << GET_MODE_BITSIZE (HImode)))
3155 result_mode = insn_data[(int) CODE_FOR_cmpstrhi].operand[0].mode;
3156 result = gen_reg_rtx (result_mode);
3157 emit_insn (gen_cmpstrhi (result, x, y, size, opalign));
3161 #ifdef HAVE_cmpstrsi
3164 result_mode = insn_data[(int) CODE_FOR_cmpstrsi].operand[0].mode;
3165 result = gen_reg_rtx (result_mode);
3166 size = protect_from_queue (size, 0);
3167 emit_insn (gen_cmpstrsi (result, x, y,
3168 convert_to_mode (SImode, size, 1),
3174 #ifdef TARGET_MEM_FUNCTIONS
3175 emit_library_call (memcmp_libfunc, LCT_PURE_MAKE_BLOCK,
3176 TYPE_MODE (integer_type_node), 3,
3177 XEXP (x, 0), Pmode, XEXP (y, 0), Pmode,
3178 convert_to_mode (TYPE_MODE (sizetype), size,
3179 TREE_UNSIGNED (sizetype)),
3180 TYPE_MODE (sizetype));
3182 emit_library_call (bcmp_libfunc, LCT_PURE_MAKE_BLOCK,
3183 TYPE_MODE (integer_type_node), 3,
3184 XEXP (x, 0), Pmode, XEXP (y, 0), Pmode,
3185 convert_to_mode (TYPE_MODE (integer_type_node),
3187 TREE_UNSIGNED (integer_type_node)),
3188 TYPE_MODE (integer_type_node));
3191 /* Immediately move the result of the libcall into a pseudo
3192 register so reload doesn't clobber the value if it needs
3193 the return register for a spill reg. */
3194 result = gen_reg_rtx (TYPE_MODE (integer_type_node));
3195 result_mode = TYPE_MODE (integer_type_node);
3196 emit_move_insn (result,
3197 hard_libcall_value (result_mode));
3201 *pmode = result_mode;
3207 if (can_compare_p (*pcomparison, mode, purpose))
3210 /* Handle a lib call just for the mode we are using. */
3212 if (cmp_optab->handlers[(int) mode].libfunc && class != MODE_FLOAT)
3214 rtx libfunc = cmp_optab->handlers[(int) mode].libfunc;
3217 /* If we want unsigned, and this mode has a distinct unsigned
3218 comparison routine, use that. */
3219 if (unsignedp && ucmp_optab->handlers[(int) mode].libfunc)
3220 libfunc = ucmp_optab->handlers[(int) mode].libfunc;
3222 emit_library_call (libfunc, LCT_CONST_MAKE_BLOCK, word_mode, 2, x, mode,
3225 /* Immediately move the result of the libcall into a pseudo
3226 register so reload doesn't clobber the value if it needs
3227 the return register for a spill reg. */
3228 result = gen_reg_rtx (word_mode);
3229 emit_move_insn (result, hard_libcall_value (word_mode));
3231 /* Integer comparison returns a result that must be compared against 1,
3232 so that even if we do an unsigned compare afterward,
3233 there is still a value that can represent the result "less than". */
3240 if (class == MODE_FLOAT)
3241 prepare_float_lib_cmp (px, py, pcomparison, pmode, punsignedp);
3247 /* Before emitting an insn with code ICODE, make sure that X, which is going
3248 to be used for operand OPNUM of the insn, is converted from mode MODE to
3249 WIDER_MODE (UNSIGNEDP determines whether it is an unsigned conversion), and
3250 that it is accepted by the operand predicate. Return the new value. */
3253 prepare_operand (icode, x, opnum, mode, wider_mode, unsignedp)
3257 enum machine_mode mode, wider_mode;
3260 x = protect_from_queue (x, 0);
3262 if (mode != wider_mode)
3263 x = convert_modes (wider_mode, mode, x, unsignedp);
3265 if (! (*insn_data[icode].operand[opnum].predicate)
3266 (x, insn_data[icode].operand[opnum].mode))
3267 x = copy_to_mode_reg (insn_data[icode].operand[opnum].mode, x);
3271 /* Subroutine of emit_cmp_and_jump_insns; this function is called when we know
3272 we can do the comparison.
3273 The arguments are the same as for emit_cmp_and_jump_insns; but LABEL may
3274 be NULL_RTX which indicates that only a comparison is to be generated. */
3277 emit_cmp_and_jump_insn_1 (x, y, mode, comparison, unsignedp, label)
3279 enum machine_mode mode;
3280 enum rtx_code comparison;
3284 rtx test = gen_rtx_fmt_ee (comparison, mode, x, y);
3285 enum mode_class class = GET_MODE_CLASS (mode);
3286 enum machine_mode wider_mode = mode;
3288 /* Try combined insns first. */
3291 enum insn_code icode;
3292 PUT_MODE (test, wider_mode);
3296 icode = cbranch_optab->handlers[(int)wider_mode].insn_code;
3298 if (icode != CODE_FOR_nothing
3299 && (*insn_data[icode].operand[0].predicate) (test, wider_mode))
3301 x = prepare_operand (icode, x, 1, mode, wider_mode, unsignedp);
3302 y = prepare_operand (icode, y, 2, mode, wider_mode, unsignedp);
3303 emit_jump_insn (GEN_FCN (icode) (test, x, y, label));
3308 /* Handle some compares against zero. */
3309 icode = (int) tst_optab->handlers[(int) wider_mode].insn_code;
3310 if (y == CONST0_RTX (mode) && icode != CODE_FOR_nothing)
3312 x = prepare_operand (icode, x, 0, mode, wider_mode, unsignedp);
3313 emit_insn (GEN_FCN (icode) (x));
3315 emit_jump_insn ((*bcc_gen_fctn[(int) comparison]) (label));
3319 /* Handle compares for which there is a directly suitable insn. */
3321 icode = (int) cmp_optab->handlers[(int) wider_mode].insn_code;
3322 if (icode != CODE_FOR_nothing)
3324 x = prepare_operand (icode, x, 0, mode, wider_mode, unsignedp);
3325 y = prepare_operand (icode, y, 1, mode, wider_mode, unsignedp);
3326 emit_insn (GEN_FCN (icode) (x, y));
3328 emit_jump_insn ((*bcc_gen_fctn[(int) comparison]) (label));
3332 if (class != MODE_INT && class != MODE_FLOAT
3333 && class != MODE_COMPLEX_FLOAT)
3336 wider_mode = GET_MODE_WIDER_MODE (wider_mode);
3337 } while (wider_mode != VOIDmode);
3342 /* Generate code to compare X with Y so that the condition codes are
3343 set and to jump to LABEL if the condition is true. If X is a
3344 constant and Y is not a constant, then the comparison is swapped to
3345 ensure that the comparison RTL has the canonical form.
3347 UNSIGNEDP nonzero says that X and Y are unsigned; this matters if they
3348 need to be widened by emit_cmp_insn. UNSIGNEDP is also used to select
3349 the proper branch condition code.
3351 If X and Y have mode BLKmode, then SIZE specifies the size of both X and Y.
3353 MODE is the mode of the inputs (in case they are const_int).
3355 COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.). It will
3356 be passed unchanged to emit_cmp_insn, then potentially converted into an
3357 unsigned variant based on UNSIGNEDP to select a proper jump instruction. */
3360 emit_cmp_and_jump_insns (x, y, comparison, size, mode, unsignedp, label)
3362 enum rtx_code comparison;
3364 enum machine_mode mode;
3368 rtx op0 = x, op1 = y;
3370 /* Swap operands and condition to ensure canonical RTL. */
3371 if (swap_commutative_operands_p (x, y))
3373 /* If we're not emitting a branch, this means some caller
3379 comparison = swap_condition (comparison);
3383 /* If OP0 is still a constant, then both X and Y must be constants. Force
3384 X into a register to avoid aborting in emit_cmp_insn due to non-canonical
3386 if (CONSTANT_P (op0))
3387 op0 = force_reg (mode, op0);
3392 comparison = unsigned_condition (comparison);
3394 prepare_cmp_insn (&op0, &op1, &comparison, size, &mode, &unsignedp,
3396 emit_cmp_and_jump_insn_1 (op0, op1, mode, comparison, unsignedp, label);
3399 /* Like emit_cmp_and_jump_insns, but generate only the comparison. */
3402 emit_cmp_insn (x, y, comparison, size, mode, unsignedp)
3404 enum rtx_code comparison;
3406 enum machine_mode mode;
3409 emit_cmp_and_jump_insns (x, y, comparison, size, mode, unsignedp, 0);
3412 /* Emit a library call comparison between floating point X and Y.
3413 COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.). */
3416 prepare_float_lib_cmp (px, py, pcomparison, pmode, punsignedp)
3418 enum rtx_code *pcomparison;
3419 enum machine_mode *pmode;
3422 enum rtx_code comparison = *pcomparison;
3423 rtx x = *px = protect_from_queue (*px, 0);
3424 rtx y = *py = protect_from_queue (*py, 0);
3425 enum machine_mode mode = GET_MODE (x);
3433 libfunc = eqhf2_libfunc;
3437 libfunc = nehf2_libfunc;
3441 libfunc = gthf2_libfunc;
3445 libfunc = gehf2_libfunc;
3449 libfunc = lthf2_libfunc;
3453 libfunc = lehf2_libfunc;
3457 libfunc = unordhf2_libfunc;
3463 else if (mode == SFmode)
3467 libfunc = eqsf2_libfunc;
3471 libfunc = nesf2_libfunc;
3475 libfunc = gtsf2_libfunc;
3479 libfunc = gesf2_libfunc;
3483 libfunc = ltsf2_libfunc;
3487 libfunc = lesf2_libfunc;
3491 libfunc = unordsf2_libfunc;
3497 else if (mode == DFmode)
3501 libfunc = eqdf2_libfunc;
3505 libfunc = nedf2_libfunc;
3509 libfunc = gtdf2_libfunc;
3513 libfunc = gedf2_libfunc;
3517 libfunc = ltdf2_libfunc;
3521 libfunc = ledf2_libfunc;
3525 libfunc = unorddf2_libfunc;
3531 else if (mode == XFmode)
3535 libfunc = eqxf2_libfunc;
3539 libfunc = nexf2_libfunc;
3543 libfunc = gtxf2_libfunc;
3547 libfunc = gexf2_libfunc;
3551 libfunc = ltxf2_libfunc;
3555 libfunc = lexf2_libfunc;
3559 libfunc = unordxf2_libfunc;
3565 else if (mode == TFmode)
3569 libfunc = eqtf2_libfunc;
3573 libfunc = netf2_libfunc;
3577 libfunc = gttf2_libfunc;
3581 libfunc = getf2_libfunc;
3585 libfunc = lttf2_libfunc;
3589 libfunc = letf2_libfunc;
3593 libfunc = unordtf2_libfunc;
3601 enum machine_mode wider_mode;
3603 for (wider_mode = GET_MODE_WIDER_MODE (mode); wider_mode != VOIDmode;
3604 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
3606 if ((cmp_optab->handlers[(int) wider_mode].insn_code
3607 != CODE_FOR_nothing)
3608 || (cmp_optab->handlers[(int) wider_mode].libfunc != 0))
3610 x = protect_from_queue (x, 0);
3611 y = protect_from_queue (y, 0);
3612 *px = convert_to_mode (wider_mode, x, 0);
3613 *py = convert_to_mode (wider_mode, y, 0);
3614 prepare_float_lib_cmp (px, py, pcomparison, pmode, punsignedp);
3624 emit_library_call (libfunc, LCT_CONST_MAKE_BLOCK, word_mode, 2, x, mode, y,
3627 /* Immediately move the result of the libcall into a pseudo
3628 register so reload doesn't clobber the value if it needs
3629 the return register for a spill reg. */
3630 result = gen_reg_rtx (word_mode);
3631 emit_move_insn (result, hard_libcall_value (word_mode));
3635 if (comparison == UNORDERED)
3637 #ifdef FLOAT_LIB_COMPARE_RETURNS_BOOL
3638 else if (FLOAT_LIB_COMPARE_RETURNS_BOOL (mode, comparison))
3644 /* Generate code to indirectly jump to a location given in the rtx LOC. */
3647 emit_indirect_jump (loc)
3650 if (! ((*insn_data[(int)CODE_FOR_indirect_jump].operand[0].predicate)
3652 loc = copy_to_mode_reg (Pmode, loc);
3654 emit_jump_insn (gen_indirect_jump (loc));
3658 #ifdef HAVE_conditional_move
3660 /* Emit a conditional move instruction if the machine supports one for that
3661 condition and machine mode.
3663 OP0 and OP1 are the operands that should be compared using CODE. CMODE is
3664 the mode to use should they be constants. If it is VOIDmode, they cannot
3667 OP2 should be stored in TARGET if the comparison is true, otherwise OP3
3668 should be stored there. MODE is the mode to use should they be constants.
3669 If it is VOIDmode, they cannot both be constants.
3671 The result is either TARGET (perhaps modified) or NULL_RTX if the operation
3672 is not supported. */
3675 emit_conditional_move (target, code, op0, op1, cmode, op2, op3, mode,
3680 enum machine_mode cmode;
3682 enum machine_mode mode;
3685 rtx tem, subtarget, comparison, insn;
3686 enum insn_code icode;
3687 enum rtx_code reversed;
3689 /* If one operand is constant, make it the second one. Only do this
3690 if the other operand is not constant as well. */
3692 if (swap_commutative_operands_p (op0, op1))
3697 code = swap_condition (code);
3700 /* get_condition will prefer to generate LT and GT even if the old
3701 comparison was against zero, so undo that canonicalization here since
3702 comparisons against zero are cheaper. */
3703 if (code == LT && GET_CODE (op1) == CONST_INT && INTVAL (op1) == 1)
3704 code = LE, op1 = const0_rtx;
3705 else if (code == GT && GET_CODE (op1) == CONST_INT && INTVAL (op1) == -1)
3706 code = GE, op1 = const0_rtx;
3708 if (cmode == VOIDmode)
3709 cmode = GET_MODE (op0);
3711 if (swap_commutative_operands_p (op2, op3)
3712 && ((reversed = reversed_comparison_code_parts (code, op0, op1, NULL))
3721 if (mode == VOIDmode)
3722 mode = GET_MODE (op2);
3724 icode = movcc_gen_code[mode];
3726 if (icode == CODE_FOR_nothing)
3731 op2 = force_not_mem (op2);
3732 op3 = force_not_mem (op3);
3736 target = protect_from_queue (target, 1);
3738 target = gen_reg_rtx (mode);
3744 op2 = protect_from_queue (op2, 0);
3745 op3 = protect_from_queue (op3, 0);
3747 /* If the insn doesn't accept these operands, put them in pseudos. */
3749 if (! (*insn_data[icode].operand[0].predicate)
3750 (subtarget, insn_data[icode].operand[0].mode))
3751 subtarget = gen_reg_rtx (insn_data[icode].operand[0].mode);
3753 if (! (*insn_data[icode].operand[2].predicate)
3754 (op2, insn_data[icode].operand[2].mode))
3755 op2 = copy_to_mode_reg (insn_data[icode].operand[2].mode, op2);
3757 if (! (*insn_data[icode].operand[3].predicate)
3758 (op3, insn_data[icode].operand[3].mode))
3759 op3 = copy_to_mode_reg (insn_data[icode].operand[3].mode, op3);
3761 /* Everything should now be in the suitable form, so emit the compare insn
3762 and then the conditional move. */
3765 = compare_from_rtx (op0, op1, code, unsignedp, cmode, NULL_RTX);
3767 /* ??? Watch for const0_rtx (nop) and const_true_rtx (unconditional)? */
3768 /* We can get const0_rtx or const_true_rtx in some circumstances. Just
3769 return NULL and let the caller figure out how best to deal with this
3771 if (GET_CODE (comparison) != code)
3774 insn = GEN_FCN (icode) (subtarget, comparison, op2, op3);
3776 /* If that failed, then give up. */
3782 if (subtarget != target)
3783 convert_move (target, subtarget, 0);
3788 /* Return non-zero if a conditional move of mode MODE is supported.
3790 This function is for combine so it can tell whether an insn that looks
3791 like a conditional move is actually supported by the hardware. If we
3792 guess wrong we lose a bit on optimization, but that's it. */
3793 /* ??? sparc64 supports conditionally moving integers values based on fp
3794 comparisons, and vice versa. How do we handle them? */
3797 can_conditionally_move_p (mode)
3798 enum machine_mode mode;
3800 if (movcc_gen_code[mode] != CODE_FOR_nothing)
3806 #endif /* HAVE_conditional_move */
3808 /* These functions generate an insn body and return it
3809 rather than emitting the insn.
3811 They do not protect from queued increments,
3812 because they may be used 1) in protect_from_queue itself
3813 and 2) in other passes where there is no queue. */
3815 /* Generate and return an insn body to add Y to X. */
3818 gen_add2_insn (x, y)
3821 int icode = (int) add_optab->handlers[(int) GET_MODE (x)].insn_code;
3823 if (! ((*insn_data[icode].operand[0].predicate)
3824 (x, insn_data[icode].operand[0].mode))
3825 || ! ((*insn_data[icode].operand[1].predicate)
3826 (x, insn_data[icode].operand[1].mode))
3827 || ! ((*insn_data[icode].operand[2].predicate)
3828 (y, insn_data[icode].operand[2].mode)))
3831 return (GEN_FCN (icode) (x, x, y));
3834 /* Generate and return an insn body to add r1 and c,
3835 storing the result in r0. */
3837 gen_add3_insn (r0, r1, c)
3840 int icode = (int) add_optab->handlers[(int) GET_MODE (r0)].insn_code;
3842 if (icode == CODE_FOR_nothing
3843 || ! ((*insn_data[icode].operand[0].predicate)
3844 (r0, insn_data[icode].operand[0].mode))
3845 || ! ((*insn_data[icode].operand[1].predicate)
3846 (r1, insn_data[icode].operand[1].mode))
3847 || ! ((*insn_data[icode].operand[2].predicate)
3848 (c, insn_data[icode].operand[2].mode)))
3851 return (GEN_FCN (icode) (r0, r1, c));
3855 have_add2_insn (x, y)
3860 if (GET_MODE (x) == VOIDmode)
3863 icode = (int) add_optab->handlers[(int) GET_MODE (x)].insn_code;
3865 if (icode == CODE_FOR_nothing)
3868 if (! ((*insn_data[icode].operand[0].predicate)
3869 (x, insn_data[icode].operand[0].mode))
3870 || ! ((*insn_data[icode].operand[1].predicate)
3871 (x, insn_data[icode].operand[1].mode))
3872 || ! ((*insn_data[icode].operand[2].predicate)
3873 (y, insn_data[icode].operand[2].mode)))
3879 /* Generate and return an insn body to subtract Y from X. */
3882 gen_sub2_insn (x, y)
3885 int icode = (int) sub_optab->handlers[(int) GET_MODE (x)].insn_code;
3887 if (! ((*insn_data[icode].operand[0].predicate)
3888 (x, insn_data[icode].operand[0].mode))
3889 || ! ((*insn_data[icode].operand[1].predicate)
3890 (x, insn_data[icode].operand[1].mode))
3891 || ! ((*insn_data[icode].operand[2].predicate)
3892 (y, insn_data[icode].operand[2].mode)))
3895 return (GEN_FCN (icode) (x, x, y));
3898 /* Generate and return an insn body to subtract r1 and c,
3899 storing the result in r0. */
3901 gen_sub3_insn (r0, r1, c)
3904 int icode = (int) sub_optab->handlers[(int) GET_MODE (r0)].insn_code;
3906 if (icode == CODE_FOR_nothing
3907 || ! ((*insn_data[icode].operand[0].predicate)
3908 (r0, insn_data[icode].operand[0].mode))
3909 || ! ((*insn_data[icode].operand[1].predicate)
3910 (r1, insn_data[icode].operand[1].mode))
3911 || ! ((*insn_data[icode].operand[2].predicate)
3912 (c, insn_data[icode].operand[2].mode)))
3915 return (GEN_FCN (icode) (r0, r1, c));
3919 have_sub2_insn (x, y)
3924 if (GET_MODE (x) == VOIDmode)
3927 icode = (int) sub_optab->handlers[(int) GET_MODE (x)].insn_code;
3929 if (icode == CODE_FOR_nothing)
3932 if (! ((*insn_data[icode].operand[0].predicate)
3933 (x, insn_data[icode].operand[0].mode))
3934 || ! ((*insn_data[icode].operand[1].predicate)
3935 (x, insn_data[icode].operand[1].mode))
3936 || ! ((*insn_data[icode].operand[2].predicate)
3937 (y, insn_data[icode].operand[2].mode)))
3943 /* Generate the body of an instruction to copy Y into X.
3944 It may be a SEQUENCE, if one insn isn't enough. */
3947 gen_move_insn (x, y)
3950 enum machine_mode mode = GET_MODE (x);
3951 enum insn_code insn_code;
3954 if (mode == VOIDmode)
3955 mode = GET_MODE (y);
3957 insn_code = mov_optab->handlers[(int) mode].insn_code;
3959 /* Handle MODE_CC modes: If we don't have a special move insn for this mode,
3960 find a mode to do it in. If we have a movcc, use it. Otherwise,
3961 find the MODE_INT mode of the same width. */
3963 if (GET_MODE_CLASS (mode) == MODE_CC && insn_code == CODE_FOR_nothing)
3965 enum machine_mode tmode = VOIDmode;
3969 && mov_optab->handlers[(int) CCmode].insn_code != CODE_FOR_nothing)
3972 for (tmode = QImode; tmode != VOIDmode;
3973 tmode = GET_MODE_WIDER_MODE (tmode))
3974 if (GET_MODE_SIZE (tmode) == GET_MODE_SIZE (mode))
3977 if (tmode == VOIDmode)
3980 /* Get X and Y in TMODE. We can't use gen_lowpart here because it
3981 may call change_address which is not appropriate if we were
3982 called when a reload was in progress. We don't have to worry
3983 about changing the address since the size in bytes is supposed to
3984 be the same. Copy the MEM to change the mode and move any
3985 substitutions from the old MEM to the new one. */
3987 if (reload_in_progress)
3989 x = gen_lowpart_common (tmode, x1);
3990 if (x == 0 && GET_CODE (x1) == MEM)
3992 x = adjust_address_nv (x1, tmode, 0);
3993 copy_replacements (x1, x);
3996 y = gen_lowpart_common (tmode, y1);
3997 if (y == 0 && GET_CODE (y1) == MEM)
3999 y = adjust_address_nv (y1, tmode, 0);
4000 copy_replacements (y1, y);
4005 x = gen_lowpart (tmode, x);
4006 y = gen_lowpart (tmode, y);
4009 insn_code = mov_optab->handlers[(int) tmode].insn_code;
4010 return (GEN_FCN (insn_code) (x, y));
4014 emit_move_insn_1 (x, y);
4015 seq = gen_sequence ();
4020 /* Return the insn code used to extend FROM_MODE to TO_MODE.
4021 UNSIGNEDP specifies zero-extension instead of sign-extension. If
4022 no such operation exists, CODE_FOR_nothing will be returned. */
4025 can_extend_p (to_mode, from_mode, unsignedp)
4026 enum machine_mode to_mode, from_mode;
4029 #ifdef HAVE_ptr_extend
4031 return CODE_FOR_ptr_extend;
4034 return extendtab[(int) to_mode][(int) from_mode][unsignedp != 0];
4037 /* Generate the body of an insn to extend Y (with mode MFROM)
4038 into X (with mode MTO). Do zero-extension if UNSIGNEDP is nonzero. */
4041 gen_extend_insn (x, y, mto, mfrom, unsignedp)
4043 enum machine_mode mto, mfrom;
4046 return (GEN_FCN (extendtab[(int) mto][(int) mfrom][unsignedp != 0]) (x, y));
4049 /* can_fix_p and can_float_p say whether the target machine
4050 can directly convert a given fixed point type to
4051 a given floating point type, or vice versa.
4052 The returned value is the CODE_FOR_... value to use,
4053 or CODE_FOR_nothing if these modes cannot be directly converted.
4055 *TRUNCP_PTR is set to 1 if it is necessary to output
4056 an explicit FTRUNC insn before the fix insn; otherwise 0. */
4058 static enum insn_code
4059 can_fix_p (fixmode, fltmode, unsignedp, truncp_ptr)
4060 enum machine_mode fltmode, fixmode;
4065 if (fixtrunctab[(int) fltmode][(int) fixmode][unsignedp != 0]
4066 != CODE_FOR_nothing)
4067 return fixtrunctab[(int) fltmode][(int) fixmode][unsignedp != 0];
4069 if (ftrunc_optab->handlers[(int) fltmode].insn_code != CODE_FOR_nothing)
4072 return fixtab[(int) fltmode][(int) fixmode][unsignedp != 0];
4074 return CODE_FOR_nothing;
4077 static enum insn_code
4078 can_float_p (fltmode, fixmode, unsignedp)
4079 enum machine_mode fixmode, fltmode;
4082 return floattab[(int) fltmode][(int) fixmode][unsignedp != 0];
4085 /* Generate code to convert FROM to floating point
4086 and store in TO. FROM must be fixed point and not VOIDmode.
4087 UNSIGNEDP nonzero means regard FROM as unsigned.
4088 Normally this is done by correcting the final value
4089 if it is negative. */
4092 expand_float (to, from, unsignedp)
4096 enum insn_code icode;
4098 enum machine_mode fmode, imode;
4100 /* Crash now, because we won't be able to decide which mode to use. */
4101 if (GET_MODE (from) == VOIDmode)
4104 /* Look for an insn to do the conversion. Do it in the specified
4105 modes if possible; otherwise convert either input, output or both to
4106 wider mode. If the integer mode is wider than the mode of FROM,
4107 we can do the conversion signed even if the input is unsigned. */
4109 for (imode = GET_MODE (from); imode != VOIDmode;
4110 imode = GET_MODE_WIDER_MODE (imode))
4111 for (fmode = GET_MODE (to); fmode != VOIDmode;
4112 fmode = GET_MODE_WIDER_MODE (fmode))
4114 int doing_unsigned = unsignedp;
4116 if (fmode != GET_MODE (to)
4117 && significand_size (fmode) < GET_MODE_BITSIZE (GET_MODE (from)))
4120 icode = can_float_p (fmode, imode, unsignedp);
4121 if (icode == CODE_FOR_nothing && imode != GET_MODE (from) && unsignedp)
4122 icode = can_float_p (fmode, imode, 0), doing_unsigned = 0;
4124 if (icode != CODE_FOR_nothing)
4126 to = protect_from_queue (to, 1);
4127 from = protect_from_queue (from, 0);
4129 if (imode != GET_MODE (from))
4130 from = convert_to_mode (imode, from, unsignedp);
4132 if (fmode != GET_MODE (to))
4133 target = gen_reg_rtx (fmode);
4135 emit_unop_insn (icode, target, from,
4136 doing_unsigned ? UNSIGNED_FLOAT : FLOAT);
4139 convert_move (to, target, 0);
4144 #if !defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
4146 /* Unsigned integer, and no way to convert directly.
4147 Convert as signed, then conditionally adjust the result. */
4150 rtx label = gen_label_rtx ();
4152 REAL_VALUE_TYPE offset;
4156 to = protect_from_queue (to, 1);
4157 from = protect_from_queue (from, 0);
4160 from = force_not_mem (from);
4162 /* Look for a usable floating mode FMODE wider than the source and at
4163 least as wide as the target. Using FMODE will avoid rounding woes
4164 with unsigned values greater than the signed maximum value. */
4166 for (fmode = GET_MODE (to); fmode != VOIDmode;
4167 fmode = GET_MODE_WIDER_MODE (fmode))
4168 if (GET_MODE_BITSIZE (GET_MODE (from)) < GET_MODE_BITSIZE (fmode)
4169 && can_float_p (fmode, GET_MODE (from), 0) != CODE_FOR_nothing)
4172 if (fmode == VOIDmode)
4174 /* There is no such mode. Pretend the target is wide enough. */
4175 fmode = GET_MODE (to);
4177 /* Avoid double-rounding when TO is narrower than FROM. */
4178 if ((significand_size (fmode) + 1)
4179 < GET_MODE_BITSIZE (GET_MODE (from)))
4182 rtx neglabel = gen_label_rtx ();
4184 /* Don't use TARGET if it isn't a register, is a hard register,
4185 or is the wrong mode. */
4186 if (GET_CODE (target) != REG
4187 || REGNO (target) < FIRST_PSEUDO_REGISTER
4188 || GET_MODE (target) != fmode)
4189 target = gen_reg_rtx (fmode);
4191 imode = GET_MODE (from);
4192 do_pending_stack_adjust ();
4194 /* Test whether the sign bit is set. */
4195 emit_cmp_and_jump_insns (from, const0_rtx, LT, NULL_RTX, imode,
4198 /* The sign bit is not set. Convert as signed. */
4199 expand_float (target, from, 0);
4200 emit_jump_insn (gen_jump (label));
4203 /* The sign bit is set.
4204 Convert to a usable (positive signed) value by shifting right
4205 one bit, while remembering if a nonzero bit was shifted
4206 out; i.e., compute (from & 1) | (from >> 1). */
4208 emit_label (neglabel);
4209 temp = expand_binop (imode, and_optab, from, const1_rtx,
4210 NULL_RTX, 1, OPTAB_LIB_WIDEN);
4211 temp1 = expand_shift (RSHIFT_EXPR, imode, from, integer_one_node,
4213 temp = expand_binop (imode, ior_optab, temp, temp1, temp, 1,
4215 expand_float (target, temp, 0);
4217 /* Multiply by 2 to undo the shift above. */
4218 temp = expand_binop (fmode, add_optab, target, target,
4219 target, 0, OPTAB_LIB_WIDEN);
4221 emit_move_insn (target, temp);
4223 do_pending_stack_adjust ();
4229 /* If we are about to do some arithmetic to correct for an
4230 unsigned operand, do it in a pseudo-register. */
4232 if (GET_MODE (to) != fmode
4233 || GET_CODE (to) != REG || REGNO (to) < FIRST_PSEUDO_REGISTER)
4234 target = gen_reg_rtx (fmode);
4236 /* Convert as signed integer to floating. */
4237 expand_float (target, from, 0);
4239 /* If FROM is negative (and therefore TO is negative),
4240 correct its value by 2**bitwidth. */
4242 do_pending_stack_adjust ();
4243 emit_cmp_and_jump_insns (from, const0_rtx, GE, NULL_RTX, GET_MODE (from),
4246 /* On SCO 3.2.1, ldexp rejects values outside [0.5, 1).
4247 Rather than setting up a dconst_dot_5, let's hope SCO
4249 offset = REAL_VALUE_LDEXP (dconst1, GET_MODE_BITSIZE (GET_MODE (from)));
4250 temp = expand_binop (fmode, add_optab, target,
4251 CONST_DOUBLE_FROM_REAL_VALUE (offset, fmode),
4252 target, 0, OPTAB_LIB_WIDEN);
4254 emit_move_insn (target, temp);
4256 do_pending_stack_adjust ();
4262 /* No hardware instruction available; call a library routine to convert from
4263 SImode, DImode, or TImode into SFmode, DFmode, XFmode, or TFmode. */
4269 to = protect_from_queue (to, 1);
4270 from = protect_from_queue (from, 0);
4272 if (GET_MODE_SIZE (GET_MODE (from)) < GET_MODE_SIZE (SImode))
4273 from = convert_to_mode (SImode, from, unsignedp);
4276 from = force_not_mem (from);
4278 if (GET_MODE (to) == SFmode)
4280 if (GET_MODE (from) == SImode)
4281 libfcn = floatsisf_libfunc;
4282 else if (GET_MODE (from) == DImode)
4283 libfcn = floatdisf_libfunc;
4284 else if (GET_MODE (from) == TImode)
4285 libfcn = floattisf_libfunc;
4289 else if (GET_MODE (to) == DFmode)
4291 if (GET_MODE (from) == SImode)
4292 libfcn = floatsidf_libfunc;
4293 else if (GET_MODE (from) == DImode)
4294 libfcn = floatdidf_libfunc;
4295 else if (GET_MODE (from) == TImode)
4296 libfcn = floattidf_libfunc;
4300 else if (GET_MODE (to) == XFmode)
4302 if (GET_MODE (from) == SImode)
4303 libfcn = floatsixf_libfunc;
4304 else if (GET_MODE (from) == DImode)
4305 libfcn = floatdixf_libfunc;
4306 else if (GET_MODE (from) == TImode)
4307 libfcn = floattixf_libfunc;
4311 else if (GET_MODE (to) == TFmode)
4313 if (GET_MODE (from) == SImode)
4314 libfcn = floatsitf_libfunc;
4315 else if (GET_MODE (from) == DImode)
4316 libfcn = floatditf_libfunc;
4317 else if (GET_MODE (from) == TImode)
4318 libfcn = floattitf_libfunc;
4327 value = emit_library_call_value (libfcn, NULL_RTX, LCT_CONST,
4328 GET_MODE (to), 1, from,
4330 insns = get_insns ();
4333 emit_libcall_block (insns, target, value,
4334 gen_rtx_FLOAT (GET_MODE (to), from));
4339 /* Copy result to requested destination
4340 if we have been computing in a temp location. */
4344 if (GET_MODE (target) == GET_MODE (to))
4345 emit_move_insn (to, target);
4347 convert_move (to, target, 0);
4351 /* expand_fix: generate code to convert FROM to fixed point
4352 and store in TO. FROM must be floating point. */
4358 rtx temp = gen_reg_rtx (GET_MODE (x));
4359 return expand_unop (GET_MODE (x), ftrunc_optab, x, temp, 0);
4363 expand_fix (to, from, unsignedp)
4367 enum insn_code icode;
4369 enum machine_mode fmode, imode;
4373 /* We first try to find a pair of modes, one real and one integer, at
4374 least as wide as FROM and TO, respectively, in which we can open-code
4375 this conversion. If the integer mode is wider than the mode of TO,
4376 we can do the conversion either signed or unsigned. */
4378 for (fmode = GET_MODE (from); fmode != VOIDmode;
4379 fmode = GET_MODE_WIDER_MODE (fmode))
4380 for (imode = GET_MODE (to); imode != VOIDmode;
4381 imode = GET_MODE_WIDER_MODE (imode))
4383 int doing_unsigned = unsignedp;
4385 icode = can_fix_p (imode, fmode, unsignedp, &must_trunc);
4386 if (icode == CODE_FOR_nothing && imode != GET_MODE (to) && unsignedp)
4387 icode = can_fix_p (imode, fmode, 0, &must_trunc), doing_unsigned = 0;
4389 if (icode != CODE_FOR_nothing)
4391 to = protect_from_queue (to, 1);
4392 from = protect_from_queue (from, 0);
4394 if (fmode != GET_MODE (from))
4395 from = convert_to_mode (fmode, from, 0);
4398 from = ftruncify (from);
4400 if (imode != GET_MODE (to))
4401 target = gen_reg_rtx (imode);
4403 emit_unop_insn (icode, target, from,
4404 doing_unsigned ? UNSIGNED_FIX : FIX);
4406 convert_move (to, target, unsignedp);
4411 #if !defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
4412 /* For an unsigned conversion, there is one more way to do it.
4413 If we have a signed conversion, we generate code that compares
4414 the real value to the largest representable positive number. If if
4415 is smaller, the conversion is done normally. Otherwise, subtract
4416 one plus the highest signed number, convert, and add it back.
4418 We only need to check all real modes, since we know we didn't find
4419 anything with a wider integer mode. */
4421 if (unsignedp && GET_MODE_BITSIZE (GET_MODE (to)) <= HOST_BITS_PER_WIDE_INT)
4422 for (fmode = GET_MODE (from); fmode != VOIDmode;
4423 fmode = GET_MODE_WIDER_MODE (fmode))
4424 /* Make sure we won't lose significant bits doing this. */
4425 if (GET_MODE_BITSIZE (fmode) > GET_MODE_BITSIZE (GET_MODE (to))
4426 && CODE_FOR_nothing != can_fix_p (GET_MODE (to), fmode, 0,
4430 REAL_VALUE_TYPE offset;
4431 rtx limit, lab1, lab2, insn;
4433 bitsize = GET_MODE_BITSIZE (GET_MODE (to));
4434 offset = REAL_VALUE_LDEXP (dconst1, bitsize - 1);
4435 limit = CONST_DOUBLE_FROM_REAL_VALUE (offset, fmode);
4436 lab1 = gen_label_rtx ();
4437 lab2 = gen_label_rtx ();
4440 to = protect_from_queue (to, 1);
4441 from = protect_from_queue (from, 0);
4444 from = force_not_mem (from);
4446 if (fmode != GET_MODE (from))
4447 from = convert_to_mode (fmode, from, 0);
4449 /* See if we need to do the subtraction. */
4450 do_pending_stack_adjust ();
4451 emit_cmp_and_jump_insns (from, limit, GE, NULL_RTX, GET_MODE (from),
4454 /* If not, do the signed "fix" and branch around fixup code. */
4455 expand_fix (to, from, 0);
4456 emit_jump_insn (gen_jump (lab2));
4459 /* Otherwise, subtract 2**(N-1), convert to signed number,
4460 then add 2**(N-1). Do the addition using XOR since this
4461 will often generate better code. */
4463 target = expand_binop (GET_MODE (from), sub_optab, from, limit,
4464 NULL_RTX, 0, OPTAB_LIB_WIDEN);
4465 expand_fix (to, target, 0);
4466 target = expand_binop (GET_MODE (to), xor_optab, to,
4467 GEN_INT (trunc_int_for_mode
4468 ((HOST_WIDE_INT) 1 << (bitsize - 1),
4470 to, 1, OPTAB_LIB_WIDEN);
4473 emit_move_insn (to, target);
4477 if (mov_optab->handlers[(int) GET_MODE (to)].insn_code
4478 != CODE_FOR_nothing)
4480 /* Make a place for a REG_NOTE and add it. */
4481 insn = emit_move_insn (to, to);
4482 set_unique_reg_note (insn,
4484 gen_rtx_fmt_e (UNSIGNED_FIX,
4493 /* We can't do it with an insn, so use a library call. But first ensure
4494 that the mode of TO is at least as wide as SImode, since those are the
4495 only library calls we know about. */
4497 if (GET_MODE_SIZE (GET_MODE (to)) < GET_MODE_SIZE (SImode))
4499 target = gen_reg_rtx (SImode);
4501 expand_fix (target, from, unsignedp);
4503 else if (GET_MODE (from) == SFmode)
4505 if (GET_MODE (to) == SImode)
4506 libfcn = unsignedp ? fixunssfsi_libfunc : fixsfsi_libfunc;
4507 else if (GET_MODE (to) == DImode)
4508 libfcn = unsignedp ? fixunssfdi_libfunc : fixsfdi_libfunc;
4509 else if (GET_MODE (to) == TImode)
4510 libfcn = unsignedp ? fixunssfti_libfunc : fixsfti_libfunc;
4514 else if (GET_MODE (from) == DFmode)
4516 if (GET_MODE (to) == SImode)
4517 libfcn = unsignedp ? fixunsdfsi_libfunc : fixdfsi_libfunc;
4518 else if (GET_MODE (to) == DImode)
4519 libfcn = unsignedp ? fixunsdfdi_libfunc : fixdfdi_libfunc;
4520 else if (GET_MODE (to) == TImode)
4521 libfcn = unsignedp ? fixunsdfti_libfunc : fixdfti_libfunc;
4525 else if (GET_MODE (from) == XFmode)
4527 if (GET_MODE (to) == SImode)
4528 libfcn = unsignedp ? fixunsxfsi_libfunc : fixxfsi_libfunc;
4529 else if (GET_MODE (to) == DImode)
4530 libfcn = unsignedp ? fixunsxfdi_libfunc : fixxfdi_libfunc;
4531 else if (GET_MODE (to) == TImode)
4532 libfcn = unsignedp ? fixunsxfti_libfunc : fixxfti_libfunc;
4536 else if (GET_MODE (from) == TFmode)
4538 if (GET_MODE (to) == SImode)
4539 libfcn = unsignedp ? fixunstfsi_libfunc : fixtfsi_libfunc;
4540 else if (GET_MODE (to) == DImode)
4541 libfcn = unsignedp ? fixunstfdi_libfunc : fixtfdi_libfunc;
4542 else if (GET_MODE (to) == TImode)
4543 libfcn = unsignedp ? fixunstfti_libfunc : fixtfti_libfunc;
4555 to = protect_from_queue (to, 1);
4556 from = protect_from_queue (from, 0);
4559 from = force_not_mem (from);
4563 value = emit_library_call_value (libfcn, NULL_RTX, LCT_CONST,
4564 GET_MODE (to), 1, from,
4566 insns = get_insns ();
4569 emit_libcall_block (insns, target, value,
4570 gen_rtx_fmt_e (unsignedp ? UNSIGNED_FIX : FIX,
4571 GET_MODE (to), from));
4576 if (GET_MODE (to) == GET_MODE (target))
4577 emit_move_insn (to, target);
4579 convert_move (to, target, 0);
4583 /* Report whether we have an instruction to perform the operation
4584 specified by CODE on operands of mode MODE. */
4586 have_insn_for (code, mode)
4588 enum machine_mode mode;
4590 return (code_to_optab[(int) code] != 0
4591 && (code_to_optab[(int) code]->handlers[(int) mode].insn_code
4592 != CODE_FOR_nothing));
4595 /* Create a blank optab. */
4600 optab op = (optab) xmalloc (sizeof (struct optab));
4601 for (i = 0; i < NUM_MACHINE_MODES; i++)
4603 op->handlers[i].insn_code = CODE_FOR_nothing;
4604 op->handlers[i].libfunc = 0;
4610 /* Same, but fill in its code as CODE, and write it into the
4611 code_to_optab table. */
4616 optab op = new_optab ();
4618 code_to_optab[(int) code] = op;
4622 /* Same, but fill in its code as CODE, and do _not_ write it into
4623 the code_to_optab table. */
4628 optab op = new_optab ();
4633 /* Initialize the libfunc fields of an entire group of entries in some
4634 optab. Each entry is set equal to a string consisting of a leading
4635 pair of underscores followed by a generic operation name followed by
4636 a mode name (downshifted to lower case) followed by a single character
4637 representing the number of operands for the given operation (which is
4638 usually one of the characters '2', '3', or '4').
4640 OPTABLE is the table in which libfunc fields are to be initialized.
4641 FIRST_MODE is the first machine mode index in the given optab to
4643 LAST_MODE is the last machine mode index in the given optab to
4645 OPNAME is the generic (string) name of the operation.
4646 SUFFIX is the character which specifies the number of operands for
4647 the given generic operation.
4651 init_libfuncs (optable, first_mode, last_mode, opname, suffix)
4659 unsigned opname_len = strlen (opname);
4661 for (mode = first_mode; (int) mode <= (int) last_mode;
4662 mode = (enum machine_mode) ((int) mode + 1))
4664 const char *mname = GET_MODE_NAME(mode);
4665 unsigned mname_len = strlen (mname);
4666 char *libfunc_name = alloca (2 + opname_len + mname_len + 1 + 1);
4673 for (q = opname; *q; )
4675 for (q = mname; *q; q++)
4676 *p++ = TOLOWER (*q);
4680 optable->handlers[(int) mode].libfunc
4681 = gen_rtx_SYMBOL_REF (Pmode, ggc_alloc_string (libfunc_name,
4686 /* Initialize the libfunc fields of an entire group of entries in some
4687 optab which correspond to all integer mode operations. The parameters
4688 have the same meaning as similarly named ones for the `init_libfuncs'
4689 routine. (See above). */
4692 init_integral_libfuncs (optable, opname, suffix)
4697 init_libfuncs (optable, SImode, TImode, opname, suffix);
4700 /* Initialize the libfunc fields of an entire group of entries in some
4701 optab which correspond to all real mode operations. The parameters
4702 have the same meaning as similarly named ones for the `init_libfuncs'
4703 routine. (See above). */
4706 init_floating_libfuncs (optable, opname, suffix)
4711 init_libfuncs (optable, SFmode, TFmode, opname, suffix);
4715 init_one_libfunc (name)
4718 /* Create a FUNCTION_DECL that can be passed to ENCODE_SECTION_INFO. */
4719 /* ??? We don't have any type information except for this is
4720 a function. Pretend this is "int foo()". */
4721 tree decl = build_decl (FUNCTION_DECL, get_identifier (name),
4722 build_function_type (integer_type_node, NULL_TREE));
4723 DECL_ARTIFICIAL (decl) = 1;
4724 DECL_EXTERNAL (decl) = 1;
4725 TREE_PUBLIC (decl) = 1;
4727 /* Return the symbol_ref from the mem rtx. */
4728 return XEXP (DECL_RTL (decl), 0);
4731 /* Mark ARG (which is really an OPTAB *) for GC. */
4737 optab o = *(optab *) arg;
4740 for (i = 0; i < NUM_MACHINE_MODES; ++i)
4741 ggc_mark_rtx (o->handlers[i].libfunc);
4744 /* Call this once to initialize the contents of the optabs
4745 appropriately for the current target machine. */
4750 unsigned int i, j, k;
4752 /* Start by initializing all tables to contain CODE_FOR_nothing. */
4754 for (i = 0; i < ARRAY_SIZE (fixtab); i++)
4755 for (j = 0; j < ARRAY_SIZE (fixtab[0]); j++)
4756 for (k = 0; k < ARRAY_SIZE (fixtab[0][0]); k++)
4757 fixtab[i][j][k] = CODE_FOR_nothing;
4759 for (i = 0; i < ARRAY_SIZE (fixtrunctab); i++)
4760 for (j = 0; j < ARRAY_SIZE (fixtrunctab[0]); j++)
4761 for (k = 0; k < ARRAY_SIZE (fixtrunctab[0][0]); k++)
4762 fixtrunctab[i][j][k] = CODE_FOR_nothing;
4764 for (i = 0; i < ARRAY_SIZE (floattab); i++)
4765 for (j = 0; j < ARRAY_SIZE (floattab[0]); j++)
4766 for (k = 0; k < ARRAY_SIZE (floattab[0][0]); k++)
4767 floattab[i][j][k] = CODE_FOR_nothing;
4769 for (i = 0; i < ARRAY_SIZE (extendtab); i++)
4770 for (j = 0; j < ARRAY_SIZE (extendtab[0]); j++)
4771 for (k = 0; k < ARRAY_SIZE (extendtab[0][0]); k++)
4772 extendtab[i][j][k] = CODE_FOR_nothing;
4774 for (i = 0; i < NUM_RTX_CODE; i++)
4775 setcc_gen_code[i] = CODE_FOR_nothing;
4777 #ifdef HAVE_conditional_move
4778 for (i = 0; i < NUM_MACHINE_MODES; i++)
4779 movcc_gen_code[i] = CODE_FOR_nothing;
4782 add_optab = init_optab (PLUS);
4783 addv_optab = init_optabv (PLUS);
4784 sub_optab = init_optab (MINUS);
4785 subv_optab = init_optabv (MINUS);
4786 smul_optab = init_optab (MULT);
4787 smulv_optab = init_optabv (MULT);
4788 smul_highpart_optab = init_optab (UNKNOWN);
4789 umul_highpart_optab = init_optab (UNKNOWN);
4790 smul_widen_optab = init_optab (UNKNOWN);
4791 umul_widen_optab = init_optab (UNKNOWN);
4792 sdiv_optab = init_optab (DIV);
4793 sdivv_optab = init_optabv (DIV);
4794 sdivmod_optab = init_optab (UNKNOWN);
4795 udiv_optab = init_optab (UDIV);
4796 udivmod_optab = init_optab (UNKNOWN);
4797 smod_optab = init_optab (MOD);
4798 umod_optab = init_optab (UMOD);
4799 ftrunc_optab = init_optab (UNKNOWN);
4800 and_optab = init_optab (AND);
4801 ior_optab = init_optab (IOR);
4802 xor_optab = init_optab (XOR);
4803 ashl_optab = init_optab (ASHIFT);
4804 ashr_optab = init_optab (ASHIFTRT);
4805 lshr_optab = init_optab (LSHIFTRT);
4806 rotl_optab = init_optab (ROTATE);
4807 rotr_optab = init_optab (ROTATERT);
4808 smin_optab = init_optab (SMIN);
4809 smax_optab = init_optab (SMAX);
4810 umin_optab = init_optab (UMIN);
4811 umax_optab = init_optab (UMAX);
4813 /* These three have codes assigned exclusively for the sake of
4815 mov_optab = init_optab (SET);
4816 movstrict_optab = init_optab (STRICT_LOW_PART);
4817 cmp_optab = init_optab (COMPARE);
4819 ucmp_optab = init_optab (UNKNOWN);
4820 tst_optab = init_optab (UNKNOWN);
4821 neg_optab = init_optab (NEG);
4822 negv_optab = init_optabv (NEG);
4823 abs_optab = init_optab (ABS);
4824 absv_optab = init_optabv (ABS);
4825 one_cmpl_optab = init_optab (NOT);
4826 ffs_optab = init_optab (FFS);
4827 sqrt_optab = init_optab (SQRT);
4828 sin_optab = init_optab (UNKNOWN);
4829 cos_optab = init_optab (UNKNOWN);
4830 strlen_optab = init_optab (UNKNOWN);
4831 cbranch_optab = init_optab (UNKNOWN);
4832 cmov_optab = init_optab (UNKNOWN);
4833 cstore_optab = init_optab (UNKNOWN);
4834 push_optab = init_optab (UNKNOWN);
4836 for (i = 0; i < NUM_MACHINE_MODES; i++)
4838 movstr_optab[i] = CODE_FOR_nothing;
4839 clrstr_optab[i] = CODE_FOR_nothing;
4841 #ifdef HAVE_SECONDARY_RELOADS
4842 reload_in_optab[i] = reload_out_optab[i] = CODE_FOR_nothing;
4846 /* Fill in the optabs with the insns we support. */
4849 #ifdef FIXUNS_TRUNC_LIKE_FIX_TRUNC
4850 /* This flag says the same insns that convert to a signed fixnum
4851 also convert validly to an unsigned one. */
4852 for (i = 0; i < NUM_MACHINE_MODES; i++)
4853 for (j = 0; j < NUM_MACHINE_MODES; j++)
4854 fixtrunctab[i][j][1] = fixtrunctab[i][j][0];
4857 /* Initialize the optabs with the names of the library functions. */
4858 init_integral_libfuncs (add_optab, "add", '3');
4859 init_floating_libfuncs (add_optab, "add", '3');
4860 init_integral_libfuncs (addv_optab, "addv", '3');
4861 init_floating_libfuncs (addv_optab, "add", '3');
4862 init_integral_libfuncs (sub_optab, "sub", '3');
4863 init_floating_libfuncs (sub_optab, "sub", '3');
4864 init_integral_libfuncs (subv_optab, "subv", '3');
4865 init_floating_libfuncs (subv_optab, "sub", '3');
4866 init_integral_libfuncs (smul_optab, "mul", '3');
4867 init_floating_libfuncs (smul_optab, "mul", '3');
4868 init_integral_libfuncs (smulv_optab, "mulv", '3');
4869 init_floating_libfuncs (smulv_optab, "mul", '3');
4870 init_integral_libfuncs (sdiv_optab, "div", '3');
4871 init_floating_libfuncs (sdiv_optab, "div", '3');
4872 init_integral_libfuncs (sdivv_optab, "divv", '3');
4873 init_integral_libfuncs (udiv_optab, "udiv", '3');
4874 init_integral_libfuncs (sdivmod_optab, "divmod", '4');
4875 init_integral_libfuncs (udivmod_optab, "udivmod", '4');
4876 init_integral_libfuncs (smod_optab, "mod", '3');
4877 init_integral_libfuncs (umod_optab, "umod", '3');
4878 init_floating_libfuncs (ftrunc_optab, "ftrunc", '2');
4879 init_integral_libfuncs (and_optab, "and", '3');
4880 init_integral_libfuncs (ior_optab, "ior", '3');
4881 init_integral_libfuncs (xor_optab, "xor", '3');
4882 init_integral_libfuncs (ashl_optab, "ashl", '3');
4883 init_integral_libfuncs (ashr_optab, "ashr", '3');
4884 init_integral_libfuncs (lshr_optab, "lshr", '3');
4885 init_integral_libfuncs (smin_optab, "min", '3');
4886 init_floating_libfuncs (smin_optab, "min", '3');
4887 init_integral_libfuncs (smax_optab, "max", '3');
4888 init_floating_libfuncs (smax_optab, "max", '3');
4889 init_integral_libfuncs (umin_optab, "umin", '3');
4890 init_integral_libfuncs (umax_optab, "umax", '3');
4891 init_integral_libfuncs (neg_optab, "neg", '2');
4892 init_floating_libfuncs (neg_optab, "neg", '2');
4893 init_integral_libfuncs (negv_optab, "negv", '2');
4894 init_floating_libfuncs (negv_optab, "neg", '2');
4895 init_integral_libfuncs (one_cmpl_optab, "one_cmpl", '2');
4896 init_integral_libfuncs (ffs_optab, "ffs", '2');
4898 /* Comparison libcalls for integers MUST come in pairs, signed/unsigned. */
4899 init_integral_libfuncs (cmp_optab, "cmp", '2');
4900 init_integral_libfuncs (ucmp_optab, "ucmp", '2');
4901 init_floating_libfuncs (cmp_optab, "cmp", '2');
4903 #ifdef MULSI3_LIBCALL
4904 smul_optab->handlers[(int) SImode].libfunc
4905 = init_one_libfunc (MULSI3_LIBCALL);
4907 #ifdef MULDI3_LIBCALL
4908 smul_optab->handlers[(int) DImode].libfunc
4909 = init_one_libfunc (MULDI3_LIBCALL);
4912 #ifdef DIVSI3_LIBCALL
4913 sdiv_optab->handlers[(int) SImode].libfunc
4914 = init_one_libfunc (DIVSI3_LIBCALL);
4916 #ifdef DIVDI3_LIBCALL
4917 sdiv_optab->handlers[(int) DImode].libfunc
4918 = init_one_libfunc (DIVDI3_LIBCALL);
4921 #ifdef UDIVSI3_LIBCALL
4922 udiv_optab->handlers[(int) SImode].libfunc
4923 = init_one_libfunc (UDIVSI3_LIBCALL);
4925 #ifdef UDIVDI3_LIBCALL
4926 udiv_optab->handlers[(int) DImode].libfunc
4927 = init_one_libfunc (UDIVDI3_LIBCALL);
4930 #ifdef MODSI3_LIBCALL
4931 smod_optab->handlers[(int) SImode].libfunc
4932 = init_one_libfunc (MODSI3_LIBCALL);
4934 #ifdef MODDI3_LIBCALL
4935 smod_optab->handlers[(int) DImode].libfunc
4936 = init_one_libfunc (MODDI3_LIBCALL);
4939 #ifdef UMODSI3_LIBCALL
4940 umod_optab->handlers[(int) SImode].libfunc
4941 = init_one_libfunc (UMODSI3_LIBCALL);
4943 #ifdef UMODDI3_LIBCALL
4944 umod_optab->handlers[(int) DImode].libfunc
4945 = init_one_libfunc (UMODDI3_LIBCALL);
4948 /* Use cabs for DC complex abs, since systems generally have cabs.
4949 Don't define any libcall for SCmode, so that cabs will be used. */
4950 abs_optab->handlers[(int) DCmode].libfunc
4951 = init_one_libfunc ("cabs");
4953 /* The ffs function operates on `int'. */
4954 ffs_optab->handlers[(int) mode_for_size (INT_TYPE_SIZE, MODE_INT, 0)].libfunc
4955 = init_one_libfunc ("ffs");
4957 extendsfdf2_libfunc = init_one_libfunc ("__extendsfdf2");
4958 extendsfxf2_libfunc = init_one_libfunc ("__extendsfxf2");
4959 extendsftf2_libfunc = init_one_libfunc ("__extendsftf2");
4960 extenddfxf2_libfunc = init_one_libfunc ("__extenddfxf2");
4961 extenddftf2_libfunc = init_one_libfunc ("__extenddftf2");
4963 truncdfsf2_libfunc = init_one_libfunc ("__truncdfsf2");
4964 truncxfsf2_libfunc = init_one_libfunc ("__truncxfsf2");
4965 trunctfsf2_libfunc = init_one_libfunc ("__trunctfsf2");
4966 truncxfdf2_libfunc = init_one_libfunc ("__truncxfdf2");
4967 trunctfdf2_libfunc = init_one_libfunc ("__trunctfdf2");
4969 abort_libfunc = init_one_libfunc ("abort");
4970 memcpy_libfunc = init_one_libfunc ("memcpy");
4971 memmove_libfunc = init_one_libfunc ("memmove");
4972 bcopy_libfunc = init_one_libfunc ("bcopy");
4973 memcmp_libfunc = init_one_libfunc ("memcmp");
4974 bcmp_libfunc = init_one_libfunc ("__gcc_bcmp");
4975 memset_libfunc = init_one_libfunc ("memset");
4976 bzero_libfunc = init_one_libfunc ("bzero");
4978 unwind_resume_libfunc = init_one_libfunc (USING_SJLJ_EXCEPTIONS
4979 ? "_Unwind_SjLj_Resume"
4980 : "_Unwind_Resume");
4981 #ifndef DONT_USE_BUILTIN_SETJMP
4982 setjmp_libfunc = init_one_libfunc ("__builtin_setjmp");
4983 longjmp_libfunc = init_one_libfunc ("__builtin_longjmp");
4985 setjmp_libfunc = init_one_libfunc ("setjmp");
4986 longjmp_libfunc = init_one_libfunc ("longjmp");
4988 unwind_sjlj_register_libfunc = init_one_libfunc ("_Unwind_SjLj_Register");
4989 unwind_sjlj_unregister_libfunc
4990 = init_one_libfunc ("_Unwind_SjLj_Unregister");
4992 eqhf2_libfunc = init_one_libfunc ("__eqhf2");
4993 nehf2_libfunc = init_one_libfunc ("__nehf2");
4994 gthf2_libfunc = init_one_libfunc ("__gthf2");
4995 gehf2_libfunc = init_one_libfunc ("__gehf2");
4996 lthf2_libfunc = init_one_libfunc ("__lthf2");
4997 lehf2_libfunc = init_one_libfunc ("__lehf2");
4998 unordhf2_libfunc = init_one_libfunc ("__unordhf2");
5000 eqsf2_libfunc = init_one_libfunc ("__eqsf2");
5001 nesf2_libfunc = init_one_libfunc ("__nesf2");
5002 gtsf2_libfunc = init_one_libfunc ("__gtsf2");
5003 gesf2_libfunc = init_one_libfunc ("__gesf2");
5004 ltsf2_libfunc = init_one_libfunc ("__ltsf2");
5005 lesf2_libfunc = init_one_libfunc ("__lesf2");
5006 unordsf2_libfunc = init_one_libfunc ("__unordsf2");
5008 eqdf2_libfunc = init_one_libfunc ("__eqdf2");
5009 nedf2_libfunc = init_one_libfunc ("__nedf2");
5010 gtdf2_libfunc = init_one_libfunc ("__gtdf2");
5011 gedf2_libfunc = init_one_libfunc ("__gedf2");
5012 ltdf2_libfunc = init_one_libfunc ("__ltdf2");
5013 ledf2_libfunc = init_one_libfunc ("__ledf2");
5014 unorddf2_libfunc = init_one_libfunc ("__unorddf2");
5016 eqxf2_libfunc = init_one_libfunc ("__eqxf2");
5017 nexf2_libfunc = init_one_libfunc ("__nexf2");
5018 gtxf2_libfunc = init_one_libfunc ("__gtxf2");
5019 gexf2_libfunc = init_one_libfunc ("__gexf2");
5020 ltxf2_libfunc = init_one_libfunc ("__ltxf2");
5021 lexf2_libfunc = init_one_libfunc ("__lexf2");
5022 unordxf2_libfunc = init_one_libfunc ("__unordxf2");
5024 eqtf2_libfunc = init_one_libfunc ("__eqtf2");
5025 netf2_libfunc = init_one_libfunc ("__netf2");
5026 gttf2_libfunc = init_one_libfunc ("__gttf2");
5027 getf2_libfunc = init_one_libfunc ("__getf2");
5028 lttf2_libfunc = init_one_libfunc ("__lttf2");
5029 letf2_libfunc = init_one_libfunc ("__letf2");
5030 unordtf2_libfunc = init_one_libfunc ("__unordtf2");
5032 floatsisf_libfunc = init_one_libfunc ("__floatsisf");
5033 floatdisf_libfunc = init_one_libfunc ("__floatdisf");
5034 floattisf_libfunc = init_one_libfunc ("__floattisf");
5036 floatsidf_libfunc = init_one_libfunc ("__floatsidf");
5037 floatdidf_libfunc = init_one_libfunc ("__floatdidf");
5038 floattidf_libfunc = init_one_libfunc ("__floattidf");
5040 floatsixf_libfunc = init_one_libfunc ("__floatsixf");
5041 floatdixf_libfunc = init_one_libfunc ("__floatdixf");
5042 floattixf_libfunc = init_one_libfunc ("__floattixf");
5044 floatsitf_libfunc = init_one_libfunc ("__floatsitf");
5045 floatditf_libfunc = init_one_libfunc ("__floatditf");
5046 floattitf_libfunc = init_one_libfunc ("__floattitf");
5048 fixsfsi_libfunc = init_one_libfunc ("__fixsfsi");
5049 fixsfdi_libfunc = init_one_libfunc ("__fixsfdi");
5050 fixsfti_libfunc = init_one_libfunc ("__fixsfti");
5052 fixdfsi_libfunc = init_one_libfunc ("__fixdfsi");
5053 fixdfdi_libfunc = init_one_libfunc ("__fixdfdi");
5054 fixdfti_libfunc = init_one_libfunc ("__fixdfti");
5056 fixxfsi_libfunc = init_one_libfunc ("__fixxfsi");
5057 fixxfdi_libfunc = init_one_libfunc ("__fixxfdi");
5058 fixxfti_libfunc = init_one_libfunc ("__fixxfti");
5060 fixtfsi_libfunc = init_one_libfunc ("__fixtfsi");
5061 fixtfdi_libfunc = init_one_libfunc ("__fixtfdi");
5062 fixtfti_libfunc = init_one_libfunc ("__fixtfti");
5064 fixunssfsi_libfunc = init_one_libfunc ("__fixunssfsi");
5065 fixunssfdi_libfunc = init_one_libfunc ("__fixunssfdi");
5066 fixunssfti_libfunc = init_one_libfunc ("__fixunssfti");
5068 fixunsdfsi_libfunc = init_one_libfunc ("__fixunsdfsi");
5069 fixunsdfdi_libfunc = init_one_libfunc ("__fixunsdfdi");
5070 fixunsdfti_libfunc = init_one_libfunc ("__fixunsdfti");
5072 fixunsxfsi_libfunc = init_one_libfunc ("__fixunsxfsi");
5073 fixunsxfdi_libfunc = init_one_libfunc ("__fixunsxfdi");
5074 fixunsxfti_libfunc = init_one_libfunc ("__fixunsxfti");
5076 fixunstfsi_libfunc = init_one_libfunc ("__fixunstfsi");
5077 fixunstfdi_libfunc = init_one_libfunc ("__fixunstfdi");
5078 fixunstfti_libfunc = init_one_libfunc ("__fixunstfti");
5080 /* For function entry/exit instrumentation. */
5081 profile_function_entry_libfunc
5082 = init_one_libfunc ("__cyg_profile_func_enter");
5083 profile_function_exit_libfunc
5084 = init_one_libfunc ("__cyg_profile_func_exit");
5086 #ifdef HAVE_conditional_trap
5090 #ifdef INIT_TARGET_OPTABS
5091 /* Allow the target to add more libcalls or rename some, etc. */
5095 /* Add these GC roots. */
5096 ggc_add_root (optab_table, OTI_MAX, sizeof(optab), mark_optab);
5097 ggc_add_rtx_root (libfunc_table, LTI_MAX);
5100 #ifdef HAVE_conditional_trap
5101 /* The insn generating function can not take an rtx_code argument.
5102 TRAP_RTX is used as an rtx argument. Its code is replaced with
5103 the code to be used in the trap insn and all other fields are
5105 static rtx trap_rtx;
5110 if (HAVE_conditional_trap)
5112 trap_rtx = gen_rtx_fmt_ee (EQ, VOIDmode, NULL_RTX, NULL_RTX);
5113 ggc_add_rtx_root (&trap_rtx, 1);
5118 /* Generate insns to trap with code TCODE if OP1 and OP2 satisfy condition
5119 CODE. Return 0 on failure. */
5122 gen_cond_trap (code, op1, op2, tcode)
5123 enum rtx_code code ATTRIBUTE_UNUSED;
5124 rtx op1, op2 ATTRIBUTE_UNUSED, tcode ATTRIBUTE_UNUSED;
5126 enum machine_mode mode = GET_MODE (op1);
5128 if (mode == VOIDmode)
5131 #ifdef HAVE_conditional_trap
5132 if (HAVE_conditional_trap
5133 && cmp_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
5137 emit_insn (GEN_FCN (cmp_optab->handlers[(int) mode].insn_code) (op1, op2));
5138 PUT_CODE (trap_rtx, code);
5139 insn = gen_conditional_trap (trap_rtx, tcode);
5143 insn = gen_sequence ();